Circuit system based on cascaded bidirectional gallium nitride
By using a bootstrap negative voltage gate drive and clamping coordinated circuit system, the problem of excessive temperature rise caused by substrate error in Bi-GaN devices during high-voltage bidirectional commutation is solved, and safe and reliable circuit drive and device protection are achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- GANEXT (ZHUHAI) TECH CO LTD
- Filing Date
- 2025-12-25
- Publication Date
- 2026-05-29
AI Technical Summary
In high-voltage bidirectional commutation of Bi-GaN devices, if the substrate is in a floating or biased state, the dynamic resistance will increase, which will lead to the risk of excessive temperature rise and damage.
A bootstrap negative gate drive and clamping coordination circuit system is adopted. Through a first field-effect transistor, a bidirectional gallium nitride device and a second field-effect transistor connected in series, a substrate selection switch, a negative gate drive network and a clamping and holding network are used to suppress self-triggering caused by the charging of the device body capacitor and prevent the substrate selection switch from being turned on at the same time.
It achieves self-drive based on voltage swing without the need for isolated power supply or external detection. It has the advantages of symmetrical structure, controlled device withstand voltage, zero crossover and no shoot-through, and insensitivity to voltage change rate, thus avoiding damage due to excessive temperature rise.
Smart Images
Figure CN121396174B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of integrated circuit manufacturing, and in particular to a circuit system based on cascaded bidirectional gallium nitride used in the manufacture of special equipment for semiconductor devices such as dedicated lithography machines and etching machines. Background Technology
[0002] Gallium nitride (GaN) is a compound semiconductor material, belonging to the third generation of semiconductor materials. It possesses excellent physical and electrical properties, such as high electron mobility, high saturation electron velocity, high breakdown electric field strength, and high thermal conductivity. These characteristics make gallium nitride a promising candidate for applications in high-frequency, high-temperature, high-power, and optoelectronic fields.
[0003] In the structure of power cascaded bidirectional depletion mode (D-mode) gallium nitride devices, the potential of the substrate (backplane) electrodes needs to be switched and clamped in real time. This is suitable for high-voltage bidirectional power commutation scenarios, such as H-bridge PFC, bidirectional single-stage AC-DC DAB, Vienna PFC, photovoltaic micro-inverters, OBC, and other scenarios.
[0004] Bilateral GaN (Bi-GaN) devices offer advantages such as low output charge, high-speed switching, full control over forward and reverse conduction, small wafer area, and low cost in high-voltage bidirectional commutation. However, if the substrate of a Bi-GaN device is "floating" or incorrectly biased during commutation, it can cause an increase in dynamic resistance, leading to a risk of overheating and damage during operation. Summary of the Invention
[0005] This invention provides a circuit system based on cascaded bidirectional gallium nitride, which realizes a bootstrap, in-sampling negative voltage gate drive and clamping coordination circuit system.
[0006] This invention provides a circuit system based on cascaded bidirectional gallium nitride, comprising:
[0007] A first field-effect transistor, a bidirectional gallium nitride device, and a second field-effect transistor are connected in series, wherein a first substrate selection switch is connected between the substrate electrode of the bidirectional gallium nitride device and the first source of the first field-effect transistor, and a second substrate selection switch is connected between the substrate electrode of the bidirectional gallium nitride device and the second source of the second field-effect transistor.
[0008] A first negative voltage gate drive network is connected between the first substrate selection switch and the first source and the first drain of the first field-effect transistor to generate a drive signal to drive the first substrate selection switch to turn on; a second negative voltage gate drive network is connected between the second substrate selection switch and the second source and the second drain of the second field-effect transistor to generate a drive signal to drive the second substrate selection switch to turn on.
[0009] A first clamping and holding network is also connected between the first substrate selection switch and the first source and the first drain of the first field-effect transistor. When the voltage between the first source and the first drain is low, the network is turned on to clamp the voltage at one end of the connected first substrate selection switch to zero. When the voltage between the first source and the first drain is high, the network maintains the negative bias of the first substrate selection switch.
[0010] A second clamping network is also connected between the second substrate selection switch and the second source and the second drain of the second field-effect transistor. When the voltage between the second source and the second drain is low, the network is turned on to clamp the voltage at one end of the connected second substrate selection switch to zero. When the voltage between the second source and the second drain is high, the network maintains the negative bias of the second substrate selection switch.
[0011] As can be seen, the circuit system based on cascaded bidirectional gallium nitride in this embodiment includes a first field-effect transistor, a bidirectional gallium nitride device, and a second field-effect transistor connected in series; a substrate selection switch connecting the substrate electrode of the bidirectional gallium nitride device to the source of each field-effect transistor; a negative voltage gate drive network for driving each substrate selection switch; and a clamping and holding network for clamping or maintaining the voltage at one end of each substrate selection switch to suppress "self-triggering" caused by the charging of the device body capacitor under the voltage change rate (i.e., dv / dt), and to prevent two substrate selection switches from conducting simultaneously and forming a shoot-through. In this way, there is no need for isolated power supply or external detection, and the drive is entirely driven by the swing of the voltage between the source and drain of the two series-connected field-effect transistors. It also has the advantages of symmetrical structure, controlled device withstand voltage, zero crossover and no shoot-through, and insensitivity to voltage change rate. Attached Figure Description
[0012] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0013] Figure 1 This is a schematic diagram of a circuit system based on cascaded bidirectional gallium nitride provided in an embodiment of the present invention;
[0014] Figure 2a This is a schematic diagram of the first negative pressure gate drive network in an embodiment of the present invention;
[0015] Figure 2b This is a schematic diagram of the second negative pressure gate drive network in an embodiment of the present invention;
[0016] Figure 3a This is a schematic diagram of the first clamping network in an embodiment of the present invention;
[0017] Figure 3b This is a schematic diagram of the second clamping network in an embodiment of the present invention;
[0018] Figure 4 This is a schematic diagram of a circuit system based on cascaded bidirectional gallium nitride provided in an application embodiment of the present invention;
[0019] Figure 5 This is a schematic diagram of the circuit system when the second field-effect transistor is turned off in one application embodiment of the present invention;
[0020] Figure 6 This is a schematic diagram of the circuit system when the second field-effect transistor is turned on in one application embodiment of the present invention;
[0021] Figure 7 This is a schematic diagram of a circuit system based on cascaded bidirectional gallium nitride provided in another application embodiment of the present invention. Detailed Implementation
[0022] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0023] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a particular order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention described herein can be implemented, for example, in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0024] This invention provides a circuit system based on cascaded bidirectional gallium nitride, such as... Figure 1 As shown, for Figure 1 As shown, a black dot between two intersecting lines indicates a conductive connection between them, while the absence of a black dot indicates no conductive connection. The circuit system based on cascaded bidirectional gallium nitride in this embodiment of the invention mainly includes:
[0025] The first field-effect transistor T1 connected in series (i.e. Figure 1 T1), bidirectional gallium nitride device 11 and first field-effect transistor T2 (i.e. Figure 1 In the bidirectional gallium nitride device 11, a first substrate selection switch 13 is connected between the substrate electrode Sub of the bidirectional gallium nitride device 11 and the first source S1 of the first field-effect transistor T1, and a second substrate selection switch 16 is connected between the substrate electrode Sub of the bidirectional gallium nitride device 11 and the second source S2 of the first field-effect transistor T2.
[0026] A first negative voltage gate drive network 14 is connected between the first substrate selection switch 13 and the first source S1 and the first drain D1 of the first field-effect transistor T1 to generate a drive signal to drive the first substrate selection switch 13 to conduct; a second negative voltage gate drive network 17 is connected between the second substrate selection switch 16 and the second source S2 and the second drain D2 of the first field-effect transistor T2 to generate a drive signal to drive the second substrate selection switch 16 to conduct.
[0027] A first clamping network 15 is also connected between the first substrate selection switch 13 and the first source S1 and the first drain D1 of the first field-effect transistor T1, for maintaining the first substrate selection switch 13 off when the potential between the first source S1 and the first drain D1 does not change.
[0028] A second clamping network 18 is also connected between the second substrate selection switch 16 and the second source S2 and the second drain D2 of the first field-effect transistor T2, for maintaining the second substrate selection switch 16 off when the potential between the second source S2 and the second drain D2 does not change.
[0029] Specifically, when the first substrate selection switch 13 is turned on, the potential between the second source S2 and the second drain D2 of the first field-effect transistor T2 does not change, and the second substrate selection switch 16 is kept off by the second clamping network 18; when the second substrate selection switch 16 is turned on, the potential between the first source S1 and the first drain D1 of the first field-effect transistor T1 does not change, and the first substrate selection switch 13 is kept off by the first clamping network 15.
[0030] Furthermore, in the specific implementation of the circuit system of this embodiment, the first substrate selection switch 13, the first negative voltage gate drive network 14 and the first clamping and holding network 15, and the second substrate selection switch 16, the second negative voltage gate drive network 17 and the second clamping and holding network 18 are respectively disposed symmetrically between the substrate electrode Sub and the first source S1, and between the substrate electrode Sub and the second source S2.
[0031] Specifically, in the circuit system of this embodiment:
[0032] The first field-effect transistors T1 and T2 are low-voltage metal-oxide-semiconductor field-effect transistors (MOSFETs), and a bidirectional gallium nitride device 11 is connected in series between the first field-effect transistors T1 and T2.
[0033] In a high-frequency switch, when the bidirectional gallium nitride device 11 is turned off during the negative half-cycle of the voltage, the voltage between the first source S1 of the first field-effect transistor T1 and the second source S2 of the first field-effect transistor T2 is less than zero, i.e., V S1S2 When the voltage is less than 0, the first substrate selection switch 13 shorts the substrate electrode Sub to the first source S1; when the bidirectional gallium nitride device 11 is turned off during the positive half-cycle of the voltage, that is, when the voltage between the first source S1 of the first field-effect transistor T1 and the second source S2 of the first field-effect transistor T2 is greater than zero V, the voltage is greater than zero V. S1S2 When the value is greater than 0, the second substrate selection switch 16 shorts the substrate electrode Sub to the second source S2. During this process, the first substrate selection switch 13 and the second substrate selection switch 16 can be in the off state at the same time, but they will not be in the on state at the same time.
[0034] Specifically, to connect a first substrate selection switch 13 between the substrate electrode Sub of the bidirectional gallium nitride device 11 and the first source S1 of the first field-effect transistor T1, a first high-voltage PNP transistor and a first high-voltage diode can be connected in parallel between the substrate electrode Sub of the bidirectional gallium nitride device 11 and the first source S1 of the first field-effect transistor T1. In this case, a first negative voltage gate drive network 14 and a first clamping and holding network 15 are connected between the base of the first high-voltage PNP transistor and the first source S1 and first drain D1 of the first field-effect transistor T1, so that the first clamping and holding network 15 clamps the base potential of the first high-voltage PNP transistor to zero.
[0035] Alternatively, a first high-voltage p-type metal-oxide-semiconductor (PMOS) field-effect transistor is connected between the substrate electrode Sub of the bidirectional gallium nitride device 11 and the first source S1 of the first field-effect transistor T1. In this case, a first negative gate drive network 14 and a first clamping and holding network 15 are connected between the gate of the first high-voltage p-type pMOS field-effect transistor and the first source S1 and first drain D1 of the first field-effect transistor T1, such that the first clamping and holding network 15 clamps the gate potential of the first high-voltage p-type pMOS field-effect transistor to zero.
[0036] Similarly, to connect a second substrate selection switch 16 between the substrate electrode Sub of the bidirectional gallium nitride device 11 and the second source S2 of the first field-effect transistor T2, a second high-voltage PNP transistor and a second high-voltage diode can be connected in parallel between the substrate electrode Sub of the bidirectional gallium nitride device 11 and the second source S2 of the first field-effect transistor T2. In this case, a second negative voltage gate drive network 17 and a second clamping network 18 are connected between the base of the second high-voltage PNP transistor and the second source S2 and second drain D2 of the first field-effect transistor T2, so that the second clamping network 18 clamps the base potential of the second high-voltage PNP transistor to zero.
[0037] Alternatively, a second high-voltage p-type metal-oxide-semiconductor (PMOS) field-effect transistor is connected between the substrate electrode Sub of the bidirectional gallium nitride device 11 and the second source S2 of the first field-effect transistor T2. In this case, a second negative gate drive network 17 and a second clamping network 18 are connected between the gate of the second high-voltage PMOS field-effect transistor and the second source S2 and second drain D2 of the first field-effect transistor T2, such that the second clamping network 18 clamps the gate potential of the second high-voltage PMOS field-effect transistor to zero.
[0038] The first substrate selection switch 13 and the second substrate selection switch 16 mentioned above are both high-voltage semiconductor devices with the same voltage level as the bidirectional gallium nitride device 11.
[0039] Furthermore, the aforementioned first negative voltage gate drive network 14 is for driving the first substrate selection switch 13 to turn on. Specifically, the first negative voltage gate drive network 14 can utilize the voltage V between the first source S1 and the first drain D1 of the first field-effect transistor T1. D1S1 A transition is generated at one end connected to the first substrate selection switch 13, which is related to V. D1S1A negative voltage of opposite polarity causes the first substrate selection switch 13 to operate only at the voltage V corresponding to the first field-effect transistor T1. D1S1 To conduct at a low potential, the substrate electrode Sub of the bidirectional gallium nitride device 11 is dynamically and preferentially shorted to the lower potential end of the first source S1 of the first field-effect transistor T1. Specifically, the first negative voltage gate drive network 14 can be an inverting charge pump, including: a first capacitor and a diode connected in series, which are connected in parallel with another inverting diode, and then connected in series with a second capacitor between the first source S1 and the first drain D1. Further, one end of the first capacitor in the first negative voltage gate drive network 14 is connected to the first substrate selection switch 13, and a resistor is connected in parallel across the first capacitor to discharge and stabilize the gate G of the first substrate selection switch 13 in steady state.
[0040] like Figure 2a As shown, the first negative voltage gate drive network 14 includes: a first capacitor C111 and a diode D11 connected in series, a first capacitor C111 connected in parallel with an inverting diode D10, and a second capacitor C10 connected between S1 and D1 of the first field-effect transistor T1. One end of the first capacitor C11 is connected to the gate G of the first substrate selection switch 13, and the first capacitor C11 is connected in parallel with a resistor R10.
[0041] The aforementioned second negative gate drive network 17 is for driving the second substrate selection switch 16 to turn on. Specifically, the second negative gate drive network 17 can utilize the voltage V between the second source S2 and the second drain D2 of the first field-effect transistor T2. D2S2 A transition is generated at one end connected to the second substrate selection switch 16, which is related to V. D2S2 A negative voltage of opposite polarity causes the second substrate selector switch 16 to operate only when the voltage V corresponding to the first field-effect transistor T2 is applied. D2S2 To conduct at a low potential, the substrate electrode Sub of the bidirectional gallium nitride device 11 is dynamically and preferentially shorted to the lower potential end of the second source S2 of the first field-effect transistor T2. Specifically, the second negative voltage gate drive network 17 can be an inverting charge pump, including: a first capacitor and a diode connected in series, which are connected in parallel with another inverting diode, and then connected in series with the second capacitor between the second source S1 and the second drain D2. Further, one end of the first capacitor in the second negative voltage gate drive network 17 is connected to the second substrate selection switch 16, and a resistor is connected in parallel across the first capacitor to discharge and stabilize the gate G of the second substrate selection switch 16 in steady state.
[0042] like Figure 2bAs shown, the second negative voltage gate drive network 17 includes: a first capacitor C21 and a diode D21 connected in series, which are connected in parallel with an inverting diode D20, and then connected in parallel with the second capacitor C20 between S2 and D2 of the first field-effect transistor T2. One end of the first capacitor C21 is connected to the gate G of the second substrate selection switch 16, and the first capacitor C21 is connected in parallel with a resistor R20.
[0043] Furthermore, the aforementioned first clamping network 15 is used to maintain the first substrate selection switch 13 off when the potential between the first source S1 and the first drain D1 does not change. Specifically:
[0044] The first clamping network 15 may include: a first P-channel junction field-effect transistor (P-JFET), a diode, a resistor, and a capacitor, wherein: the diode and the capacitor are connected in series and then connected between the first source S1 and the first drain D1 of the first field-effect transistor T1; the diode and the resistor are connected in parallel and then connected to the gate of the first P-channel junction field-effect transistor; the source and drain of the first P-channel junction field-effect transistor are respectively connected to the source and gate of the first substrate selection switch 13.
[0045] For example Figure 3a As shown, the first P-channel junction field-effect transistor Q11, together with capacitor C12, diode D12, and resistor R11, forms a first clamping network 15. When the first field-effect transistor T1 is turned on, i.e., V... D1S1 When the voltage is approximately 0, the first P-channel junction field-effect transistor Q11 is turned on, increasing the voltage V between the gate and source of the first substrate select switch 13. GS The voltage is clamped to zero, maintaining the first substrate selection switch 13 off. When the voltage V between the first source S1 and the first drain D1... D1S1 When the voltage is raised to a high level, such as 12~18V, the first P-channel junction field-effect transistor Q11 is turned off, and the first substrate selection switch 13 can be turned on under the drive of the first negative voltage gate drive network 14.
[0046] The second clamping network 18 described above is used to maintain the second substrate selection switch 16 off when the potential between the second source S2 and the second drain D2 does not change. Specifically:
[0047] The second clamping network 18 may include: a second P-channel junction field-effect transistor (P-JFET), a diode, a resistor, and a capacitor, wherein: the diode and the capacitor are connected in series and then connected between the second source S2 and the second drain D2 of the first field-effect transistor T2; the diode and the resistor are connected in parallel and then connected to the gate of the second P-channel junction field-effect transistor; the source and drain of the second P-channel junction field-effect transistor are respectively connected to the source and gate of the second substrate selection switch 16.
[0048] For example Figure 3b As shown, the second P-channel junction field-effect transistor Q21, together with capacitor C22, diode D22, and resistor R21, forms a second clamping network 18. When the first field-effect transistor T2 is turned on, i.e., V... D2S2 When the voltage is approximately 0, the second P-channel junction field-effect transistor Q21 is turned on, which increases the voltage V between the gate and source of the second substrate select switch 16. GS The voltage is clamped to zero, maintaining the off state of the second substrate selection switch 16. When the voltage V between the second source S2 and the second drain D2... D2S2 When the voltage is raised to a high level, such as 12~18V, the second P-channel junction field-effect transistor Q21 is turned off, and the second substrate selection switch 16 can be turned on under the drive of the second negative voltage gate drive network 17.
[0049] In other embodiments, the first P-channel junction field-effect transistor and the second P-channel junction field-effect transistor can be replaced with other semiconductor devices that have an equivalent turn-off clamping function.
[0050] Furthermore, a first voltage regulator can be connected between the gate and source of the first substrate selection switch 13 to limit the voltage between the gate and source of the first substrate selection switch 13 within a safe range (e.g., 18 V). A second voltage regulator is connected between the gate and source of the second substrate selection switch 16 to limit the voltage between the gate and source of the second substrate selection switch 16 to a safe range (e.g., 18 V). 18 V).
[0051] As can be seen, the circuit system based on cascaded bidirectional gallium nitride in this embodiment includes a first field-effect transistor, a bidirectional gallium nitride device, and a second field-effect transistor connected in series; a substrate selection switch connecting the substrate electrode of the bidirectional gallium nitride device to the source of each field-effect transistor; a negative voltage gate drive network for driving each substrate selection switch; and a clamping and holding network for clamping or maintaining the voltage at one end of each substrate selection switch to suppress "self-triggering" caused by the charging of the device body capacitor under the voltage change rate (i.e., dv / dt), and to prevent two substrate selection switches from conducting simultaneously and forming a shoot-through. In this way, there is no need for isolated power supply or external detection, and the drive is entirely driven by the swing of the voltage between the source and drain of the two series-connected field-effect transistors. It also has the advantages of symmetrical structure, controlled device withstand voltage, zero crossover and no shoot-through, and insensitivity to voltage change rate.
[0052] The following specific application example illustrates the circuit system based on cascaded bidirectional gallium nitride in this invention, such as... Figure 4 As shown, it includes: a first field-effect transistor T1, a bidirectional gallium nitride device 11, and a second field-effect transistor T2 connected in series. Both the first field-effect transistor T1 and the second field-effect transistor T2 are low-voltage field-effect transistors. A substrate selection switch, a negative voltage gate drive network, and a clamping network are symmetrically distributed between the first source S1 of the first field-effect transistor T1 and the substrate electrode Sub of the bidirectional gallium nitride device 11, and between the second source S2 of the second field-effect transistor T2 and the substrate electrode Sub of the bidirectional gallium nitride device 11. Specifically:
[0053] The first substrate selection switch connected between the first source S1 of the first field-effect transistor T1 and the substrate electrode Sub of the bidirectional gallium nitride device 11 mainly adopts the first high-voltage PMOSFET Q10, and the second substrate selection switch connected between the second source S2 of the second field-effect transistor T2 and the substrate electrode Sub of the bidirectional gallium nitride device 11 mainly adopts the second high-voltage PMOSFET Q20.
[0054] The first negative gate drive network connected between the gate G of the first high-voltage PMOSFET Q10 and the first source S1 and first drain D1 of the first field-effect transistor T1 is a first inverting charge pump, mainly composed of a first capacitor C11, a resistor R10, a diode D11, a diode D10, and a second capacitor C10. It is used to generate a negative voltage opposite to the voltage between the first source S1 and the first drain D1 to drive the gate G of the first high-voltage PMOSFET Q10. The second negative gate drive network connected between the gate G of the second high-voltage PMOSFET Q20 and the second source S2 and second drain D2 of the second field-effect transistor T2 is a second inverting charge pump, mainly composed of a first capacitor C21, a resistor R20, a diode D21, a diode D20, and a second capacitor C20. It is used to generate a negative voltage opposite to the voltage between the second source S2 and the second drain D2 to drive the gate G of the second high-voltage PMOSFET Q20.
[0055] In this system, the diodes in each negative voltage gate drive network are rapidly charged on the rising edge of the voltage between the source and drain of the corresponding side field-effect transistor, while the resistors are slowly released on the falling edge of the voltage between the source and drain of the corresponding side field-effect transistor, in order to set the time constant and improve the immunity of voltage change rate (dv / dt).
[0056] Specifically, the first inverting charge pump generates a negative voltage at the gate G of the first high-voltage PMOSFET Q10 by means of the voltage transition between the first source S1 and the first drain D1 of the first field-effect transistor T1, wherein the resistor R10 is used for gate discharge and stabilization in steady state. The second inverting charge pump generates a negative voltage at the gate G of the second high-voltage PMOSFET Q20 by means of the voltage transition between the second source S2 and the second drain D2 of the second field-effect transistor T2, wherein the resistor R20 is used for gate discharge and stabilization in steady state.
[0057] A first clamping network 15, mainly composed of a first P-channel junction field-effect transistor Q11, a diode D12, a capacitor C12, and a resistor R11, is connected between the gate G of the first high-voltage PMOSFET Q10 and the first source S1 and first drain D1 of the first field-effect transistor T1. This network is used to maintain the first substrate selection switch 13 off when the potential between the first source S1 and the first drain D1 does not change; and to maintain the first substrate selection switch 13 off when the voltage V between the first source S1 and the first drain D1 does not change. D1S1 When the voltage is raised to a high level, such as 12~18V, the first P-channel junction field-effect transistor Q11 is turned off, and the first substrate selection switch 13 can be turned on under the drive of the first negative voltage gate drive network 14.
[0058] A second clamping network 18, mainly composed of a second P-channel junction field-effect transistor Q21, a diode D22, a capacitor C22, and a resistor R21, is connected between the gate G of the second high-voltage PMOSFET Q20 and the second source S2 and the second drain D2 of the second field-effect transistor T2. This network is used to maintain the second substrate selection switch 16 off when the potential between the second source S2 and the second drain D2 does not change; and to maintain the second substrate selection switch 16 off when the voltage V between the second source S2 and the second drain D2 changes. D2S2 When the voltage is raised to a high level, such as 12~18V, the second P-channel junction field-effect transistor Q21 is turned off, and the second substrate selection switch 16 can be turned on under the drive of the second negative voltage gate drive network 17.
[0059] A first regulator, a Zener diode Z10, is connected between the gate G and source S of the first high-voltage PMOSFET Q10 to limit the voltage between the gate and source within a safe range; a second regulator, a Zener diode Z20, is connected between the gate G and source S of the second high-voltage PMOSFET Q20 to limit the voltage between the gate and source within a safe range.
[0060] In this embodiment, each high-voltage PMOSFET has the same voltage rating as the bidirectional gallium nitride device. The rated voltage of the first field-effect transistor T1 and the second field-effect transistor T2 is low voltage 20-60V, and the voltage jump amplitude between their source and drain is 10-50V.
[0061] Please refer to Figure 5 and Figure 6 In actual operation, the circuit system of this embodiment may include, but is not limited to, the following situations:
[0062] (1) When the voltage between the first source S1 of the first field-effect transistor T1 and the second source S2 of the second field-effect transistor T2 is in the positive half-cycle, and the potential between the first source S1 and the first drain D1 does not change regardless of the potential of the first gate G1 in the first field-effect transistor T1, the first P-channel junction field-effect transistor Q11 is turned on, and the first high-voltage PMOSFET Q10 of the first substrate selection switch 13 is turned off.
[0063] In this way, the voltage between the second source S2 and the second drain D2 of the second field-effect transistor T2 jumps between 0 and 12~18 V (high voltage) when the bidirectional gallium nitride device is switched at high frequency. The second inverting charge pump, which is composed of the second capacitor C20, diode D20, diode D21 and the first capacitor C21, generates a corresponding negative voltage in the first capacitor C21, thereby turning on the second high-voltage PMOSFET Q20 of the second substrate selection switch 16, and shorting the substrate electrode Sub of the bidirectional gallium nitride device 11 to the low potential end of the second source S2.
[0064] (2) When the voltage between the first source S1 of the first field-effect transistor T1 and the second source S2 of the second field-effect transistor T2 is in the negative half-cycle, the second P-channel junction field-effect transistor Q21 is turned on and the second high-voltage PMOSFET Q20 of the second substrate select switch 16 is turned off, regardless of the high or low potential of the second gate G2.
[0065] In this way, the voltage between the first source S1 and the first drain D1 of the first field-effect transistor T1 jumps between 0 and 12~18V when the bidirectional gallium nitride device is switched at high frequency. The first inverting charge pump, composed of the second capacitor C10, diode D10, diode D11 and the first capacitor C11, generates a corresponding negative voltage in the first capacitor C11, thereby turning on the first high-voltage PMOSFET Q10 of the first substrate selection switch 13 and shorting the substrate electrode Sub of the bidirectional gallium nitride device to the low potential end of the first source S1.
[0066] The circuit system of this embodiment can achieve the following technical effects:
[0067] (1) Low-voltage charging and holding on one side of the control circuit system: The negative voltage and state criteria can be generated by utilizing the voltage swing between the source and drain of the cascaded low-voltage field-effect transistor, without the need for additional isolation power supply or high-voltage sampling.
[0068] (2) Anti-shoot-through: P-JFET clamping + RC holding + gate voltage regulation, blocking the "false negative bias" of high voltage PMOSFET after high voltage charging, and avoiding the simultaneous conduction of high voltage PMOSFET Q10 / Q20.
[0069] (3) The power supply voltage remains stable: the short-term holding potential is maintained by the capacitors C12 / C22 in the clamping network, and the resistors R11 / R21 are used to set a reasonable time constant to avoid the gate voltage of each corresponding P-JFET from remaining stable when the voltage changes between the source and drain of the field effect transistor.
[0070] (4) Device stress control: The voltage between the gate and source of the corresponding high-voltage PMOSFET Q10 / Q20 is limited by Zener diode Z10 / Z20 to meet the optimized conduction within the negative gate voltage range and protect the high-voltage PMOSFET.
[0071] (5) Adaptable to cascaded bidirectional gallium nitride devices: It can be used to design a cascaded system of D-mode Bi-GaN and two low-voltage field-effect transistors. Power is drawn and substrate potential switching is achieved by detecting the voltage between the source and drain of the low-voltage field-effect transistors. Except for the two high-voltage PMOSFETs that manage the substrate potential of the bidirectional gallium nitride device, other components only bear low-voltage signals, which makes chip design and cost control easier, and the control circuit wiring and chip process are simple.
[0072] It should be noted that in the above embodiments, the substrate selection switches are mainly implemented using high-voltage PMOSFETs Q10 / Q20. In other embodiments, such as... Figure 7 As shown, the substrate selection switch can be implemented by connecting a high-voltage PNP transistor and a high-voltage diode in parallel, specifically:
[0073] The first substrate selection switch 13 is implemented by a high-voltage diode D13 and a high-voltage PNP transistor connected in parallel. A Zener diode Z10 is connected between the base (B) and emitter (E) of the high-voltage PNP transistor. A first negative voltage gate drive network and a first clamping network are connected between the base of the high-voltage PNP transistor and the first source S1 and first drain D1 of the first field-effect transistor T1.
[0074] The second substrate selection switch 16 is implemented by a high-voltage diode D23 and a high-voltage PNP transistor connected in parallel. A Zener diode Z20 is connected between the base (B) and emitter (E) of the high-voltage PNP transistor. A second negative voltage gate drive network and a second clamping network are connected between the base of the high-voltage PNP transistor and the second source S2 and the second drain D2 of the second field-effect transistor T2.
[0075] The circuit system based on cascaded bidirectional gallium nitride provided by the embodiments of the present invention has been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.
Claims
1. A circuit system based on cascaded bidirectional gallium nitride, characterized in that, include: A first field-effect transistor, a bidirectional gallium nitride (GaN) device, and a second field-effect transistor are connected in series. A first substrate selection switch is connected between the substrate electrode of the bidirectional GaN device and the first source of the first field-effect transistor, and a second substrate selection switch is connected between the substrate electrode of the bidirectional GaN device and the second source of the second field-effect transistor. The first gate of the first field-effect transistor is used to receive a high-potential or low-potential control signal, and the second gate of the second field-effect transistor is used to receive a high-potential or low-potential control signal. The first substrate selection switch is a first high-voltage P-type metal-oxide-semiconductor field-effect transistor, and the second substrate selection switch is a second high-voltage P-type metal-oxide-semiconductor field-effect transistor; or the first substrate selection switch includes a first high-voltage PNP transistor, and the second substrate selection switch includes a second high-voltage PNP transistor. A first negative voltage gate drive network is connected between the first substrate selection switch and the first source and the first drain of the first field-effect transistor to generate a drive signal to drive the first substrate selection switch to turn on; a second negative voltage gate drive network is connected between the second substrate selection switch and the second source and the second drain of the second field-effect transistor to generate a drive signal to drive the second substrate selection switch to turn on. A first clamping and holding network is also connected between the first substrate selection switch and the first source and the first drain of the first field-effect transistor. When the voltage between the first source and the first drain is low, the network is turned on to clamp the voltage at one end of the connected first substrate selection switch to zero. When the voltage between the first source and the first drain is high, the network maintains the negative bias of the first substrate selection switch. A second clamping network is also connected between the second substrate selection switch and the second source and the second drain of the second field-effect transistor. When the voltage between the second source and the second drain is low, the network is turned on to clamp the voltage at one end of the connected second substrate selection switch to zero. When the voltage between the second source and the second drain is high, the network maintains the negative bias of the second substrate selection switch. The first negative voltage gate drive network includes: a first capacitor, a diode, a reverse diode, a second capacitor, and a resistor. The first capacitor, the diode, and the second capacitor are connected in series between the first source and the first drain. The anode of the diode is connected to the first capacitor, and the cathode of the diode is connected to the second capacitor. The cathode of the reverse diode is connected to both the first capacitor and the first source, and the anode of the reverse diode is connected to both the second capacitor and the diode. One end of the resistor is connected to both the first capacitor and the first source, and the other end of the resistor is connected to both the first capacitor and the diode. The second negative voltage gate drive network includes: a first capacitor, a diode, a reverse diode, a second capacitor, and a resistor. The first capacitor, the diode, and the second capacitor are connected in series between the second source and the second drain. The anode of the diode is connected to the first capacitor, and the cathode of the diode is connected to the second capacitor. The cathode of the reverse diode is connected to both the first capacitor and the second source, and the anode of the reverse diode is connected to both the second capacitor and the diode. One end of the resistor is connected to both the first capacitor and the second source, and the other end of the resistor is connected to both the first capacitor and the diode. The first negative voltage gate drive network is a first inverting charge pump used to generate a negative voltage opposite to the voltage between the first source and the first drain to drive the gate of the first high-voltage P-type metal-oxide-semiconductor field-effect transistor or the base of the first high-voltage PNP transistor. The second negative voltage gate drive network is a second inverting charge pump used to generate a negative voltage opposite to the voltage between the second source and the second drain to drive the gate of the second high-voltage P-type metal-oxide-semiconductor field-effect transistor or the base of the second high-voltage PNP transistor. The diodes in the negative voltage gate drive network are rapidly charged on the rising edge of the voltage between the source and drain of the corresponding side field-effect transistor, and the resistors in the network are slowed down on the falling edge of the voltage between the source and drain of the corresponding side field-effect transistor to set the time constant and improve the immunity to voltage change rate.
2. The circuit system as described in claim 1, characterized in that, When a first substrate selection switch is connected between the substrate electrode of the bidirectional gallium nitride device and the first source of the first field-effect transistor, a first high-voltage PNP transistor and a first high-voltage diode are connected in parallel between the substrate electrode of the bidirectional gallium nitride device and the first source of the first field-effect transistor; or, a first high-voltage P-type metal-oxide-semiconductor field-effect transistor is connected between the substrate electrode of the bidirectional gallium nitride device and the first source of the first field-effect transistor. When a second substrate selection switch is connected between the substrate electrode of the bidirectional gallium nitride device and the second source of the second field-effect transistor, a second high-voltage PNP transistor and a second high-voltage diode are connected in parallel between the substrate electrode of the bidirectional gallium nitride device and the second source of the second field-effect transistor; or, a second high-voltage P-type metal-oxide-semiconductor field-effect transistor is connected between the substrate electrode of the bidirectional gallium nitride device and the second source of the second field-effect transistor.
3. The circuit system as described in claim 1, characterized in that, The first clamping network includes: a first P-channel junction field-effect transistor (JFET), a diode, a resistor, and a capacitor, wherein the diode and capacitor are connected in series and then connected between the first source and the first drain of the first JFET; the diode and the resistor are connected in parallel and then connected to the gate of the first P-channel JFET; the source and drain of the first P-channel JFET are respectively connected to the source and gate of the first substrate select switch; or the source and drain of the first P-channel JFET are respectively connected to the emitter and base of the first substrate select switch. The second clamping network includes: a second P-channel junction field-effect transistor (JFET), a diode, a resistor, and a capacitor. The diode and capacitor are connected in series and then connected between the second source and the second drain of the second JFET. The diode and the resistor are connected in parallel and then connected to the gate of the second P-channel JFET. The source and drain of the second P-channel JFET are respectively connected to the source and gate of the second substrate select switch; or the source and drain of the second P-channel JFET are respectively connected to the emitter and base of the second substrate select switch.
4. The circuit system as described in claim 1, characterized in that, The first clamping network includes: a first semiconductor device, a diode, a resistor, and a capacitor, wherein the diode and capacitor are connected in series and then connected between the first source and the first drain of the first field-effect transistor; the diode and the resistor are connected in parallel and then connected to the gate of the first semiconductor device; the source and drain of the first semiconductor device are respectively connected to the source and the gate of the first substrate selection switch; or the source and drain of the first semiconductor device are respectively connected to the emitter and the base of the first substrate selection switch. The second clamping network includes: a second semiconductor device, a diode, a resistor, and a capacitor, wherein the diode and capacitor are connected in series and then connected between the second source and the second drain of the second field-effect transistor; the diode and the resistor are connected in parallel and then connected to the gate of the second semiconductor device; the source and drain of the second semiconductor device are respectively connected to the source and the gate of the second substrate selection switch; or the source and drain of the second semiconductor device are respectively connected to the emitter and the base of the second substrate selection switch.
5. The circuit system according to claim 4, characterized in that, The first semiconductor device and the second semiconductor device have the function of shutdown clamping.
6. The circuit system as described in claim 2, characterized in that, If the first substrate selection switch is a first high-voltage P-type metal-oxide-semiconductor field-effect transistor, and the second substrate selection switch is a second high-voltage P-type metal-oxide-semiconductor field-effect transistor, then: A first voltage regulator is connected between the gate and source of the first high-voltage P-type metal-oxide-semiconductor field-effect transistor; the drain of the first high-voltage P-type metal-oxide-semiconductor field-effect transistor is connected to the substrate electrode of the bidirectional gallium nitride device. A second voltage regulator is connected between the gate and source of the second high-voltage P-type metal-oxide-semiconductor field-effect transistor; the drain of the second high-voltage P-type metal-oxide-semiconductor field-effect transistor is connected to the substrate electrode of the bidirectional gallium nitride device.
7. The circuit system as described in claim 2, characterized in that, If the first substrate selection switch includes a first high-voltage PNP transistor and a first high-voltage diode connected in parallel, and the second substrate selection switch includes a second high-voltage PNP transistor and a second high-voltage diode connected in parallel, then: A first voltage regulator is connected between the base and emitter of the first high-voltage PNP transistor; the collector of the first high-voltage PNP transistor is connected to the substrate electrode of the bidirectional gallium nitride device. A second voltage regulator is connected between the base and emitter of the second high-voltage PNP transistor; the collector of the second high-voltage PNP transistor is connected to the substrate electrode of the bidirectional gallium nitride device.
8. The circuit system as described in claim 2, characterized in that, Both the first substrate selection switch and the second substrate selection switch are high-voltage semiconductor devices with the same voltage level as the bidirectional gallium nitride device.