Timestamp marking method and device, clock synchronization method and device and electronic equipment
By using the FPGA_LC1 chip to mark timestamps on the line card of the network device, the time synchronization error caused by NTP message delay was solved, and high-precision time synchronization was achieved.
Patent Information
- Application Number
- CN202410993975.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-23
- Publication Date
- 2026-01-23
AI Technical Summary
In network devices, NTP packets experience significant delays when passing through the ASIC_LC1 chip and CPU_LC1 chip, resulting in inaccurate timestamp marking and large time synchronization errors between the client and the server.
By using the FPGA_LC1 chip in the line card of the network device to mark the receiving timestamp of the NTP packet and the sending timestamp of the NTP reply packet, the large delay caused by the CPU-LC1 and CPU-LC2 of the line card for the NTP packet and NTP reply packet is eliminated, and submicron or even nanosecond-level clock synchronization between line cards is achieved.
It improves the accuracy of NTP message reception timestamps and NTP response message transmission timestamps, reducing time synchronization errors between network devices and terminal devices.
Smart Images
Figure CN121396374A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of communication technology, and in particular to a timestamp marking method, clock synchronization method, device and electronic device. Background Technology
[0002] Network Time Protocol (NTP) is a protocol used to synchronize the time of computers. The NTP protocol uses Coordinated Universal Time (UTC) as the standard time, which allows computers to synchronize their time with high-precision time servers over a network to meet the time accuracy requirements of some scenarios.
[0003] The principle of NTP protocol time synchronization is as follows: Figure 1 As shown, the client sends NTP packets to the server. Based on the timestamp t1 when the generated NTP packet leaves the client, the timestamp t2 when the NTP packet arrives at the server, the timestamp t3 when the server sends an NTP response packet to the client based on the NTP packet, and the timestamp t4 when the client receives the NTP response packet, the client can calculate the clock offset between the client and the server. The client adjusts its own clock according to the offset, thus achieving clock synchronization between the client and the server.
[0004] However, see Figure 2As shown, in the actual interaction between the client (NTP client1) and the server, the ASIC_LC1 chip in line card LC1 first receives the packets sent by NTP client1. For some non-special format packets, the ASIC_LC1 chip can directly forward them after querying the routing table; however, for some special format packets, such as NTP packets, the NTP packets need to be sent to the CPU_LC1 chip in LC1 for software processing before forwarding. In addition, due to the limited transmission bandwidth when the ASIC_LC1 chip and the CPU_LC1 chip are directly connected, the ASIC_LC1 chip usually needs to send the NTP packets to the FPGA_LC1 chip for corresponding conversion, and then send the converted NTP packets to the CPU_LC1 chip for software processing. Finally, the CPU_LC1 chip uploads the NTP packets to the management board CM1, where the software generates the timestamp t2 for the NTP packets arriving at the server. Because NTP packets experience significant delays when flowing through the CPU_LC1 chip, this can lead to large time discrepancies between the timestamp t2 generated by the software in CM1 and the actual time the NTP packet arrives at the server, and between the timestamp t3 generated by CM1 when sending the NTP response packet and the actual time the NTP response packet is sent to the client. Summary of the Invention
[0005] This invention provides a timestamp marking method, a clock synchronization method, a device, and an electronic device to reduce time synchronization errors between network devices and terminal devices. The specific technical solution is as follows:
[0006] In a first aspect, this application provides a timestamp marking method applied to a first line card in a network device, the network device comprising multiple line cards and a management board, the multiple line cards including the first line card; the first line card is connected to a terminal device and the management board respectively; the method includes:
[0007] Receive Network Time Protocol (NTP) messages sent by the terminal device, or receive NTP response messages sent by the management board;
[0008] The timestamp of receiving the NTP message or the timestamp of sending the NTP response message is marked, wherein the timestamp of receiving and the timestamp of sending are marked based on the clock after the multiple line card clocks are synchronized.
[0009] By having the FPGA_LC1 chip in the first line card mark the receiving timestamp of the NTP message when the first line card receives the NTP message, and the FPGA_LC1 chip marks the sending timestamp of the NTP response message when the first line card receives the NTP response message, the large delay caused by the CPU-LC1 of the line card when the NTP message and NTP response message pass through can be eliminated, thereby improving the accuracy of marking the receiving timestamp of the NTP message and the sending timestamp of the NTP response message.
[0010] In one possible implementation, the method further includes:
[0011] The first line card synchronizes its clock with at least one other line card among the plurality of line cards based on the High Precision Time Synchronization Protocol (PTP) so that the clocks of each line card among the plurality of line cards are synchronized.
[0012] The above method enables clock synchronization between each line card in multiple line cards.
[0013] In one possible implementation, if the plurality of line cards further includes a second line card, then the clock synchronization based on the High Precision Time Synchronization Protocol (PTP) with at least one other line card among the plurality of line cards, to achieve clock synchronization among each of the plurality of line cards, includes:
[0014] The first line card sends a synchronization message "sync" to the second line card and marks the first timestamp of sending the synchronization message;
[0015] Receive a delay request message delay_req returned by the second line card based on the synchronization message, and mark the fourth timestamp of receiving the delay request message, wherein the delay request message includes a second timestamp marked by the second line card receiving the synchronization message and a third timestamp marked by sending the delay request message;
[0016] A delay response message delay_resp is sent to the second line card so that the second line card adjusts its clock to synchronize with the clock of the first line card based on the first timestamp, the second timestamp, the third timestamp, and the fourth timestamp in the delay response message.
[0017] Based on the above method, time synchronization between the main line card and each of the other line cards can be achieved when the first line card is the main line card.
[0018] In one possible implementation, if the plurality of line cards further includes a second line card, then the clock synchronization based on the High Precision Time Synchronization Protocol (PTP) with at least one other line card among the plurality of line cards, to achieve clock synchronization among each of the plurality of line cards, includes:
[0019] The first line card tag receives a second timestamp of the synchronization message sync sent by the second line card, wherein the synchronization message includes a first timestamp of the synchronization message tag sent by the second line card;
[0020] Send a delay request message delay_req to the second line card and mark the third timestamp of sending the delay request message;
[0021] The system receives a delay response message delay_resp returned by the second line card based on the delay request message. Based on the delay response message, the second line card receives the fourth timestamp, the first timestamp, the second timestamp, and the third timestamp marked in the delay request message, and adjusts the clock of the first line card to synchronize with the clock of the second line card.
[0022] Based on the above method, time synchronization between the main line card and each of the other line cards can be achieved when the second line card is the main line card.
[0023] Secondly, this application provides a clock synchronization method applied to a network device, the network device comprising multiple line cards and a management board, the multiple line cards including a first line card and a second line card; the first line card and the second line card are respectively connected to a terminal device and the management board; the method includes:
[0024] The first line card receives a Network Time Protocol (NTP) message sent by the terminal device, wherein the NTP message carries a timestamp indicating that the terminal device sent the NTP message;
[0025] The receiving timestamp of the NTP message is marked, wherein the receiving timestamp is marked based on the clock after the multiple line card clocks are synchronized;
[0026] Send the NTP message and the timestamp of the received NTP message to the management board;
[0027] The management board generates an NTP response message based on the received NTP message and the timestamp of the NTP message, and sends the NTP response message to the second line card.
[0028] The second line card marks the sending timestamp of the NTP response message, and generates a first NTP message based on the NTP response message and the sending timestamp of the NTP response message, wherein the sending timestamp is marked based on the clock after the clocks of the plurality of line cards are synchronized; and sends the first NTP message to the terminal device so that the terminal device performs clock synchronization based on the first NTP message.
[0029] Based on the above method, clock synchronization between network devices and terminal devices can be achieved in a box-type environment. By having the FPGA_LC1 chip in the line card mark the receiving timestamp of the NTP packets sent by the terminal device, or the FPGA_LC2 chip mark the sending timestamp of the NTP response packets sent by the management board, the significant delays caused by the CPU-LC1 chip of the line card and the CPU-LC2 chip of the line card can be eliminated. This makes the arrival time of the NTP packets marked by the network device and the time when the network device sends the marked NTP response packets to the terminal device more accurate, thereby reducing the time synchronization error between the network device and the terminal device.
[0030] In one possible implementation, sending the NTP packet and the NTP packet's reception timestamp to the management board includes:
[0031] The first line card encapsulates timestamp indication information in the NTP message. The timestamp indication information is used to indicate that the receiving timestamp of the NTP message needs to be filled into the target position of the NTP message or the sending timestamp of the NTP response message needs to be filled into the target position of the NTP response message.
[0032] Based on the above method, the timestamp indication information can be encapsulated in the NTP message, and the NTP message and the NTP message reception timestamp can be sent to the management board.
[0033] In one possible implementation, the second line card marks the transmission timestamp of the NTP response message, including:
[0034] The second line card receives the NTP response message sent by the management board, wherein the NTP response message is obtained by adding the receiving timestamp of the NTP message to the NTP message and updating the timestamp indication information;
[0035] The sending timestamp of the NTP response message is marked based on the field information of the NTP response message.
[0036] Based on the above method, the second line card can receive NTP response messages sent by the management board, so that when one of the multiple line cards fails, the other line cards in the multiple line cards can receive the NTP response messages sent by the management board and mark the sending timestamp of the NTP response messages.
[0037] In one possible implementation, generating the first NTP message based on the NTP response message and the sending timestamp of the NTP response message includes:
[0038] Based on the offset value in the timestamp indication information, the target position in the NTP response message corresponding to the offset value is determined, wherein the offset value is added to the timestamp indication information of the NTP message; the offset value is used to determine the next target position where the timestamp is added in the NTP response message.
[0039] The sending timestamp of the NTP response message is added to the target location to obtain the first NTP message.
[0040] Based on the above method, the sending timestamp of the NTP response message can be added to the NTP response message according to the offset value in the timestamp indication information, so that the clock synchronization of the terminal device and the network device can be performed according to the timestamp in the first NTP message.
[0041] Thirdly, this application provides a timestamp marking device comprising a plurality of line cards, wherein any one of the plurality of line cards includes:
[0042] The data receiving module is used to receive Network Time Protocol (NTP) messages sent by the terminal device, or to receive NTP response messages sent by the management board;
[0043] The timestamp marking module is used to mark the receiving timestamp of the NTP message or the sending timestamp of the NTP response message, wherein the receiving timestamp and the sending timestamp are marked based on the clock after the multiple line card clocks are synchronized.
[0044] Fourthly, this application provides a time synchronization device, comprising: multiple line cards and a management board, wherein the multiple line cards include a first line card and a second line card; the first line card and the second line card are respectively connected to a terminal device and the management board; the device includes:
[0045] The first line card is used to receive Network Time Protocol (NTP) messages sent by the terminal device, wherein the NTP message carries a timestamp indicating that the terminal device sent the NTP message;
[0046] The receiving timestamp of the NTP message is marked, wherein the receiving timestamp is marked based on the clock after the multiple line card clocks are synchronized;
[0047] Send the NTP message and the timestamp of the received NTP message to the management board;
[0048] The management board is used to generate an NTP response message based on the received NTP message and the receiving timestamp of the NTP message, and send the NTP response message to the second line card;
[0049] The second line card is used to mark the sending timestamp of the NTP response message, and generate a first NTP message based on the NTP response message and the sending timestamp of the NTP response message, wherein the sending timestamp is marked based on the clock after the clocks of the multiple line cards are synchronized; and send the first NTP message to the terminal device.
[0050] Fifthly, this application provides an electronic device, comprising:
[0051] Memory, used to store computer programs;
[0052] When a processor executes a computer program stored in the memory, it implements the steps of the timestamp marking method and the time synchronization method described above.
[0053] Sixthly, this application provides a computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the timestamp marking method and the time synchronization method described above.
[0054] For the various aspects of the second to sixth aspects mentioned above, and the technical effects that each aspect may achieve, please refer to the above description of the technical effects that can be achieved for the first aspect or the various possible solutions in the first aspect, which will not be repeated here. Attached Figure Description
[0055] Figure 1 A schematic diagram illustrating the traditional clock synchronization mechanism between the server and client.
[0056] Figure 2 A flowchart for traditional server-client clock synchronization;
[0057] Figure 3 A flowchart illustrating a timestamp marking method provided in this application embodiment;
[0058] Figure 4 A schematic diagram of the system architecture for timestamp marking provided in the embodiments of this application;
[0059] Figure 5 This is a schematic diagram of the NTP packet structure provided in the embodiments of this application;
[0060] Figure 6 A flowchart illustrating a clock synchronization method provided in an embodiment of this application;
[0061] Figure 7 This is a schematic diagram of the structure of a timestamp marking device provided in an embodiment of this application;
[0062] Figure 8This is a schematic diagram of the structure of a time synchronization device provided in an embodiment of this application;
[0063] Figure 9 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation
[0064] To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings. The specific operational methods in the method embodiments can also be applied to the device embodiments or system embodiments. It should be noted that in the description of this application, "multiple" is understood as "at least two". "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. A connected to B can represent: A and B directly connected, and A and B connected through C. Furthermore, in the description of this application, terms such as "first" and "second" are used only for distinguishing the purpose of description and should not be construed as indicating or implying relative importance or order.
[0065] The embodiments of this application will now be described in detail with reference to the accompanying drawings.
[0066] The NTP protocol is a protocol used to synchronize computer time. As a type of computer, network devices can achieve time synchronization with terminal devices by exchanging NTP information (including NTP messages and NTP response messages) with terminal devices.
[0067] When synchronizing the time between network devices (e.g., servers) and terminal devices (clients) based on the NTP protocol, it is usually necessary to obtain the timestamp t1 when the NTP packet leaves the client, the timestamp t2 when the NTP packet arrives at the server, the timestamp t3 when the server sends an NTP response packet to the client based on the NTP packet, and the timestamp t4 when the client receives the NTP response packet. Then, the clock deviation between the server and the client is calculated based on t1-t4, and finally, the time synchronization between the server and the client is achieved based on the clock deviation.
[0068] However, see Figure 2As shown, in the actual interaction between the client (NTP client1) and the server, the ASIC_LC1 chip in line card LC1 first receives the messages sent by NTP client1. For some non-special format messages, the ASIC_LC1 chip can directly look up a table and forward them; however, for some special format messages, such as NTP messages, the NTP messages need to be sent to the CPU_LC1 chip in LC1 for software processing before forwarding. In addition, due to the limited transmission bandwidth when the ASIC_LC1 chip and the CPU_LC1 chip are directly connected, the ASIC_LC1 chip usually needs to send the NTP messages to the FPGA_LC1 chip for corresponding conversion, and then send the converted NTP messages to the CPU_LC1 chip for software processing. Finally, the CPU_LC1 chip uploads the NTP messages to the management board CM1, where the software generates the timestamp t2 for the NTP messages arriving at the server. Because NTP packets generate a significant delay when flowing through the CPU_LC1 chip, this leads to a large time error between the timestamp t2 generated by the software in CM1 and the actual time when the NTP packet arrives at the server, and between the timestamp t3 generated when CM1 sends the NTP response packet and the actual time when the NTP response packet is sent to the client. This results in a time synchronization error between the client and the server.
[0069] In view of this, in order to improve the accuracy of the timestamp t2 generated when the NTP packet arrives at the Server and the timestamp t3 generated when the CM1 sends the NTP response packet, this application provides a timestamp marking method, which specifically includes: first receiving the Network Time Protocol (NTP) packet sent by the terminal device, or receiving the NTP response packet sent by the management board; and then marking the receiving timestamp of the NTP packet or marking the sending timestamp of the NTP response packet.
[0070] By having the first line card in the network device mark the receiving timestamp of the NTP packet when receiving the NTP packet sent by the terminal device, and the second line card mark the sending timestamp of the NTP response packet when receiving the NTP response packet sent by the management board, the large delay caused by the CPU-LC1 of the NTP packet and the large delay caused by the CPU-LC2 of the NTP response packet can be eliminated, making the time when the NTP packet arrives at the server and the time when the server sends the NTP response packet to the client more accurate.
[0071] Reference Figure 3 The diagram shown is a flowchart of a timestamp marking method provided in an embodiment of this application. The method includes:
[0072] S1 receives Network Time Protocol (NTP) messages sent by the terminal device, or receives NTP response messages sent by the management board.
[0073] Firstly, the timestamp marking method provided in the embodiments of this application can be applied to Figure 4 The system architecture shown includes a network device (Server) and a terminal device (NTP client1). The network device includes multiple line cards (e.g., first line card LC1, second line card LC2) and a management board (CM1). The first line card is connected to the terminal device and the management board respectively, and the method provided in this application can run in the first line card.
[0074] It should be noted that the terminal device can function as a server, performing the same functions. When the terminal device acts as a server, it can also include a line card and a management board. By using the line card to timestamp the NTP information received, the timestamps when the NTP packets arrive at the server and when the server sends NTP response packets to the client can be more accurate. This application only uses a network device including a line card and a management board as an example to illustrate in detail how the line card timestamps the received NTP information.
[0075] In the embodiments of this application, as shown in the appendix Figure 4 As shown, the management board is independently deployed on the network device, and the management board is used to centrally manage multiple line cards in the network device. This application does not impose a specific limit on the number of line cards. The multiple line cards in this application include a first line card, which contains a central processing unit (CPU_LC1 chip), a field programmable gate array (FPGA_LC1 chip), and an application-specific integrated circuit chip (ASIC_LC1 chip).
[0076] When multiple line cards exist in a network device, any one of them may receive NTP packets from the terminal device or NTP response packets from the management board. To ensure that the time base used by any of the multiple line cards is consistent when marking the timestamps of NTP packet reception or NTP response packet transmission, clock synchronization of the multiple line cards in the network device is required before marking the timestamps of NTP packet reception or NTP response packet transmission. In traditional NTP-based time synchronization, the clock synchronization accuracy of the NTP protocol is typically in the tens of milliseconds. For some scenarios requiring sub-millisecond time accuracy, NTP-based time synchronization is not suitable. For high-precision clock synchronization protocols, such as 1588v2, the PTP protocol can achieve sub-microsecond or even nanosecond clock synchronization. However, using the PTP protocol requires all network devices to support 1588v2, and in a box-like environment (e.g., ...), ... Figure 4 The chassis environment shown requires a dedicated hardware path for clock synchronization between line cards.
[0077] In this embodiment of the application, in order to achieve submicron or even nanosecond-level clock synchronization between line cards, the first line card can synchronize its clock with at least one other line card among multiple line cards according to the high-precision time synchronization PTP protocol, thereby achieving clock synchronization among each of the multiple line cards. The specific method is as follows:
[0078] In the embodiments of this application, see the appendix. Figure 4 As shown, if the network device includes a second line card LC2 (other line cards) among its multiple line cards, and the first line card LC1 is the master line card, where the master line card refers to the line card that uses the clock source of the current line card as the master clock source, then the clock synchronization between the first line card and the second line card is achieved in the following way:
[0079] The first line card first sends a synchronization message (`sync`) to the second line card, marking the first timestamp of the synchronization message. When the second line card receives the synchronization message from the first line card, it marks the second timestamp of the received synchronization message and then sends a delay request message (`delay_req`) to the first line card. This delay request message also carries the third timestamp of the sent delay request message and the second timestamp of the received synchronization message. The first line card then receives the delay request message returned by the second line card based on the synchronization message and marks the fourth timestamp of the received delay request message. Finally, the first line card can send a delay response message (`delay_resp`) to the second line card. The second line card can calculate its own clock deviation from the first line card based on the first, second, third, and fourth timestamps in the delay response message, and adjust its clock to synchronize with the first line card's clock according to the clock deviation.
[0080] In this application, the clock synchronization between the second line card and the first line card can be within a set time range, and the clock deviation between the two is less than the set maximum clock deviation value. In addition, when the first line card is the main line card and the multiple line cards include a third line card, the clock synchronization between the first line card and the third line card can also be performed by referring to the above steps for clock synchronization between the first line card and the second line card. The repeated parts will not be described again here.
[0081] The above method enables clock synchronization among multiple line cards, ensuring that any line card in the network device can be timestamped based on the same time base.
[0082] In the embodiments of this application, see the appendix. Figure 4As shown, if the network device includes a second line card LC2 among its multiple line cards, and LC2 is the main line card, then clock synchronization between the first line card (and other line cards) and the second line card is achieved in the following way:
[0083] The first line card first marks the second timestamp of the synchronization message "sync" sent by the second line card, and the synchronization message contains the first timestamp marked by the second line card when sending the synchronization message;
[0084] After marking the second timestamp, the first line card sends a delay request message delay_req to the second line card and marks the third timestamp of sending the delay request message; when the second line card receives the delay request message sent by the first line card, it marks the fourth timestamp of receiving the delay request message and then returns a delay response message delay_resp to the first line card.
[0085] The first line card receives a delay response message delay_resp returned by the second line card based on the delay request message. According to the first, second, third, and fourth timestamps in the delay response message, the first line card can calculate the clock deviation between the first and second line cards, and then adjust the clock of the first line card to synchronize with the clock of the second line card.
[0086] In this embodiment of the application, when synchronizing the clocks of multiple line cards in a network device, the master line card can periodically send the aforementioned synchronization message sync to each other line card in the network device, so that the clock deviation between each other line card and the master line card can be kept within a set maximum deviation range, thereby realizing clock synchronization between multiple line cards in the network device.
[0087] In this embodiment of the application, before the main line card synchronizes its clock with other line cards, the main line card can also receive the local time sent by the management board. The main line card can align its local time with its own clock (main clock) according to the local time sent by the management board.
[0088] The above method enables clock synchronization between each line card in a multi-line card system, ensuring that any line card in the network device can perform subsequent timestamp marking based on the same time base.
[0089] In this embodiment of the application, after clock synchronization is achieved between each line card in the multi-line card, the first line card can receive Network Time Protocol (NTP) messages sent by the terminal device or receive NTP response messages sent by the management board.
[0090] Specifically, after clock synchronization is achieved among multiple line cards, the terminal device can send Network Time Protocol (NTP) messages to the network device. At this time, any one of the multiple line cards in the network device (e.g., the first line card) can receive the NTP message. When the first line card receives the NTP message, it can process the NTP message accordingly, and then send the NTP message to the management board. Finally, it receives the NTP response message returned by the management board to the first or second line card based on the NTP message.
[0091] Based on the above method, any one of the multiple line cards can receive NTP messages sent by the terminal device or NTP response messages sent by the management board.
[0092] S2, mark the timestamp of the NTP message received or the timestamp of the NTP response message sent.
[0093] In the embodiments of this application, see Figure 4 As shown, when the first line card receives NTP packets sent by the terminal device, the ASIC_LC1 chip in the first line card will first receive the NTP packets sent by the terminal device. Then, the ASIC_LC1 chip will forward the NTP packets to the CPU_LC1 through the FPGA_LC1 chip. Since the processing time of the packets in the ASIC_LC1 chip is usually stable and deterministic, the delay of the NTP packets being processed by the ASIC_LC1 chip can be considered as the link delay. The link delay has little impact on the time stamping of the line card when receiving NTP information.
[0094] Furthermore, to ensure the accuracy of the timestamps when NTP packets arrive at the network device, in a practical implementation, the FPGA_LC1 chip can mark the NTP packet reception timestamp t2 upon receiving the packet. Alternatively, in another possible implementation, the ASIC_LC1 chip can mark the NTP packet reception timestamp t2 upon receiving the packet. This application only uses the FPGA_LC1 chip's timestamp marking as an example.
[0095] For the NTP message format, please refer to [link / reference]. Figure 5 As shown, LI represents the leap second identifier; VN represents the NTP version number; Mode represents the NTP operating mode; Stratum represents the clock layer number, defining the clock accuracy; Poll represents the polling time, i.e., the minimum interval between sending messages; Precision represents the local clock accuracy; and the reference timestamp represents the time when the local clock was last set or updated. It should be noted that... Figure 5The initial sending timestamp in the NTP message indicates the time when the terminal device sends the NTP message; the receiving timestamp of the NTP message and the sending timestamp of the NTP response message indicate the timestamps reserved in the NTP message to be added.
[0096] In this way, the line card can mark the reception timestamp of the NTP message when receiving it from the terminal device.
[0097] In this embodiment, after receiving an NTP message sent by a terminal device and marking the receiving timestamp of the NTP message, the first line card can send the receiving timestamps of the NTP message and the NTP response message to the management board, and then receive the NTP response message sent by the management board. Specifically, the CPU_LC1 in the first line card will first receive the NTP response message sent by the management board, then the FPGA_LC1 will receive the NTP response message forwarded by the CPU_LC1, and finally the FPGA_LC1 will send the NTP response message to the ASIC_LC1, which will then send the NTP response message back to the terminal device. Similar to the above method of marking the receiving timestamp of the NTP message, the first line card can mark the sending timestamp of the NTP response message when the FPGA_LC1 receives the NTP response message.
[0098] In summary, this application marks the receiving timestamp of NTP packets by the FPGA_LC1 chip in the first line card when the first line card receives NTP packets; and marks the sending timestamp of NTP response packets by the FPGA_LC1 chip when the first line card receives NTP response packets. The receiving timestamp of NTP packets marked in this way is closer to the actual time when the terminal device sends NTP packets to the network device; the sending timestamp of the marked NTP response packets is closer to the actual time when the network device sends NTP response packets to the terminal device. This eliminates the significant delay caused by the CPU-LC1 of the line card for NTP packets and NTP response packets, improving the accuracy of marking the receiving timestamp of NTP packets and the sending timestamp of NTP response packets.
[0099] Based on the timestamp marking method provided in the above embodiments, this application also provides a time synchronization method, specifically including: firstly, a first line card receives a Network Time Protocol (NTP) message sent by a terminal device; then, it marks the receiving timestamp of the NTP message; then, it sends the NTP message and the receiving timestamp of the NTP message to a management board; the management board generates an NTP response message based on the received NTP message and the receiving timestamp of the NTP message, and sends the NTP response message to a second line card; the second line card marks the sending timestamp of the NTP response message, and generates a first NTP message based on the sending timestamp of the NTP response message and the sending timestamp of the NTP response message; and sends the first NTP message to the terminal device so that the terminal device performs clock synchronization based on the first NTP message.
[0100] By marking the reception timestamp of NTP packets sent by the terminal device on the first line card and marking the transmission timestamp of NTP response packets sent by the management board on the second line card, the significant delays caused by the CPU-LC1 of the line card and the CPU-LC2 of the line card for NTP response packets can be eliminated. This makes the actual arrival time of NTP packets at the server and the actual time of the server sending NTP response packets to the client more accurate, thereby reducing the time synchronization error between the line cards and the terminal device. In addition, by having any one of the multiple line cards receive NTP packets sent by the terminal device on the first line card and the other line cards receive NTP response packets sent by the management board and mark the transmission timestamp of the NTP response packets, the situation where the line cards cannot synchronize with the terminal device when one of the multiple line cards fails is avoided.
[0101] based on Figure 4 The system architecture shown is referenced. Figure 6 The diagram shown is a flowchart of a time synchronization method provided in an embodiment of this application. The method includes:
[0102] S601: The first line card receives Network Time Protocol (NTP) messages sent by the terminal device; marks the receiving timestamp of the NTP message; and sends the NTP message and the receiving timestamp of the NTP message to the management board.
[0103] In this embodiment of the application, when the first line card receives a Network Time Protocol (NTP) message sent by the terminal device, referring to the above-described embodiment of the timestamp marking method, the FPGA_LC1 of the first line card can mark the receiving timestamp of the NTP message. Repeated details will not be repeated.
[0104] It should be noted that the NTP message received by the first line card carries a timestamp of the NTP message sent by the terminal device. The timestamp of the NTP message indicates the time when the terminal device sent the NTP message. In addition, the first line card marks the timestamp of the NTP message received. The timestamp of the NTP message received is marked based on the clock after the clocks of multiple line cards are synchronized. The clock synchronization method of multiple line cards can refer to the above-described embodiment of the timestamp marking method.
[0105] In this embodiment, since a line card is a device interface used between the access line of a switch, router, or other network device and the access device, and the device interface may fail, in order to switch other line cards in a timely manner to exchange information between the network device and the terminal device when one line card fails, the FPGA_LC1 chip in the first line card, after receiving the NTP packet sent by the terminal device and marking the receiving timestamp of the NTP packet, can forward the receiving timestamp and the NTP packet to the management board, so that the management board can centrally process the NTP packet, such as parsing the NTP packet and updating the field information of the NTP packet.
[0106] In this application implementation, when the FPGA_LC1 chip forwards the receive timestamp of the NTP message and the NTP message, it can encapsulate the timestamp indication information in the NTP message. The timestamp indication information is used to indicate that the receive timestamp of the NTP message should be filled into the target position of the NTP message or the send timestamp of the NTP response message should be filled into the target position of the NTP response message.
[0107] By forwarding NTP packets and their received timestamps to the management board for centralized management, it can be ensured that if any one of the multiple line cards fails, other line cards can be switched in a timely manner to complete the subsequent information exchange process between the terminal device and the network device.
[0108] S602, the management board generates an NTP response message based on the received NTP message and the NTP message reception timestamp, and sends the NTP response message to the second line card;
[0109] In this embodiment, after the management board receives the NTP message and the receiving timestamp of the NTP message sent by the FPGA_LC1 chip of the first line card, the management board can add the receiving timestamp of the NTP message to the NTP message, and then update the timestamp indication information encapsulated in the NTP message, such as updating the offset field, message type field, etc. of the timestamp indication information. This application does not impose specific limitations on this.
[0110] After the management board adds the NTP message reception timestamp to the NTP message and updates the timestamp indication information, it can generate an NTP response message and then send the NTP response message to any one of the multiple line cards (e.g., the second line card). The second line card then sends the NTP response message back to the terminal device.
[0111] By adding a receiving timestamp to the NTP packet on the management board, instead of marking the receiving timestamp of the NTP packet when the management board receives the NTP packet, the large delay caused by the CPU-LC1 of the line card can be eliminated, making the actual arrival time of the NTP packet at the server more accurate, thereby reducing the time synchronization error between the line card and the terminal device.
[0112] S603, the second line card marks the sending timestamp of the NTP response message, and generates a first NTP message based on the sending timestamp of the NTP response message; and sends the first NTP message to the terminal device so that the terminal device can perform clock synchronization based on the first NTP message.
[0113] In this application embodiment, referring to the above-described timestamp marking method embodiment, when the FPGA_LC2 chip of the second line card receives the NTP response message sent by the management board, it can mark the sending timestamp of the NTP response message according to the field information of the NTP response message.
[0114] Specifically, the FPGA_LC2 chip of the second line card can first determine the timestamp indication information in the NTP response message, and parse out the field information of the timestamp indication information, such as the identifier field and the offset field. The identifier field is used to identify whether the current message is an NTP message; the offset field is used to determine the next target position for adding the timestamp to the NTP response message. After the FPGA_LC2 chip of the second line card parses out the field information of the timestamp indication information, it can mark the sending timestamp of the NTP response message according to the field information of the timestamp indication information, and then add the sending timestamp of the NTP response message to the NTP response message to obtain the first NTP message. Finally, the first NTP message is sent to the terminal device. The sending timestamp of the NTP response message represents the moment when the second line card sends the NTP response message to the terminal device.
[0115] It should be noted that after the FPGA_LC2 chip of the second line card adds the receiving timestamp of the NTP response message to the NTP response message to obtain the first NTP message, it can remove the timestamp indication information encapsulated in the NTP response message and then directly send the first NTP message to the terminal device.
[0116] By marking the sending timestamp of the NTP response message by the FPGA_LC2 chip in the second line card when the NTP response message is received, the sending timestamp is closer to the actual time when the network device sends the NTP response message to the terminal device. This can eliminate the large delay caused by the CPU-LC2 of the second line card when the NTP response message passes through, and make the time marked when the network device actually sends the NTP response message more accurate.
[0117] In this embodiment of the application, the steps for adding the sending timestamp of the NTP response message to the NTP response message to obtain the first NTP message are as follows:
[0118] The FPGA_LC2 chip of the second line card can determine the target location corresponding to the offset value in the NTP response message based on the offset value in the timestamp indication information. For example... Figure 5 The target position corresponding to the sending timestamp of the NTP response message; the offset value is added by the management board in the timestamp indication information, and the timestamp indication information is encapsulated in the NTP message; the offset value is used to determine the next target position to add the timestamp (i.e., the receiving timestamp of the NTP response message) in the NTP response message; after the FPGA_LC2 chip of the second line card determines the target position in the NTP response message, it can add the sending timestamp of the NTP response message to the target position to obtain the first NTP message.
[0119] In this embodiment of the application, when the terminal device receives the first NTP message, it can mark the timestamp of the first NTP message being received; then, based on the timestamp of the first NTP message being received, the timestamp of the NTP message being sent, the timestamp of the NTP message being received, and the timestamp of the NTP response message being sent, it can calculate the clock deviation between the terminal device and the second line card, and adjust the clock of the second line card to synchronize with the clock of the terminal device based on the clock deviation.
[0120] Specifically, when the terminal device receives the first NTP message sent by the second line card, it marks the receiving timestamp t4 of the first NTP message. The receiving timestamp indicates the time when the terminal device receives the first NTP message. At this time, the line card or management board can calculate the clock offset between the second line card and the terminal device based on the sending timestamp of the NTP message sent by the terminal device, the receiving timestamp of the NTP message, the sending timestamp of the NTP acknowledgment message, and the receiving timestamp of the first NTP message. The clock offset can be used to synchronize the clocks of the second line card and the terminal device. The clock offset can be calculated using the following formula.
[0121]
[0122]
[0123] Here, delay represents the round-trip time of an NTP message from the terminal device to the network device.
[0124] After synchronizing the clock between the second line card and the terminal device, since the multiple line cards in the network device are also clock-synchronized, the clock synchronization between the terminal device and each line card in the network device can be achieved.
[0125] In summary, the method provided in this application can achieve clock synchronization between network devices and terminal devices in a box-type environment. By marking the reception timestamp of NTP packets received by the FPGA_LC1 chip in the line card when receiving NTP packets sent by the terminal device, the significant delay caused by the CPU-LC1 of the line card can be eliminated. Similarly, by marking the transmission timestamp of NTP response packets received by the FPGA_LC2 chip in the line card when receiving NTP response packets sent by the management board, the significant delay caused by the CPU-LC2 of the line card can be eliminated. This makes the arrival time of the NTP packets marked by the network device and the time when the network device sends the marked NTP response packets to the terminal device more accurate, thereby reducing the time synchronization error between the network device and the terminal device.
[0126] Based on the methods provided in the above embodiments, this application also provides a timestamp marking device, such as... Figure 7 The diagram shown is a structural schematic of a timestamp marking device according to an embodiment of this application. The device includes multiple line cards, and any one of the multiple line cards includes:
[0127] The data receiving module 701 is used to receive Network Time Protocol (NTP) messages sent by the terminal device, or to receive NTP response messages sent by the management board;
[0128] The timestamp marking module 702 is used to mark the receiving timestamp of the NTP message or the sending timestamp of the NTP response message, wherein the receiving timestamp and the sending timestamp are marked based on the clock after the multiple line card clocks are synchronized.
[0129] Based on the methods provided in the above embodiments, this application also provides a time synchronization device, such as... Figure 8 The diagram shown is a schematic diagram of the time synchronization device in an embodiment of this application. The device includes multiple line cards and a management board. The multiple line cards include a first line card 801a and a second line card 801b. The first line card and the second line card are respectively connected to the terminal device 803 and the management board 802.
[0130] The first line card is used to receive Network Time Protocol (NTP) messages sent by the terminal device, wherein the NTP message carries a timestamp indicating that the terminal device sent the NTP message;
[0131] The receiving timestamp of the NTP message is marked, wherein the receiving timestamp is marked based on the clock after the multiple line card clocks are synchronized;
[0132] Send the NTP message and the timestamp of the received NTP message to the management board;
[0133] The management board is used to generate an NTP response message based on the received NTP message and the receiving timestamp of the NTP message, and send the NTP response message to the second line card;
[0134] The second line card is used to mark the sending timestamp of the NTP response message, and generate a first NTP message based on the NTP response message and the sending timestamp of the NTP response message, wherein the sending timestamp is marked based on the clock after the clocks of the multiple line cards are synchronized; and send the first NTP message to the terminal device.
[0135] Based on the same inventive concept, this application also provides an electronic device that can realize the functions of the aforementioned timestamp marking device and time synchronization device. (Refer to...) Figure 9 The electronic device includes:
[0136] At least one processor 901 and a memory 902 connected to at least one processor 901. In this embodiment, the specific connection medium between the processor 901 and the memory 902 is not limited. Figure 9 The example shown is the connection between processor 901 and memory 902 via bus 900. Bus 900 is... Figure 9 The connections between other components are indicated by thick lines and are for illustrative purposes only, not as limiting information. The Bus 900 can be divided into address bus, data bus, control bus, etc., for ease of representation. Figure 9 The term is represented by a single thick line, but this does not imply that there is only one bus or one type of bus. Alternatively, the processor 901 can also be called a controller; there is no restriction on the name.
[0137] In this embodiment, memory 902 stores instructions executable by at least one processor 901. By executing the instructions stored in memory 902, at least one processor 901 can execute the timestamp marking method described above. Processor 901 can implement... Figure 7-8 The functions of each module in the device shown.
[0138] The processor 901 is the control center of the device. It can connect to various parts of the control device through various interfaces and lines. By running or executing instructions stored in memory 902 and calling data stored in memory 902, the processor can perform various functions and process data, thereby monitoring the device as a whole.
[0139] In one possible design, processor 901 may include one or more processing units. Processor 901 may integrate an application processor and a modem processor, wherein the application processor mainly handles the operating system, user interface, and applications, and the modem processor mainly handles wireless communication. It is understood that the modem processor may also not be integrated into processor 901. In some embodiments, processor 901 and memory 902 may be implemented on the same chip; in some embodiments, they may also be implemented on separate chips.
[0140] The processor 901 can be a general-purpose processor, such as a central processing unit (CPU), digital signal processor, application-specific integrated circuit, field-programmable gate array or other programmable logic device, discrete gate or transistor logic device, or discrete hardware component, capable of implementing or executing the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the timestamp marking method disclosed in the embodiments of this application can be directly manifested as execution by a hardware processor, or execution by a combination of hardware and software modules within the processor.
[0141] Memory 902, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules. Memory 902 may include at least one type of storage medium, such as flash memory, hard disk, multimedia card, card-type memory, random access memory (RAM), static random access memory (SRAM), programmable read-only memory (PROM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), magnetic storage, magnetic disk, optical disk, etc. Memory 902 can be any other medium capable of carrying or storing desired program code in the form of instructions or data structures that can be accessed by a computer, but is not limited thereto. In the embodiments of this application, memory 902 can also be a circuit or any other device capable of implementing storage functions for storing program instructions and / or data.
[0142] By designing and programming the processor 901, the code corresponding to the timestamp marking method described in the foregoing embodiments can be embedded into the chip, enabling the chip to execute it during runtime. Figure 3 The timestamp marking method of the embodiment shown or Figure 6 The steps of the clock synchronization method in the illustrated embodiment are as follows. How to design and program the processor 901 is a technique well-known to those skilled in the art and will not be described further here.
[0143] Based on the same inventive concept, embodiments of this application also provide a storage medium storing computer instructions that, when executed on a computer, cause the computer to perform the timestamp marking method described above.
[0144] In some possible implementations, various aspects of the timestamp marking method provided in this application may also be implemented in the form of a program product, which includes program code that, when the program product is run on a device, causes the control device to perform the steps in the timestamp marking method according to the various exemplary embodiments of this application described above.
[0145] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0146] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0147] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.
[0148] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.
[0149] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.
Claims
1. A timestamp marking method, characterized in that, A first line card is used in a network device, the network device comprising multiple line cards and a management board, the multiple line cards including the first line card; the first line card is connected to a terminal device and the management board respectively; the method includes: Receive Network Time Protocol (NTP) messages sent by the terminal device, or receive NTP response messages sent by the management board; The timestamp of receiving the NTP message or the timestamp of sending the NTP response message is marked, wherein the timestamp of receiving and the timestamp of sending are marked based on the clock after the multiple line card clocks are synchronized.
2. The method as described in claim 1, characterized in that, The method further includes: The first line card synchronizes its clock with at least one other line card among the plurality of line cards based on the High Precision Time Synchronization Protocol (PTP) so that the clocks of each line card among the plurality of line cards are synchronized.
3. The method as described in claim 2, characterized in that, If the plurality of line cards further includes a second line card, then the clock synchronization based on the High Precision Time Synchronization Protocol (PTP) with at least one other line card among the plurality of line cards, to ensure clock synchronization among each of the plurality of line cards, includes: The first line card sends a synchronization message "sync" to the second line card and marks the first timestamp of sending the synchronization message; Receive a delay request message delay_req returned by the second line card based on the synchronization message, and mark the fourth timestamp of receiving the delay request message, wherein the delay request message includes a second timestamp marked by the second line card receiving the synchronization message and a third timestamp marked by sending the delay request message; A delay response message delay_resp is sent to the second line card so that the second line card adjusts its clock to synchronize with the clock of the first line card based on the first timestamp, the second timestamp, the third timestamp, and the fourth timestamp in the delay response message.
4. The method as described in claim 2, characterized in that, If the plurality of line cards further includes a second line card, then the clock synchronization based on the High Precision Time Synchronization Protocol (PTP) with at least one other line card among the plurality of line cards, to ensure clock synchronization among each of the plurality of line cards, includes: The first line card tag receives a second timestamp of the synchronization message sync sent by the second line card, wherein the synchronization message includes a first timestamp of the synchronization message tag sent by the second line card; Send a delay request message delay_req to the second line card and mark the third timestamp of sending the delay request message; The system receives a delay response message delay_resp returned by the second line card based on the delay request message. Based on the delay response message, the second line card receives the fourth timestamp, the first timestamp, the second timestamp, and the third timestamp marked in the delay request message, and adjusts the clock of the first line card to synchronize with the clock of the second line card.
5. A time synchronization method, characterized in that, The method is applied to a network device, which includes multiple line cards and a management board, the multiple line cards including a first line card and a second line card; the first line card and the second line card are respectively connected to a terminal device and the management board; the method includes: The first line card receives a Network Time Protocol (NTP) message sent by the terminal device, wherein the NTP message carries a timestamp indicating that the terminal device sent the NTP message; The receiving timestamp of the NTP message is marked, wherein the receiving timestamp is marked based on the clock after the multiple line card clocks are synchronized; Send the NTP message and the timestamp of the received NTP message to the management board; The management board generates an NTP response message based on the received NTP message and the timestamp of the NTP message, and sends the NTP response message to the second line card. The second line card marks the sending timestamp of the NTP response message, and generates a first NTP message based on the NTP response message and the sending timestamp of the NTP response message, wherein the sending timestamp is marked based on the clock after the clocks of the plurality of line cards are synchronized; and sends the first NTP message to the terminal device so that the terminal device performs clock synchronization based on the first NTP message.
6. The method as described in claim 5, characterized in that, Sending the NTP message and the NTP message's receiving timestamp to the management board includes: The first line card encapsulates timestamp indication information in the NTP message. The timestamp indication information is used to indicate that the receiving timestamp of the NTP message needs to be filled into the target position of the NTP message or the sending timestamp of the NTP response message needs to be filled into the target position of the NTP response message.
7. The method as described in claim 6, characterized in that, The second line card marks the sending timestamp of the NTP response message, including: The second line card receives the NTP response message sent by the management board, wherein the NTP response message is obtained by adding the receiving timestamp of the NTP message to the NTP message and updating the timestamp indication information; The sending timestamp of the NTP response message is marked based on the field information of the NTP response message.
8. The method as described in claim 7, characterized in that, The process of generating the first NTP message based on the NTP response message and the sending timestamp of the NTP response message includes: Based on the offset value in the timestamp indication information, the target position in the NTP response message corresponding to the offset value is determined, wherein the offset value is added to the timestamp indication information of the NTP message; the offset value is used to determine the next target position where the timestamp is added in the NTP response message. The sending timestamp of the NTP response message is added to the target location to obtain the first NTP message.
9. A timestamp marking device, characterized in that, It includes multiple line cards, and any one of the multiple line cards includes: The data receiving module is used to receive Network Time Protocol (NTP) messages sent by the terminal device, or to receive NTP response messages sent by the management board; The timestamp marking module is used to mark the receiving timestamp of the NTP message or the sending timestamp of the NTP response message, wherein the receiving timestamp and the sending timestamp are marked based on the clock after the multiple line card clocks are synchronized.
10. A time synchronization device, characterized in that, The device includes multiple line cards and a management board, wherein the multiple line cards include a first line card and a second line card; the first line card and the second line card are respectively connected to a terminal device and the management board; the device includes: The first line card is used to receive Network Time Protocol (NTP) messages sent by the terminal device, wherein the NTP message carries a timestamp indicating that the terminal device sent the NTP message; The receiving timestamp of the NTP message is marked, wherein the receiving timestamp is marked based on the clock after the multiple line card clocks are synchronized; Send the NTP message and the timestamp of the received NTP message to the management board; The management board is used to generate an NTP response message based on the received NTP message and the receiving timestamp of the NTP message, and send the NTP response message to the second line card; The second line card is used to mark the sending timestamp of the NTP response message, and generate a first NTP message based on the NTP response message and the sending timestamp of the NTP response message, wherein the sending timestamp is marked based on the clock after the clocks of the multiple line cards are synchronized; and send the first NTP message to the terminal device.
11. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, when executing a computer program stored in the memory, implements the steps of the method according to any one of claims 1-8.
12. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the method according to any one of claims 1-8.