Backside illuminated image sensor and method of making the same

Abstract

This disclosure relates to a back-illuminated image sensor and its fabrication method, belonging to the field of integrated circuit technology. It includes: a plurality of mutually isolated N-type photosensitive layers located on the back side of a P-type substrate; the photosensitive layers include a first photosensitive layer, a second photosensitive layer, and a third photosensitive layer sequentially stacked along a direction away from the back side of the substrate; the first photosensitive layer includes a first photosensitive portion and a second photosensitive portion alternately distributed along a first direction parallel to the back side of the substrate; the second photosensitive layer includes a third photosensitive portion and a fourth photosensitive portion alternately distributed along the first direction; the third photosensitive portion is located directly above the first photosensitive portion and is connected to two adjacent second photosensitive portions; the third photosensitive layer includes a fifth photosensitive portion and a sixth photosensitive portion alternately distributed along the first direction; the fifth photosensitive portion is located directly above the third photosensitive portion; the third photosensitive portion is connected to two adjacent sixth photosensitive portions. This method can at least increase the electron concentration in the photosensitive area, improving the photosensitivity of the BSI image sensor.

Description

Technical Field

[0001] This disclosure relates to the field of integrated circuit technology, and in particular to a back-illuminated image sensor and its fabrication method. Background Technology

[0002] Back-side illumination (BSI) image sensors are a type of image sensor that offers better performance than front-side illumination image sensors in low-light conditions.

[0003] However, the photosensitivity of BSI image sensors manufactured using existing BSI image sensor fabrication methods cannot meet practical needs. Therefore, improving the photosensitivity of BSI image sensors has become one of the urgent technical problems to be solved. Summary of the Invention

[0004] Therefore, it is necessary to provide a back-illuminated image sensor and its fabrication method to address the technical problem of insufficient photosensitivity of existing BSI image sensors.

[0005] In a first aspect, embodiments of this disclosure provide a back-illuminated image sensor, including a P-type substrate and a plurality of mutually isolated photosensitive stacks located on the back side of the P-type substrate; the photosensitive stacks include a first photosensitive layer, a second photosensitive layer, and a third photosensitive layer stacked sequentially along a direction away from the back side of the substrate; the first photosensitive layer includes first photosensitive portions and second photosensitive portions, all of which are N-type and have different doping elements, alternately distributed along a first direction parallel to the back side of the substrate; the second photosensitive layer includes third photosensitive portions and fourth photosensitive portions, all of which are N-type and have different doping elements, alternately distributed along the first direction; the third photosensitive portion is located directly above the first photosensitive portion and is connected to two adjacent second photosensitive portions; the fourth photosensitive portion is located directly above the second photosensitive portion; the third photosensitive layer includes fifth photosensitive portions and sixth photosensitive portions, all of which are N-type and have different doping elements, alternately distributed along the first direction; the fifth photosensitive portion is located directly above the third photosensitive portion; the sixth photosensitive portion is located directly above the fourth photosensitive portion, and the third photosensitive portion is connected to two adjacent sixth photosensitive portions.

[0006] In the back-illuminated image sensor described above, the third photosensitive unit is located directly above the first photosensitive unit and is connected to two adjacent second photosensitive units. This allows for the formation of a stepped heterojunction with the first photosensitive unit, increasing the quantum well without increasing the device size. This, in turn, relatively increases the electron storage capacity in the potential well, thus improving photoelectric conversion efficiency. Furthermore, the third photosensitive unit is connected to two adjacent sixth photosensitive units, forming different energy level diagrams of the quantum well. This, again without increasing the device size, increases the quantum well, thereby relatively increasing the electron storage capacity in the potential well and increasing the electron concentration in the photosensitive area, further enhancing photoelectric conversion efficiency.

[0007] Furthermore, pentavalent elements have a higher atomic mass than silicon and a lower mobility during epitaxial growth, resulting in uneven doping concentration in a single doped layer. Since the first and second photosensitive parts, both being N-type and alternately distributed along the first direction, have different doping elements, growing pentavalent elements with different doping in multiple stages can improve the uniformity of doping concentration in the pixel area.

[0008] In some embodiments, the third photosensitive unit is configured to form heterojunctions with two fourth photosensitive units adjacent to it along a first direction, and with the first and fifth photosensitive units adjacent to it along a second direction, forming electron pathways with two second and two sixth photosensitive units connected to it. This forms heterojunctions alternately arranged along the first direction and away from the back surface of the substrate. The third photosensitive unit is positioned directly above the first photosensitive unit and connected to the two adjacent second photosensitive units, forming a stepped heterojunction with the first photosensitive unit. This increases the quantum well without increasing the device volume, thereby relatively increasing the electron storage in the potential well and improving photoelectric conversion efficiency. Furthermore, the third photosensitive unit's connection to the two adjacent sixth photosensitive units forms different energy level diagrams of the quantum well. This increases the quantum well without increasing the device volume, thereby relatively increasing the electron storage in the potential well and increasing the electron concentration in the photosensitive region, which further improves photoelectric conversion efficiency.

[0009] In some embodiments, in a plurality of photosensitive stacks, two adjacent photosensitive stacks along a first direction are isolated by dielectric pillars; the dielectric pillars and the plurality of photosensitive stacks are fabricated simultaneously in the same process steps, reducing the complexity and cost of the fabrication process. The isolation between adjacent photosensitive stacks by dielectric pillars avoids signal crosstalk between adjacent photodiodes.

[0010] In some embodiments, an N-type photosensitive stack is used to form a photodiode with the P-type substrate directly beneath it. The substrate includes a plurality of trench isolation portions spaced apart along a first direction. Dielectric pillars and the trench isolation portions directly beneath them together form an isolation pillar, which isolates adjacent photodiodes. A PN junction of the photodiode can be formed between the N-type photosensitive stack and the P-type substrate. The dielectric pillars and the trench isolation portions directly beneath them together form an isolation pillar, isolating adjacent photodiodes, preventing signal crosstalk between adjacent photodiodes, and reducing the probability of current leakage paths.

[0011] In some embodiments, the first photosensitive part includes a SiP layer; the second photosensitive part includes a SiAS layer; the third photosensitive part includes a SiAS layer; the fourth photosensitive part includes a SiP layer; the fifth photosensitive part includes a SiP layer; and the sixth photosensitive part includes a SiAS layer. Growing pentavalent elements with different dopants in multiple stages can improve the uniformity of doping concentration in the pixel region.

[0012] Secondly, embodiments of this disclosure provide a method for fabricating a back-illuminated image sensor, comprising:

[0013] P-type substrates are provided;

[0014] An N-type first photosensitive layer is formed on the back side of a substrate. The first photosensitive layer includes a first photosensitive part and a second photosensitive part, which are both N-type and have different doping elements, and are alternately distributed along a first direction parallel to the back side of the substrate.

[0015] A second photosensitive layer is formed on the top surface of the first photosensitive layer. The second photosensitive layer includes a third photosensitive part and a fourth photosensitive part, both of which are N-type and have different doping elements, which are alternately distributed along the first direction. The third photosensitive part is located directly above the first photosensitive part and is connected to two adjacent second photosensitive parts. The fourth photosensitive part is located directly above the second photosensitive part.

[0016] A third photosensitive layer is formed on the top surface of the second photosensitive layer. The third photosensitive layer includes a fifth photosensitive part and a sixth photosensitive part, both of which are N-type and have different doping elements, which are alternately distributed along the first direction. The fifth photosensitive part is located directly above the third photosensitive part. The sixth photosensitive part is located directly above the fourth photosensitive part. The third photosensitive part is connected to its two adjacent sixth photosensitive parts.

[0017] Multiple dielectric pillars are formed that penetrate the third photosensitive layer, the second photosensitive layer, and the first photosensitive layer in a direction close to the substrate. The remaining first photosensitive layer is used to form the first photosensitive layer, the remaining second photosensitive layer is used to form the second photosensitive layer, and the remaining third photosensitive layer is used to form the third photosensitive layer.

[0018] In some embodiments, the third photosensitive unit is configured to form a heterojunction with a fourth photosensitive unit adjacent to it along a first direction, form a heterojunction with a first photosensitive unit and a fifth photosensitive unit adjacent to it along a second direction, and form an electronic pathway with two second photosensitive units and two sixth photosensitive units connected to it.

[0019] In some embodiments, forming the first photosensitive layer includes:

[0020] An N-type first photosensitive material layer is epitaxially grown on the back side of the substrate;

[0021] A first sacrificial layer is formed on the top surface of the first photosensitive material layer;

[0022] A first sacrificial layer and a first photosensitive material layer are etched, and a plurality of first grooves are formed in the first photosensitive material layer at intervals along a first direction parallel to the back surface of the substrate, the first grooves exposing a portion of the back surface of the substrate; thus obtaining a plurality of first photosensitive portions at intervals along the first direction.

[0023] Multiple second photosensitive parts are grown inside and outside multiple first grooves.

[0024] In some embodiments, a second photosensitive layer is formed, including:

[0025] A second photosensitive material layer is epitaxially grown on the top surface of the first photosensitive layer;

[0026] A second sacrificial layer is formed on the top surface of the second photosensitive material layer;

[0027] The second sacrificial layer and the second photosensitive material layer are etched, and a plurality of second grooves are formed in the second photosensitive material layer at intervals along the first direction. The second grooves expose the top surface of the second photosensitive part and a portion of the top surface of two first photosensitive parts adjacent to the exposed second photosensitive part; thus, a plurality of third photosensitive parts at intervals along the first direction are obtained.

[0028] Multiple fourth photosensitive parts are extended and grown inside and outside multiple second grooves.

[0029] In some embodiments, a third photosensitive layer is formed, including:

[0030] A third photosensitive material layer is epitaxially grown on the top surface of the second photosensitive layer;

[0031] A third sacrificial layer is formed on the top surface of the third photosensitive material layer;

[0032] The third sacrificial layer and the third photosensitive material layer are etched, and a plurality of third grooves are formed in the third photosensitive material layer at intervals along the first direction. The third grooves expose the top surface of the fourth photosensitive part and a portion of the top surface of the third photosensitive part located between two adjacent fourth photosensitive parts along the first direction, thereby obtaining a plurality of fifth photosensitive parts at intervals along the first direction.

[0033] Multiple sixth photosensitive parts are grown inside and outside multiple third grooves.

[0034] The back-illuminated image sensor and its fabrication method in this disclosure have the following unexpected technical effects:

[0035] Since the third photosensitive part is located directly above the first photosensitive part and connected to the two adjacent second photosensitive parts, it can form a stepped heterojunction with the first photosensitive part. This increases the quantum well without increasing the device size, thereby relatively increasing the electron storage in the potential well and improving photoelectric conversion efficiency. The third photosensitive part is connected to the two adjacent sixth photosensitive parts, forming different energy level diagrams of the quantum well. This also increases the quantum well without increasing the device size, relatively increasing the electron storage in the potential well and increasing the electron concentration in the photosensitive area, which is beneficial for improving photoelectric conversion efficiency. Because the first and second photosensitive parts, both N-type and alternately distributed along the first direction, have different doping elements, growing different pentavalent elements multiple times can improve the uniformity of the doping concentration in the pixel area. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 This is a schematic flowchart of a back-illuminated image sensor fabrication method provided in some embodiments;

[0038] Figure 2 This is a schematic diagram of the longitudinal section of the semiconductor structure obtained after forming a first sacrificial layer on a substrate in step S20 of the back-illuminated image sensor fabrication method provided in some embodiments;

[0039] Figure 3 This is a schematic diagram of the longitudinal section of the semiconductor structure obtained after forming the first groove in step S20 of the back-illuminated image sensor fabrication method provided in some embodiments;

[0040] Figure 4 This is a schematic diagram of the longitudinal section of the semiconductor structure obtained after forming the first photosensitive layer in step S20 of the back-illuminated image sensor fabrication method provided in some embodiments;

[0041] Figure 5 This is a schematic diagram of the longitudinal section of the semiconductor structure obtained after forming the second sacrificial layer in step S30 of the back-illuminated image sensor fabrication method provided in some embodiments;

[0042] Figure 6 This is a schematic diagram of the longitudinal section of the semiconductor structure obtained after forming the second groove in step S30 of the back-illuminated image sensor fabrication method provided in some embodiments;

[0043] Figure 7 This is a schematic diagram of the longitudinal section of the semiconductor structure obtained after forming the second photosensitive layer in step S30 of the back-illuminated image sensor fabrication method provided in some embodiments;

[0044] Figure 8 This is a schematic diagram of the longitudinal section of the semiconductor structure obtained after forming the third sacrificial layer in step S40 of the back-illuminated image sensor fabrication method provided in some embodiments;

[0045] Figure 9 This is a schematic diagram of the longitudinal section of the semiconductor structure obtained after forming the third groove in step S40 of the back-illuminated image sensor fabrication method provided in some embodiments;

[0046] Figure 10This is a schematic diagram of the longitudinal section of the semiconductor structure obtained after forming the third photosensitive layer in step S40 of the back-illuminated image sensor fabrication method provided in some embodiments.

[0047] Figure 11 This is a schematic diagram of the longitudinal section of the semiconductor structure obtained after forming dielectric pillars in step S50 of the back-illuminated image sensor fabrication method provided in some embodiments;

[0048] Figure 12 This is a schematic diagram of the longitudinal section of the semiconductor structure obtained after forming a grid stack in step S50 of the back-illuminated image sensor fabrication method provided in some embodiments.

[0049] Figure 13 This is a schematic diagram of the longitudinal section of the semiconductor structure obtained after step S50, when a filter is formed, in the back-illuminated image sensor fabrication method provided in some embodiments.

[0050] Explanation of reference numerals in the attached figures:

[0051] 10. Substrate; 10a. Back side of substrate; 101. Trench isolation portion; 102. Etch stop layer; 103. Interlayer dielectric layer; 201. First sacrificial layer; 211. First photosensitive material layer; 21. First photosensitive layer; 210. First trench; 2101. First photosensitive portion; 2102. Second photosensitive portion; 221. Second photosensitive material layer; 202. Second sacrificial layer; 22. Second photosensitive layer; 220. Second trench Groove; 2201, Third photosensitive part; 2202, Fourth photosensitive part; 231, Third photosensitive material layer; 203, Third sacrificial layer; 23, Third photosensitive layer; 230, Third groove; 2301, Fifth photosensitive part; 2302, Sixth photosensitive part; 30, Dielectric pillar; 60, Grid stack; 61, First sub-grid layer; 62, Second sub-grid layer; 63, Top grid layer; 70, Filter; 701, Grid groove. Detailed Implementation

[0052] To facilitate understanding of this disclosure, a more complete description will now be given with reference to the accompanying drawings, in which preferred embodiments of the present disclosure are shown. However, this disclosure may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

[0053] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of this disclosure.

[0054] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, parts, regions, layers, doping types, and / or portions, these elements, parts, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, part, region, layer, doping type, or portion from another element, part, region, layer, doping type, or portion. Therefore, without departing from the teachings of this disclosure, the first element, component, region, layer, doping type, or portion discussed below may be represented as a second element, component, region, layer, or portion; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types, for example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

[0055] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, the element or feature described as “below,” “under,” or “below” will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. Furthermore, the device may also include other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used herein will be interpreted accordingly.

[0056] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that when the terms “comprise” and / or “comprising” are used in this specification, the presence of the stated feature, integer, step, operation, element, and / or part is established, but the presence or addition of one or more other features, integers, steps, operations, elements, parts, and / or groups is not excluded. Meanwhile, when used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0057] Embodiments of the invention are described herein with reference to cross-sectional views that serve as schematic diagrams of preferred embodiments (and intermediate structures) of the present disclosure, thus allowing for variations in the illustrated shapes due to, for example, manufacturing techniques and / or tolerances. Therefore, embodiments of the present disclosure should not be limited to the specific shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing techniques. For instance, implantation regions shown as rectangular typically have rounded or curved features at their edges and / or implantation concentration gradients, rather than a binary change from implantation regions to non-implantation regions. Similarly, buried regions formed by implantation can result in some implantation in the region between the buried region and the surface traversed during implantation. Therefore, the regions shown in the figures are substantially schematic, and their shapes do not represent the actual shapes of regions of the device and do not limit the scope of the present disclosure.

[0058] In this embodiment, neglecting the flatness of the substrate surface, the direction parallel to the substrate surface is, for example, a first direction, and the stacking direction or the direction away from the substrate surface (the thickness direction of the substrate) is, for example, a second direction. In this embodiment, the first direction can be the ox direction, and the second direction can be the oz direction. The "cross section" in this embodiment is parallel to the back surface of the substrate. The "longitudinal section" in this embodiment is perpendicular to the back surface of the substrate.

[0059] Please refer to Figure 1 In some embodiments, a method for fabricating a back-illuminated image sensor is provided, comprising:

[0060] Step S10: Provide a P-type substrate;

[0061] Step S20: An N-type first photosensitive layer is formed on the back side of the substrate. The first photosensitive layer includes a first photosensitive part and a second photosensitive part, which are N-type and doped with different elements, and are alternately distributed along a first direction parallel to the back side of the substrate.

[0062] Step S30: A second photosensitive layer is formed on the top surface of the first photosensitive layer. The second photosensitive layer includes a third photosensitive part and a fourth photosensitive part, both of which are N-type and have different doping elements, which are alternately distributed along the first direction. The third photosensitive part is located directly above the first photosensitive part and is connected to two adjacent second photosensitive parts. The fourth photosensitive part is located directly above the second photosensitive part.

[0063] Step S40: A second photosensitive layer is formed on the top surface of the first photosensitive layer, and a third photosensitive layer is formed on the top surface of the second photosensitive layer. The third photosensitive layer includes a fifth photosensitive part and a sixth photosensitive part, both of which are N-type and have different doping elements, which are alternately distributed along the first direction. The fifth photosensitive part is located directly above the third photosensitive part. The sixth photosensitive part is located directly above the fourth photosensitive part, and the third photosensitive part is connected to its two adjacent sixth photosensitive parts.

[0064] Step S50: Form multiple dielectric pillars that penetrate the third photosensitive layer, the second photosensitive layer and the first photosensitive layer along the direction close to the substrate. The remaining first photosensitive layer is used to form the first photosensitive layer, the remaining second photosensitive layer is used to form the second photosensitive layer, and the remaining third photosensitive layer is used to form the third photosensitive layer.

[0065] For example, please refer to Figure 2 The substrate 10 can be made of semiconductor material, insulating material, conductive material, or any combination thereof. Boron (B) can be doped into the substrate 10 to obtain a P-type substrate, and a PN junction of a photodiode can be formed between the P-type substrate and the N-type photosensitive stack. The substrate 10 can be a single-layer structure or a multi-layer structure. For example, the substrate 10 can be a silicon (Si) substrate, a silicon-germanium (SiGe) substrate, a silicon-germanium-carbon (SiGeC) substrate, a silicon carbide (SiC) substrate, a gallium arsenide (GaAs) substrate, an indium arsenide (InAs) substrate, an indium phosphide (InP) substrate, or other III / V semiconductor substrates, or II / VI semiconductor substrates. Alternatively, for example, the substrate 10 can be a layered substrate including materials such as Si / SiGe, Si / SiC, silicon-on-insulator (SOI), or silicon-germanium-on-insulator. Therefore, the type of substrate should not limit the scope of this disclosure.

[0066] Please continue to refer to this. Figure 2 In some embodiments, the front side of the trench isolation portion 101 is the surface facing away from the back side of the substrate 10a, and the front side of the trench isolation portion 101 is covered with an etch stop layer 102. The side of the etch stop layer 102 facing away from the trench isolation portion 101 includes an interlayer dielectric layer 103.

[0067] For example, please continue to refer to Figure 2 After forming the etch stop layer 102, metal is deposited to form a partial interconnect structure, and an interlayer dielectric layer 103 is formed on this basis. When the etch stop layer 102 is multilayered, other process problems caused by cracks in a single layer and / or failure of the metal interconnect structure can be avoided. The interlayer dielectric layer 103 can be silicon oxide or other dielectric material layers. In addition, metal interconnect structures can be formed on the interlayer dielectric layer 103 as metal interconnect portions of the device.

[0068] Of course, this embodiment only illustrates one method. As long as the metal interconnect structure can be formed reasonably, the thickness of the etching stop layer 102 and the interlayer dielectric layer 103 is not specifically limited and can be adjusted according to specific process requirements.

[0069] Please continue to refer to this. Figure 2In some embodiments, the provided substrate 10 includes a plurality of trench isolation portions 101 arranged at intervals along a first direction parallel to the back surface 10a of the substrate, such as the ox direction. The material of the trench isolation portions 101 may include, but is not limited to, silicon oxide (SiO2), silicon nitride (Si3N4), silicon oxynitride (Si2N2O), or combinations thereof.

[0070] As an example, please continue to refer to Figure 2 The trench isolation portion 101 can be used to isolate electrons and light energy. The shape of the longitudinal section (the section parallel to the Zox plane) of the trench isolation portion 101 may include a regular trapezoid, an inverted trapezoid, a rectangle, etc., or a combination of regular trapezoids, inverted trapezoids, rectangles, etc. This disclosure does not impose specific limitations on the shape, material, or size of the trench isolation portion 101, as long as it can isolate electrons, light energy, doped ions, etc. Furthermore, this embodiment does not impose specific limitations on the spacing between adjacent trench isolation portions 101, and it can be set according to actual needs.

[0071] Please continue to refer to this. Figure 2 In some embodiments, after forming a shallow trench (STI) in the substrate 10 and filling the STI with dielectric material, a trench isolation portion 101 can be formed. Subsequently, the substrate 10 can be flipped over, and the back side 10a of the substrate can be thinned and planarized to expose the back side of the trench isolation portion 101.

[0072] Please refer to Figures 2-4 In some embodiments, forming the first photosensitive layer 21 in step S20 includes:

[0073] Step S21: Epitaxially grow an N-type first photosensitive material layer 211 on the back side 10a of the substrate;

[0074] Step S22: Form a first sacrificial layer 201 on the top surface of the first photosensitive material layer 211;

[0075] Step S23: Etch the first sacrificial layer 201 and the first photosensitive material layer 211, and form a plurality of first grooves 210 spaced apart in the first photosensitive material layer 211 along a first direction parallel to the back surface of the substrate 10a, the first grooves 210 exposing part of the back surface of the substrate 10a; to obtain a plurality of first photosensitive portions 2101 spaced apart along the first direction;

[0076] Step S24: Multiple second photosensitive parts 2102 are elongated inside and outside the multiple first grooves 210.

[0077] Please continue to refer to this. Figures 2-3In some embodiments, in step S21, a selective epitaxial growth process may be used to epitaxially grow an N-type first photosensitive material layer 211 on the back side 10a of the substrate. The material of the first photosensitive material layer 211 may include a SiP layer.

[0078] Please continue to refer to this. Figures 2-3 In some embodiments, in step S22, a first sacrificial layer 201 can be formed on the top surface of the first photosensitive material layer 211 using a spin-on glass (SOG) method. The SOG solution is a liquid compound of silicate based on silicon dioxide. The SOG solution is dropped onto the center of the wafer, and then the wafer is rapidly rotated to uniformly coat the solution onto the wafer surface using centrifugal force, forming a uniform liquid film. Soft baking is then performed to remove the solvent, making the SOG film semi-solid. Further heating at high temperature completely solidifies the SOG film, causing the organic groups in the SOG to undergo a cross-linking reaction, forming a robust glass layer.

[0079] Please continue to refer to this. Figures 2-3 In some embodiments, step S23 may employ a dry etching process to etch the first sacrificial layer 201 and the first photosensitive material layer 211, forming a plurality of first grooves 210 spaced apart within the first photosensitive material layer 211 along a first direction (e.g., the ox direction) parallel to the back surface 10a of the substrate. The first grooves 210 expose portions of the back surface 10a of the substrate, resulting in a plurality of first photosensitive portions 2101 spaced apart along the first direction. The material of the first photosensitive portion 2101 may include a SiP layer. The first sacrificial layer 201 protects the first photosensitive material layer 211, preventing unnecessary etching damage to the first photosensitive material layer 211 during the etching process.

[0080] Please continue to refer to this. Figure 2 In some embodiments, the thickness of the first photosensitive material layer 211 can be 50nm-60nm, for example, the thickness of the first photosensitive material layer 211 can be 50nm, 55nm or 60nm, etc. The thickness of the first sacrificial layer 201 can be 1nm-2nm, for example, the thickness of the first sacrificial layer 201 can be 1nm, 1.5nm or 2nm, etc.

[0081] Please refer to Figure 4 In some embodiments, in step S24, a selective epitaxial growth process can be used to epitaxially grow a plurality of second photosensitive parts 2102 inside and outside a plurality of first grooves 210. Then, a planarization process is used to process the top surfaces of the plurality of first photosensitive parts 2101 and the plurality of second photosensitive parts 2102 to obtain a plurality of first photosensitive parts 2101 and a plurality of second photosensitive parts 2102 with flush top surfaces.

[0082] Please refer to Figures 5-7 In some embodiments, step S30, forming a second photosensitive layer 22, includes:

[0083] Step S31: Epitaxially grow a second photosensitive material layer 221 on the top surface of the first photosensitive layer 21;

[0084] Step S32: Form a second sacrificial layer 202 on the top surface of the second photosensitive material layer 221;

[0085] Step S33: Etch the second sacrificial layer 202 and the second photosensitive material layer 221, and form a plurality of second grooves 220 spaced apart along the first direction in the second photosensitive material layer 221. The second grooves 220 expose the top surface of the second photosensitive part 2102 and a portion of the top surface of two first photosensitive parts 2101 adjacent to the exposed second photosensitive part 2102; thus obtaining a plurality of third photosensitive parts 2201 spaced apart along the first direction.

[0086] Step S34: Multiple fourth photosensitive parts 2202 are elongated inside and outside the multiple second grooves 220.

[0087] Please continue to refer to this. Figure 5 In some embodiments, in step S31, a selective epitaxial growth process may be used to epitaxially grow an N-type second photosensitive material layer 221 on the top surface of the first photosensitive layer 21. The second photosensitive material layer 221 may include a SiAS layer.

[0088] Please continue to refer to this. Figure 5 In some embodiments, in step S32, a second sacrificial layer 202 may be formed on the top surface of the second photosensitive material layer 221 using an SOG process, wherein the material of the second sacrificial layer 202 includes silicon dioxide.

[0089] Please continue to refer to this. Figure 5 In some embodiments, the thickness of the second photosensitive material layer 221 can be 5nm-8nm, for example, the thickness of the second photosensitive material layer 221 can be 5nm, 6nm, 7nm or 8nm, etc. The thickness of the second sacrificial layer 202 can be 2nm-3nm, for example, the thickness of the second sacrificial layer 202 can be 2nm, 2.5nm or 3nm, etc.

[0090] Please continue to refer to this. Figures 5-6In some embodiments, step S33 may employ a dry etching process to etch the second sacrificial layer 202 and the second photosensitive material layer 221, forming a plurality of second grooves 220 spaced apart along a first direction (e.g., the ox direction) within the second photosensitive material layer 221. The second grooves 220 expose the top surface of the second photosensitive portion 2102 and portions of the top surfaces of two first photosensitive portions 2101 adjacent to the exposed second photosensitive portion 2102; thus, a plurality of third photosensitive portions 2201 spaced apart along the first direction are obtained. The material of the third photosensitive portions 2201 may include a SiAS layer. The second sacrificial layer 202 can prevent damage to the second photosensitive material layer 221 during the etching process.

[0091] Please refer to Figure 7 In some embodiments, in step S34, a selective epitaxial growth process can be used to epitaxially grow a plurality of fourth photosensitive portions 2202 inside and outside the plurality of second grooves 220. The material of the fourth photosensitive portion 2202 may include a SiP layer.

[0092] Please refer to Figures 8-10 In some embodiments, step S30, forming a third photosensitive layer 23, includes:

[0093] Step S31: Epitaxially grow a third photosensitive material layer 231 on the top surface of the second photosensitive layer 22;

[0094] Step S32: Form a third sacrificial layer 203 on the top surface of the third photosensitive material layer 231;

[0095] Step S33: Etch the third sacrificial layer 203 and the third photosensitive material layer 231, and form a plurality of third grooves 230 spaced apart along the first direction in the third photosensitive material layer 231. The third grooves 230 expose the top surface of the fourth photosensitive part 2202 and part of the top surface of the third photosensitive part 2201 located between two adjacent fourth photosensitive parts 2202 along the first direction, to obtain a plurality of fifth photosensitive parts 2301 spaced apart along the first direction.

[0096] Step S34: Multiple sixth photosensitive parts 2302 are elongated inside and outside the multiple third grooves 230.

[0097] Please continue to refer to this. Figure 8 In some embodiments, in step S31, a selective epitaxial growth process may be used to epitaxially grow a third photosensitive material layer 231 on the top surface of the second photosensitive layer 22. The material of the third photosensitive material layer 231 may include a SiP layer.

[0098] Please continue to refer to this. Figure 8In some embodiments, in step S32, a third sacrificial layer 203 may be formed on the top surface of the third photosensitive material layer 231 using an SOG process; the material of the third sacrificial layer 203 may include silicon dioxide.

[0099] Please continue to refer to this. Figure 8 In some embodiments, the thickness of the third photosensitive material layer 231 can be 5nm-8nm, for example, the thickness of the third photosensitive material layer 231 can be 5nm, 6nm, 7nm or 8nm, etc. The thickness of the third sacrificial layer 203 can be 2nm-3nm, for example, the thickness of the third sacrificial layer 203 can be 2nm, 2.5nm or 3nm, etc.

[0100] Please continue to refer to this. Figure 9 In some embodiments, step S33 may employ a dry etching process to etch the third sacrificial layer 203 and the third photosensitive material layer 231, forming a plurality of third grooves 230 spaced apart along a first direction (e.g., the ox direction) within the third photosensitive material layer 231. The third grooves 230 expose the top surface of the fourth photosensitive portion 2202 and a portion of the top surface of the third photosensitive portion 2201 located between two adjacent fourth photosensitive portions 2202 along the ox direction, resulting in a plurality of fifth photosensitive portions 2301 spaced apart along the ox direction. The material of the fifth photosensitive portion 2301 may include a SiP layer. The third photosensitive portion 2201 is in contact with and connected to the first photosensitive portion 2101 and the fifth photosensitive portion 2301 adjacent to it along the oz direction, and to the two second photosensitive portions 2102 adjacent to it along the ox direction, forming a cross-shaped structure in longitudinal section.

[0101] Please continue to refer to this. Figure 10 In some embodiments, in step S34, a selective epitaxial growth process may be used to epitaxially grow a plurality of sixth photosensitive parts 2302 inside and outside a plurality of third grooves 230. The material of the sixth photosensitive part 2302 may include a SiAS layer.

[0102] Please refer to Figure 11 In some embodiments, in step S30, a dry etching process can be used to form multiple isolation trenches (not shown) that penetrate the third photosensitive layer 23, the second photosensitive layer 22, and the first photosensitive layer 21 along a direction close to the substrate 10, such as the oz direction. Then, an SOG process can be used to fill the multiple isolation trenches with dielectric material, and a planarization process can be used to process the top surface of the dielectric material to obtain multiple dielectric pillars 30 with flush top surfaces, wherein the top surfaces of the dielectric pillars 30 are flush with the top surface of the third photosensitive layer 23. The material of the dielectric pillars 30 may include silicon dioxide.

[0103] Please refer to Figure 11In some embodiments, a plurality of dielectric pillars 30 are provided one-to-one with a plurality of trench isolation portions 101. The dielectric pillars 30 are located directly above the trench isolation portions 101. The dielectric pillars 30 and the trench isolation portions 101 together form a physical isolation wall between adjacent photodiodes to avoid signal crosstalk between adjacent photodiodes.

[0104] Please refer to Figure 12 In some embodiments, a deposition process can be used to form a first grid material layer (not shown) covering the top surface of the third photosensitive layer 23, followed by the formation of a second grid material layer (not shown) on top of the first grid material layer, and then a third grid material layer (not shown) on top of the second grid material layer. An etching process is used to etch the third grid material layer, the second grid material layer, and the first grid material layer to obtain a plurality of grid trenches 701 spaced apart along the ox direction. The remaining first grid material layer is used to form a first sub-grid layer 61, the remaining second grid material layer is used to form a second sub-grid layer 62, and the remaining third grid material layer is used to form a top grid layer 63. The first sub-grid layer 61, the second sub-grid layer 62, and the top grid layer 63 together form a grid stack 60. The grid trenches 701 define the shape and position of the filter. The grid stack 60 is located between adjacent photodiode structures, which can avoid signal crosstalk. The materials of the first sub-grid layer 61 include, but are not limited to, insulating materials with high dielectric constants such as alumina (Al2O3), hafnium oxide (HfO2), tantalum pentoxide (Ta2O5), and zirconium oxide (ZrO2). The materials of the second sub-grid layer 62 include, but are not limited to, metallic materials such as cobalt (Co), nickel (Ni), and titanium (Ti). The material of the top grid layer 63 includes titanium nitride (TiN).

[0105] Please refer to Figure 13 In some embodiments, a filter 70 is formed within the grid groove 701. The filter 70 includes, but is not limited to, a red filter, a yellow filter, and a blue filter, and the three types of filters are arranged adjacent to each other to form a pixel group. The red filter transmits red light waves, the yellow filter transmits yellow light waves, and the blue filter transmits blue light waves.

[0106] Please refer to Figure 13In some embodiments, a back-illuminated image sensor is provided, including a P-type substrate 10 and a plurality of mutually isolated photosensitive stacks located on the back side 10a of the P-type substrate; the photosensitive stacks include a first photosensitive layer, a second photosensitive layer, and a third photosensitive layer sequentially stacked along a direction away from the back side 10a of the substrate; the first photosensitive layer includes alternating first photosensitive portions 2101 and second photosensitive portions 2102, all of which are N-type and have different doping elements, distributed along a first direction parallel to the back side 10a of the substrate; the second photosensitive layer includes alternating third photosensitive portions 2201, all of which are N-type and have different doping elements, distributed along the first direction. The fourth photosensitive part 2202; the third photosensitive part 2201 is located directly above the first photosensitive part 2101 and is connected to the two adjacent second photosensitive parts 2102; the fourth photosensitive part 2202 is located directly above the second photosensitive part 2102; the third photosensitive layer includes a fifth photosensitive part 2301 and a sixth photosensitive part 2302, which are N-type and have different doping elements, and are alternately distributed along the first direction; the fifth photosensitive part 2301 is located directly above the third photosensitive part 2201; the sixth photosensitive part 2302 is located directly above the fourth photosensitive part 2202, and the third photosensitive part 2201 is connected to the two adjacent sixth photosensitive parts 2302.

[0107] For example, please continue to refer to Figure 13 Since the third photosensitive unit 2201 is located directly above the first photosensitive unit 2101 and is connected to the two adjacent second photosensitive units 2102, it can form a stepped heterojunction with the first photosensitive unit 2101. This increases the quantum well without increasing the device size, thereby relatively increasing the electron storage in the potential well and improving the photoelectric conversion efficiency. The third photosensitive unit 2201 is connected to the two adjacent sixth photosensitive units 2302, forming different energy level diagrams of the quantum well. This also increases the quantum well without increasing the device size, thereby relatively increasing the electron storage in the potential well and increasing the electron concentration in the photosensitive region, which is beneficial for improving the photoelectric conversion efficiency.

[0108] For example, please continue to refer to Figure 13 Pentium-valent elements have a higher atomic mass than silicon and a lower mobility during epitaxial growth, resulting in uneven doping concentration in a single doped layer. Since the first photosensitive part 2101 and the second photosensitive part 2102, both of which are N-type and alternately distributed along the first direction, have different doping elements, growing pentavalent elements with different doping in multiple stages can improve the uniformity of doping concentration in the pixel area.

[0109] Please continue to refer to this. Figure 13In some embodiments, the third photosensitive unit 2201 is configured to form heterojunctions with two fourth photosensitive units 2202 adjacent to it along the first direction, form heterojunctions with the first photosensitive unit 2101 and the fifth photosensitive unit 2301 adjacent to it along the second direction, and form electronic pathways with two second photosensitive units 2102 and two sixth photosensitive units 2302 connected to it. This forms heterojunctions that are alternately arranged along the first direction (e.g., the ox direction) and away from the back surface of the substrate 10a (e.g., the oz direction). The third photosensitive unit 2201 is located directly above the first photosensitive unit 2101 and is connected to the two adjacent second photosensitive units 2102. A stepped heterojunction is formed between the third photosensitive unit 2201 and the first photosensitive unit 2101. Without increasing the device volume, a quantum well is added, thereby relatively increasing the electron storage in the potential well, which is beneficial to improving the photoelectric conversion efficiency. Furthermore, the third photosensitive part 2201 is connected to its two adjacent sixth photosensitive parts 2302 to form different energy level diagrams of the quantum well. Without increasing the device volume, the quantum well is increased, thereby relatively increasing the electron storage in the potential well and increasing the electron concentration in the photosensitive area, which is beneficial to improving the photoelectric conversion efficiency.

[0110] For example, in this embodiment of the application, the As in the SiAs layer is heavily doped, and the As doping concentration is 1E14cm. -3 -1E15cm -3 For example, the doping concentration of As can be 1E14cm. -3 2E14cm -3 5E14cm -3 8E14cm -3 Or 1E15cm -3 etc.; In the SiP layer, P is heavily doped, and the doping concentration of P is 5E14cm. -3 -5E15cm -3 For example, the doping concentration of P can be 5E14cm. -3 8E14cm -3 1E15cm -3 Or 5E15cm -3 wait.

[0111] Please continue to refer to this. Figure 13 In some embodiments, a first photosensitive layer 21, a second photosensitive layer 22, and a third photosensitive layer 23 stacked along the oz direction together constitute a photosensitive stack. Among the multiple photosensitive stacks, two adjacent photosensitive stacks along the first direction are isolated by dielectric pillars 30; the dielectric pillars 30 and the multiple photosensitive stacks are fabricated simultaneously in the same process steps, reducing the complexity and cost of the fabrication process. The isolation between adjacent photosensitive stacks by the dielectric pillars 30 avoids signal crosstalk between adjacent photodiodes.

[0112] Please continue to refer to this. Figure 13In some embodiments, an N-type photosensitive stack is used to form a photodiode with the P-type substrate 10 directly below it. The substrate 10 includes a plurality of trench isolation portions 101 spaced apart along a first direction. A dielectric pillar 30 and the trench isolation portions 101 directly below it together form an isolation pillar (not shown), which is used to isolate adjacent photodiodes. A PN junction of the photodiode can be formed between the N-type photosensitive stack and the P-type substrate 10. The dielectric pillar 30 and the trench isolation portions 101 directly below it together form an isolation pillar, isolating adjacent photodiodes, avoiding signal crosstalk between adjacent photodiodes, and reducing the probability of current leakage paths.

[0113] Please continue to refer to this. Figure 13 In some embodiments, the first photosensitive part 2101 includes a SiP layer; the second photosensitive part 2102 includes a SiAS layer; the third photosensitive part 2201 includes a SiAS layer; the fourth photosensitive part 2202 includes a SiP layer; the fifth photosensitive part 2301 includes a SiP layer; and the sixth photosensitive part 2302 includes a SiAS layer. Growing pentavalent elements with different dopants in multiple stages can improve the uniformity of doping concentration in the pixel region.

[0114] Please continue to refer to this. Figure 13 The back-illuminated image sensor and its fabrication method in this disclosure have the following unexpected technical effects:

[0115] Since the third photosensitive part 2201 is located directly above the first photosensitive part 2101 and is connected to the two adjacent second photosensitive parts 2102, it can form a stepped heterojunction with the first photosensitive part 2101. This increases the quantum well without increasing the device size, thereby relatively increasing the electron storage in the potential well and improving photoelectric conversion efficiency. The third photosensitive part 2201 is connected to the two adjacent sixth photosensitive parts 2302, forming different energy level diagrams of the quantum well. This also increases the quantum well without increasing the device size, relatively increasing the electron storage in the potential well and increasing the electron concentration in the photosensitive area, thus improving photoelectric conversion efficiency. Because the first photosensitive part 2101 and the second photosensitive part 2102, both being N-type and alternately distributed along the first direction, have different doping elements, growing different pentavalent elements multiple times can improve the uniformity of the doping concentration in the pixel area.

[0116] It should be understood that, although Figure 1 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order in which these steps are executed, and they can be performed in other orders. Figure 1At least some of the steps in the process may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but may be executed at different times. The execution order of these steps or stages is not necessarily sequential, but may be executed in turn or alternately with other steps or at least some of the steps or stages in other steps.

[0117] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0118] The embodiments described above are merely illustrative of several implementation methods of this disclosure, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this disclosure, and these modifications and improvements all fall within the scope of protection of this disclosure.

Claims

1. A back-illuminated image sensor, characterized in that, It includes a P-type substrate and multiple mutually isolated photosensitive stacks located on the back side of the P-type substrate; The photosensitive stack includes a first photosensitive layer, a second photosensitive layer and a third photosensitive layer stacked sequentially along a direction away from the back side of the substrate; The first photosensitive layer includes a first photosensitive portion and a second photosensitive portion, which are N-type and doped with different elements, and are alternately distributed along a first direction parallel to the back side of the substrate. The second photosensitive layer includes a third photosensitive portion and a fourth photosensitive portion, which are N-type and doped with different elements, and are alternately distributed along the first direction; the third photosensitive portion is located directly above the first photosensitive portion and is connected to two adjacent second photosensitive portions; the fourth photosensitive portion is located directly above the second photosensitive portion. The third photosensitive layer includes a fifth photosensitive portion and a sixth photosensitive portion, which are N-type and doped with different elements, and are alternately distributed along the first direction; the fifth photosensitive portion is located directly above the third photosensitive portion; the sixth photosensitive portion is located directly above the fourth photosensitive portion, and the third photosensitive portion is connected to its two adjacent sixth photosensitive portions; The third photosensitive unit is configured to form a heterojunction with the fourth photosensitive unit adjacent to it along the first direction, form a heterojunction with the first photosensitive unit and the fifth photosensitive unit adjacent to it along the second direction, and form an electronic pathway with the two second photosensitive units and the two sixth photosensitive units connected to it.

2. The back-illuminated image sensor according to claim 1, characterized in that, The P-type substrate is doped with boron.

3. The back-illuminated image sensor according to claim 1, characterized in that, In the plurality of photosensitive stacks, two adjacent photosensitive stacks along the first direction are isolated by dielectric pillars; the dielectric pillars and the plurality of photosensitive stacks are prepared simultaneously in the same process steps.

4. The back-illuminated image sensor according to claim 3, characterized in that, The N-type photosensitive stack is used to form a photodiode with the P-type substrate directly below it; The substrate includes a plurality of trench isolation portions spaced apart along the first direction. The dielectric pillar and the trench isolation portion directly below it are used to form an isolation pillar, which is used to isolate the photodiode adjacent to it.

5. The back-illuminated image sensor according to any one of claims 1-4, characterized in that: The first photosensitive part includes a SiP layer; the second photosensitive part includes a SiAS layer. The third photosensitive part includes a SiAS layer; the fourth photosensitive part includes a SiP layer; The fifth photosensitive part includes a SiP layer; the sixth photosensitive part includes a SiAS layer.

6. A method for fabricating a back-illuminated image sensor, characterized in that, include: P-type substrates are provided; An N-type first photosensitive layer is formed on the back side of the substrate. The first photosensitive layer includes a first photosensitive part and a second photosensitive part, which are all N-type and have different doping elements, and are alternately distributed along a first direction parallel to the back side of the substrate. A second photosensitive layer is formed on the top surface of the first photosensitive layer. The second photosensitive layer includes a third photosensitive portion and a fourth photosensitive portion, both of which are N-type and have different doping elements, which are alternately distributed along the first direction. The third photosensitive portion is located directly above the first photosensitive portion and is connected to two adjacent second photosensitive portions. The fourth photosensitive portion is located directly above the second photosensitive portion. A third photosensitive layer is formed on the top surface of the second photosensitive layer. The third photosensitive layer includes a fifth photosensitive part and a sixth photosensitive part, both of which are N-type and have different doping elements, which are alternately distributed along the first direction. The fifth photosensitive part is located directly above the third photosensitive part. The sixth photosensitive part is located directly above the fourth photosensitive part. The third photosensitive part is connected to its two adjacent sixth photosensitive parts. Multiple dielectric pillars are formed that penetrate the third photosensitive layer, the second photosensitive layer, and the first photosensitive layer in a direction close to the substrate. The remaining first photosensitive layer is used to form the first photosensitive layer, the remaining second photosensitive layer is used to form the second photosensitive layer, and the remaining third photosensitive layer is used to form the third photosensitive layer. The third photosensitive unit is configured to form a heterojunction with the fourth photosensitive unit adjacent to it along the first direction, form a heterojunction with the first photosensitive unit and the fifth photosensitive unit adjacent to it along the second direction, and form an electronic pathway with the two second photosensitive units and the two sixth photosensitive units connected to it.

7. The method for fabricating a back-illuminated image sensor according to claim 6, characterized in that, The formation of the first photosensitive layer includes: An N-type first photosensitive material layer is epitaxially grown on the back side of the substrate; A first sacrificial layer is formed on the top surface of the first photosensitive material layer; The first sacrificial layer and the first photosensitive material layer are etched to form a plurality of first grooves spaced apart along a first direction parallel to the back surface of the substrate in the first photosensitive material layer, and the first grooves expose a portion of the back surface of the substrate; thus obtaining a plurality of first photosensitive portions spaced apart along the first direction. Multiple second photosensitive portions are extended and grown inside and outside the multiple first grooves.

8. The method for fabricating a back-illuminated image sensor according to claim 7, characterized in that, A selective epitaxial growth process is used to epitaxially grow multiple second photosensitive parts inside and outside the multiple first grooves.

9. The method for fabricating a back-illuminated image sensor according to claim 6, characterized in that, Forming the second photosensitive layer includes: A second photosensitive material layer is epitaxially grown on the top surface of the first photosensitive layer; A second sacrificial layer is formed on the top surface of the second photosensitive material layer; The second sacrificial layer and the second photosensitive material layer are etched to form a plurality of second grooves spaced apart along the first direction in the second photosensitive material layer. The second grooves expose the top surface of the second photosensitive part and a portion of the top surface of two first photosensitive parts adjacent to the exposed second photosensitive part; thus obtaining a plurality of third photosensitive parts spaced apart along the first direction. Multiple fourth photosensitive parts are extended and grown inside and outside the multiple second grooves.

10. The method for fabricating a back-illuminated image sensor according to claim 6, characterized in that, Forming the third photosensitive layer includes: A third photosensitive material layer is epitaxially grown on the top surface of the second photosensitive layer; A third sacrificial layer is formed on the top surface of the third photosensitive material layer; The third sacrificial layer and the third photosensitive material layer are etched to form a plurality of third grooves spaced apart along the first direction in the third photosensitive material layer. The third grooves expose the top surface of the fourth photosensitive part and a portion of the top surface of the third photosensitive part located between two adjacent fourth photosensitive parts along the first direction, thereby obtaining a plurality of fifth photosensitive parts spaced apart along the first direction. Multiple sixth photosensitive parts are extended and grown inside and outside the multiple third grooves.

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