Method for forming trench isolation structure

Abstract

The invention relates to a method for forming a trench isolation structure. According to the forming method, a pad oxide layer and a silicon nitride layer are stacked on a substrate, an isolation groove penetrating through the silicon nitride layer, the pad oxide layer and a part of the substrate and a line oxide layer covering the surface of the substrate in the isolation groove are formed, and then plasma treatment is conducted on the substrate through hydrogen-containing plasma. And forming Si-NH bonds on the upper surface and the side surface of the silicon nitride layer, depositing an isolation oxide, and carrying out a planarization process. By forming the Si-NH bond, the adhesion of the silicon precursor can be inhibited, and the deposition rate of the isolation oxide on the surface of the silicon nitride layer is reduced, so that on one hand, the isolation trench can be prevented from being sealed too fast, and the probability of forming holes and / or seam defects in the isolation oxide is reduced; on the other hand, the fluctuation amplitude of the upper surface of the isolation oxide before the planarization process is reduced, the planarization effect is improved, and the performance of a semiconductor device formed based on the substrate is improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of integrated circuit manufacturing, and in particular to a method for forming a trench isolation structure. BACKGROUND

[0002] In integrated circuit manufacturing, trench isolation structures (such as shallow trench isolation (STI) or deep trench isolation (DTI)) are often used for isolation between different independent devices (such as different memory cells, different transistors) or different functional areas formed on a semiconductor substrate. Specifically, a trench isolation structure is formed by etching an isolation trench with a certain depth on a substrate, and then filling the isolation trench with oxide to achieve the isolation effect.

[0003] REFERENCE Figure 1 To form a trench isolation structure, a pad oxide layer 110 and a pad nitride layer 120 are first formed on a substrate 100, and then photolithography and etching are performed to form an isolation trench TR that penetrates the pad nitride layer 120, the pad oxide layer 110, and part of the substrate 100. After that, a linear oxide layer (not shown in the figure) is formed on the surface of the substrate 100 in the isolation trench TR, and then isolation oxide OX is deposited in the isolation trench TR and on the surface of the pad nitride layer 120. After that, CMP is performed to remove part of the isolation oxide OX and expose the surface of the pad nitride layer 120. The linear oxide layer and the isolation oxide OX formed in the isolation trench TR constitute the trench isolation structure.

[0004] However, using the above process, when the isolation oxide OX is deposited, the isolation oxide OX is prone to accumulate rapidly at the opening of the isolation trench TR, which causes the isolation trench TR to be sealed before the isolation oxide OX deposited inside the trench is sufficient, resulting in the formation of voids and / or seams in the isolation oxide OX. As shown in Figure 1 After the trench isolation structure is formed, the isolation oxide OX has obvious seams 10, which affects the reliability of the trench isolation structure. SUMMARY

[0005] Research has found that the deposition rate of isolation oxide on the surface of nitride is higher than that on the surface of oxide, as shown in Figure 1As shown, when depositing the isolation oxide OX in the isolation trench TR and on the upper surface of the silicon nitride layer 120, the isolation oxide OX is deposited faster on the surface of the silicon nitride layer 120 than on the surface of the linear oxide layer in the isolation trench TR, causing the thickness of the isolation oxide deposited on the side surface of the silicon nitride layer 120 to increase while the low part of the isolation oxide deposited on the surface of the linear oxide layer has not yet reached the opening of the isolation trench TR, so that the isolation trench TR is sealed near the silicon nitride layer 120, thereby easily forming a cavity and / or a seam defect in the isolation oxide OX, affecting the reliability of the trench isolation structure.

[0006] To reduce the probability of forming a cavity and / or a seam defect in the isolation oxide formed in the isolation trench, the present application provides a method for forming a trench isolation structure.

[0007] The method for forming a trench isolation structure provided by the present application comprises:

[0008] stacking a pad oxide layer and a silicon nitride layer on a substrate, and forming an isolation trench penetrating through the silicon nitride layer, the pad oxide layer and part of the substrate;

[0009] forming a linear oxide layer covering the surface of the substrate in the isolation trench;

[0010] performing plasma treatment on the substrate after forming the linear oxide layer by using a hydrogen-containing plasma to form Si-NH bonds on the upper surface and the side surface of the silicon nitride layer;

[0011] depositing an isolation oxide in the isolation trench and outside the isolation trench, so that the upper surface of the isolation oxide exceeds the silicon nitride layer; and

[0012] performing a planarization process to expose the upper surface of the silicon nitride layer.

[0013] Optionally, the process gas used for the plasma treatment includes a hydrogen compound of nitrogen.

[0014] Optionally, the process gas used for the plasma treatment uses ammonia.

[0015] Optionally, the process gas used for the plasma treatment includes nitrogen and hydrogen.

[0016] Optionally, the temperature used for the plasma treatment is not more than 120°C.

[0017] Optionally, the temperature used for the plasma treatment is 80°C-100°C.

[0018] Optionally, through the plasma treatment, the surface of the linear oxide layer contains nitrogen but is not completely nitrided.

[0019] Optionally, the planarization process is CMP, and a stop point is located on the upper surface of the silicon nitride layer when the CMP is performed.

[0020] Optionally, before the line oxide layer is formed, the silicon nitride layer is etched to retreat the silicon nitride layer, and expose the upper surface of the pad oxide layer at the portion of the isolation trench opening.

[0021] In the method for forming the trench isolation structure provided by the application, after the line oxide layer is formed, the substrate is subjected to plasma treatment by using hydrogen-containing plasma, so that Si-NH bonds are formed on the surface of the silicon nitride layer. The Si-NH bonds can inhibit the adhesion of silicon precursors, so that the deposition rate of the isolation oxide on the side surface of the silicon nitride layer is small when the isolation oxide is deposited later, and the isolation trench can be prevented from being sealed too fast, and the probability of forming a cavity and / or a joint defect in the isolation oxide can be reduced. Moreover, the plasma treatment can help to reduce the amplitude of the high and low relief of the upper surface of the isolation oxide before the planarization process, improve the planarization effect, and further help to improve the performance of the semiconductor device formed based on the substrate. BRIEF DESCRIPTION OF DRAWINGS

[0022] Figure 1 is a schematic cross-sectional view of a trench isolation structure formed by using the prior art.

[0023] Figure 2 is a schematic flow chart of a method for forming a trench isolation structure according to an embodiment of the application.

[0024] Figures 3A to 3E is a schematic cross-sectional view of a method for forming a trench isolation structure according to an embodiment of the application. DETAILED DESCRIPTION

[0025] The method for forming a trench isolation structure according to the application will be further described below in conjunction with the drawings and specific embodiments. The advantages and features of the application will be more apparent according to the following description. It should be understood that the drawings of the specification are very simplified and use non-precise proportions, only for the purpose of facilitating and clarifying the description of the embodiments of the application. It should be noted that the order of the steps in the method presented herein is not necessarily the only order for performing these steps, and some of the steps described herein can be omitted and / or some other steps not described herein can be added to the method. It should be understood that the spatial relative terms are intended to include different orientations in use or operation in addition to the orientation of the device described in the drawings. For example, if the structure in the drawings is inverted or positioned in other different ways (such as rotated), the exemplary term “on” can also include “under” and other orientation relationships.

[0026] REFERENCE Figure 2 and Figure 3AAccording to an embodiment of the present invention, the method for forming a trench isolation structure includes step S1: stacking a pad oxide layer 110 and a silicon nitride layer 120 on a substrate 100, and forming an isolation trench TR that penetrates the silicon nitride layer 120, the pad oxide layer 110 and a portion of the substrate 100.

[0027] The substrate 100 may be a silicon substrate, a germanium-silicon substrate, a silicon carbide substrate, a silicon-on-insulator (SOI) substrate, a germanium-on-insulator substrate, a germanium-silicon-on-insulator substrate, or a III-V compound substrate (e.g., a gallium nitride substrate or a gallium arsenide substrate), or other substrates known to those skilled in the art for supporting semiconductor devices. In the following embodiments, the substrate 100 is, for example, a silicon substrate.

[0028] A pad oxide layer 110 and a silicon nitride layer 120 can be sequentially formed on the surface of substrate 100 using methods such as chemical vapor deposition. The pad oxide layer 110 can enhance the adhesion and stability of subsequent processes and reduce stress between substrate 100 and silicon nitride layer 120. The pad oxide layer 110 is, for example, a silicon oxide layer with a thickness of about 50 to 150 angstroms. The silicon nitride layer 120 can be used as a hard mask and a stop layer for subsequent processes, for example, with a thickness of about 600 to 700 angstroms.

[0029] To form an isolation trench in a designated area of ​​substrate 100, a photolithography process is first performed. As an example, an anti-reflective coating (BARC) and a photoresist layer (PR) are sequentially spin-coated onto silicon nitride layer 120. The anti-reflective coating improves photolithography accuracy. Exposure and development are then performed to pattern the photoresist layer, defining the area where the isolation trench will be formed. After patterning the photoresist layer, an etching process, such as anisotropic etching, is performed to precisely transfer the pattern of the photoresist layer to silicon nitride layer 120, pad oxide layer 110, and substrate 100, thereby forming an isolation trench TR extending from the upper surface of silicon nitride layer 120 into the substrate 100. As an example, the isolation trench TR is a shallow trench, with a depth in substrate 100, for example, approximately 1000 Å to 4000 Å. However, the invention is not limited to this; in another embodiment, the isolation trench TR is a deep trench, with a depth in substrate 100, for example, approximately 4000 Å to 10000 Å.

[0030] like Figure 3A As shown, optionally, after forming the isolation trench TR, the silicon nitride layer 120 is etched back to expand the filling window of the isolation trench TR, allowing the isolation oxide subsequently deposited in the isolation trench TR to cover the corners of the trench opening, thus helping to reduce the risk of leakage current in the active region. By pulling back the silicon nitride layer 120, a portion of the upper surface of the pad oxide layer 110 at the opening of the isolation trench TR is exposed.

[0031] ReferenceFigure 2 and Figure 3B According to an embodiment of the present application, the method for forming the trench isolation structure comprises step S2: forming a linear oxide layer 130 covering the surface of the substrate 100 within the isolation trench TR.

[0032] As an example, the linear oxide layer 130 is formed on the surface of the substrate 100 within the isolation trench by using an ISSG (In-Situ Steam Generation) process. By forming the linear oxide layer 130, the damage to the inner wall of the isolation trench TR can be alleviated, and the sharp corners of the isolation trench TR can be blunted, which helps to reduce the leakage current. In other embodiments, other processes (e.g., thermal oxidation) can also be used to form the linear oxide layer 130. As shown in FIG. 1C, the linear oxide layer 130 also covers the surface of the pad oxide layer 110 within the isolation trench TR, for example. Figure 3B

[0033] Referring to Figure 2 and Figure 3C According to an embodiment of the present application, the method for forming the trench isolation structure comprises step S3: using a hydrogen-containing plasma 10 to perform plasma treatment on the substrate 100 after the linear oxide layer 130 is formed, so that the upper surface and the side surface of the silicon nitride layer 120 form Si-NH bonds.

[0034] The purpose of step S3 is to slow down the deposition rate of the isolation oxide on the surface of the silicon nitride layer 120, so as to avoid the isolation trench TR being sealed too fast and causing void and / or seam defects. It is found that, after the silicon nitride layer 120 is treated by the hydrogen-containing plasma 10, the number of Si-NH bonds on the surface of the silicon nitride layer 120 increases compared to before the plasma treatment. More Si-NH bonds can inhibit the absorption of silicon precursors on the surface of the silicon nitride layer 120, so as to reduce the deposition rate of the isolation oxide, so that the deposition of the isolation oxide on the surface of the silicon nitride layer 120 is slower than when the plasma treatment is not performed. At the same time, it is found that, after the above-mentioned plasma treatment, the deposition rate of the isolation oxide on the surface of the linear oxide layer 130 is basically not affected. Therefore, by performing the plasma treatment, the deposition rates of the oxide on the surface of the linear oxide layer 130 and on the surface of the silicon nitride layer 120 can be balanced, or even the deposition rate on the surface of the linear oxide layer 130 is faster, which can effectively avoid the isolation trench TR being sealed too fast and causing void and / or seam defects.

[0035] ​The plasma treatment of step S3 can employ various suitable process gases. To form the hydrogen-containing plasma 10, in one embodiment, the process gas employs hydrogen, so that a hydrogen plasma can be formed. The present application is not limited thereto, and in another embodiment, the process gas includes nitrogen and hydrogen, so that a mixed hydrogen and nitrogen plasma can be formed. In yet another embodiment, the process gas includes a hydride of nitrogen, so that a mixed hydrogen and nitrogen plasma can also be formed. As an example, the process gas employed for the plasma treatment is ammonia (NH3), and the power employed for the plasma treatment is, for example, about 80W to 120W.

[0036] To ensure that the side surfaces of the silicon nitride layer 120 are treated by the plasma to form Si-NH bonds to inhibit the deposition of the subsequent isolation oxide on the side surfaces of the silicon nitride layer 120, and to avoid the isolation trench TR being sealed due to too fast deposition, when performing the plasma treatment, the substrate 100 can be rotated and / or tilted to allow the side surfaces of the silicon nitride layer 120 to be sufficiently contacted by the hydrogen-containing plasma 10. By performing the plasma treatment, the upper surface of the silicon nitride layer 120 also forms Si-NH bonds, so that the number of Si-NH bonds is increased compared to before the plasma treatment. The increased number of Si-NH bonds also inhibits the absorption of the silicon precursor on the upper surface of the silicon nitride layer 120, so that the deposition rate of the subsequent isolation oxide on the upper surface of the silicon nitride layer 120 is reduced, and the deposition is slowed down. This can reduce the time required for removing the isolation oxide on the silicon nitride layer 120 by the subsequent planarization process, and improve the efficiency of the planarization process.

[0037] When the hydrogen-containing plasma 10 also includes nitrogen (for example, the process gas includes nitrogen or ammonia), by performing the plasma treatment, the content of nitrogen and hydrogen on the surface of the liner oxide layer 130 is also increased, so that Si-NH bonds and / or Si-N-Si bonds are formed. Since the surface of the liner oxide layer 130 does not substantially contain nitrogen before the plasma treatment, after the plasma treatment, the number of Si-NH bonds on the surface is small, so that the effect on the subsequent deposition of the isolation oxide is small. It is found that when the temperature of the plasma treatment exceeds 120°C, the surface of the liner oxide layer 130 can form a large number of Si-NH bonds and / or Si-N-Si bonds, so that the surface of the liner oxide layer 130 is easily covered by the Si-NH bonds and / or Si-N-Si bonds, i.e., completely nitrided, which can inhibit the deposition of the isolation oxide on the liner oxide layer 130. To avoid the surface of the liner oxide layer 130 being completely nitrided, when performing step S3, the temperature employed for the plasma treatment can be set to not exceed 120°C. More specifically, the temperature employed for the plasma treatment is, for example, 80°C to 100°C.

[0038] Referring to Figure 2 and Figure 3DAccording to the embodiment of the present application, the method for forming the trench isolation structure comprises step S4: depositing isolation oxide OX in the isolation trench TR and outside the isolation trench TR, so that the upper surface of the isolation oxide OX is higher than the silicon nitride layer 120.

[0039] The embodiment, for example, uses HARP (High Aspect Ratio Process) CVD process to deposit the isolation oxide OX, so as to obtain better filling effect. However, the embodiment is not limited thereto, and other processes can also be used according to process requirements, such as HDP (High Density Plasma) CVD process or ALD (Atomic Layer Deposition).

[0040] The isolation oxide OX is, for example, silicon oxide. During the deposition process, the isolation oxide OX is accumulated on the exposed surface of the silicon nitride layer 120 and the exposed surface of the linear oxide layer 130, and the surface of the isolation oxide OX in the isolation trench TR is gradually raised as the thickness gradually increases. In the embodiment, the upper surface and the side surface of the silicon nitride layer 120 form Si-NH bonds through the plasma treatment in step S3, which inhibits the adhesion of Si precursor, so that the thickness of the isolation oxide OX on the upper surface and the side surface of the silicon nitride layer 120 increases slowly, which is beneficial to the accumulation of the isolation oxide OX in the isolation trench TR. As the isolation oxide OX in the isolation trench TR increases, the upper surface of the isolation oxide OX can reach the height of the silicon nitride layer 120, and connect with the isolation oxide OX deposited on the surface of the silicon nitride layer 120 and gradually close the isolation trench TR. After that, the deposition of the isolation oxide OX continues, so that the upper surface of the isolation oxide OX in the isolation trench TR region and the silicon nitride layer 120 region is higher than the isolation trench TR.

[0041] In step S4, the upper surface of the isolation oxide OX is made higher than the silicon nitride layer 120, so as to ensure that the isolation trench TR is fully filled.

[0042] Referring to Figure 2 and Figure 3E According to the embodiment of the present application, the method for forming the trench isolation structure comprises step S5: performing a planarization process to expose the upper surface of the silicon nitride layer 120.

[0043] For example, the planarization process is performed by CMP (Chemical Mechanical Polishing), and during the CMP, the polishing time can be limited or a stop point can be set to control the polishing degree. The CMP can use a suitable polishing liquid and parameters as needed. In this embodiment, the stop point is set at the silicon nitride layer 120, and a suitable over-polishing time can be set as needed. After the planarization process, the Si-NH bonds on the upper surface of the silicon nitride layer 120 are removed. After the planarization process is completed, the linear oxide layer 130 and the isolation oxide OX formed in the isolation trench TR form a trench isolation structure.

[0044] The height fluctuation of the upper surface of the isolation oxide OX can affect the CMP process. When the height fluctuation is large, because the polishing time of each region on the substrate 100 is the same, after the CMP, a more obvious dishing phenomenon can occur in the region where the silicon nitride layer 120 is distributed sparsely. The dishing phenomenon can affect the performance of the device formed based on the substrate 100. In this embodiment, the upper surface of the silicon nitride layer 120 also has Si-NH bonds after the plasma treatment in step S3, the deposition rate of the isolation oxide OX on the upper surface of the silicon nitride layer 120 is reduced, and the deposition is slow. Therefore, before the planarization process is performed, the height fluctuation of the upper surface of the isolation oxide OX is smaller than that when the plasma treatment is not performed, so that the height fluctuation of the upper surface of the isolation oxide OX is reduced. In this way, the polishing efficiency can be improved when the CMP is performed in step S4, the obvious dishing phenomenon can be avoided, the planarization effect is improved, and the quality of the semiconductor device formed on the substrate 100 is improved.

[0045] The method for forming the trench isolation structure described in the above embodiment uses the hydrogen-containing plasma to perform the plasma treatment on the substrate 100, so that the Si-NH bonds are formed on the surface of the silicon nitride layer 120. The Si-NH bonds can inhibit the adhesion of the silicon precursor, so that the deposition of the isolation oxide OX at the opening of the isolation trench TR is slow, the isolation trench OX can be prevented from being sealed too fast, the probability of forming a cavity and / or a seam defect in the isolation oxide OX is reduced, and the height fluctuation of the upper surface of the isolation oxide OX before the planarization process is reduced, so that the planarization effect is improved, and the performance of the semiconductor device formed based on the substrate 100 is improved.

[0046] The above description is only a description of the preferred embodiments of the present application, and is not any limitation on the scope of the present application. Any person skilled in the art can make possible changes and modifications to the technical solutions of the present application without departing from the spirit and scope of the present application by using the disclosed methods and technical contents. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present application, without departing from the technical solutions of the present application, shall fall within the protection scope of the technical solutions of the present application.

Claims

1. A method of forming a trench isolation structure, comprising: Comprising: stacking a pad oxide layer and a silicon nitride layer on a substrate, and forming an isolation trench through the silicon nitride layer, the pad oxide layer, and part of the substrate; forming a line oxide layer covering the surface of the substrate within the isolation trench; subjecting the substrate after the formation of the line oxide layer to plasma treatment with a hydrogen-containing plasma to form Si-NH bonds on the upper and side surfaces of the silicon nitride layer; depositing an isolation oxide within the isolation trench and outside the isolation trench, with the upper surface of the isolation oxide exceeding the silicon nitride layer; and performing a planarization process to expose the upper surface of the silicon nitride layer. The process gas for the plasma treatment includes a hydride of nitrogen.

2. The formation method of claim 1, wherein, The process gas for the plasma treatment uses ammonia.

3. The forming method of claim 3, wherein, The process gas for the plasma treatment includes nitrogen and hydrogen.

4. The formation process of claim 1 wherein, The temperature for the plasma treatment does not exceed 120°C.

5. The formation process of claim 1 wherein, The temperature for the plasma treatment is 80°C to 100°C.

6. The formation process of claim 1 wherein, Through the plasma treatment, the surface of the line oxide layer contains nitrogen but is not completely nitrided.

7. The formation process of claim 1 wherein, The planarization process uses CMP, and the stopping point is located on the upper surface of the silicon nitride layer when the CMP is performed.

8. The formation process of claim 1 wherein, Before the formation of the line oxide layer, the silicon nitride layer is etched to retreat the silicon nitride layer to expose part of the upper surface of the pad oxide layer at the opening of the isolation trench.

9. The formation process of claim 1 wherein, ​

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