Chip packaging structure and electronic equipment

Abstract

The invention relates to a chip packaging structure and electronic equipment. The chip packaging structure comprises a heat conduction cavity, a heat dissipation assembly and a fan. The heat conduction cavity is arranged above the chip assembly and is in heat conduction connection with the chip assembly. The heat dissipation assembly is arranged in the heat conduction cavity and comprises a plurality of heat dissipation pieces arranged at intervals. The fan is arranged in the heat conduction cavity. The heat dissipation assembly and the fan are arranged at intervals in a plane parallel to the substrate, the heat dissipation assembly corresponds to the first chip, the orthographic projection of the heat dissipation assembly is at least partially overlapped with the first chip, the fan corresponds to the second chip, and the orthographic projection of the fan is at least partially overlapped with the second chip. The heat dissipation assembly and the fan are horizontally arranged in the heat conduction cavity side by side, and partition optimization of a heat dissipation path is achieved. The heat dissipation assembly establishes a collaborative heat dissipation path with upward heat conduction and forced convection for the high-heat-density chip, and the passive heat dissipation efficiency and the active heat dissipation effect are remarkably improved. Meanwhile, the vertical thickness of the packaging structure is effectively reduced through the layout, and the requirement for light and thin equipment is met.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a chip packaging structure and electronic device. Background Technology

[0002] Traditional chip packaging stacks the fan on top of the heat sink fins, which not only increases the vertical dimension but also blocks the chip's efficient passive heat dissipation path upwards. Summary of the Invention

[0003] To address the aforementioned problems, this application provides a chip packaging structure, including a substrate and a chip assembly disposed on the substrate. The chip assembly includes at least one first chip and at least one second chip, wherein the thermal density of the first chip is higher than that of the second chip; and further includes: A heat-conducting cavity is disposed above the chip assembly and is thermally connected to the chip assembly; A heat dissipation assembly is disposed within the heat-conducting cavity and includes multiple heat dissipation components arranged at intervals. A fan is located inside the heat-conducting cavity; The heat dissipation assembly and the fan are arranged at intervals in a plane parallel to the substrate; wherein, The heat dissipation component corresponds to the first chip, and its orthographic projection on the substrate at least partially overlaps with the orthographic projection of the first chip on the substrate. The fan corresponds to the second chip, and its orthographic projection on the substrate at least partially overlaps with the orthographic projection of the second chip on the substrate.

[0004] In one embodiment, the system further includes a molding compound and a thermally conductive layer; the molding compound covers the substrate and encapsulates the first chip and the second chip to form a flat surface; the thermally conductive layer is disposed between the flat surface of the molding compound and the thermally conductive cavity.

[0005] In one embodiment, the thermally conductive layer is configured as a thermal interface material, which includes at least one of thermally conductive silicone grease, graphene material, phase change material, thermally conductive gel, or liquid metal.

[0006] In one embodiment, the heat-conducting cavity includes a top wall, a bottom wall opposite to the top wall, and a plurality of side walls connecting the top wall and the bottom wall; wherein the bottom wall of the heat-conducting cavity is thermally connected to the chip assembly through the heat-conducting layer.

[0007] In one embodiment, the two ends of the heat sink are respectively connected to the inner side of the bottom wall and the inner side of the top wall.

[0008] In one embodiment, the top wall has a through hole, and at least a portion of the fan is embedded in the through hole. In one embodiment, the heat sink is plate-shaped, columnar, needle-shaped, or fin-shaped.

[0009] In one embodiment, the heat sink has a rectangular, circular, elliptical, trapezoidal, or teardrop-shaped cross-section.

[0010] In one embodiment, the heat dissipation components in the heat dissipation assembly are arranged in an array or at intervals in a single direction.

[0011] In one embodiment, the spacing between any adjacent heat sinks is 0.2 mm to 2 mm.

[0012] In one embodiment, the surface of the heat sink is provided with microstructures for increasing the heat dissipation area.

[0013] In one embodiment, the microstructure includes at least one of bumps, grooves, textures, or micropores.

[0014] In one embodiment, the plurality of sidewalls includes a first sidewall and a second sidewall disposed opposite to each other along a first direction; the heat dissipation assembly is located between the fan and the first sidewall.

[0015] In one embodiment, the first side has an opening, and the opening corresponds to the heat dissipation component.

[0016] In one embodiment, both the first side and the second side are provided with openings; The opening on the first side corresponds to the heat dissipation component, and the opening on the second side corresponds to the fan.

[0017] In one embodiment, the plurality of sidewalls further include a third sidewall and a fourth sidewall disposed opposite to each other along a second direction, the second direction intersecting the first direction; wherein, An opening is provided on the third side and / or the fourth side, and the opening is correspondingly arranged with the heat sink in a plane parallel to the substrate.

[0018] In one embodiment, the number of fans is multiple; or, the fans are configured as a micro fan array.

[0019] In one embodiment, a temperature sensor and a controller are also included. The temperature sensor is used to detect the temperature of the first chip and / or the thermally conductive cavity. The controller is electrically connected to the temperature sensor and the fan and is configured to control the start / stop or speed of the fan based on the temperature detected by the temperature sensor.

[0020] This application also provides an electronic device including the chip packaging structure mentioned in any of the above embodiments.

[0021] The technical solutions provided by the embodiments of this application may include the following beneficial effects: As described in the above embodiments, the chip packaging structure of this application includes a heat-conducting cavity, a heat dissipation component, and a fan. The heat-conducting cavity is disposed above the chip assembly and is thermally connected to it. The heat dissipation component is disposed within the heat-conducting cavity and includes multiple spaced heat dissipation elements. The fan is disposed within the heat-conducting cavity. The heat dissipation component and the fan are arranged at intervals in a plane parallel to the substrate, wherein the heat dissipation component corresponds to the first chip and its orthographic projection at least partially overlaps with the first chip, and the fan corresponds to the second chip and its orthographic projection at least partially overlaps with the second chip. This application achieves partitioned optimization of the heat dissipation path by horizontally arranging the heat dissipation component and the fan side by side within the heat-conducting cavity. The heat dissipation component establishes a synergistic heat dissipation path for high heat density chips, combining upward heat conduction and forced convection, significantly improving passive heat dissipation efficiency and active heat dissipation effect. At the same time, this layout effectively reduces the vertical thickness of the packaging structure, meeting the requirements for thinner and lighter devices.

[0022] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this application. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings in the description are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 This is a schematic diagram of the chip packaging structure provided in one embodiment of this application from a single perspective.

[0025] Figure 2 This is a cross-sectional view of a chip packaging structure provided in one embodiment of this application.

[0026] Figure 3 This is another cross-sectional view of the chip packaging structure provided in one embodiment of this application.

[0027] Figure 4 This is a cross-sectional view of the chip packaging structure provided in one embodiment of this application.

[0028] Figure 5 This is a cloud map showing the temperature distribution of the phone casing in a traditional fanless design.

[0029] Figure 6 Temperature distribution cloud map of a mobile phone casing with a chip packaging structure provided in one embodiment of this application.

[0030] Figure 7 This is a block diagram of an electronic device provided in one embodiment of this application.

[0031] Figure label: 10. Substrate; 20. Chip assembly; 201. First chip; 202. Second chip; 30. Molding layer; 40. Thermal conductive layer; 50. Thermal conductive cavity; 500. Opening; 60. Heat dissipation component; 70. Fan. Detailed Implementation

[0032] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. Various modifications, variations, and equivalents of the methods, apparatus, and / or systems described herein will become apparent upon understanding this disclosure. For example, the order of operations described herein is merely illustrative and is not limited to those orders set forth herein, but can be changed as will become apparent upon understanding this disclosure, except for operations that must be performed in a particular order. Furthermore, descriptions of features known in the art may be omitted for clarity and brevity. The modes described in the following exemplary embodiments do not represent all modes consistent with this application. Rather, they are merely examples of apparatuses consistent with some aspects of this application as detailed in the appended claims.

[0033] As the background technology states, with the continuous improvement of chip computing power, the power consumption density per unit area has increased dramatically, and heat dissipation has become a key factor restricting device performance and stability. To address this issue, the industry generally adopts a combination of passive and active heat dissipation solutions. Passive heat dissipation mainly relies on materials such as graphene and vapor chambers for heat conduction, and is suitable for low to medium heat dissipation scenarios. However, for high heat density chips, active forced air cooling by fans is required.

[0034] Current common active cooling solutions involve covering the chip surface with a single metal heatsink fin and mounting a cooling fan on top. However, this structure has significant drawbacks: First, the top-mounted fins and fan block the passive heat conduction path from the chip to the device casing, causing the chip junction temperature to rise rapidly under fan-off or low-load conditions, resulting in poor passive cooling efficiency. Second, this layout prevents active air cooling and passive heat conduction from working in tandem, leading to mutual performance constraints. Furthermore, the vertical stacking of the fan and fins increases the overall thickness of the package structure, contradicting the trend towards thinner, lighter, and more integrated electronic devices.

[0035] Based on this, this application provides a chip packaging structure. (Refer to...) Figures 1 to 4 The packaging structure includes a substrate 10 and a chip assembly 20 disposed on the substrate 10.

[0036] The chip assembly 20 includes at least one first chip 201 and at least one second chip 202. The first chip 201 has a higher thermal density than the second chip 202. This difference in thermal density may stem from differences in the chip's manufacturing process, computing architecture, or functional modules. For example, in one embodiment, the first chip 201 may be configured as a system-on-a-chip (SoC) integrating a central processing unit, a graphics processing unit, and a neural network processing unit; while the second chip 202 may be configured as one or more of a central processing unit chip, a graphics processing unit chip, a dynamic random access memory chip, a power management chip, or a radio frequency (RF) chip.

[0037] Furthermore, the number of the first chip 201 and the second chip 202 is not fixed. Depending on the specific packaging and performance requirements, one first chip 201 and one second chip 202 can be used, or one first chip 201 and multiple second chips 202 can be used, or a combination of multiple first chips 201 and multiple second chips 202 can be used.

[0038] The substrate 10 serves as the mechanical support and electrical connection carrier for the entire packaging structure, and its specific type and structure can be flexibly selected according to the application scenario. For example, the substrate 10 can be a rigid substrate 10 composed of a ceramic substrate 10, a glass substrate 10, a silicon substrate 10, or an organic resin substrate 10 (such as BT, ABF), or it can be a flexible substrate 10 composed of materials such as polyimide. In terms of the number of layers, the substrate 10 can be a single-layer structure, or it can be a multilayer substrate 10 composed of multiple conductive layers and dielectric layers stacked alternately, with electrical interconnection between different layers achieved through conductive vias inside, and pads or bumps provided on the upper surface for electrical connection with the chip. These are all conventional settings and will not be described in detail here.

[0039] Furthermore, continue to refer to Figure 3 The packaging structure of this application also includes a molding compound 30. The molding compound 30 covers the substrate 10 and encapsulates the first chip 201 and the second chip 202 to form a flat surface. The molding compound 30 uses insulating materials such as epoxy molding compounds to provide physical protection for the chips, protecting them from external environmental factors (such as moisture, dust, mechanical stress, etc.), thereby improving the reliability and durability of the chip packaging structure.

[0040] Furthermore, continue to refer to Figure 3The packaging structure of this application also includes a thermally conductive layer 40 and a thermally conductive cavity 50. The thermally conductive layer 40 is disposed between the flat surface of the molding compound 30 and the thermally conductive cavity 50, filling the microscopic gaps between the two contact interfaces and forming an efficient heat conduction bridge connecting the chip assembly 20 and the thermally conductive cavity 50. This structure can reduce the interfacial thermal resistance from the chip to the thermally conductive cavity 50, ensuring that heat is quickly transferred from the chip through the molding compound 30 and the thermally conductive layer 40, and finally dissipated in the thermally conductive cavity 50.

[0041] Specifically, the heat-conducting cavity 50 is made of a metal material with high thermal conductivity. Preferably, the metal includes, but is not limited to, aluminum alloys, copper or copper alloys, or metal-based composite materials such as copper-tungsten, copper-molybdenum, aluminum-silicon carbide, or aluminum-graphene.

[0042] Specifically, the thermally conductive layer 40 is configured as a thermal interface material. This thermal interface material is selected from composite material systems with high thermal conductivity, including but not limited to thermal grease, graphene, phase change materials, thermally conductive gels, or liquid metals, to provide extremely high thermal conductivity. These materials can be used alone or in combination, and their core function is to maximize the heat flux density between interfaces. By introducing the thermally conductive layer 40, not only is the continuity of the thermal management path ensured, but the overall heat dissipation capacity of the packaging structure is also effectively improved. This ensures that the heat generated by the chip can be quickly and uniformly dissipated, while also buffering some of the mechanical stress caused by the mismatch in the thermal expansion coefficients of the materials.

[0043] The chip packaging structure in this application also includes a heat dissipation component 60 and a fan 70 disposed above the molding layer 30.

[0044] The thermally conductive cavity 50 covers the chip assembly 20, and its bottom wall is in close contact with the flat surface of the molding layer 30 through the thermally conductive layer 40, thereby achieving thermally conductive connection with the chip assembly 20.

[0045] The heat dissipation assembly 60 is disposed within the heat conduction cavity 50 and includes multiple heat dissipation components spaced apart along a specific direction. The fan 70 is also disposed within the heat conduction cavity 50 and is arranged at intervals with the heat dissipation assembly 60 in a plane parallel to the substrate 10, forming a horizontal side-by-side layout.

[0046] Specifically, in this layout, the heat dissipation component 60 corresponds to the high-heat-density first chip 201, and its orthographic projection on the substrate 10 at least partially overlaps (including partially overlapping or completely covering) the orthographic projection of the first chip 201. It should be noted that the heat dissipation component 60 may also partially extend into the area of ​​the second chip 202, provided that it does not affect the normal layout and airflow formation of the fan 70. Similarly, the fan 70 corresponds to the low-heat-density second chip 202, and its orthographic projection at least partially overlaps with the orthographic projection of the second chip 202, and may partially extend into other areas.

[0047] This application constructs two parallel and cooperative heat dissipation paths within the heat conduction cavity 50 through the layout of the heat dissipation component 60 and the fan 70: For the high heat density chip (i.e., the first chip 201), the heat dissipation component 60 on its top simultaneously establishes efficient passive and active heat dissipation paths: during passive heat dissipation, heat is vertically conducted through the heat sink to the top wall of the heat conduction cavity 50, and then diffused to the device frame and outer shell; during active heat dissipation, the fan 70 drives the airflow to flow through the surface of the heat sink, significantly enhancing the convective heat transfer effect.

[0048] For the low heat density chip (i.e., the second chip 202), the surface of its top heat-conducting cavity 50 can meet the basic heat dissipation requirements, while the space above is optimized for arranging the fan 70 and air duct, thus realizing the rational allocation of space resources.

[0049] This partitioned heat dissipation architecture not only breaks through the blockage of the vertical heat dissipation path by the traditional top-mounted fan, but also effectively reduces the overall thickness of the package structure. While controlling the vertical dimensions, it perfectly balances the performance of active and passive heat dissipation.

[0050] Specifically, to verify the actual heat dissipation performance of the chip packaging structure of this application, a rigorous simulation comparison analysis was conducted between a mobile phone using a traditional fanless 70 heat dissipation solution and a mobile phone using the solution of this application. The simulation was conducted under the same stable power consumption conditions, and the steady-state temperature values ​​of the two solutions were compared.

[0051] Simulation results show that the mobile phone using the proposed solution exhibits significant heat dissipation advantages: The chip junction temperature was reduced from 72.8℃ in the traditional solution to 65.6℃, achieving a temperature drop of 7.2℃; The temperature of the phone casing dropped from 61.5℃ in the traditional solution to 55.2℃, achieving a temperature reduction of 6.3℃.

[0052] Appendix Figure 5 and Figure 6 Temperature distribution cloud maps of the mobile phone casing are shown for both the traditional fanless 70 solution and the solution of this invention. A comparison of the cloud maps clearly demonstrates that the solution of this application not only effectively reduces the temperature of the core high-temperature area but also makes the temperature distribution of the casing more uniform, avoiding the occurrence of localized overheating and greatly improving user experience and device safety.

[0053] The simulation data fully demonstrates that the proposed solution, which combines "active-passive coordinated heat dissipation" and "partitioned heat dissipation path," can effectively solve the heat dissipation problem of high-power chips in real-world application scenarios and significantly improve the thermal management performance of devices.

[0054] In some embodiments, the heat-conducting cavity 50 includes a top wall, a bottom wall, and multiple side walls connecting the two to form a complete air duct chamber. The bottom wall of the heat-conducting cavity 50 is connected to the chip assembly 20 over a large area via a heat-conducting layer 40, ensuring efficient heat transfer from the chip to the heat-conducting cavity 50.

[0055] Specifically, the heat dissipation component 60 and the fan 70 are arranged horizontally at intervals within the cavity, forming clearly defined airflow zones. Specifically, the area where the heat dissipation component 60 is located constitutes the main heat dissipation airflow channel, while the area where the fan 70 is located constitutes the power airflow channel. When the fan 70 is activated, the forced airflow it generates forms a specific flow path within the heat-conducting cavity 50.

[0056] Specifically, at least one end of the heat sink is fixedly connected to the bottom or top wall of the heat-conducting cavity 50 to establish a heat conduction path from the chip to the heat-conducting cavity 50. When the heat sink is connected to the bottom wall, it can directly receive heat from the chip; when connected to the top wall, it can quickly conduct heat to the top of the cavity.

[0057] Preferably, the two ends of the heat sink are connected to the inner sides of the bottom wall and the top wall, respectively, forming a continuous heat dissipation column that runs through the interior of the heat-conducting cavity 50. This arrangement establishes the shortest heat conduction path from the bottom wall to the top wall, allowing heat to be quickly conducted from the chip end to the device housing side with minimal thermal resistance, greatly enhancing passive heat dissipation capabilities. Simultaneously, this structure with fixed ends also improves the structural stability between the heat sink assembly 60 and the heat-conducting cavity 50, enhancing the mechanical reliability of the entire packaging module.

[0058] Furthermore, the connection methods between the heat sink and the heat-conducting cavity 50 include, but are not limited to, welding, riveting, interference fit, or integral molding. Welding or integral molding is preferred to minimize contact thermal resistance and ensure efficient heat conduction at the interface.

[0059] In one embodiment, the heat sink is preferably made of a high thermal conductivity metal such as copper or aluminum, or a composite material thereof. In another embodiment, the heat sink can have various morphological designs, including but not limited to sheet-like, cylindrical, needle-like, or finned shapes. Specifically, sheet-like heat sinks (commonly referred to as heat dissipation fins) are suitable for constructing parallel airflow channels, facilitating directional airflow; cylindrical or needle-like heat sinks improve heat dissipation efficiency by increasing the surface area per unit volume, making them suitable for maximizing heat exchange within a limited space; finned heat sinks add additional extended surfaces to the basic shape, further increasing the heat dissipation area. These different morphological choices allow this solution to flexibly adapt to different space constraints and heat dissipation requirements. This application does not impose any limitations.

[0060] In one embodiment, the cross-sectional shape of the heat sink can be designed as rectangular, circular, elliptical, trapezoidal, or teardrop-shaped. Specifically, rectangular cross-sections are easy to manufacture and have high structural strength; circular and elliptical cross-sections help reduce airflow resistance; trapezoidal cross-sections achieve a good balance between structural stability and airflow guidance; while teardrop-shaped (or streamlined) cross-sections are designed based on aerodynamic principles, which can significantly reduce wind resistance, reduce airflow separation, and allow cooling air to pass more smoothly through the heat sink 60, thereby improving convective heat transfer efficiency.

[0061] In one embodiment, the plurality of heat sinks in the heat dissipation assembly 60 may be arranged in an array or at intervals along a single direction.

[0062] Specifically, when arranged in an array, the heat sinks are regularly distributed in a two-dimensional plane, suitable for scenarios requiring uniform heat dissipation from all directions. When arranged at intervals along a single direction, the heat sinks extend along the first direction X (usually the direction of the main airflow) and maintain a uniform or gradually changing spacing along the second direction Y that intersects with the first direction X. This directional arrangement can match the direction of forced convection, forming an efficient convective heat transfer channel.

[0063] In one embodiment, the spacing between any adjacent heat sinks is controlled within the range of 0.2 mm to 2 mm. Preferably, the spacing between heat sinks is 0.5 mm. This spacing range ensures maximum heat dissipation surface area while ensuring that airflow can fully penetrate and pass through the entire heat dissipation assembly 60, avoiding problems such as excessive wind resistance due to too small a spacing or reduced heat dissipation efficiency due to too large a spacing.

[0064] In one embodiment, the surface of the heat sink is further provided with microstructures to increase the heat dissipation area. These microstructures significantly improve heat dissipation performance by increasing the actual contact area and disturbing the boundary layer on the surface of the heat sink.

[0065] In one embodiment, the microstructure includes, but is not limited to, at least one of the following: bumps, grooves, textures, or micropores. Specifically, bump structures can be formed by surface etching or embossing processes to break the laminar boundary layer; groove structures can directionally guide airflow and enhance local turbulence; textured structures add additional extended surfaces; and micropore structures utilize the properties of porous media to greatly increase the heat exchange area. These microstructures can be achieved through processes such as chemical etching, laser processing, molding, or additive manufacturing, working together to increase the heat dissipation limit of the heat sink surface.

[0066] In some embodiments, the top wall of the heat-conducting cavity 50 has a through hole, into which at least a portion of the fan 70 is embedded. The heat-conducting cavity 50 has multiple sidewalls, including a first sidewall and a second sidewall disposed opposite each other along a first direction X, and a third sidewall and a fourth sidewall disposed opposite each other along a second direction Y. The first direction X is defined as the direction in which the fan 70 and the heat dissipation assembly 60 are spaced apart. The second direction Y intersects the first direction X.

[0067] Specifically, an opening 500 is provided on the side wall of the heat conduction cavity 50, and according to the setting of the opening 500, the fan 70, the heat dissipation component 60 and the heat conduction cavity 50 can form a variety of efficient air duct systems.

[0068] In one embodiment, refer to Figure 1 An opening 500 is made only on the first side, which is directly opposite the heat dissipation component 60, while the second side remains closed. This layout constitutes a single-sided opening circulating air duct system.

[0069] In this configuration, when the fan 70 is working, cooling air is pushed from the fan 70 area to the heat dissipation component 60. After flowing through the gap of the heat dissipation component, most of the airflow is restricted by the single opening 500, generating vortex and backflow in the cavity, which further enhances the heat exchange efficiency between the airflow and the heat dissipation component, and finally discharged from the single opening 500.

[0070] Meanwhile, the simplified structure still retains the passive heat dissipation path: when the fan 70 is not working, heat can still be conducted upwards through the heat sink to the top wall of the heat conduction cavity 50 and the equipment casing. Through the opening 500 on the first side, the heat sink area can also form a certain amount of natural convection with the outside air, realizing the effective synergy of active and passive heat dissipation in the simplified structure.

[0071] In one embodiment, a first side has an opening 500, which faces the heat dissipation assembly 60 and serves as the system's air outlet; a second side also has an opening 500, which faces the fan 70 and serves as the system's air inlet. This layout constitutes a DC air duct system.

[0072] In this configuration, when fan 70 operates, it drives cooling airflow into the heat-conducting cavity 50 through the air inlet on the second side. Driven by fan 70, the airflow first flows through the heat dissipation component 60 area. The cooling air is forced through the narrow gaps between multiple parallel heat sinks, efficiently carrying away heat from the heat sinks through convection. The heated air then continues to flow forward, eventually exiting the cavity through the air outlet on the first side, forming a unidirectional, smooth, direct-flow airflow system. This airflow path is short, has low resistance, and high heat dissipation efficiency.

[0073] Furthermore, openings 500 are also provided on the third and fourth side walls of the heat-conducting cavity 50, and the openings 500 are positioned directly opposite the heat dissipation assembly 60. The openings 500 on the third and fourth side walls can be understood as auxiliary heat dissipation vents, and the direction of the openings 500 is perpendicular to the main air duct. This layout constitutes a lateral cross-air duct system.

[0074] This configuration allows some cooling airflow to bypass the main air duct and instead pass directly through the gaps between the heat sink components from these lateral auxiliary heat dissipation vents. This forms a lateral cross-flow duct that interweaves with the main air duct, not only increasing the total airflow through the heat sink component 60 but also disrupting the stable thermal boundary layer by scouring the heat sink surface at multiple angles, thereby significantly enhancing the convective heat transfer effect.

[0075] It should be noted that the aforementioned DC air duct system and lateral cross air duct system are not mutually exclusive fixed designs, but rather demonstrate two typical modes of the air duct design for the heat conduction cavity 50 of this application. The main airflow direction of the DC air duct can be flexibly set according to the needs of the equipment structure. It can be along the arrangement direction of the heat dissipation component 60 and the fan 70 (first direction X), formed by the first and second side surfaces; or it can be along a direction perpendicular to this (second direction Y), in which case the third and fourth side surfaces form the air inlet and air outlet, forming a transverse DC air duct.

[0076] To accommodate this lateral airflow, the heat dissipation component 60 can be adapted. For example, the heat dissipation fins can be bent at a specific angle to ensure that the main airflow can effectively pass through the fin gaps regardless of whether it flows in from the first direction X or the second direction Y, thus guaranteeing the core's heat dissipation performance.

[0077] In this configuration, the function of each side is dynamic. When the third and fourth sides serve as the main air duct, the first and second sides can switch roles, such as serving as auxiliary air inlets or outlets, to optimize the internal airflow distribution. They can even integrate auxiliary fans 70 to build a more complex composite air duct system.

[0078] In some implementations, the number of fans 70 can be configured to be multiple, and these fans 70 can be arranged centrally or distributed; alternatively, the fans 70 can be configured as a micro fan array. This arrangement significantly improves the active cooling capacity of the system by increasing airflow or air pressure, while the redundancy of multiple fans also improves the reliability of the cooling system. Micro fan arrays are particularly suitable for ultra-thin devices with extremely demanding space requirements, enabling efficient heat dissipation within a limited height.

[0079] In some embodiments, the package structure further includes a temperature sensor and a controller. The temperature sensor is used to detect the operating junction temperature of the first chip and / or the temperature of the thermally conductive cavity in real time; the controller is electrically connected to the temperature sensor and the fan, forming a complete intelligent temperature control system. The controller is configured to dynamically control the start / stop of the fan or adjust its speed based on the temperature data detected by the temperature sensor.

[0080] This intelligent control system can precisely manage heat dissipation and power consumption based on the actual heat generation status of the device: keeping the fan stationary or running at low speed at low temperatures or low loads to reduce noise and energy consumption; and automatically increasing the fan speed or starting multiple fans at high temperatures or high loads to ensure heat dissipation efficiency. This system achieves a good balance between heat dissipation performance and power consumption / noise, enabling the chip to operate within a suitable temperature range under various working conditions, while further optimizing the overall energy efficiency of the device.

[0081] This application also provides an electronic device, which includes the chip packaging structure mentioned in any of the above embodiments. The electronic device includes, but is not limited to, the following types: in-vehicle display devices, televisions, digital signage, tablet computers, smartphones, gaming phones, foldable phones, augmented reality (AR) glasses, virtual reality (VR) headsets, laptops, portable game consoles, and other wearable smart devices.

[0082] These electronic devices share the common characteristic of integrating high-performance, high-heat-density chips, placing stringent demands on heat dissipation performance. By adopting the chip packaging structure of this application, these devices can effectively solve the heat dissipation problem of high-performance chips within a limited internal space, ensuring the performance stability and long-term reliability of the devices under high loads, while also meeting the industrial design requirements for thinner, lighter, and smaller devices.

[0083] Figure 7 This is a block diagram illustrating an electronic device 800 according to some embodiments of the present disclosure. For example, device 800 may be a mobile phone, computer, digital broadcasting terminal, messaging device, game console, tablet device, medical device, fitness equipment, personal digital assistant, etc.

[0084] Reference Figure 7 The device 800 may include one or more of the following components: a processing component 802, a memory 804, a power component 806, a multimedia component 808, an audio component 810, an input / output (I / O) interface 812, a sensor component 814, and a communication component 816.

[0085] Processing component 802 typically controls the overall operation of device 800, such as operations associated with display, telephone calls, data communication, camera operation, and recording. Processing component 802 may include one or more processors 820 to execute instructions to perform all or part of the steps of the methods described above. Furthermore, processing component 802 may include one or more modules to facilitate interaction between processing component 802 and other components. For example, processing component 802 may include a multimedia module to facilitate interaction between multimedia component 808 and processing component 802.

[0086] Memory 804 is configured to store various types of data to support the operation of device 800. Examples of this data include instructions for any application or method operating on device 800, contact data, phonebook data, messages, pictures, videos, etc. Memory 804 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0087] The power supply component 806 provides power to the various components of the device 800. The power supply component 806 may include a power management system, one or more power sources, and other components associated with generating, managing, and distributing power to the device 800.

[0088] Multimedia component 808 includes a screen that provides an output interface between the device 800 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touchscreen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensors may sense not only the boundaries of the touch or swipe action but also the duration and pressure associated with the touch or swipe operation. In some embodiments, multimedia component 808 includes a front-facing camera and / or a rear-facing camera. When the device 800 is in an operating mode, such as a shooting mode or a video mode, the front-facing camera and / or the rear-facing camera may receive external multimedia data. Each front-facing camera and rear-facing camera may be a fixed optical lens system or have focal length and optical zoom capabilities.

[0089] Audio component 810 is configured to output and / or input audio signals. For example, audio component 810 includes a microphone (MIC) configured to receive external audio signals when device 800 is in an operating mode, such as call mode, recording mode, and voice recognition mode. The received audio signals may be further stored in memory 804 or transmitted via communication component 816. In some embodiments, audio component 810 also includes a speaker for outputting audio signals.

[0090] I / O interface 812 provides an interface between processing component 802 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to, home buttons, volume buttons, power buttons, and lock buttons.

[0091] Sensor assembly 814 includes one or more sensors for providing status assessments of various aspects of device 800. For example, sensor assembly 814 may detect the on / off state of device 800, the relative positioning of components such as the display and keypad of device 800, changes in the position of device 800 or a component of device 800, the presence or absence of user contact with device 800, the orientation or acceleration / deceleration of device 800, and temperature changes of device 800. Sensor assembly 814 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. Sensor assembly 814 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, sensor assembly 814 may also include an accelerometer, a gyroscope, a magnetometer, a pressure sensor, or a temperature sensor.

[0092] Communication component 816 is configured to facilitate wired or wireless communication between device 800 and other devices. Device 800 can access wireless networks based on communication standards, such as WiFi, 3G, 4G, 5G, other communication standards, or combinations thereof. In some embodiments of this disclosure, communication component 816 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In some embodiments of this disclosure, communication component 816 further includes a near-field communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on radio frequency identification (RFID) technology, Infrared Data Association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

[0093] In some embodiments of this disclosure, the apparatus 800 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to perform the methods described above.

[0094] In the above detailed description, reference has been made to the accompanying drawings, which illustrate specific aspects of how this disclosure can be practiced. In this regard, terms indicating direction or positional relationship, such as “thickness,” “upper,” “lower,” “top,” “bottom,” “inner,” and “outer,” can be used with reference to the orientation of the described figures. Since components of the described device can be positioned in several different orientations, these directional terms are for illustrative purposes and not for limitation. It should be understood that other aspects can be utilized and structural or logical changes can be made without departing from the concept of this disclosure. Therefore, the following detailed description should not be considered limiting.

[0095] It should be understood that, unless otherwise specifically indicated, features of various embodiments of this disclosure described herein can be combined with each other. As used herein, the term “and / or” includes any one of the relevant listed items and any combination of any two or more; similarly, “at least one of…” includes any one of the relevant listed items and any combination of any two or more.

[0096] It should be understood that, unless otherwise expressly specified and limited, the terms "joining," "attaching," "installing," "connecting," "linking," "fixing," etc., used in the embodiments of this disclosure should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection, an electrical connection, or a connection that allows communication between them; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms herein based on the specific circumstances.

[0097] Although terms such as “first,” “second,” and “third” may be used herein to describe various components, parts, regions, layers, or sections, these components, parts, regions, layers, or sections are not limited to these terms. Rather, these terms are used only to distinguish one component, part, region, layer, or section from another. Therefore, without departing from the teachings of the examples described herein, the first component, part, region, layer, or section mentioned in the examples may also be referred to as the second component, part, region, layer, or section. Furthermore, the terms “first” and “second” are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as “first” or “second” may explicitly or implicitly include at least one of that feature. In the description herein, “a plurality” means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0098] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

Claims

1. A chip packaging structure, comprising a substrate and a chip assembly disposed on the substrate, the chip assembly comprising at least one first chip and at least one second chip, wherein the thermal density of the first chip is higher than the thermal density of the second chip; characterized in that, Also includes: A heat-conducting cavity is disposed above the chip assembly and is thermally connected to the chip assembly; A heat dissipation assembly is disposed within the heat-conducting cavity and includes multiple heat dissipation components arranged at intervals. A fan is located inside the heat-conducting cavity; The heat dissipation assembly and the fan are arranged at intervals in a plane parallel to the substrate; wherein, The heat dissipation component corresponds to the first chip, and its orthographic projection on the substrate at least partially overlaps with the orthographic projection of the first chip on the substrate. The fan corresponds to the second chip, and its orthographic projection on the substrate at least partially overlaps with the orthographic projection of the second chip on the substrate.

2. The chip packaging structure according to claim 1, characterized in that, It also includes a molding compound and a thermally conductive layer; the molding compound covers the substrate and wraps the first chip and the second chip to form a flat surface; the thermally conductive layer is disposed between the flat surface of the molding compound and the thermally conductive cavity.

3. The chip packaging structure according to claim 2, characterized in that, The thermally conductive layer is configured as a thermal interface material, which includes at least one of thermally conductive silicone grease, graphene material, phase change material, thermally conductive gel, or liquid metal.

4. The chip packaging structure according to claim 2, characterized in that, The heat-conducting cavity includes a top wall, a bottom wall opposite to the top wall, and a plurality of side walls connecting the top wall and the bottom wall; wherein the bottom wall of the heat-conducting cavity is thermally connected to the chip assembly through the heat-conducting layer.

5. The chip packaging structure according to claim 4, characterized in that, The two ends of the heat sink are respectively connected to the inner side of the bottom wall and the inner side of the top wall.

6. The chip packaging structure according to claim 4, characterized in that, The top wall has a through hole, and at least a portion of the fan is embedded in the through hole.

7. The chip packaging structure according to claim 1, characterized in that, The heat sink can be in the form of a sheet, column, needle, or fin.

8. The chip packaging structure according to claim 7, characterized in that, The heat sink has a cross-sectional shape that is rectangular, circular, elliptical, trapezoidal, or teardrop-shaped.

9. The chip packaging structure according to claim 1, characterized in that, The heat dissipation assembly consists of multiple heat dissipation components arranged in an array or at intervals in a single direction.

10. The chip packaging structure according to claim 1, characterized in that, The spacing between any two adjacent heat sinks is 0.2 mm to 2 mm.

11. The chip packaging structure according to claim 1, characterized in that, The surface of the heat sink is provided with microstructures to increase the heat dissipation area.

12. The chip packaging structure according to claim 11, characterized in that, The microstructure includes at least one of the following: bumps, grooves, textures, or micropores.

13. The chip packaging structure according to claim 4, characterized in that, The plurality of sidewalls include a first sidewall and a second sidewall disposed opposite to each other along a first direction; the heat dissipation assembly is located between the fan and the first sidewall.

14. The chip packaging structure according to claim 13, characterized in that, The first side has an opening, and the opening corresponds to the heat dissipation component.

15. The chip packaging structure according to claim 13, characterized in that, Both the first side and the second side are provided with openings; The opening on the first side corresponds to the heat dissipation component, and the opening on the second side corresponds to the fan.

16. The chip packaging structure according to claim 13, characterized in that, The plurality of sidewalls further include a third sidewall and a fourth sidewall disposed opposite to each other along a second direction, the second direction intersecting the first direction; wherein... An opening is provided on the third side and / or the fourth side, and the opening is correspondingly arranged with the heat sink in a plane parallel to the substrate.

17. The chip packaging structure according to claim 1, characterized in that, The number of fans is multiple; or the fans are configured as a micro fan array.

18. The chip packaging structure according to claim 1, characterized in that, It also includes a temperature sensor and a controller, wherein the temperature sensor is used to detect the temperature of the first chip and / or the heat-conducting cavity; the controller is electrically connected to the temperature sensor and the fan, and is configured to control the start / stop or speed of the fan based on the temperature detected by the temperature sensor.

19. An electronic device, characterized in that, Includes the chip packaging structure as described in any one of claims 1-18.

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