Automated creation of image formulation

Abstract

A system and method for automatically optimizing an electron beam tool image recipe is provided. The method includes obtaining material and structural characteristics of a semiconductor sample of interest (SOI); performing a first simulation of interaction between main beam irradiation electrons and the SOI, the simulation being performed under various main beam configurations to obtain a mapping of a polar angle of an electron escape distribution and escape energy; performing a second simulation according to these mappings to collect and detect escapes in different imaging configurations to acquire a signal profile for a measurement of interest (MOI) on the SOI in each imaging configuration; and creating an image recipe for the electron beam tool, including main beam parameters and tool image parameters configured to achieve optimal contrast of the MOI in the signal profile.

Description

Technical Field

[0001] The subject matter of this disclosure is generally related to the field of inspecting semiconductor samples, and more specifically, to the automatic creation of image recipes for imaging semiconductor samples. Background Technology

[0002] Current demands for high density and performance associated with ultra-large-scale integrated manufacturing equipment require submicron features, increased transistor and circuit speeds, and improved reliability. As semiconductor processes advance, pattern dimensions, such as linewidth and other critical dimensions, continue to shrink. These requirements necessitate the formation of device features with high precision and uniformity, which in turn necessitates careful monitoring of the manufacturing process, including automated inspections while the equipment is still in semiconductor wafer form.

[0003] Inspection can be performed using non-destructive testing tools during or after the manufacture of the sample. Various non-destructive testing tools include (but are not limited to) scanning electron microscopes, atomic force microscopes, optical inspection tools, etc.

[0004] Inspection processes can include multiple inspection steps. Semiconductor device manufacturing processes can include various procedures such as etching, deposition, planarization, growth (e.g., epitaxial growth), implantation, etc. Inspection steps can be performed multiple times, for example, after certain process procedures and / or after the fabrication of certain layers, or similar occasions. Furthermore, or alternatively, each inspection step can be repeated multiple times, for example, for different wafer locations, or for the same wafer location using different inspection settings.

[0005] During each step of the inspection process in semiconductor manufacturing, the inspection images acquired by the inspection tools are processed for inspection operations, such as detecting and classifying defects on samples, and performing metrology-related operations.

[0006] The effectiveness of inspections can be improved through automated processes, such as defect detection, automated defect classification (ADC), automated defect review (ADR), image segmentation, and automated metrology-related operations. Automated inspection systems ensure that manufactured parts meet expected quality standards and provide useful information about potential adjustments to manufacturing tools, equipment, and / or components, depending on the type of defect identified. Summary of the Invention

[0007] According to certain aspects of the subject matter of this disclosure, a computer system for automatically creating electron beam tool image recipes is provided. The system includes processing circuitry configured to acquire material and structural properties of a semiconductor sample of interest (SOI) as input; perform a first simulation based on the input, representing the interaction between electrons irradiated by the main beam of an electron beam tool and the SOI, the first simulation being performed under multiple main beam configurations characterized by values ​​of different sets of main beam parameters to obtain a mapping of the polar angle and escape energy of the electron escape distribution for each main beam configuration; perform a second simulation based on the mapping, representing the collection and detection of escape electrons under different tool image configurations characterized by values ​​of different sets of tool image parameters to obtain a signal profile for a measurement of interest (MOI) on the SOI under each tool image configuration; and create an image recipe for the electron beam tool, including a set of main beam parameters and a set of tool image parameters configured to have values ​​that achieve optimal contrast for the MOI in the signal profile.

[0008] In addition to the features described above, according to this aspect of the subject matter of this disclosure, the system may include one or more of the features (i) to (x) listed below, and in any technically possible combination or arrangement as desired:

[0009] (i) Material properties include one or more of the following: composition, density and stoichiometry of the materials constituting the sample.

[0010] Structural characteristics include one or more of the following: layer layout, thickness, and geometric dimensions of structural features.

[0011] (ii) The set of main beam parameters includes one or more of the following: ground energy, beam resolution, current amplitude, current density, electron source, and numerical aperture (NA) of the electron beam tool.

[0012] (iii) The set of tool image parameters includes one or more of the following: detector angle, detector gain, detector offset, electrostatic field, voltage, mechanical configuration, dwell time, scan speed, pixel size, and the energy filter of the electron beam tool. The signal profile is expressed in a multidimensional parameter space.

[0013] (iv) The processing circuitry is configured to perform a second simulation, which simulates the signal detected by the given detector by means of the correlation between the detector gain, energy and the incoming electron current of the given detector.

[0014] (v) The image recipe is a wafer-free recipe, which is created without acquiring the actual SOI, thereby improving the time required for recipe creation.

[0015] (vi) SOI stands for Vertical NAND (V-NAND), MOI stands for Overlap Measurement between two consecutive layers, and the image recipe includes at least the ground energy configured within a selected range and the side detectors located at polar angles within a selected range.

[0016] (vii) The image formulation further includes a side detector configured with a selected detector gain, and at least one energy filter configured to filter out escape electrons with unwanted energy levels.

[0017] (viii) The simulation data from the first and second simulations can be used to design new electron beam tools with parameters configured to selected values ​​that have been verified to achieve optimal MOI contrast.

[0018] (ix) Simulation data from the first and second simulations can be used to provide feedback to manufacturers to optimize the material and / or structural properties of future samples of interest (SOIs) to be manufactured, thereby enhancing the electron beam inspection process.

[0019] (x) The electron beam tool is one of the following: a defect inspection tool, a defect review tool, or a measurement tool.

[0020] According to other aspects of the subject matter of this disclosure, a computer method for automatically creating an electron beam tool image recipe is provided, the method comprising: acquiring material and structural properties of a semiconductor sample of interest (SOI) as input; performing a first simulation based on the input, the simulation representing the interaction between electrons irradiated by a main beam of an electron beam tool and the SOI, the first simulation being performed under multiple main beam configurations characterized by values ​​of different sets of main beam parameters to obtain a mapping of the polar angle and escape energy of the electron escape distribution for each main beam configuration; performing a second simulation based on the mapping, the simulation representing the collection and detection of escape electrons under different tool image configurations characterized by values ​​of different sets of tool image parameters to obtain a signal profile for a measurement of interest (MOI) on the SOI under each tool image configuration; and creating an image recipe for the electron beam tool, including a set of main beam parameters and a set of tool image parameters configured to have values ​​that achieve optimal contrast for the MOI in the signal profile.

[0021] These aspects of the disclosed subject matter may include one or more of the system features (i) to (x) described above, and may be combined or arranged in any technically possible manner.

[0022] According to other aspects of the subject matter of this disclosure, a non-transitory computer-readable medium is provided, containing instructions that, when executed by a computer, cause the computer to perform a method for automatically creating an electron beam tool image recipe, the method comprising: acquiring material and structural properties of a semiconductor sample of interest (SOI) as input; performing a first simulation based on the input, the simulation representing the interaction between electrons irradiated by the main beam of an electron beam tool and the SOI, the first simulation being performed under multiple main beam configurations characterized by values ​​of different sets of main beam parameters to obtain a mapping of the polar angle and escape energy of the electron escape distribution for each main beam configuration; performing a second simulation based on the mapping, the simulation representing the collection and detection of escape electrons under different tool image configurations characterized by values ​​of different sets of tool image parameters to obtain a signal profile for a measurement of interest (MOI) on the SOI under each tool image configuration; and creating an image recipe for the electron beam tool, including a set of main beam parameters and a set of tool image parameters configured to have values ​​that achieve optimal contrast for the MOI in the signal profile.

[0023] Aspects of this disclosed subject matter may include one or more of the aforementioned system features (i) to (x), and may be combined or arranged in any technically possible manner. Attached Figure Description

[0024] To understand this disclosure and see how it can be implemented in practice, implementation methods will now be described by way of non-limiting examples, with reference to the accompanying drawings, in which:

[0025] Figure 1 A general block diagram of an inspection system according to certain embodiments of the subject matter of this disclosure is shown.

[0026] Figure 2 A general flowchart of automated recipe creation / optimization according to certain embodiments of the subject matter of this disclosure is shown.

[0027] Figure 3 A general flowchart of a created image recipe used in certain embodiments of the subject matter of this disclosure is shown.

[0028] Figure 4 Examples of Samples of Interest (SOI) and MOIs on those SOIs are shown in certain embodiments of the subject matter of this disclosure.

[0029] Figure 5 An example of the output data of a first simulation is shown in certain embodiments of the subject matter of this disclosure.

[0030] Figure 6 An example of a signal profile generated by a second simulation is shown in certain embodiments of the subject matter of this disclosure.

[0031] Figure 7 Schematic diagrams of detectors and energy filters for optimal imaging of samples are provided in certain embodiments of the subject matter of this disclosure.

[0032] Figure 8 Examples of the correlation between detector gain, hit energy, and hit current are shown in certain embodiments of the subject matter of this disclosure. Detailed Implementation

[0033] Semiconductor manufacturing processes typically require multiple successive processing steps and / or layers, some of which can lead to errors and consequently, yield losses. Examples of various processing steps include lithography, etching, deposition, planarization, growth (e.g., epitaxial growth), and implantation. During the manufacturing process, various inspection operations can be performed at different processing steps / layers, such as defect-related inspections (e.g., defect detection, defect review, and defect classification) and / or metrology-related inspections (e.g., critical dimension (CD) measurements) to monitor and control the process. Inspection operations can be performed multiple times, for example, after certain processing steps and / or after the fabrication of certain layers, or similar scenarios.

[0034] As mentioned above, various inspection tools can be used to inspect semiconductor samples, such as optical inspection tools and electron beam tools. For example, scanning electron microscopy (SEM) is an electron microscope that uses an electron beam to illuminate the surface of a sample. Electrons interact with atoms in the sample to generate signals, which are then collected and analyzed to produce high-resolution images that reveal structural and compositional details of the sample. SEM can accurately inspect and measure features during the semiconductor wafer manufacturing process.

[0035] Acquiring high-quality SEM images, such as high-resolution and / or high-SNR SEM images, is crucial for the accurate inspection of semiconductor samples. High-quality image acquisition requires careful optimization of various tool parameters; the combination of these parameters is known as the "image recipe" or "tool image recipe" for the inspection tool. These parameters may include, for example, electron beam energy, beam current, lens settings, detector settings, etc.

[0036] Traditionally, developing image recipes for these tools is a labor-intensive and time-consuming process, relying primarily on manual experimentation and parameter tuning. This typically involves manual adjustments, requiring skilled operators to invest significant time and effort in fine-tuning various tool parameters while observing SEM imagery to achieve optimal imaging conditions. Recipe tuning is often an iterative process, requiring continuous adjustments and image acquisition, with limited predictability of success and stability. The recipe development process often depends on operator experience and intuition, leading to inconsistent results and difficulty in reproducing optimal settings.

[0037] Furthermore, traditional image formulation improvement methods rely on physical wafers for testing. This requirement not only consumes valuable resources but also limits the feasibility of experiments, especially when wafer availability is limited or when initial testing is conducted early in formulation development. In addition, traditional formulation development is typically wafer-dependent, meaning that even if physical wafers are available, formulations still need to be optimized for each specific wafer type. This can become inefficient and time-consuming when dealing with new materials and / or complex structures.

[0038] These limitations can significantly slow the development of effective imaging formulations for semiconductor sample inspection tools.

[0039] With the continuous advancement of semiconductor manufacturing processes, the structure of semiconductor devices is becoming increasingly complex and the feature size is constantly shrinking. This increases the need to develop automated image recipe generation and optimization methods for use in semiconductor inspection tools.

[0040] Therefore, certain embodiments of the subject matter of this disclosure propose an automated recipe generation and / or optimization system that does not suffer from one or more of the disadvantages described above. This disclosure introduces a novel method that utilizes simulation technology to simplify the recipe creation process, eliminating reliance on physical wafers and reducing dependence on human intervention. By simulating the interaction between irradiated electrons and the sample using an electron beam tool, and the collection and detection of escaped electrons under various imaging configurations, the proposed automated workflow can rapidly generate optimized image recipes and improve image performance and efficiency, as detailed below.

[0041] With this in mind, please note Figure 1 The figure illustrates a functional block diagram of an inspection system according to certain embodiments of the subject matter of this disclosure.

[0042] Figure 1 The inspection system 100 shown can be used to inspect semiconductor samples (e.g., wafers, chips, or portions thereof) as part of the sample manufacturing process. As mentioned above, the inspection referred to herein can be understood to encompass any type of operation related to the sample, such as defect inspection / detection, defect review, defect classification, interference filtering, segmentation, and / or metrological operations, such as metrological measurements. System 100 includes one or more inspection tools 120 configured to scan the sample and capture its images for further processing for various inspection applications.

[0043] The term "inspection tool" as used herein should be broadly understood to encompass any tool that can be used to inspect a relevant process, including but not limited to scanning, imaging, sampling, examination, measurement, sorting, and / or other processes related to a sample or parts thereof. Inspection tool 120 can be implemented as various types of machines. In some embodiments, the inspection tool can be implemented as an electron beam machine / tool, such as the scanning electron microscope (SEM), atomic force microscope (AFM), or transmission electron microscope (TEM) described above.

[0044] According to some implementations, in certain cases, the inspection tool 120 may include one or more inspection tools and / or one or more review tools. The inspection tools may scan the sample to capture inspection images and detect potential defects according to a defect detection algorithm. The output of the detection module is a defect distribution map, indicating the distribution of defect candidates on the semiconductor sample. The review tools may be configured to capture review images at the locations of defect candidates in the map and review these images to determine whether the defect candidates are indeed DOIs.

[0045] In some cases, at least one inspection tool 120 has metrological capabilities. Such inspection tools are also referred to as metrological tools. Metrological tools can be configured to generate image data while scanning a sample and to perform metrological operations based on the image data.

[0046] In some cases, the same inspection tool can operate in different inspection modes. The same tool can provide low-resolution image data and / or high-resolution image data. The generated image data can be transmitted to system 101 directly or through one or more intermediary systems. This disclosure is not limited to any particular type of inspection tool and / or the representation / resolution of the image data generated by the inspection tool.

[0047] According to certain embodiments of the subject matter of this disclosure, the inspection system 100 includes a computer-based system 101 that is operationally connected to the inspection tool 120 and capable of automatically creating / optimizing recipes, as described below. System 101 is also referred to as a recipe creation or optimization system. For example, when an initial recipe exists and is optimized using a proposed solution, system 101 may be called a recipe optimization system. Alternatively, when no recipe exists and the proposed solution is used to create an image recipe from scratch, it may be called a recipe creation system.

[0048] System 101 includes processing circuitry 102, which is operatively connected to hardware-based I / O interface 126 and configured to provide the processing capabilities required by the operating system. See details below. Figure 2-3The processing circuitry 102 may include one or more processors (not shown separately) and one or more memories (not shown separately). The one or more processors of the processing circuitry 102 may be configured to execute, individually or in any suitable combination, several functional modules according to computer-readable instructions implemented in non-transitory readable memory. These functional modules are referred to herein as being contained in the processing circuitry.

[0049] According to some implementations, the processing circuit 102 of system 101 may include one or more functional modules, such as a first simulation module 104, a second simulation module 106, and a recipe creation module 108, which are operatively connected to each other.

[0050] Specifically, processing circuitry 102 can be configured to acquire the material and structural properties of the semiconductor sample of interest (SOI) as input via I / O interface 126. First simulation module 104 can be configured to perform a first simulation based on this input, representing the interaction between the main beam irradiated electrons of an electron beam tool and the SOI, under multiple main beam configurations characterized by having different sets of main beam parameter values ​​to obtain a mapping of the polar angle and escape energy of the electron escape distribution for each main beam configuration.

[0051] The second simulation module 106 can be configured to perform a second simulation based on the mapping, which represents the collection and detection of escape electrons under multiple tool image configurations, characterized by having different sets of tool image parameters to obtain a signal profile for the measurement of interest (MOI) on the SOI under each tool image configuration.

[0052] The recipe creation module 108 can be configured to create an image recipe for an electron beam tool, the recipe including a set of master beam parameters and a set of tool image parameters configured to have values ​​that achieve the best contrast of the MOI in the signal profile.

[0053] It should be noted that although some embodiments of this disclosure mention that the processing circuit 102 is configured to perform the operations described above, the functions / operations of the aforementioned functional modules can be performed by one or more processors in the processing circuit 102 in various ways. For example, the operation of each functional module can be performed by a specific processor or by a combination of multiple processors. The operations of each functional module, such as the first simulation, the second simulation, and recipe creation, can therefore be performed by their respective processors (or combinations of processors) in the processing circuit 102, while these operations can also be selectively performed by the same processor. The content of this disclosure should not be limited to the interpretation that a single processor always performs all operations.

[0054] In some cases, in addition to system 101, inspection system 100 may include one or more inspection modules, such as a defect detection module, an interference filtering module, an automatic defect review module (ADR), an automatic defect classification module (ADC), a metrology module, and / or other inspection modules that can be used to inspect semiconductor samples. These one or more inspection modules may be implemented as stand-alone computers, or their functions (or at least some functions) may be integrated with inspection tool 120. In some cases, the output of system 101, such as image recipes, parameter values, and / or analog data, may be provided to one or more inspection modules for further processing.

[0055] According to some implementations, system 100 may include a storage unit 122. Storage unit 122 may be configured to store any data required to run system 101, such as data related to the inputs and outputs of system 101, and intermediate processing results generated by system 101. For example, storage unit 122 may be configured to store input data, such as the material and structural properties of SOI as described above. In some cases, input data may be partially obtained, for example, from a design server. Therefore, different types of input data can be retrieved from storage unit 122 as needed and provided to processing circuitry 102 for further processing. Outputs of system 101, such as image recipes, their parameter values, and / or simulation data, may be sent to storage unit 122 for storage.

[0056] In some implementations, system 100 may optionally include a computer-based graphical user interface (GUI) 124 configured to allow a user to specify inputs related to system 101. For example, the user may receive a visual representation of the SOI (e.g., via a display forming part of the GUI 124), such as design data of the SOI. The user may access options on the GUI to define certain operational parameters, such as specific parameters relating to the first and second simulations and their values. The user may also view operational results or mediation results on the GUI, such as simulation outputs (e.g., maps, signal profiles, etc.) and various tool configurations.

[0057] In some cases, system 101 may be further configured to send the operation results to inspection tool 120 for further processing via I / O interface 126. In other cases, system 101 may also be further configured to send the results to storage unit 122 and / or external systems (e.g., a semiconductor foundry's yield management system (YMS)). In the context of semiconductor manufacturing, a yield management system (YMS) is a data management, analysis, and tooling system that collects data from semiconductor foundries as manufacturing increases production and helps engineers find ways to improve yield. YMS helps semiconductor manufacturers and foundries manage large volumes of production analysis with fewer engineers. These systems analyze yield data and generate reports. YMS can be used by integrated equipment manufacturers (IMDs), semiconductor foundries, fabless semiconductor companies, and outsourced semiconductor assembly and test (OSAT) companies.

[0058] Those familiar with this technology will immediately understand that the teachings of this disclosure are not subject to Figure 1 The limitations of the system shown. Figure 1 Each system element and module may consist of any combination of software, hardware, and / or firmware, executed as needed on suitable devices that perform the functions defined and explained herein. Equivalent and / or modified functions associated with each system element and module may otherwise be combined or separated. Therefore, in some embodiments of the subject matter of this disclosure, the system may include more than Figure 1 Showing fewer, more, modified, and / or different components, modules, and functions.

[0059] Figure 1 Each element in the document may represent multiple specific elements adapted to operate independently and / or collaboratively to process various data and electrical inputs and enable operations related to the computer-controlled inspection system. In some cases, multiple instances of an element may be used for performance, redundancy, and / or availability reasons. Similarly, in some cases, multiple instances of an element may be used for functional or application reasons. For example, different parts of a specific function may be placed in different instances of an element.

[0060] It should be noted that Figure 1 The inspection system shown can be implemented in a distributed computing environment, where Figure 1One or more of the aforementioned components and functional modules shown may be distributed across several local and / or remote devices. For example, as described above, in some cases, system 101 may be configured as a recipe creation / setting system for creating image recipes (or a recipe optimization system for optimizing an initial recipe). After creation / optimization, the recipe can be used at runtime to configure an inspection tool that can be used to examine runtime samples. Inspection tool 120 and system 101 may reside in the same entity (in some cases hosted by the same device) or be distributed across different entities, depending on system configuration and implementation requirements.

[0061] In some instances, certain components are implemented using the cloud, for example, in a private or public cloud. Examining communication between the various components of the system, where they are not entirely located in the same place or on the same physical entity, can be achieved through any signaling system or communication element, module, protocol, software language, and drive signal, and can be done via wired and / or wireless methods as needed.

[0062] It should also be noted that, in some embodiments, at least some components of the inspection tool 120, storage unit 122, and / or GUI 124 may be located outside the inspection system 100 and communicate with systems 100 and 101 via I / O interface 126. System 101 may be implemented as a stand-alone computer for use with the inspection tool and / or other inspection modules described above. Alternatively, the corresponding functions of system 101 may be at least partially integrated with the inspection tool 120, thereby facilitating and enhancing the functionality of the inspection tool in inspection-related processes.

[0063] While this may not be the case, the operating procedures of systems 101 and 100 can correspond to... Figure 2-3 Some or all of the relevant methods. Similarly, with Figure 2-3 The related methods and their possible implementations can also be implemented by systems 101 and 100. Therefore, it is worth noting that the implementations related to the methods can also be implemented accordingly as various implementations of systems 101 and 100, and vice versa.

[0064] refer to Figure 2 This shows a general flowchart of automated recipe creation / optimization according to certain embodiments of the subject matter of this disclosure.

[0065] As mentioned above, semiconductor samples typically consist of multiple layers. Sample inspection processes can be performed multiple times during the sample manufacturing process, for example, after processing steps of specific layers. In some cases, a set of sample processing steps can be selected for real-time inspection based on known impacts on device characteristics or yield. During these sample processing steps, images of the sample or portions thereof can be acquired for inspection.

[0066] For illustrative purposes only, some embodiments described below are for the purpose of imaging a sample processing step / layer. Those skilled in the art will readily understand that the teachings of this disclosure can be applied to any layer and / or processing step of a sample. This disclosure should not be limited to the number of layers contained in the sample and / or the specific layer to be imaged.

[0067] As input, physical properties of the semiconductor sample of interest (SOI), such as structural and material properties (202) (e.g., from memory cell 122), can be obtained. In some cases, these properties can be collectively referred to as the sample's "overlay information." Overlay information typically refers to comprehensive properties that describe the sample's hierarchical architecture. This information contains parameters that define the hierarchical arrangement and physical properties of the sample's constituent layers. As the foundational dataset for simulation modeling and analysis, overlay information enables accurate representation and prediction of the sample's behavior under various conditions, including electron irradiation in semiconductor imaging applications.

[0068] Specifically, the structural characteristics of a sample typically describe the spatial arrangement and dimensional features of its constituent layers and structural features / elements. In some cases, at least a portion of the structural characteristics can be obtained from the sample's design data (e.g., CAD). For example, structural characteristics may include one or more of the following: layer layout of each layer (e.g., the arrangement and order of semiconductor layers within an SOI stack), thickness (e.g., the vertical dimensions of each layer, affecting electron penetration depth and signal generation), and the geometric dimensions of the structural features (e.g., the lateral dimensions and shapes of structural elements within each layer, such as linewidth, spacing, and geometric features).

[0069] The material properties of a sample encompass a variety of factors that can influence its behavior under electron irradiation. For example, material properties may include one or more of the following: composition (e.g., elemental composition that may affect electron scattering and absorption), density (e.g., the mass per unit volume of the material within the SOI, affecting the propagation and attenuation of the electron beam as it passes through the sample), and the stoichiometric formulation of the materials constituting the sample. The stoichiometric formulation can indicate chemical formulas representing the stoichiometry of compounds within the semiconductor layer, which may be necessary for accurately modeling the distribution of atoms and the formation of crystal structures.

[0070] It should be noted that the above characteristics are merely illustrative and should not be construed as limiting any aspect of this disclosure. Any other similar characteristics may be used to supplement or replace the above. For example, in some cases, material properties may include additional properties such as surface roughness, lattice arrangement, etc. In other cases, material properties may include the optical, mechanical, chemical, and / or magnetic properties of SOI materials. These properties, combined, can provide a more comprehensive characterization of semiconductor samples, facilitating more accurate simulations of electron-semiconductor interactions, and the collection and detection of electrons.

[0071] Figure 4 Examples of attention samples (SOI) and attention measurements (MOI) performed on SOIs according to certain embodiments of the subject matter of this disclosure are demonstrated.

[0072] In this embodiment, the sample of interest (SOI) includes a vertical NAND (V-NAND) (also known as 3D-NAND) structure. V-NAND structures employ three-dimensional stacked memory layers to increase data storage density within semiconductor devices. Specifically, this two-layer process (also known as a stack-up) divides the V-NAND stack into two layers to accommodate increasing via aspect ratios. Each layer contains alternating layers of dielectric and conductive materials. Within each layer, vias are drilled to create vertical conduits for inter-layer electrical communication. Two-layer processes typically introduce challenges in achieving precise alignment of vias between different layers.

[0073] In SOI, the focus of measurement is on overlap measurement, which emphasizes quantifying the relative arrangement / alignment of channel hole stacks between adjacent layers. For example, overlap measurement can be represented by the offset / displacement between the bottom of the upper layer / deck and the top of the lower layer / deck.

[0074] Figure 4 A simplified schematic diagram is shown, showing an upper channel hole 402 in the upper layer and a lower material 1 (e.g., titanium nitride (TiN)). The overlap can be measured at the interface between the two layers as a displacement 404 between the bottom of the channel hole 402 and the top of the material 1. Figure 4 A cross-sectional view 406 is also shown, showing the displacement as the distance between two positions X and Y, which represent the right edge of the channel hole 402 in material 1 (TiN) and another material (e.g., silicon monooxide (SiO) / silicon nitride (SiN)).

[0075] In some cases, it is desirable to achieve the highest possible contrast between the upper and lower layers (contrast refers to the difference in signal strength or electron density between two layers), which directly affects the accuracy and precision of overlay measurements. By optimizing the contrast between layers, the accuracy and reliability of overlay measurements can be improved, thereby enabling more precise alignment and alignment correction processes in semiconductor manufacturing.

[0076] The proposed simulation-based recipe generation can be used to optimize the overlap contrast acquired when sampling V-NAND images. By simulating the interaction between irradiated electrons and the V-NAND structure and detecting escaped electrons under various tooling image configurations, the solution is able to identify the optimal image parameters that maximize the contrast between the upper and lower layers, as described below.

[0077] Once the input is acquired, a first simulation (204) can be performed based on that input (e.g., executed by the first simulation module 104). This simulation represents the interaction between the irradiated electrons of the electron beam tool (also referred to as the electron beam tool) main beam and the SOI under multiple main beam configurations. These multiple main beam configurations are characterized by different values ​​of the set of main beam parameters. After the first simulation, for each main beam configuration, a mapping (as the output of the first simulation) can be obtained, representing the polar angle and escape energy of the electron escape distribution.

[0078] Electron beam tools are typically configured with multiple tool parameters that characterize the tool, including, for example, a set of master beam parameters and a set of tool image parameters. For instance, the set of master beam parameters defines the master beam emitted from the electron source of the electron beam tool and may include parameters such as: ground energy, beam current resolution, current amplitude, current density, electron source characteristics, lens settings, aperture size, and numerical aperture (NA). These parameters collectively define the characteristics of the master beam, such as its spatial extent and focus.

[0079] The purpose of the first simulation was to model the interaction between the electrons irradiated by the main beam and the SOI, covering multiple main beam configurations. This simulation can be used to understand how variations in the main beam parameters affect the interaction between the electrons and the SOI, as well as the behavior of escaped electrons within the system.

[0080] According to some implementations, the first simulation can begin with the initial setup of multiple master beam configurations. These multiple master beam configurations are characterized by multiple combinations of different / variable values ​​of a set of master beam parameters, as described above. For example, the values ​​of each parameter in the set of master beam parameters can be varied multiple times, thereby producing multiple master beam configurations corresponding to the varied values ​​of the set of master beam parameters. For example, the value of a given parameter, such as landing energy, can be varied within a predetermined range according to intervals or steps. The varied values ​​of different parameters can be combined in different ways to constitute multiple master beam configurations.

[0081] In each master beam configuration, the first simulation directs the master beam toward the SOI, where interactions occur based on previously defined material and structural properties. For example, electron-solid interactions can be simulated, including secondary electron emission, electron backscattering, and absorption, to elucidate the distribution and behavior of master and escape electrons within the sample. The simulation can also track the trajectory of irradiated electrons across the SOI, considering the effects of parameters such as varying grounding energy, beam resolution, and current density on electron transport and interaction mechanisms within the material.

[0082] When interacting with SOI, some electrons, such as secondary electrons (SEs) and / or backscattered electrons (BSEs), may escape from the sample surface, carrying information about its composition, size, defects, and surface features. The trajectories of these escaping electrons are tracked by a tracking algorithm that takes into account their energy, orientation, and scattering behavior as they propagate through the tool. Specifically, in some implementations, the tracking algorithm may use two models: one model characterizing the cylindrical portion of the electron beam tool (containing the electron source and lens) (also known as the cylindrical model), and another model characterizing the chamber of the electron beam tool (e.g., a vacuum chamber containing the sample) (also known as the chamber model).

[0083] For example, a column model can be constructed by integrating the geometry and material composition of each component to simulate electron optics and beam propagation. This model considers the scattering, focusing, and deflection mechanisms of electrons within the column, ensuring an accurate representation of electron trajectories when interacting with the SOI. A chamber model can be developed to characterize the electrostatic and electromagnetic fields within the machine chamber surrounding the electron beam tool. This model considers the spatial distribution of charge, potential, and magnetic fields generated by the electron beam and other system components, such as vacuum pumps, shielding, and stage mechanisms.

[0084] For each master beam configuration, the simulation can generate output data, such as a mapping representing the polar angle and escape energy of the electron escape distribution.

[0085] The term "polar angle" refers to the angle measured from a reference axis (such as the optical axis, i.e., the surface normal) that points in the direction in which electrons escape from the sample. In the context of electron microscopy, this angle provides directional information about the emission of electrons from the sample surface. A polar angle of 0 degrees corresponds to electrons escaping perpendicularly to the surface, while larger angles represent deviations from this perpendicular direction. The term "escape energy" represents the kinetic energy of the escaping electron as it leaves the sample surface.

[0086] Figure 5 Examples of output data from a first simulation are demonstrated in certain embodiments of the subject matter of this disclosure.

[0087] continue Figure 4 For example, a first simulation is performed to represent the interaction between the main beam of the electron beam tool irradiating electrons and the SOI (e.g., V-NAND). For ease of illustration, in this example, multiple main beam configurations are characterized by having different landing energies, such as 2.5 keV, 5 keV, 10 keV, 50 keV, 70 keV, and 100 keV. The generated output data is presented in the form of a map (also called an output map) corresponding to each given landing energy, representing the spatial distribution of the escaping electrons at that given landing energy. As shown in the figure, six maps were obtained, corresponding to the six landing energies listed above.

[0088] The mapping typically involves a two-dimensional representation, where each pixel or grid point corresponds to a specific combination of polar angle (on the X-axis) and escape energy (on the Y-axis). The intensity or color of each pixel represents the number or intensity of escape electrons observed within a specific range of polar angle and escape energy.

[0089] These output maps provide valuable information on the spatial distribution and energy spectrum of escape electrons, serving as a reference for subsequent steps in the image formulation optimization process. By analyzing the impact of different main beam configurations on the escape electron distribution, parameters for optimizing beam settings, such as landing energy, beam resolution, and numerical aperture, can be identified to improve image performance and sensitivity. For example, by correlating escape energy / polar angle with specific beam configurations, the selection of beam parameters can be customized to maximize signal contrast, resolution, and sensitivity for detecting / measuring features of interest in a sample.

[0090] For example, in Figure 5 In the example, by analyzing the six output maps, it can be identified that map 502, generated at a ground energy of 50 keV, provides the best signal contrast and sensitivity, especially in the polar angle range of 20 to 60 degrees. Therefore, it can be deduced that the optimal ground energy for the image should be around 50 keV, and a detector with a polar angle range of 20 to 60 degrees should be used to collect escape electrons. Furthermore, the Y-axis reveals that the optimal signal contrast and sensitivity are provided when the escape electron energy level is between 20 keV and 40 keV. Therefore, the output maps generated by the first simulation provide the basis for parameter optimization and recipe generation in subsequent steps.

[0091] Continue describing Figure 2 After performing the first simulation and obtaining the output mapping, a second simulation (206) can be performed based on this mapping (e.g., performed by the second simulation module 106), where the second simulation represents the collection and detection of escape electrons under multiple tool image configurations. These multiple tool image configurations are characterized by having different sets of tool image parameters. After the second simulation is completed, a signal profile (MOI) for the measurement of interest on the SOI can be obtained under each tool image configuration (as the output of the second simulation).

[0092] This set of tool imaging parameters, as part of the tool parameters, is characterized by the collection and detection of escaped electrons to form an image signal. For example, this set of tool imaging parameters may include at least the following parameters: detector angle, detector gain, detector offset, electrostatic field, voltage, mechanical configuration, dwell time, scan speed, pixel size, and the energy filter of the electron beam tool.

[0093] Similarly, the second simulation can begin with the initial settings of multiple tool image configurations. These multiple tool image configurations are characterized by multiple combinations of different / variable values ​​of a set of tool image parameters. For example, each parameter value from this set of tool image parameters can be varied multiple times, resulting in multiple tool image configurations corresponding to multiple combinations of varied values ​​of the set of tool image parameters. Each configuration represents a unique combination of these parameters, defining the conditions for collecting and detecting escaped electrons.

[0094] In some implementations, under each tool image configuration, a second simulation model simulates the collection of escape electrons by different detectors located at specific angles and orientations relative to the SOI. The output map of the first simulation can be used as input to the second simulation to determine the expected distribution of escape electrons entering the different detectors under each tool image configuration. This involves simulating the trajectory of escape electrons from the sample surface to the detector. The efficiency of electron collection can be affected by several parameters, such as detector angle, deflector offset, and electrostatic field, which determine the trajectory of escape electrons toward the detector.

[0095] The second simulation then uses a detector to detect the collected electrons to generate a signal profile of the measurement of interest (MOI). In one instance, the signal detected by a given detector can be simulated based on the correlation between detector gain and hit energy (e.g., the energy level at which electrons hit / enter the detector, also known as the electron energy entering the detector) and optionally hit current (e.g., the current level at which electrons hit / enter the detector, also known as the electron current entering the detector).

[0096] Figure 8 Examples of the correlation between detector gain, hit energy, and hit current are illustrated in certain embodiments of the subject matter of this disclosure. In the figure, the X-axis represents hit energy, and the Y-axis represents detector gain. The four dashed curves in the figure correspond to four different hit currents. This correlation may reflect the empirical dependence of detector gain on the energy and current of the incoming electrons to the detector. This correlation can help select optimal imaging conditions to meet the performance requirements of different applications (e.g., detecting features of interest such as defects, or being sensitive enough to detect dimensional anomalies, such as in CD measurements). By incorporating this correlation into simulations, the signal strength detected by the detector under each tool imaging configuration can be predicted more accurately.

[0097] A signal profile of interest (MOI) is generated for each tool image configuration. This profile represents the intensity or count rate of detected electrons as a function of various tool image parameters, such as detector gain, voltage, and detector offset. By analyzing the signal profiles obtained for different tool image configurations, the imaging performance and measurement sensitivity of the electron beam tool under various conditions can be evaluated.

[0098] Figure 6 Examples of signal profiles generated by a second simulation are shown in certain embodiments of the subject matter of this disclosure.

[0099] Continue with Figure 5 For example, Figure 602 shows the signal profile obtained when the landing energy is 50 keV. Figure 5 Output mapping analysis can provide optimal signal strength and sensitivity. The signal profile represents the signal strength on the surface of the V-NAND sample. The X-axis of Figure 602 represents the distance along the scan line on the V-NAND sample surface, while the Y-axis represents the signal strength (or the number of electrons detected). Figure 602 contains three signal profile curves, each corresponding to a different detector gain setting. Specifically, curve 602 corresponds to detector gain 1, curve 604 corresponds to detector gain 2, and curve 606 corresponds to detector gain 3.

[0100] Detector gain refers to the amplification factor applied to the signal detected by the detector in an imaging system. In electron beam imaging, detector gain determines the degree to which the detected signal is amplified before being processed and displayed as an image or signal profile. Higher detector gain amplifies the detected signal more, enhancing the detector's sensitivity to low-intensity signals. This can improve the visibility of features in the image sample, especially those with low contrast or low electron density. However, increasing detector gain also amplifies noise and background signals, which can degrade image quality and reduce the ability to distinguish between signal and noise. Therefore, the choice of detector gain involves a trade-off between signal amplification and noise amplification.

[0101] Curves 602, 604, and 606 depict the signal intensity variation along the scan line under different detector gain configurations. Different detector gain settings were tested to determine which configuration provides the optimal contrast for accurate detection of overlap between the upper channel aperture and the lower material layer.

[0102] In Figure 600, the contrast at the two X and Y positions can be calculated from the signal profile. Figure 610 shows the contrast calculated (e.g., average contrast) under three detector gains. Taking this as an example, it can be seen from Figure 610 that detector gain 2 provides the best contrast at the X and Y positions, which is optimal for measuring the overlap between the upper channel aperture and material 1. Optimization of detector gain can help improve the accuracy and reliability of overlap measurements in semiconductor manufacturing processes.

[0103] It should be noted that although the second simulation performed to derive Figure 600 was conducted at a given ground energy of 50 keV, this is for illustrative and demonstrative purposes only and should not be considered as limiting the present disclosure. While it may be more efficient to consider the insights from the first simulation (e.g., the ground energy of 50 keV provides optimal signal strength and sensitivity in the first simulation) when performing the second simulation, in some cases, the second simulation can be performed separately at a variety of different ground energy ranges, such as those used in the first simulation, like... Figure 5 As shown. In some cases, the second simulation can also be based on more tool image parameters, in addition to, for example... Figure 6 The detector gain is shown in the figure. In this case, the signal profile can be represented in a multidimensional parameter space.

[0104] In some implementations, the first simulation focuses on modeling the interaction between the irradiated electrons and the sample, while the second simulation aims to simulate the collection and detection of escaped electrons under various tool imaging configurations; these can be integrated into a comprehensive simulation framework. This comprehensive simulation can fully optimize tool configurations characterized by master beam parameters and tool imaging parameters.

[0105] The comprehensive simulation framework models the entire electron-solid interaction process, including the irradiation of electrons by the main beam tool, their interaction with the sample, and the subsequent collection and detection of escaped electrons under various tool imaging configurations. This comprehensive modeling approach captures the complex interactions between main beam parameters and tool imaging parameters, providing insights into their combined impact on signal intensity, contrast, and measurement sensitivity.

[0106] Through possible iterations, the comprehensive simulation explored a wide range of tool configurations characterized by different combinations of master beam parameters and tool image parameters. By systematically varying these parameters, the simulation aimed to identify the optimal configurations to maximize signal contrast, improve measurement sensitivity, and enhance image performance for specific measurements and / or sample types.

[0107] The comprehensive simulation generates output data, such as signal profiles or images, representing the sample characteristics measured under each tool configuration (characterized by master beam parameters and / or tool image parameters). For example, Figure 620 shows signal profiles directly acquired at a range of different landing energies (which are the master beam parameters). The X-axis of Figure 620 represents the distance along the scan line on the V-NAND sample surface, while the Y-axis represents the signal-to-noise ratio (SNR) of the detected signal. Specifically, Figure 620 includes seven signal profile curves, each corresponding to a different landing energy setting (from top to bottom). Specifically, the curves from top to bottom correspond to landing energies of 150, 100, 70, 60, 50, 4, and 20 keV.

[0108] Similarly, Figure 630 shows the contrast calculated over the fall-through energy range at the X and Y positions. For example, it can be seen from Figure 630 that a fall-through energy of 50 keV provides the best contrast when measuring the overlap between the upper channel aperture and material 1.

[0109] It should be understood that the simulated signal profiles under different landing energies, as shown in Figure 620, are for illustrative purposes only. While this example focuses on the variation of a single principal beam parameter, i.e., the landing energy, it is understood that tool configuration optimization typically involves multiple parameters, including principal beam parameters and tool image parameters. Simulations of tool configurations characterized by multiple parameters, such as combinations of principal beam parameters and tool image parameters, result in a multidimensional representation of the signal profile in parameter space. Due to the complexity of visualizing multidimensional data in the figures, this example simplifies the illustration by focusing on the variation of a single principal beam parameter. It is expected that those skilled in the art will understand that even showing only a variation of one parameter can be understood as representative of simulations based on multiple parameters.

[0110] The integrated simulation approach offers several advantages, including a more comprehensive understanding of the impact of different tool parameters, improved efficiency in parameter optimization, and potential improvements in the accuracy of image prediction results.

[0111] Continue describing Figure 2 After the second simulation is completed, an image recipe (208) can be created for the electron beam tool (e.g., performed by the recipe creation module 108). The image recipe includes a set of master beam parameters and a set of tool image parameters configured to have values ​​that achieve the optimal contrast of the MOI in the signal profile.

[0112] Based on the signal profile obtained from the second simulation, parameter values ​​that maximize MOI contrast are identified. This may involve analyzing the effects of different master beam parameters (e.g., ground energy, beam resolution, and current amplitude) and tool imaging parameters (e.g., detector angle, gain, and electrostatic field) on signal strength and contrast.

[0113] For example, when analyzing Figure 6 When analyzing the signal profile in Figure 600, it can be concluded that, in this example, the optimal contrast of MOI can be obtained when the detector gain is 2 and the grounding energy is 50 keV. Furthermore, when analyzing the output of the first simulation, as... Figure 5Figure 502 shows that a polar angle range of 20 to 60 degrees and an escape electron energy level of 20 keV to 40 keV provide optimal signal contrast and sensitivity. Therefore, it can be deduced that a detector with a polar angle within a selected range of 20 to 60 degrees (also known as a side detector), equipped with an energy filter to capture escape electrons with energy levels between 20 keV and 40 keV (or an energy filter to filter out escape electrons with unnecessary energy levels), should be used to achieve optimal image detection of the sample.

[0114] Figure 7 Schematic diagrams are provided to illustrate detectors and energy filters for optimal image detection samples according to certain embodiments of the subject matter of this disclosure.

[0115] Schematic diagram 700 shows two detectors collecting escaped electrons from the channel aperture of the sample. Detector 1 is a top detector located at a 0-degree polar angle relative to the optical axis. This detector collects electrons emitted from the sample in a direction perpendicular to the sample surface. It is commonly used to detect secondary electrons (SE) and provides valuable information about the surface morphology.

[0116] Detector 2 is a side detector located at a polar angle of approximately 30 degrees. This detector collects electrons emitted from the sample at a given polar angle. It is particularly effective for detecting backscattered electrons (BSE) and provides insights into variations in the material composition and density within the sample. (The above...) Figure 5 In the example, detector 2 is located within the polar angle range of 20 to 60 degrees, which provides the best signal strength / sensitivity, and should therefore be selected for the collection and detection of image signals.

[0117] Figure 710 is a revision of Figure 502, which uses two energy filters (labeled EF) to filter out unwanted energy levels of escaping electrons, ensuring that only electrons within the desired energy range are detected and analyzed. These two energy filters can be implemented, for example, using bandpass filters. Specifically, the lower energy filter filters out electrons with energy levels below the desired range (e.g., 10-20 keV), preventing them from reaching the detector, while the higher energy filter filters out electrons with energy levels above the desired range (e.g., above 40 keV), eliminating interference from high-energy electrons in the signal detection process.

[0118] Despite Figure 7 Not shown, the detector gain of the electron beam tool can also be configured to detector gain 2, while the landing energy can be configured to 50 keV, which provides optimal contrast for the MOI. The selection of the side detector, two energy filters, detector gain, and landing energy can be included in the image recipe that can be used to configure the electron beam tool to provide optimal contrast for the MOI (e.g., overlay measurements) when the tool is used to scan the SOI.

[0119] from Figure 2 The image recipes generated in the recommended process are called wafer-free recipes, which are created without acquiring and scanning the actual SOI, thus improving the time required for recipe creation.

[0120] Turn now Figure 3 The figure shows a general flowchart of using the created image recipe according to certain embodiments of the subject matter of this disclosure.

[0121] The image formulations and simulation data generated from the proposed solutions provide a variety of applications and functionalities at every stage of semiconductor manufacturing and inspection processes.

[0122] In some implementations, the electron beam tool can be configured (302) according to a created image recipe. This configured tool can be used at runtime to acquire (304) images of a running sample to be inspected. By applying optimized parameter values ​​specified in the image recipe, consistency and reliability of image performance can be ensured, thereby facilitating accurate analysis and feature identification of semiconductor materials and devices.

[0123] Optionally, simulation data from the (306) first and / or second simulations (e.g., simulation results from the first / second simulations) can be used to provide feedback to the manufacturer regarding the optimization of the material and / or structural properties of the SOI to be manufactured in the future. The material and / or structural properties should be optimized to improve / facilitate the inspection process using electron beam tools. By analyzing the relationships between physical properties, imaging parameters, and signal characteristics, the manufacturer can identify opportunities to optimize material and structural design / properties when designing / manufacturing future SOIs, which can improve electron beam tool compatibility and imaging performance, thereby enhancing inspection performance. For example, based on simulation results, a customer can add materials with high atomic numbers to the stack of samples to improve material contrast.

[0124] Selectively, simulation data from the first and / or second simulations can be used to design new electron beam tools with one or more tool parameters configured with one or more selected values. For example, insights gained from the simulations can inform the selection of tool parameters and configurations for optimization to specific imaging tasks and / or analytical needs. By designing electron beam tools with tailored features / parameters, imaging efficiency and effectiveness in semiconductor analysis and manufacturing processes can be improved. For instance, an electron beam tool can be designed with a side detector positioned at a selected polar angle to receive escape electrons at that angle, which has been shown (e.g., through the first simulation) to provide optimal signal strength / sensitivity and achieve optimal contrast in MOI. Integrating simulation data into the design process enables the development of next-generation electron beam tools with improved performance and versatility.

[0125] The proposed simulation-based framework can be applied to various semiconductor structures and manufacturing processes, including but not limited to V-NAND manufacturing, to optimize tool configuration and enhance imaging capabilities.

[0126] It is important to note that the examples shown in this disclosure, such as example structures, simulation diagrams, various tool parameters and their specific configurations, are for illustrative purposes only and should not be considered as any limitation on this disclosure. Other suitable examples / implementations can be used to supplement or replace the foregoing.

[0127] One of the advantages of certain embodiments of the subject matter of this disclosure is that it provides an automated recipe creation / optimization system capable of creating wafer-free recipes without the need to acquire and scan the actual SOI, thereby improving the time required for recipe creation.

[0128] Compared to traditional formulation creation methods that require significant resources, such as materials, equipment, and labor, thus introducing delays in formulation development and implementation, the proposed solution utilizes a simulation-based approach to generate image-based formulations directly from simulation models of electron-solid interactions and signal collection / detection. This solution bypasses the need for physical samples, enabling rapid formulation development and optimization while significantly reducing costs. By leveraging simulation, it reduces reliance on experimental trial-and-error in formulation development and optimization.

[0129] Furthermore, wafer-free formulation methods improve the efficiency and flexibility of semiconductor manufacturing processes. Unconstrained by the availability and handling of physical samples, simulation-based methods allow for rapid iteration of different tool configurations, experimental parameter settings, and optimization of image formulations to meet specific performance requirements.

[0130] A further advantage of certain embodiments of this disclosure is the combined use of a first simulation and a second simulation, wherein the first simulation predicts the initial characteristics of the transmitted signal based on electron-solid interaction, while the second simulation predicts the final signal profile collected by the detector under different tool configurations. The correlation and combination of these two simulations simplifies the exploration of the parameter space by providing a structured framework for evaluating the impact of various parameters on image performance.

[0131] In particular, the second simulation builds upon the first, allowing for precise fine-tuning of tool imaging parameters such as detector angle, gain, and electrostatic field to optimize signal acquisition and detection. This level of control enhances sensitivity, resolution, and the overall quality of the imaging results, leading to more accurate analysis and characterization of semiconductor materials and devices.

[0132] It can generate customized signal profiles on a specific SOI for a specific MOI by simulating signal collection under different tool configurations. This capability allows image formulations to be tailored to the unique characteristics of the sample / measurement, ensuring optimal contrast, sensitivity, and image performance to meet diverse application needs.

[0133] Furthermore, by analyzing the results of the second simulation, manufacturers gained valuable insights into the design and development of next-generation electron beam tools. This simulation highlighted the importance of specific tool parameters and configurations in achieving optimal imaging results, guiding the design of innovative features and functions to enhance tool performance and improve market competitiveness.

[0134] It should be understood that this disclosure is not limited to the details set forth herein or the contents of the accompanying drawings.

[0135] Numerous specific details are set forth in this detailed description in order to provide a thorough understanding of the disclosure. However, those skilled in the art will understand that the subject matter of this disclosure can be practiced without these specific details. In other instances, known methods, procedures, components, and circuits have not been described in detail so as not to obscure the subject matter of this disclosure.

[0136] Unless otherwise expressly stated, based on the present discussion, it should be understood that terms used in the specification, such as “acquire,” “check,” “execute,” “simulate,” “create,” “configure,” “measure,” “provide,” “optimize,” “enable,” or similar terms, refer to computer operations and / or processes that manipulate and / or convert data into other data, which are expressed as physical quantities, such as electronic quantities, and / or as physical objects.

[0137] The term "computer" or "computer-based system" should be broadly interpreted to encompass any type of hardware-based electronic device having data processing circuitry (e.g., digital signal processor (DSP), graphics processing unit (GPU), field-programmable gate array (FPGA)), including but not limited to, the inspection system, recipe creation / optimization system, and their components disclosed in this application. Data processing circuitry (also referred to as processing circuitry) may include, for example, one or more processors operatively connected to computer memory, in which executable instructions are loaded to perform the operations described later. Data processing circuitry encompasses a single processor or multiple processors that may be located in the same geographical area, or at least partially in different areas, and can communicate with each other.

[0138] The one or more processors mentioned herein may represent one or more general-purpose processing devices, such as microprocessors, central processing units, or similar devices. More specifically, a given processor may be a Complex Instruction Set Computing (CISC) microprocessor, a Reduced Instruction Set Computing (RISC) microprocessor, a Very Long Instruction Word (VLIW) microprocessor, a processor implementing other instruction sets, or a processor implementing combinations of instruction sets. These one or more processors may also be one or more special-purpose processing devices, such as application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), digital signal processors (DSPs), network processors, or similar devices. These one or more processors are configured to execute instructions to perform the operations and steps discussed herein.

[0139] The memory mentioned here may include one or more of the following: internal memory, such as processor registers and cache, main memory, such as read-only memory (ROM), flash memory, dynamic random access memory (DRAM), such as synchronous DRAM (SDRAM) or Rambus DRAM (RDRAM), etc.

[0140] The terms “non-transitory memory” and “non-transitory storage medium” as used in this document should be broadly interpreted to cover any volatile or non-volatile computer memory applicable to the subject matter of this disclosure. These terms should be understood to include single or multiple media (e.g., centralized or distributed databases, and / or associated caches and servers) for storing one or more instruction sets. These terms should also include any medium capable of storing or encoding a set of instructions executable by a computer, enabling the computer to perform any one or more of the methods described in this disclosure. Therefore, these terms should include, but are not limited to, read-only memory (“ROM”), random access memory (“RAM”), disk storage media, optical disk storage media, flash memory devices, etc.

[0141] The term "sample" as used in this specification should be broadly interpreted to encompass any type of physical object or substrate, including wafers, masks, photomasks, and other structures, combinations, and / or portions thereof used in the manufacture of semiconductor integrated circuits, magnetic heads, flat panel displays, and other semiconductor fabrication articles. Samples are also referred to herein as semiconductor samples and can be produced by manufacturing equipment performing the appropriate manufacturing processes.

[0142] The term "inspection" as used in this specification should be broadly interpreted to encompass any operation relating to various types of defect detection, defect review and / or defect classification, segmentation and / or metrological operations, which may be performed during and / or after the sample manufacturing process. Inspection is provided by using non-destructive inspection tools during or after the sample manufacturing process. For example, the inspection process may include runtime scanning (single or multiple scans), imaging, sampling, inspection, review, measurement, classification and / or other operations related to the sample or portions thereof, and may use the same or different inspection tools. Similarly, inspection may also be provided prior to sample manufacturing and may include, for example, generating inspection formulations and / or other setup operations. It should be noted that, unless specifically stated otherwise, the term "inspection" or its derivatives as used in this specification are not limited to the resolution or size of the inspection area. Various non-destructive inspection tools include (but are not limited to) scanning electron microscopes (SEM), atomic force microscopes (AFM), optical inspection tools, etc.

[0143] The term “metrology operation” as used herein should be broadly interpreted to encompass any metrology operation procedure used to extract metrology information associated with one or more structural elements on a semiconductor sample. In some embodiments, metrology operations may include measurement operations, such as critical dimension (CD) measurements associated with certain structural elements on the sample, including but not limited to: dimensions (e.g., linewidth, line spacing, contact diameter, element size, edge roughness, grayscale statistics, etc.), element shape, distances within or between elements, relevant angles, overlap information associated with elements corresponding to different design layers, etc. Measurement results (e.g., measurement images) may be analyzed using image processing techniques. It should be noted that, unless specifically stated otherwise, the term “metrology” or its derivatives as used herein are not limited to measurement techniques, measurement resolution, or inspection area size.

[0144] The term “defect” as used in this specification should be broadly interpreted to encompass any anomaly or undesirable feature / function that forms on the sample. In some cases, a defect may be a Defect of Concern (DOI), which is an actual defect that has some impact on the function of the manufacturing equipment, and therefore it is meaningful for the customer to detect the defect. For example, any “fatal” defect that could lead to a loss of yield can be considered a DOI. In some other cases, a defect may be an annoyance (also known as a “false alarm” defect) because it has no impact on the function of a perfect device and does not affect yield.

[0145] As used in this specification, the term "defect candidate" should be broadly interpreted to encompass locations of suspected defects detected on a sample that have a relatively high probability of being considered a defect of concern (DOI). Therefore, a reviewed / tested DOI candidate may actually be a DOI, or in some other cases, it may be annoyance or random noise caused by variations during the inspection process (e.g., process variations, color variations, mechanical and electrical variations, etc.).

[0146] As used in this specification, the term "design data" should be broadly interpreted to encompass data covering any hierarchical physical design (layout) of an indicative sample. Design data may be provided by the respective designer and / or derived from the physical design (e.g., through complex simulations, simple geometry and Boolean operations, etc.). Design data may be provided in various formats; for example, non-limiting examples include GDSII format, OASIS format, etc. Design data may be presented in vector format, grayscale intensity image format, or other forms.

[0147] As used herein, the terms “image” or “image data” should be broadly interpreted to encompass any original image / frame of a sample captured by inspection tools during the manufacturing process, derivatives of captured images / frames acquired through various preprocessing stages, and / or computer-generated composite images (in some cases based on design data). Depending on the specific scanning method (e.g., one-dimensional scanning such as line scanning, two-dimensional scanning in the x and y directions, or point scanning at specific points, etc.), image data can be represented in different formats, such as as grayscale profiles, two-dimensional images, or discrete pixels, etc. It should be noted that in some cases, the image data referred to herein may include, in addition to images (e.g., captured images, processed images, etc.), data associated with the images (e.g., metadata, handcrafted attributes, etc.). Furthermore, images or image data may include data associated with processing steps / layers of interest, or multiple processing steps / layers of the sample.

[0148] It should be understood that, unless otherwise expressly stated, certain features of the subject matter of this disclosure, where described in different embodiments, may also be provided in a single embodiment in combination. Conversely, the description of certain features of the subject matter of this disclosure in a single embodiment may also be provided individually or in any suitable sub-combination. In this detailed description, numerous specific details are set forth in order to provide a complete understanding of the methods and apparatus.

[0149] In embodiments of the subject matter of this disclosure, the number of stages performed may be fewer, more, and / or different. Figure 2 and Figure 3 The stages of the method shown. In embodiments of the subject matter of this disclosure, Figure 2 and Figure 3One or more phases of the method shown may be executed in different orders, and / or one or more groups of phases may be executed simultaneously.

[0150] It should also be understood that, according to this disclosure, the system can also be implemented, at least in part, on a suitably programmed computer. Similarly, this disclosure contemplates a computer-readable computer program for performing the methods of this disclosure. This disclosure further contemplates a non-transitory readable computer memory, specifically embodied in a set of computer-executable instructions for performing the methods of this disclosure.

[0151] This disclosure is capable of other implementations and can be carried out and operated in various ways. Therefore, it should be understood that the wording and terminology used herein are for descriptive purposes only and should not be considered limiting. Consequently, those skilled in the art will understand that the concepts upon which this disclosure is based can be readily used as the basis for designing other structures, methods, and systems to achieve the various objectives of the subject matter of this disclosure.

[0152] Those skilled in the art will quickly understand that various modifications and alterations can be applied to embodiments of this disclosure without departing from the scope defined in the appended claims.

Claims

1. A computer system for automatically creating image recipes using an electron beam tool, the computer system comprising processing circuitry configured to: Obtain the material and structural properties of the semiconductor samples of interest (SOI) as input; Based on the input, a first simulation representing the interaction between the main beam irradiated electrons of the electron beam tool and the SOI is performed. The first simulation is performed under multiple main beam configurations, which are characterized by having different sets of values ​​for the main beam parameters to obtain a mapping of the polar angle and escape energy of the electron escape distribution for each main beam configuration. The mapping process performs a second simulation of collecting and detecting the escape electrons under different tool image configurations, characterized by having different sets of tool image parameters to obtain a signal profile of the measurement of interest (MOI) on the SOI for each tool image configuration; and Creating an image recipe for the electron beam tool includes the set of master beam parameters and the set of tool image parameters configured to have values ​​that achieve the optimal contrast of the MOI in the signal profile.

2. The computer system of claim 1, wherein the material properties include one or more of the following: the composition, density, and stoichiometric formula of the material constituting the sample; and wherein the structural properties include one or more of the following: the layer layout, thickness, and geometric dimensions of the structural features of each layer.

3. The computer system of claim 1, wherein the set of master beam parameters includes one or more of the following: ground energy, beam resolution, current amplitude, current density, electron source, and numerical aperture (NA) of the electron beam tool.

4. The computer system of claim 1, wherein the tool image parameter set includes one or more of the following: detector angle, detector gain, detector offset, electrostatic field, voltage, mechanical configuration, dwell time, scanning speed, pixel size, and energy filter of the electron beam tool, and the signal profile is represented in a multidimensional parameter space.

5. The computer system of claim 1, wherein the processing circuitry is configured to perform the second simulation by simulating the signal detected by the given detector based on the correlation between detector gain, energy, and the incoming electron current of the given detector.

6. The computer system of claim 1, wherein the image recipe is a wafer-free recipe, which is created without acquiring the actual SOI, thereby improving the time required for recipe preparation.

7. The computer system of claim 1, wherein the SOI is a vertical NAND (V-NAND), the MOI represents an overlap measurement between two consecutive layers, and wherein the image recipe includes at least a landing energy configured within a selected range and a side detector positioned at a polar angle within a selected range.

8. The computer system of claim 7, wherein the image formulation further comprises the side detector configured with a selected detector gain, and at least one energy filter configured to filter out escape electrons with unwanted energy levels.

9. The computer system of claim 1, wherein the simulation data of the first simulation and the second simulation can be used to design a new electron beam tool, the parameters of which are configured with selected values ​​that have been verified to produce the optimal contrast of the MOI.

10. The computer system of claim 1, wherein the simulation data of the first simulation and the second simulation can be used to provide feedback to the manufacturer to optimize the material and / or structural properties of future samples of interest (SOIs) to be manufactured, thereby enhancing the electron beam inspection process.

11. The computer system of claim 1, wherein the electron beam tool is one of the following: a defect inspection tool, a defect review tool, or a measurement tool.

12. A computer method for automatically creating image recipes for an electron beam tool, the method comprising: Obtain the material and structural properties of the semiconductor samples of interest (SOI) as input; Based on the input, a first simulation representing the interaction between the main beam irradiated electrons of the electron beam tool and the SOI is performed. The first simulation is performed under multiple main beam configurations, which are characterized by having different sets of values ​​for the main beam parameters to obtain a mapping of the polar angle and escape energy of the electron escape distribution for each main beam configuration. A second simulation is performed based on the mapping, which represents the collection and detection of the escape electrons under different tool image configurations, characterized by having different sets of tool image parameters to obtain a signal profile for the measurement of interest (MOI) on the SOI under each tool image configuration. as well as Creating an image recipe for the electron beam tool includes the set of master beam parameters and the set of tool image parameters configured to have values ​​that achieve the optimal contrast of the MOI in the signal profile.

13. The computer method of claim 12, wherein the material properties include one or more of the following: the composition, density, and stoichiometric formulation of the materials constituting the sample; and wherein the structural properties include one or more of the following: the layer layout, thickness, and geometric dimensions of the structural features.

14. The computer method of claim 12, wherein the set of master beam parameters includes one or more of the following: ground energy, beam resolution, current amplitude, current density, electron source, and numerical aperture (NA) of the electron beam tool.

15. The computer method of claim 12, wherein the tool image parameter set includes one or more of the following: detector angle, detector gain, detector offset, electrostatic field, voltage, mechanical configuration, dwell time, scan speed, pixel size, and energy filter of the electron beam tool, and the signal profile is represented in a multidimensional parameter space.

16. The computer method of claim 12, wherein performing the second simulation includes simulating a signal detected by the given detector based on a correlation between detector gain, energy, and the incoming electron current of the given detector.

17. The computer method of claim 12, wherein the image recipe is a wafer-free recipe, which is created without acquiring an actual SOI, thereby improving the time required for recipe preparation.

18. The computer method of claim 12, wherein the SOI is a vertical NAND (V-NAND), the MOI represents an overlap measurement between two consecutive layers, and wherein the image formulation includes at least a landing energy configured within a selected range and a side detector positioned at a polar angle within a selected range.

19. The computer method of claim 18, wherein the image formulation further comprises a side detector configured with the selected detector gain, and at least one energy filter configured to filter out escape electrons with unwanted energy levels.

20. A non-transitory computer-readable storage medium embodying a program of instructions, which, when executed by a computer, causes the computer to perform a method for automatically creating an image recipe for an electron beam tool, the method comprising: Obtain the material and structural properties of the semiconductor samples of interest (SOI) as input; Based on the input, a first simulation representing the interaction between the main beam irradiated electrons of the electron beam tool and the SOI is performed. The first simulation is performed under multiple main beam configurations, which are characterized by having different sets of values ​​for the main beam parameters to obtain a mapping of the polar angle and escape energy of the electron escape distribution for each main beam configuration. A second simulation is performed based on the mapping, which represents the collection and detection of the escape electrons under different tool image configurations, characterized by having different sets of tool image parameters to obtain a signal profile for the measurement of interest (MOI) on the SOI under each tool image configuration. as well as Creating an image recipe for the electron beam tool includes the set of master beam parameters and the set of tool image parameters configured to have values ​​that achieve the optimal contrast of the MOI in the signal profile.

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