COT Buck load transient detection circuit, COT Buck and switching power supply

Abstract

This invention discloses a load transient detection circuit for a COT Buck converter, along with a corresponding COT Buck and a switching power supply. The load transient detection circuit includes an input terminal, three resistors connected in series, two comparators, and a switched-capacitor sample-and-hold circuit. The input terminal is grounded after passing through the three resistors. The nodes between the input terminal and the first resistor, and between the second and third resistors, are connected to the input terminals of the first and second comparators via the switched-capacitor sample-and-hold circuit. The valley and peak voltage information of the inductor current is obtained through the switched-capacitor sample-and-hold circuit. By comparing the inductor current ripple with the valley and peak values, a transient change in the load is determined, ensuring that the switching power supply has a suitable transient detection trigger threshold voltage under any load. The COT Buck of this invention increases the on or off time based on the output signal of the load transient detection circuit to enhance the transient response speed.

Description

Technical Field

[0001] This invention relates to the field of switching power supply technology, specifically to a load transient detection circuit for a COT Buck and the corresponding COT Buck and switching power supply. Background Technology

[0002] Constant on-time (COT) control is an advanced switching power supply control technology that fixes the on-time (T) of the power switching transistor. on ), and adjust the turn-off time (T) based on the output voltage ripple or feedback signal. off This allows for voltage regulation. This control method has attracted considerable attention due to its fast load transient response and simplified loop compensation design, making it particularly suitable for applications with high dynamic performance requirements, such as powering digital loads like CPUs and FPGAs.

[0003] COT Buck refers to a COT-controlled Buck converter (step-down converter). Unlike traditional PWM pulse width modulation, the on-time of a COT Buck converter is fixed in each cycle. Instead, the duty cycle is changed by frequency modulation, thereby adjusting V. out .

[0004] Figure 1 This is a topology diagram of an existing Buck-type DC-DC switching power supply. Buck converters are widely used in DC-DC switching power supplies, such as in smartphones, laptops, car chargers, and portable smart devices, all of which rely on Buck converters for power supply. Because electronic devices have multiple operating states, such as sleep mode and active mode, the load needs to draw different and frequently changing currents from the power supply during mode switching. This requires the Buck converter to have a fast transient response capability; otherwise, excessive overshoot or sag voltage may cause problems such as abnormal device operation.

[0005] Figure 2 This is the control loop diagram of an existing COT Buck switching power supply. (Example:) Figure 2 As shown, when the COT Buck operates in steady state, the negative feedback loop will feedback voltage V. FB Stabilized at reference voltage V REF A nearby diagram. A common transient enhancement scheme for COT Buck is to monitor the feedback voltage V of the output voltage. FB When the load undergoes a transient change, the feedback voltage V FB It will deviate from the reference voltage V REF If the feedback voltage V FB With reference voltage V REF The difference is greater than a set threshold voltage V THIf a load step occurs in the circuit, the transient detection circuit will output an identification signal. After receiving the identification signal, the system will increase the bandwidth of the error amplifier EA and use asynchronous switching control to enhance the transient response speed.

[0006] By monitoring V FB With V REF Using the difference between V and V to determine whether the system is in a steady state is only applicable. out Applications requiring low ripple. If V out The amplitude of the ripple is large, and the ripple itself may falsely trigger the transient detection circuit.

[0007] Figure 3 These are waveforms of various signals in an existing Buck converter. For example... Figure 3 As shown, the system settings V REF =600mV, the transient detection voltage trigger threshold is ±10mV, but V in steady state FB The peak-to-peak ripple value has exceeded 20mV, triggering the transient detection indicators undershoot_det and overshoot_det in each cycle, which is unacceptable in this application. Although the trigger threshold voltage can be increased above the ripple amplitude, a larger threshold makes the transient monitoring circuit less responsive, reducing the effectiveness of transient response enhancement. Summary of the Invention

[0008] (a) Technical problems to be solved

[0009] The present invention aims to solve the problem that existing COT Buck circuits may erroneously trigger transient enhancement circuits when the output voltage ripple amplitude is large.

[0010] (II) Technical Solution

[0011] The first aspect of this invention proposes a load transient detection circuit for a COT Buck, comprising an input terminal connected to the sampling feedback current of the COT Buck. The load transient detection circuit further includes a first resistor, a second resistor, and a third resistor; the input terminal is grounded sequentially via the first resistor, the second resistor, and the third resistor; the node between the input terminal and the first resistor, and the node between the second and third resistors, are respectively connected to the input terminals of a first comparator and a second comparator via a switched-capacitor sample-and-hold circuit structure; the first comparator outputs a load transient upper limit indicator signal by comparing the voltage division at the node between the first and second resistors with the peak voltage of the voltage division after sample-and-hold; the second comparator outputs a load transient lower limit indicator signal by comparing the voltage division at the node between the first and second resistors with the valley voltage of the voltage division after sample-and-hold; the load transient upper limit indicator signal and the load transient lower limit indicator signal are respectively connected to the Ton module of the COT Buck and the control terminal of the PWM comparator.

[0012] According to a preferred embodiment of the present invention, the node between the input terminal and the first resistor is a first node, the node between the first resistor and the second resistor is a second node, and the node between the second resistor and the third resistor is a third node; the switched capacitor sample-and-hold circuit structure includes a first switch, a second switch, a third switch, a fourth switch, a first capacitor, a second capacitor, a third capacitor, and a fourth capacitor; the first node is connected to the negative input terminal of the first comparator in sequence via the first switch and the second switch; the third node is connected to the positive input terminal of the second comparator in sequence via the third switch and the fourth switch.

[0013] A second aspect of the present invention provides a COT Buck, comprising a load transient detection circuit, an error amplifier, a PWM comparator, a Ton module, a drive circuit and a switching transistor, an inductor and an inductor current sampling circuit, wherein the load transient detection circuit adopts the load transient detection circuit described above.

[0014] According to a preferred embodiment of the present invention, the positive input terminal of the error amplifier is connected to a reference voltage, the negative input terminal is connected to a feedback voltage, and the output terminal is connected to the positive input terminal of the PWM comparator.

[0015] According to a preferred embodiment of the present invention, the negative input terminal of the PWM comparator is also connected to the feedback voltage, and its output terminal is connected to the Ton module.

[0016] According to a preferred embodiment of the present invention, the output terminal of the Ton module is connected to the input terminal of the driving circuit and the switching transistor, and the output terminal of the driving circuit and the switching transistor is connected to the output and load of the COT Buck through the inductor.

[0017] According to a preferred embodiment of the present invention, the sampling node is grounded through an output and the feedback voltage is obtained through a resistor voltage divider.

[0018] A third aspect of the present invention provides a switching power supply, including the aforementioned COT Buck.

[0019] (III) Beneficial Effects

[0020] This invention determines whether a transient response has occurred by monitoring the inductor current, without requiring the detection of the output voltage V. out .

[0021] This invention obtains the valley voltage V using a switched capacitor sample-and-hold circuit. ISNS_L and peak voltage V ISNS_H It is acquired in real time based on the magnitude of the inductor current, which can ensure that there is a suitable transient detection trigger threshold voltage under any load. Attached Figure Description

[0022] Figure 1 This is a topology diagram of an existing Buck-type DC-DC switching power supply.

[0023] Figure 2 This is the control loop diagram of an existing COT Buck switching power supply.

[0024] Figure 3 These are the signal waveforms of the existing COT Buck in a switching power supply.

[0025] Figure 4 This is the circuit diagram of the COT Buck of the present invention.

[0026] Figure 5 This is a schematic diagram of the load transient detection circuit of the COT Buck of the present invention, that is, a structural schematic diagram of the transient enhancement circuit of the present invention.

[0027] Figure 6 The valley voltage V of the COT Buck during stable operation is the same as that of the present invention. ISNS_L Voltage divider V ISNS Peak voltage V ISNS_H A waveform diagram.

[0028] Figure 7 The COT Buck of this invention provides the valley voltage V during load changes. ISNS_L Voltage divider V ISNS Peak voltage V ISNS_H A waveform diagram.

[0029] Figure 8 and Figure 9The COT Buck of this invention demonstrates the transient response simulation results for light load to heavy load and heavy load to light load transitions. Detailed Implementation

[0030] To address the aforementioned technical problems, this invention proposes a load transient detection circuit for a COT Buck converter, a corresponding COT Buck converter, and a corresponding switching power supply. The load transient detection circuit constitutes the transient detection of the load in the COT Buck converter, with its input terminal connected to the sampling feedback current of an inductor L. The load transient detection circuit of this invention includes three resistors connected in series and two comparators, with the input terminal grounded sequentially via the three resistors. The node between the input terminal and the first resistor, and the node between the second and third resistors, are connected to the input terminals of the first and second comparators via a switched-capacitor sampling and holding circuit structure.

[0031] A voltage (V) will be generated at the node between the first resistor and the second resistor. ISNS This voltage is the voltage information of the inductor current. The first comparator compares V... ISNS With V ISNS The peak voltage sampled and held is used to output a load transient upper limit indicator signal (undershoot_det); the second comparator compares V... ISNS With V ISNS The sampled and held valley voltage is used to output a load transient lower limit indicator signal (overshoot_det). The indicator signals (undershoot_det) and (overshoot_det) are then connected to the control terminals of the Ton module and the PWM comparator of the COT Buck, respectively.

[0032] I obtained through the switched capacitor sample-and-hold circuit L The valley and peak voltage information is collected in real time based on the magnitude of the inductor current, which ensures that there is a suitable transient detection trigger threshold voltage under any load.

[0033] To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to specific embodiments and accompanying drawings.

[0034] Figure 4 This is the circuit diagram of the COT Buck of this invention. Figure 4 As shown, the COT Buck of the present invention includes a load transient detection circuit, an error amplifier EA, a PWM comparator, a Ton module, a drive circuit and a switching transistor, an inductor L, and an inductor current sampling circuit.

[0035] EA is the error amplifier, and its positive input terminal is connected to the reference voltage V. REFThe negative input terminal is connected to the feedback voltage V of the COT Buck circuit. FB Its output is connected to the positive input of a PWM comparator (pulse width modulation comparator). The negative input of the PWM comparator is also connected to the feedback voltage V. FB Its output is connected to the Ton module. The output of the Ton module is connected to the input of the drive circuit and the switching transistor. The output of the drive circuit and the switching transistor is connected to the load (the part within the dashed box) through an inductor L. The sampling current of the inductor L is β*I. L β is the current feedback coefficient. The output node outputs the feedback voltage V through a resistor divider. FB .

[0036] The transient enhancement circuit of this invention has one input terminal and two output terminals. The input terminal is the inductor current sampling information I. L *β, while the two output terminals output the load transient upper limit indicator signal undershoot_det and the load transient lower limit indicator signal overshoot_det, respectively, which are connected to the control terminals of the Ton module and the PWM comparator.

[0037] When the load of the transient enhancement circuit of the COT Buck undergoes a transient change, the two output signals of the load transient detection circuit, the load transient upper limit indicator signal undershoot_det and the load transient lower limit indicator signal overshoot_det, can control the Ton module and the PWM comparator respectively to speed up the loop response.

[0038] Figure 5 This is a schematic diagram of the load transient detection circuit of the COT Buck according to the present invention. Figure 5 As shown, the transient enhancement circuit includes three resistors, four switches, four capacitors, and two comparators. The three resistors are R1, R2, and R3. The four switches are SW1, SW2, SW3, and SW4. The four capacitors are C1, C2, C3, and C4. The two comparators are COMP1 and COMP2.

[0039] The input terminal of the transient enhancement circuit is grounded after passing through a first resistor R1, a second resistor R2, and a third resistor R3 in sequence. The magnitude of the input current is I. L *β, where β is the sampling feedback coefficient.

[0040] The node between the input terminal and the first resistor R1 is designated as node S1, the node between the first resistor R1 and the second resistor R2 is designated as node S2, and the node between the second resistor R2 and the third resistor R3 is designated as node S3. Node S1 is connected to the negative input terminal of the first comparator COMP1 via the first switch SW1 and the second switch SW2. Node S3 is connected to the positive input terminal of the second comparator COMP2 via the third switch SW3 and the fourth switch SW4. The output terminals of the first comparator COMP1 and the second comparator COMP2 output the load transient upper limit indicator signal undershoot_det and the load transient lower limit indicator signal overshoot_det, respectively.

[0041] The node between the first switch SW1 and the second switch SW2 is grounded via the first capacitor C1; the node between the second switch SW2 and the negative input terminal of the first comparator COMP1 is grounded via the second capacitor C2; the node between the third switch SW3 and the fourth switch SW4 is grounded via the third capacitor C3; and the node between the fourth switch SW4 and the positive input terminal of the second comparator COMP2 is grounded via the fourth capacitor C4. This forms a switched-capacitor sample-and-hold circuit structure, which can be used to hold the peak or valley value of the voltage.

[0042] Specifically, the voltage generated at the second node S2 is denoted as the voltage divider V. ISNS This transient enhancement circuit samples the current I of the output inductor L. L A triangular wave voltage divider V is generated at the second node. ISNS The peak voltage V is maintained by a switched-capacitor sampling and holding circuit structure. ISNS_H Valley voltage V ISNS_L Under steady state, the relationship between these three voltage signals should satisfy: V ISNS_L ≤V ISNS ≤V ISNS_H The function of the first resistor R1 and the second resistor R2 is to provide the actual voltage V. ISNS The peak and valley values ​​provide a trigger threshold voltage V offset This prevents the first comparator COM1 and the second comparator COM2 from being triggered erroneously.

[0043] The first switch SW1 and the third switch SW3 are turned on for 10ns at the end of Ton and the beginning of Ton, respectively, to control V. ISNS Sampling is performed, and the voltage V is divided. ISNS The peak voltage is stored in C1, and the voltage is divided by V. ISNSThe valley voltage is stored in C3. After sampling by the first switch SW1 and the third switch SW3, the second switch SW2 and the fourth switch SW4 are turned on. The first capacitor C1 and the second capacitor C2 share charge, and the third capacitor C3 and the fourth capacitor C4 share charge, forming the final peak voltage V. ISNS_H And valley voltage V ISNS_L Charge-shared sampling has an integral effect, and the sampled voltage does not jump, reducing the probability of false triggering. Peak voltage V ISNS_H Connect to the negative input terminal of the first comparator COMP1, the valley voltage V ISNS_L Connect to the positive input of the second comparator COMP2. Voltage divider V ISNS (Second node S2) is connected to the positive input of the first comparator COMP1 and the negative input of the second comparator COMP2.

[0044] Figure 6 The valley voltage V of the COT Buck during stable operation is the same as that of the present invention. ISNS_L Voltage divider V ISNS Peak voltage V ISNS_H A waveform diagram. (For example...) Figure 6 As shown, the steady-state voltage V ISNS The peak and valley values ​​are equal in each cycle, so the valley voltage V ISNS_L and peak voltage V ISNS_H It also remains constant, except that it is different from the partial pressure V. ISNS The difference between the valley and the peak values ​​is a trigger threshold voltage V. offset .

[0045] Figure 7 The COT Buck of this invention provides the valley voltage V during load changes. ISNS_L Voltage divider V ISNS Peak voltage V ISNS_H A waveform diagram. (For example...) Figure 7 As shown, at times t1 and t3, the partial voltage V ISNS The valley voltage V was touched ISNS_L The load transient lower limit indicator signal overshoot_det is set to 1, and the fourth switch SW4 in the transient enhancement circuit remains normally open. At times t2 and t4, the voltage divider V... ISNS The valley voltage V is obtained by directly storing it into C4 during valley sampling. ISNS_L Because during the transient response, the valley voltage V ISNS_L and peak voltage V ISNS_H It is necessary to capture the voltage V of the voltage divider in each cycle. ISNS Only by understanding the valley and peak values ​​can the correct trigger threshold voltage V be obtained. offset .

[0046] The transient response of a COT Buck circuit can be divided into the following two cases:

[0047] During the switching cycle when the load changes from light load to heavy load, V ISNS It may be greater than the peak voltage V. ISNS_H The first comparator COMP1 outputs a high level, meaning the load transient limit indicator signal undershoot_det = 1. This load transient limit indicator signal controls Ton to increase, thus increasing Duty and suppressing the output voltage V. out The undershoot.

[0048] During the switching cycle when the load changes from heavy load to light load, V ISNS Possibly less than V ISNS_L The second comparator COMP2 outputs a high level, meaning the load transient lower limit indicator signal overshoot_det = 1. This load transient lower limit indicator signal adds a trigger threshold offset to the input of the PWM comparator, causing the turn-off time T to be adjusted. off Increase to decrease V out The upward overshoot.

[0049] Figure 8 and Figure 9 The COT Buck of this invention demonstrates transient response simulation results for transitions from light load to heavy load and from heavy load to light load. For example... Figure 8 and Figure 9 As shown, the output voltage V out The dashed line represents the simulation results without a load transient detection circuit. It is evident that adding the load transient detection circuit effectively suppresses the output voltage V. out The undershoot and overshoot functions improve response speed.

[0050] As can be seen from the above, this invention eliminates the conjugate poles of the output stage LC circuit by enhancing the transient voltage, thus possessing inherent stability and reducing the likelihood of overshoot in the circuit. Using this control method, the output voltage V... out There is no limit to the size of the ripples.

[0051] It should be noted that the transient enhancement circuit of the present invention is also applicable to peak current mode Buck.

[0052] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above descriptions are merely specific embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A load transient detection circuit of COT Buck, comprising an input terminal connected to the sampling feedback current of COT Buck, characterized in that: the load transient detection circuit further comprises a first resistor (R1), a second resistor (R2) and a third resistor (R3); the input terminal is connected to ground via the first resistor (R1), the second resistor (R2) and the third resistor (R3) in sequence; the node between the input terminal and the first resistor (R1), the node between the second resistor (R2) and the third resistor (R3) are connected to the input terminals of the first comparator and the second comparator respectively through a switched-capacitor sample-and-hold circuit structure; The first comparator (COMP1) outputs a load transient upper limit identification signal (overshoot_det) by comparing the peak voltage (V ISNS_H ) sampled and held by the peak voltage (V ISNS ) of the node between the first resistor (R1) and the second resistor (R2) and the peak voltage (V ISNS ). The second comparator (COMP2) outputs a load transient lower limit identification signal (overshoot_det) by comparing the divided voltage (V ISNS ) of the node between the first resistor (R1) and the second resistor (R2) with the valley voltage (V ISNS ) of the sampled and held voltage (V ISNS_L ). the load transient upper limit identification signal (undershoot_det) and the load transient lower limit identification signal (overshoot_det) are connected to the Ton module of COT Buck and the control terminal of PWM comparator respectively.

2. The load transient detection circuit of COT Buck according to claim 1, characterized in that: the node between the input terminal and the first resistor (R1) is a first node (S1), the node between the first resistor (R1) and the second resistor (R2) is a second node (S2), and the node between the second resistor (R2) and the third resistor (R3) is a third node (S3); the switched-capacitor sample-and-hold circuit structure comprises a first switch (SW1), a second switch (SW2), a third switch (SW3), a fourth switch (SW4), a first capacitor (C1), a second capacitor (C2), a third capacitor (C3) and a fourth capacitor (C4); the first node (S1) is connected to the negative input terminal of the first comparator (COMP1) via the first switch (SW1) and the second switch (SW2) in sequence; the third node (S3) is connected to the positive input terminal of the second comparator (COMP2) via the third switch (SW3) and the fourth switch (SW4) in sequence.

3. A COT Buck, comprising a load transient detection circuit, an error amplifier (EA), a PWM comparator, a Ton module, a driving circuit and a switch tube, an inductor (L) and a load, characterized in that, The load transient detection circuit of claim 1 or 2.

4. The COT Buck of claim 3, wherein, The positive input terminal of the error amplifier (EA) is connected to a reference voltage (V REF ), the negative input terminal is connected to a feedback voltage (V FB ), and the output terminal is connected to the positive input terminal of the PWM comparator.

5. The COT Buck of claim 4, wherein, The negative input of the PWM comparator is also connected to the feedback voltage (V FB ) whose output is connected to the Ton module.

6. The COT Buck of claim 5, wherein, The output of the Ton module is connected to the input of a drive circuit and a switch transistor, the output of the drive circuit and the switch transistor being connected to the output (V out ) and the load of the COT Buck via the inductance (L).

7. The COT Buck of claim 6, wherein, The output (V out ) is grounded through a load and the feedback voltage (V FB ) is obtained through a resistive voltage division.

8. A switching power supply, characterized by The COT Buck of any one of claims 3 to 7. The COT Buck of any one of claims 3 to 7.

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