Power distribution methods, devices, equipment and media for asymmetric inverter systems

Abstract

This invention discloses a power distribution method, apparatus, device, and medium for an asymmetric inverter system, comprising: acquiring the total voltage modulation wave and weighting factor of the asymmetric inverter system; according to a preset carrier modulation method; converting a triangular carrier into an upper carrier and lower carrier used by a three-level inverter, converting the triangular carrier into an intermediate carrier used by a two-level inverter; within one modulation wave cycle, when the weighting factor is greater than the instantaneous amplitude of the weighted triangular wave, clamping the voltage of the two-level inverter to a first maximum voltage modulation wave according to the amplitude of the intermediate carrier; calculating the compensation voltage modulation wave of the three-level inverter according to the total voltage modulation wave; when the weighting factor is less than the instantaneous amplitude of the weighted carrier, clamping the voltage of the three-level inverter to a second maximum voltage modulation wave; and calculating the compensation voltage modulation wave of the two-level inverter according to the total voltage modulation wave. This enables dynamic management of flexible power distribution.

Description

Technical Field

[0001] This invention relates to the field of power distribution technology, and in particular to a power distribution method, apparatus, device and medium for an asymmetric inverter system. Background Technology

[0002] Open-winding permanent magnet synchronous motor (OW-PMSM) dual-inverter systems have become a research hotspot in fields such as new energy vehicles due to their high voltage utilization, control flexibility, and strong fault tolerance. Asymmetric dual-inverter schemes achieve a good balance between cost and performance. In this system, to achieve active energy management between the two power sources, the active power of the dual inverters must be independently and flexibly controlled.

[0003] Existing technologies typically employ linear strategies such as 180° decoupling modulation. This method uses mathematical decoupling to decompose the reference voltage into independent vectors with a 180-degree phase difference, thereby achieving stable system control and distributing the power of the inverters on both sides using a fixed decoupling coefficient.

[0004] However, the above methods rely on complex mathematical decoupling operations and the decoupling coefficients are usually within a small range, lacking a flexible and independent control dimension, making it difficult to achieve dynamic management of flexible power allocation under complex operating conditions. Summary of the Invention

[0005] This invention provides a power allocation method, apparatus, device, and storage medium for an asymmetric inverter system, to solve the technical problem of dynamic management for flexible power allocation of asymmetric inverters under complex operating conditions in the prior art.

[0006] In a first aspect, embodiments of the present invention provide a power distribution method for an asymmetric inverter system, comprising:

[0007] The total voltage modulation waveform and user-set weighting factors are obtained during the operation of the asymmetric inverter system, wherein the asymmetric inverter includes a two-level inverter and a three-level inverter;

[0008] A modulation triangular carrier is generated according to a preset carrier modulation method, and a weighted triangular carrier is generated according to the value range of the weighting factor.

[0009] The triangular carrier wave is converted into an upper carrier and a lower carrier wave used by a three-level inverter, and the triangular carrier wave is converted into an intermediate carrier wave used by a two-level inverter. The upper carrier wave, the intermediate carrier wave, and the lower carrier wave are used to provide a unified modulation reference and clamping level for the asymmetric inverter.

[0010] Within one modulation wave cycle, when the weighting factor is greater than the instantaneous amplitude of the weighted triangular wave, the voltage of the two-level inverter is clamped to the first maximum voltage modulation wave according to the amplitude of the intermediate carrier. The compensation voltage modulation wave of the three-level inverter is calculated according to the total voltage modulation wave. The first maximum voltage modulation wave is the limit value of the voltage amplitude modulated by the intermediate carrier.

[0011] When the weighting factor is less than the instantaneous amplitude of the weighted triangular wave, the voltage of the three-level inverter is clamped to the second maximum voltage modulation wave according to the amplitude of the upcarrier and downcarrier waves. The compensation voltage modulation wave of the two-level inverter is calculated according to the total voltage modulation wave. The second maximum voltage modulation wave is the limit value of the voltage amplitude modulated by the upcarrier and downcarrier waves.

[0012] Secondly, embodiments of the present invention also provide a power distribution device for an asymmetric inverter system, comprising:

[0013] The acquisition module is used to acquire the total voltage modulation waveform and the weighting factor set by the user during the operation of the asymmetric inverter system. The asymmetric inverter includes a two-level inverter and a three-level inverter.

[0014] The generation module is used to generate a modulation triangular carrier according to a preset carrier modulation method, and to generate a weighted triangular carrier according to the value range of the weighting factor.

[0015] The conversion module is used to convert the triangular carrier into an upper carrier and a lower carrier used by a three-level inverter, and to convert the triangular carrier into an intermediate carrier used by a two-level inverter. The upper carrier, intermediate carrier, and lower carrier are used to provide a unified modulation reference and clamping level for the asymmetric inverter.

[0016] The first clamping module is used to clamp the voltage of the two-level inverter to the first maximum voltage modulation wave according to the amplitude of the intermediate carrier when the weighting factor is greater than the instantaneous amplitude of the weighted triangular wave within one modulation wave cycle. It also calculates the compensation voltage modulation wave of the three-level inverter according to the total voltage modulation wave. The first maximum voltage modulation wave is the limit value of the voltage amplitude modulated by the intermediate carrier.

[0017] The second clamping module is used to clamp the voltage of the three-level inverter to the second maximum voltage modulation wave according to the amplitude of the upcarrier and downcarrier waves when the weighting factor is less than the instantaneous amplitude of the weighted triangular wave. The module also calculates the compensation voltage modulation wave of the two-level inverter according to the total voltage modulation wave. The second maximum voltage modulation wave is the limit value of the voltage amplitude modulated by the upcarrier and downcarrier waves.

[0018] Thirdly, embodiments of the present invention also provide an apparatus, comprising:

[0019] One or more processors;

[0020] Storage device for storing one or more programs.

[0021] When the one or more programs are executed by the one or more processors, the one or more processors implement the power distribution method for the asymmetric inverter system provided in the above embodiments.

[0022] Fourthly, embodiments of the present invention also provide a storage medium containing computer-executable instructions, which, when executed by a computer processor, are used to perform the power distribution method for an asymmetric inverter system as provided in the above embodiments.

[0023] The power distribution method, apparatus, device, and storage medium for an asymmetric inverter system provided in this invention obtain the total voltage modulation waveform and user-set weighting factors during the operation of the asymmetric inverter system. The asymmetric inverter includes a two-level inverter and a three-level inverter. A modulation triangular carrier is generated according to a preset carrier modulation method, and a weighted triangular carrier is generated according to the value range corresponding to the weighting factors. The triangular carrier is converted into an upper carrier and a lower carrier used by the three-level inverter, and the triangular carrier is converted into an intermediate carrier used by the two-level inverter. The upper carrier, intermediate carrier, and lower carrier are used to provide a unified modulation reference and clamping level for the asymmetric inverter. Within one modulation waveform cycle... During the period, when the weighting factor is greater than the instantaneous amplitude of the weighted triangular wave, the voltage of the two-level inverter is clamped to the first maximum voltage modulation wave according to the amplitude of the intermediate carrier. Based on the total voltage modulation wave, the compensation voltage modulation wave of the three-level inverter is calculated, where the first maximum voltage modulation wave is the boundary value of the voltage amplitude modulated by the intermediate carrier. When the weighting factor is less than the instantaneous amplitude of the weighted triangular wave, the voltage of the three-level inverter is clamped to the second maximum voltage modulation wave according to the amplitudes of the upper and lower carrier waves. Based on the total voltage modulation wave, the compensation voltage modulation wave of the two-level inverter is calculated, where the second maximum voltage modulation wave is the boundary value of the voltage amplitude modulated by the upper and lower carrier waves. By setting different amplitude ranges for subcarriers sharing the same phase and frequency, the two inverters have their own independent modulation spaces within the same modulation cycle, avoiding strong coupling caused by direct addition, reducing coupling degree, and realizing independent weight adjustment. This enables dynamic management of flexible power allocation under complex operating conditions. Furthermore, clamping can reduce the switching operation frequency of one inverter, thereby reducing the overall switching power consumption of the system. Attached Figure Description

[0024] The accompanying drawings, which form part of this invention, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an improper limitation of the invention.

[0025] Figure 1 This is a flowchart illustrating the power distribution method for an asymmetric inverter system provided in Embodiment 1 of the present invention.

[0026] Figure 2 This is a schematic diagram of the asymmetric inverter topology in the power distribution method of the asymmetric inverter system provided in Embodiment 1 of the present invention;

[0027] Figure 3 This is a modulation principle diagram of the power distribution method for an asymmetric inverter system provided in Embodiment 1 of the present invention;

[0028] Figure 4 This is a schematic diagram of the two-level inverter clamping in the power distribution method of the asymmetric inverter system provided in Embodiment 1 of the present invention;

[0029] Figure 5 This is a schematic flowchart of the power distribution method for an asymmetric inverter system provided in Embodiment 2 of the present invention;

[0030] Figure 6 This is a schematic diagram of clamping when the modulation index is less than the first maximum voltage modulation wave in the power distribution method of the asymmetric inverter system provided in Embodiment 2 of the present invention;

[0031] Figure 7 This is a schematic diagram of clamping when the modulation index is greater than the first maximum voltage modulation wave in the power distribution method of the asymmetric inverter system provided in Embodiment 2 of the present invention;

[0032] Figure 8 This is a schematic diagram of the power distribution device of the asymmetric inverter system provided in Embodiment 4 of the present invention;

[0033] Figure 9 This is a schematic diagram of the structure of a device provided in Embodiment 4 of the present invention. Detailed Implementation

[0034] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and not intended to limit it. Furthermore, it should be noted that, for ease of description, the accompanying drawings show only the parts relevant to the present invention, and not all of the structures.

[0035] Example 1

[0036] Figure 1 This is a flowchart of a power allocation method for an asymmetric inverter system provided in Embodiment 1 of the present invention. This embodiment is applicable to the power allocation of a symmetric inverter system. The method can be executed by a power allocation device for an asymmetric inverter system, and specifically includes the following steps:

[0037] Step 110: Obtain the total voltage modulation waveform and the weighting factor set by the user during the operation of the asymmetric inverter system. The asymmetric inverter includes a two-level inverter and a three-level inverter.

[0038] Existing open-winding motor drive systems mostly employ a single DC bus power supply topology, whose zero-sequence current path easily induces common-mode interference and additional losses. To fundamentally eliminate this defect, the two ends of the motor can be connected to two isolated DC sources, eliminating the zero-sequence loop between the buses. This independent bus structure can be implemented in the following two forms:

[0039] 1. Using a floating capacitor as a dynamic reactive power source, the inverter's synthesized vector space is changed by adjusting its terminal voltage in real time, thereby optimizing the output current waveform. However, to ensure stable system operation, continuous sampling and closed-loop control of the capacitor voltage are required, leading to a complex control algorithm and an increase in hardware sampling channels.

[0040] 2. Two isolated DC sources supply power to the inverters on both sides. These DC sources can be chemical batteries, fuel cells, or a combination thereof. Using an "asymmetric configuration" with different voltage levels or different DC voltages can improve the equivalent switching frequency and output waveform without significantly increasing the number of power devices, and naturally forms a physical channel for energy management on both sides. Especially in dual-battery pack scenarios for electric vehicles, active balancing of the state of charge (SoC) is required; in hybrid scenarios involving fuel cells and batteries, the unidirectional output characteristics of the fuel cell and the charging needs of the battery must be considered.

[0041] The first approach requires real-time adjustment of the capacitor terminal voltage to optimize the vector space, which drastically increases the complexity of the control algorithm. Therefore, the second approach is typically used in existing technologies. An asymmetric configuration consisting of different levels or different DC voltages can be employed. In this embodiment, an asymmetric configuration with different levels is used. The asymmetric topology not only improves the output waveform quality by increasing the number of levels but also provides a physical basis for energy management of the power supplies on both sides. Especially in electric vehicle applications where both sides are powered by independent battery packs, active control of the power flow is required to balance the battery's state of charge (SoC); in systems where fuel cells and batteries are hybrid power sources, the unidirectional output power characteristics of the fuel cell must be addressed, and battery charging management must be implemented.

[0042] Under dual DC power supply, the key problem that the system needs to solve is how to dynamically distribute active power between the two independent power sources, while maintaining the output voltage quality and meeting the requirements of specific operating conditions, such as unidirectional output of fuel cells and battery balancing.

[0043] In asymmetric topologies (such as three-level + two-level), the output voltage is synthesized from two independent DC sources. Under traditional PWM modulation, to ensure the sinusoidal and distortion-free output waveform, the control algorithm typically forces the switching frequencies of the two inverters to remain synchronized and continuous. This results in a natural coupling equation within the system, limiting the number of control variables. Therefore, a fixed decoupling coefficient k is usually needed to determine the power ratio of the two inverters. Once set, this ratio remains constant during operation. This causes the system to lose the ability to adjust power distribution according to real-time requirements, such as battery balancing, efficiency maximization, or thermal management.

[0044] In this embodiment, Figure 2 This is a schematic diagram of the asymmetric inverter topology in the power distribution method of the asymmetric inverter system provided in Embodiment 1 of the present invention. See [link / reference]. Figure 2 The asymmetric inverter includes a two-level inverter and a three-level inverter.

[0045] In this embodiment, the user can set a weighting factor according to their real-time needs. The weighting factor ranges from 0 to 1, representing the proportion of the two power strategies' operating time within a modulation wave cycle. Each strategy represents the full-load state of one inverter. By adjusting the operating time of the two power strategies, various power distribution effects can be achieved. The user can set a reasonable weighting factor according to their actual needs.

[0046] In pulse width modulation (PWM) technology, the carrier wave is used as a reference signal to compare a reference sinusoidal voltage (or space vector) with one or more periodic waveforms, thereby generating switching pulses. Carrier layering refers to the parallel or superimposed use of multiple carrier waves within the same PWM sampling period, each carrier corresponding to a modulation scheme or voltage level. By stacking or phase-shifting different carrier waves, goals such as multi-level inverters, dual-inverter coordinated modulation, and harmonic reduction can be achieved.

[0047] Step 120: Generate a modulation triangular carrier according to the preset carrier modulation method, and generate a weighted triangular carrier according to the value range of the weighting factor.

[0048] In this embodiment, carrier stacking can be introduced into the asymmetric topology proposed in this paper, treating the two independent inverters as a single unit at the control level, and defining the modulation as follows:

[0049]

[0050] In the formula, V ref This is the reference vector for the dual inverters.V dc This refers to the DC bus voltage on the low-voltage side. M The modulation scheme is the same as the conventional SPWM modulation scheme, except that the DC voltages on both sides are unified to an equivalent value so that the two inverters can be driven simultaneously under the same modulation M.

[0051] Due to three-phase symmetry, the output power of the three phases is equal within one fundamental cycle. Taking phase A as an example, the reference voltage and current values ​​for phase A are defined as follows:

[0052]

[0053] The reference voltage for phase A. This is the current value of phase A. In order to adjust the system, It is the phase angle, representing the real-time phase of the output waveform. It is the power factor angle, which represents the phase difference between voltage and current.

[0054] Figure 3 This is a modulation principle diagram of the power distribution method for an asymmetric inverter system provided in Embodiment 1 of the present invention. See also... Figure 3 It shows the dynamic distribution relationship of the reference voltages on both sides of the inverter, where u 3L The reference voltage for the three-level side of phase A, u 2L Given the reference voltage on both sides of phase A under this strategy, then

[0055] , It is the total voltage waveform that the system ultimately needs to output, u 3L It is the reference voltage on the three-level side, u 2L This is the reference voltage on both sides. Therefore, the average output power of phase A over one cycle is expressed as:

[0056] ,in, Represents the average output power over one fundamental frequency period.

[0057] Figure 3 The diagram shows three triangular carriers stacked vertically in the interval [-1, 1], which together constitute the system's total modulation space. The upper carrier C max And download wave C min Located in the high-voltage region [1 / 3, 1] and the low-voltage region [-1, -1 / 3] respectively, they jointly handle the modulation of the three-level inverter. u 3L With the upcarrier C max The comparison yields the three-level side S X11 and S x13 The on / off state,u 3L With download wave C min The comparison yields the three-level side S X12 and S x14 The switching state of the carrier C. mid Symmetrically distributed on both sides of the zero axis, in the interval [-1 / 3, 1 / 3], used for modulation of two-level inverters, where u 2L With intermediate carrier C mid The S values ​​on both sides are compared to obtain the S values. X21 and S X22 The switching state. Based on the above relationship, a triangular carrier participating in modulation can be generated according to the improved carrier modulation method. Furthermore, the received weighting factor can be used to determine the corresponding value range of the weighting factor, such as within the range of (0,1), to generate a weighted triangular carrier.

[0058] Step 130: Convert the triangular carrier wave into an upper carrier wave and a lower carrier wave used by a three-level inverter, and convert the triangular carrier wave into an intermediate carrier wave used by a two-level inverter. Use the upper carrier wave, the intermediate carrier wave, and the lower carrier wave to provide a unified modulation reference and clamping level for the asymmetric inverter.

[0059] For example, the generation of the upper carrier, middle carrier, and lower carrier using triangular carriers may include: performing a linear transformation on the triangular carriers to generate the upper carrier, lower carrier, and middle carrier; the amplitudes of the upper carrier, lower carrier, and middle carrier are equal, and the sum of their amplitudes is consistent with the amplitude range of the total voltage modulation wave; the upper carrier and lower carrier are located in the high-voltage region and are used for modulation of the three-level inverter; the middle carrier is located between the upper carrier and lower carrier and is used for modulation of the two-level inverter. In an asymmetric dual inverter, a unified modulation reference is needed to ensure that the outputs of both inverters are added together within the same fundamental period to obtain the target AC voltage. To achieve this, the triangular carrier frequency needs to be linearly transformed to generate three subcarriers with equal amplitude and the same phase. These subcarriers together constitute a unified modulation space, providing the same reference and clamping level for both inverters within the same PWM period, thereby achieving unified power distribution, modulation depth, and waveform quality maintenance.

[0060] Step 140: Within one modulation wave period, when the weighting factor is greater than the instantaneous amplitude of the weighted triangular wave, the voltage of the two-level inverter is clamped to the first maximum voltage modulation wave according to the amplitude of the intermediate carrier. The compensation voltage modulation wave of the three-level inverter is calculated according to the total voltage modulation wave. The first maximum voltage modulation wave is the limit value of the voltage amplitude modulated by the intermediate carrier.

[0061] Within one modulation cycle, when the weighting factor is greater than the instantaneous amplitude of the weighted triangular wave, the system enters the adjustable region of the two-level inverter. The comparison between the weighting factor and the instantaneous amplitude of the weighted triangular wave can be used to determine whether the system has entered the adjustable region of the two-level inverter. For example, clamping the voltage of the two-level inverter to the first maximum voltage modulation wave based on the amplitude of the intermediate carrier wave, and calculating the compensation voltage modulation wave of the three-level inverter based on the total voltage modulation wave, can include: clamping the voltage of the two-level inverter to the first maximum positive voltage modulation wave corresponding to the intermediate carrier wave when the phase current is positive, and calculating the voltage modulation wave of the three-level inverter based on the total voltage modulation wave; clamping the voltage of the two-level inverter to the first maximum negative voltage modulation wave corresponding to the intermediate carrier wave when the phase current is negative, and calculating the voltage modulation wave of the three-level inverter based on the total voltage modulation wave.

[0062] After entering the adjustable region of the two-level inverter, the voltage of the two-level inverter can be clamped to the first maximum voltage modulation wave. By clamping to the first maximum voltage modulation wave, the voltage and current are in the same direction, thereby maximizing its power. Figure 4 This is a schematic diagram of the two-level inverter clamping in the power distribution method of the asymmetric inverter system provided in Embodiment 1 of the present invention. See [link / reference]. Figure 4 To maximize the output power of the two-level inverter, at cos θ Within the positive half-cycle interval >0, clamp the reference voltage to 1 / 3, and in cos θ Within the negative half-cycle interval (<0), the reference voltage is clamped to -1 / 3. This 1 / 3 point and -1 / 3 can be used as the first maximum voltage modulation wave. Using the above method, the output power of the two-level inverter within its adjustable range can be calculated; and based on the clamping voltage and total voltage modulation wave of the two-level inverter, the compensation voltage modulation wave of the three-level inverter within its adjustable range can be calculated.

[0063] Step 150: When the weighting factor is less than the instantaneous amplitude of the weighted triangular wave, the voltage of the three-level inverter is clamped to the second maximum voltage modulation wave according to the amplitude of the upcarrier and downcarrier waves. The compensation voltage modulation wave of the two-level inverter is calculated according to the total voltage modulation wave. The second maximum voltage modulation wave is the limit value of the voltage amplitude modulated by the upcarrier and downcarrier waves.

[0064] Correspondingly, since the maximum value of the reference triangular carrier wave is 1, the reference voltage of the two-level inverter is suppressed only when the weighting factor is less than the instantaneous value of the weighted triangular wave. The three-level inverter still has modulation margin, requiring the output of the three-level inverter to be clamped and the two-level inverter to compensate. The three-level inverter can hard clamp its reference voltage based on the upper limit of the amplitude of the up-carrier / down-carrier wave, i.e., the second maximum voltage modulation wave. The two-level inverter modulates the remaining power through the compensation voltage (total modulation wave minus the clamped three-level output). The PWM signals of the two inverters operate synchronously under the same reference carrier wave, and the average value of the output is strictly equal to the target sine wave in each PWM cycle. This achieves automatic switching of power distribution. Using the above time-division hybrid modulation method, the problem of power distribution ratios being typically determined by a fixed decoupling coefficient and lacking degrees of freedom can be solved.

[0065] In existing technologies, to ensure the linearity of the output waveform, traditional decoupling strategies typically apply a continuously varying sinusoidal voltage to both inverters. This necessitates continuous high-frequency switching of the power devices on both sides throughout the entire electrical cycle. This is particularly problematic in three-level inverters, which are the mainstay of the system and have higher DC voltages, where switching losses in the peak current region are especially pronounced. However, with the method described above, one inverter output remains constant, with its switching transistors inactive for a period of time. For the other inverter, the modulation waveform remains continuously varying. Compared to the original continuously varying sinusoidal wave, the switching losses of the inverter on the side without clamping do not increase, effectively reducing overall system switching losses.

[0066] This embodiment obtains the total voltage modulation waveform and user-set weighting factor during the operation of the asymmetric inverter system. The asymmetric inverter includes a two-level inverter and a three-level inverter. A modulation triangular carrier is generated according to a preset carrier modulation method, and a weighted triangular carrier is generated according to the value range corresponding to the weighting factor. The triangular carrier is converted into an upper carrier and lower carrier used by the three-level inverter, and the triangular carrier is converted into an intermediate carrier used by the two-level inverter. The upper carrier, intermediate carrier, and lower carrier are used to provide a unified modulation reference and clamping level for the asymmetric inverter. Within one modulation waveform cycle, when the weighting factor is greater than the weighted triangular carrier... When the instantaneous amplitude of the wave is reached, the voltage of the two-level inverter is clamped to the first maximum voltage modulation wave based on the amplitude of the intermediate carrier. The compensation voltage modulation wave of the three-level inverter is calculated based on the total voltage modulation wave, where the first maximum voltage modulation wave is the boundary value of the voltage amplitude modulated by the intermediate carrier. When the weighting factor is less than the instantaneous amplitude of the weighted triangular wave, the voltage of the three-level inverter is clamped to the second maximum voltage modulation wave based on the amplitudes of the upper and lower carrier waves. The compensation voltage modulation wave of the two-level inverter is calculated based on the total voltage modulation wave, where the second maximum voltage modulation wave is the boundary value of the voltage amplitude modulated by the upper and lower carrier waves. By setting different amplitude ranges for subcarriers sharing the same phase and frequency, the two inverters have their own independent modulation spaces within the same modulation cycle, avoiding strong coupling caused by direct addition, reducing coupling degree, and realizing independent adjustment of weights. This enables dynamic management of flexible power allocation under complex operating conditions. Furthermore, clamping can reduce the switching operation frequency of one inverter, thereby reducing the overall switching power consumption of the system.

[0067] In a preferred embodiment of this example, within one modulation wave cycle, when the weighting factor is greater than the weighted triangular wave, after clamping the voltage of the two-level inverter to the first maximum voltage modulation wave according to the amplitude of the intermediate carrier wave, and calculating the compensation voltage modulation wave of the three-level inverter according to the total voltage modulation wave, the method may further include the following steps: when the first maximum voltage modulation wave is greater than the intermediate carrier wave, output the bridge arm PWM signal P; when the first maximum voltage modulation wave is less than the intermediate carrier wave, output the bridge arm PWM signal N; when the compensation voltage modulation wave of the three-level inverter is greater than the upper carrier wave, output the bridge arm PWM signal P; when the compensation voltage modulation wave of the three-level inverter is greater than the lower carrier wave and less than the upper carrier wave, pause the output of the bridge arm PWM signal; when the compensation voltage modulation wave of the three-level inverter is less than the lower carrier wave, output the bridge arm PWM signal N. The positive / negative conduction of the two-level inverter is determined by comparing the first maximum voltage with the intermediate carrier wave, and the positive conduction, pause (intermediate level), or negative conduction (P / N / pause) of the three-level inverter is determined by comparing the compensation voltage with the upper / lower carrier wave in three segments. This enables the system to achieve dynamic power distribution, precise voltage clamping, and seven-segment modulation within one modulation cycle, thereby achieving the operating goals of low harmonics, low switching losses, high efficiency, and good voltage balance.

[0068] Example 2

[0069] Figure 5This is a flowchart illustrating the power distribution method for an asymmetric inverter system provided in Embodiment 2 of the present invention. Based on the previous embodiment, this embodiment clamps the voltage of the three-level inverter to the second maximum voltage modulation wave according to the amplitudes of the upcarrier and downcarrier waves. Based on the total voltage modulation wave, the compensation voltage modulation wave for the two-level inverter is calculated. Specifically, the optimization is as follows: within one modulation cycle, a modulation index is defined, and the time intersection points of the modulation index and the first maximum voltage modulation wave are defined as t1, t2, t3, and t4; when the modulation index is less than the first maximum voltage modulation wave and the phase current is positive, the voltage of the two-level inverter is clamped to the first maximum negative voltage modulation wave, and the compensation voltage modulation wave for the three-level inverter is calculated based on the total voltage modulation wave; when the modulation index is less than the first maximum voltage modulation wave and the phase current is negative, the voltage of the two-level inverter is clamped to the first maximum positive voltage modulation wave, and the compensation voltage modulation wave for the three-level inverter is calculated based on the total voltage modulation wave; when the modulation index is greater than the first maximum voltage modulation wave... When the modulation index is greater than the first maximum voltage modulation wave and within the time intervals (t2, t3), the three-level inverter is clamped to the second maximum positive voltage modulation wave. Based on the total voltage modulation wave, the compensation voltage modulation wave of the two-level inverter is calculated. When the modulation index is greater than the first maximum voltage modulation wave and within the time intervals (t2, t3), the three-level inverter is clamped to the second maximum negative voltage modulation wave. Based on the total voltage modulation wave, the compensation voltage modulation wave of the two-level inverter is calculated. During the time intervals (t1, π / 2) and (3π / 2, t4), the voltage of the two-level inverter is clamped to the first maximum negative voltage modulation wave, and the compensation voltage modulation wave of the three-level inverter is calculated based on the total voltage modulation wave; when the modulation index is greater than the first maximum voltage modulation wave and during the time intervals (π / 2, t2) and (t3, 3π / 2), the voltage of the two-level inverter is clamped to the first maximum positive voltage modulation wave, and the compensation voltage modulation wave of the three-level inverter is calculated based on the total voltage modulation wave.

[0070] See Figure 5 The power distribution method for the asymmetric inverter system includes:

[0071] Step 210: Obtain the total voltage modulation wave and the weighting factor set by the user during the operation of the asymmetric inverter system. The asymmetric inverter includes a two-level inverter and a three-level inverter. Generate a modulation triangular carrier according to the preset carrier modulation method, and generate a weighted triangular carrier according to the value range corresponding to the weighting factor.

[0072] Step 220: Convert the triangular carrier wave into an upper carrier and a lower carrier wave used by a three-level inverter, and convert the triangular carrier wave into an intermediate carrier wave used by a two-level inverter. Use the upper carrier wave, the intermediate carrier wave, and the lower carrier wave to provide a unified modulation reference and clamping level for the asymmetric inverter.

[0073] Step 230: Within one modulation wave period, when the weighting factor is greater than the instantaneous amplitude of the weighted triangular wave, the voltage of the two-level inverter is clamped to the first maximum voltage modulation wave according to the amplitude of the intermediate carrier. The compensation voltage modulation wave of the three-level inverter is calculated according to the total voltage modulation wave. The first maximum voltage modulation wave is the limit value of the voltage amplitude modulated by the intermediate carrier.

[0074] Step 240: When the weighting factor is less than the instantaneous amplitude of the weighted triangular wave, within one modulation cycle, a modulation index is defined, and the time intersection points of the modulation index and the first maximum voltage modulation wave are defined as t1, t2, t3, and t4. When the modulation index is less than the first maximum voltage modulation wave and the phase current is positive, the voltage of the two-level inverter is clamped to the first maximum negative voltage modulation wave, and the compensation voltage modulation wave of the three-level inverter is calculated based on the total voltage modulation wave. When the modulation index is less than the first maximum voltage modulation wave and the phase current is negative, the voltage of the two-level inverter is clamped to the first maximum positive voltage modulation wave, and the compensation voltage modulation wave of the three-level inverter is calculated based on the total voltage modulation wave.

[0075] In this embodiment, the modulation index M can be a dimensionless parameter describing the relative magnitude between the reference voltage amplitude and the DC bus voltage. It determines the amplitude of the inverter output voltage, the power factor, and the maximum achievable output power. Its specific calculation method can be derived from the aforementioned formula. According to the definition of M, the time intersection points of the modulation index and the first maximum voltage modulation wave are t1, t2, t3, and t4.

[0076] Figure 6 This is a schematic diagram of clamping when the modulation index is less than the first maximum voltage modulation wave in the power distribution method of the asymmetric inverter system provided in Embodiment 2 of the present invention. See [link / reference]. Figure 6 When the weighting factor is less than the instantaneous amplitude of the weighted triangular wave, in order to maximize the output power of the three-level inverter, the two-level sides are clamped to -1 / 3 in the positive half-cycle interval where cosθ>0, and clamped to 1 / 3 in the negative half-cycle interval where cosθ<0. The compensation voltage modulation wave of the three-level inverter within the adjustable range of the two-level inverter can be calculated based on the clamping voltage and the total voltage modulation wave of the two-level inverter.

[0077] Step 250: When the modulation index is greater than the first maximum voltage modulation wave and within the time intervals (0, t1) and (t4, 2π), clamp the three-level inverter to the second maximum positive voltage modulation wave, and calculate the compensation voltage modulation wave of the two-level inverter based on the total voltage modulation wave; when the modulation index is greater than the first maximum voltage modulation wave and within the time intervals (t2, t3), clamp the three-level inverter to the second maximum negative voltage modulation wave, and calculate the compensation voltage modulation wave of the two-level inverter based on the total voltage modulation wave; when the modulation index is greater than... When the first maximum voltage modulation wave occurs within the time intervals (t1, π / 2) and (3π / 2, t4), the voltage of the two-level inverter is clamped to the first maximum negative voltage modulation wave. Based on the total voltage modulation wave, the compensation voltage modulation wave of the three-level inverter is calculated. When the modulation index is greater than the first maximum voltage modulation wave and occurs within the time intervals (π / 2, t2) and (t3, 3π / 2), the voltage of the two-level inverter is clamped to the first maximum positive voltage modulation wave. Based on the total voltage modulation wave, the compensation voltage modulation wave of the three-level inverter is calculated.

[0078] Figure 7 This is a schematic diagram illustrating clamping when the modulation index is greater than the first maximum voltage modulation wave in the power distribution method of the asymmetric inverter system provided in Embodiment 2 of the present invention. (See also...) Figure 7 To maximize the output power of the three-level inverter, its reference voltage is clamped to 1 during the positive half-cycle intervals (0, t1) and (t4, 2π). During the negative half-cycle interval (t2, t3), the reference voltage is clamped to -1. In the intervals (t1, π / 2, t4), due to the limitation of the reference voltage relationship between the two sides, the three-level side cannot be clamped to 1. According to the principle of total power conservation, the output power of the two-level side is minimized, and the reference voltage of the two-level side is clamped to -1 / 3. Similarly, in the intervals (π / 2, t2) and (t3, 3π / 2), the reference voltage of the two-level side is clamped to 1 / 3. The pre-calculated t1-t4 intervals can be used to determine which sub-interval the current inverter falls into, thus deciding whether to clamp the three-level or two-level inverter, and the positive or negative polarity of the clamping. The entire cycle can be divided into several segments based on the intersection of the modulation index and the first maximum voltage. Different segments correspond to different clamping objects (upload / download wave or intermediate carrier) and clamping polarities (positive / negative), allowing three-level inverters or two-level inverters to undertake the main modulation task on one side and provide compensation on the other.

[0079] This embodiment clamps the voltage of the three-level inverter to the second maximum voltage modulation wave based on the amplitudes of the upcarrier and downcarrier waves. Based on the total voltage modulation wave, it calculates the compensation voltage modulation wave for the two-level inverter. Specifically, the optimization is as follows: Within one modulation cycle, a modulation index is defined, and the time intersection points of the modulation index and the first maximum voltage modulation wave are defined as t1, t2, t3, and t4. When the modulation index is less than the first maximum voltage modulation wave and the phase current is positive, the voltage of the two-level inverter is clamped to the first maximum negative voltage modulation wave, and the compensation voltage modulation wave for the three-level inverter is calculated based on the total voltage modulation wave. When the modulation index is less than the first maximum voltage modulation wave and the phase current is negative, the voltage of the two-level inverter is clamped to the first maximum positive voltage modulation wave, and the compensation voltage modulation wave for the three-level inverter is calculated based on the total voltage modulation wave. When the modulation index is greater than the first maximum voltage modulation wave, and at times (0, t1) and (t4, 2π), the compensation voltage modulation wave for the two-level inverter is calculated based on the total voltage modulation wave. When the modulation index is greater than the first maximum voltage modulation wave and within the time interval (t2, t3), the three-level inverter is clamped to the second maximum positive voltage modulation wave, and the compensation voltage modulation wave of the two-level inverter is calculated based on the total voltage modulation wave; when the modulation index is greater than the first maximum voltage modulation wave and within the time intervals (t1, π / 2) and (3π / 2, t4), the voltage of the two-level inverter is clamped to the first maximum negative voltage modulation wave, and the compensation voltage modulation wave of the three-level inverter is calculated based on the total voltage modulation wave; when the modulation index is greater than the first maximum voltage modulation wave and within the time intervals (π / 2, t2) and (t3, 3π / 2), the voltage of the two-level inverter is clamped to the first maximum positive voltage modulation wave, and the compensation voltage modulation wave of the three-level inverter is calculated based on the total voltage modulation wave. It can achieve flexible power distribution, modulation error elimination, and harmonic suppression throughout the entire modulation cycle, and maintain stable and reliable operation under different loads, different phase current directions, and different modulation ranges.

[0080] In another preferred embodiment of this example, after the steps of clamping the voltage of the three-level inverter to the second maximum voltage modulation wave according to the amplitude of the upper carrier wave and the lower carrier wave within one modulation wave cycle, when the weighting factor is less than the weighted triangular wave, and calculating the compensation voltage modulation wave of the two-level inverter according to the total voltage modulation wave, the method may further include the following steps: when the second maximum voltage modulation wave is greater than the upper carrier wave, outputting the bridge arm PWM signal P; when the second maximum voltage modulation wave is greater than the lower carrier wave and less than the upper carrier wave, outputting the bridge arm PWM signal O; when the second maximum voltage modulation wave is less than the lower carrier wave, outputting the bridge arm PWM signal N; when the compensation voltage modulation wave of the two-level inverter is greater than the intermediate carrier wave, outputting the bridge arm PWM signal P; when the compensation voltage modulation wave of the two-level inverter is less than the intermediate carrier wave, outputting the bridge arm PWM signal N. Seven-segment modulation can be used to provide finer voltage dispersion, improve output waveform quality, significantly reduce the number of switching operations, reduce switching losses and suppress high-order harmonics, ensure phase synchronization of the two inverters, and the control logic is only amplitude comparison, which is easy to implement and reliable, enabling asymmetric two-level / three-level inverters to operate safely and economically over a wider operating range.

[0081] Example 3

[0082] Figure 8 This is a schematic diagram of the power distribution device of the asymmetric inverter system provided in Embodiment 4 of the present invention. See also... Figure 8 The power distribution device of the asymmetric inverter system includes:

[0083] The acquisition module 310 is used to acquire the total voltage modulation waveform and the weighting factor set by the user during the operation of the asymmetric inverter system. The asymmetric inverter includes a two-level inverter and a three-level inverter.

[0084] The generation module 320 is used to generate a modulation triangular carrier according to a preset carrier modulation method, and to generate a weighted triangular carrier according to the value range of the weighting factor.

[0085] The conversion module 330 is used to convert the triangular carrier into an upper carrier and a lower carrier used by a three-level inverter, and to convert the triangular carrier into an intermediate carrier used by a two-level inverter, and to provide a unified modulation reference and clamping level for the asymmetric inverter using the upper carrier, intermediate carrier and lower carrier;

[0086] The first clamping module 340 is used to clamp the voltage of the two-level inverter to the first maximum voltage modulation wave according to the amplitude of the intermediate carrier when the weighting factor is greater than the instantaneous amplitude of the weighted triangular wave within one modulation wave cycle, and to calculate the compensation voltage modulation wave of the three-level inverter according to the total voltage modulation wave. The first maximum voltage modulation wave is the limit value of the voltage amplitude modulated by the intermediate carrier.

[0087] The second clamping module 350 is used to clamp the voltage of the three-level inverter to the second maximum voltage modulation wave according to the amplitude of the upcarrier and downcarrier waves when the weighting factor is less than the instantaneous amplitude of the weighted triangular wave, and to calculate the compensation voltage modulation wave of the two-level inverter according to the total voltage modulation wave, wherein the second maximum voltage modulation wave is the limit value of the voltage amplitude modulated by the upcarrier and downcarrier waves.

[0088] This embodiment obtains the total voltage modulation waveform and user-set weighting factor during the operation of the asymmetric inverter system. The asymmetric inverter includes a two-level inverter and a three-level inverter. A modulation triangular carrier is generated according to a preset carrier modulation method, and a weighted triangular carrier is generated according to the value range corresponding to the weighting factor. The triangular carrier is converted into an upper carrier and lower carrier used by the three-level inverter, and the triangular carrier is converted into an intermediate carrier used by the two-level inverter. The upper carrier, intermediate carrier, and lower carrier are used to provide a unified modulation reference and clamping level for the asymmetric inverter. Within one modulation waveform cycle, when the weighting factor is greater than the weighted triangular carrier... When the instantaneous amplitude of the wave is reached, the voltage of the two-level inverter is clamped to the first maximum voltage modulation wave based on the amplitude of the intermediate carrier. The compensation voltage modulation wave of the three-level inverter is calculated based on the total voltage modulation wave, where the first maximum voltage modulation wave is the boundary value of the voltage amplitude modulated by the intermediate carrier. When the weighting factor is less than the instantaneous amplitude of the weighted triangular wave, the voltage of the three-level inverter is clamped to the second maximum voltage modulation wave based on the amplitudes of the upper and lower carrier waves. The compensation voltage modulation wave of the two-level inverter is calculated based on the total voltage modulation wave, where the second maximum voltage modulation wave is the boundary value of the voltage amplitude modulated by the upper and lower carrier waves. By setting different amplitude ranges for subcarriers sharing the same phase and frequency, the two inverters have their own independent modulation spaces within the same modulation cycle, avoiding strong coupling caused by direct addition, reducing coupling degree, and realizing independent adjustment of weights. This enables dynamic management of flexible power allocation under complex operating conditions. Furthermore, clamping can reduce the switching operation frequency of one inverter, thereby reducing the overall switching power consumption of the system.

[0089] Based on the above embodiments, the conversion module includes:

[0090] The transformation unit is used to perform linear transformation on the triangular carrier wave to generate an upper carrier wave, a lower carrier wave, and an intermediate carrier wave. The amplitudes of the upper carrier wave, the lower carrier wave, and the intermediate carrier wave are equal, and the sum of the amplitudes of the upper carrier wave, the lower carrier wave, and the intermediate carrier wave is consistent with the amplitude range of the total voltage modulation wave. The upper carrier wave and the lower carrier wave are located in the high voltage region and are used for modulation of the three-level inverter. The intermediate carrier wave is located between the upper carrier wave and the lower carrier wave and is used for modulation of the two-level inverter.

[0091] Based on the above embodiments, the first clamping module includes:

[0092] The first clamping unit is used to clamp the voltage of the two-level inverter to the first maximum positive voltage modulation wave corresponding to the intermediate carrier when the phase current is positive, and to calculate the voltage modulation wave of the three-level inverter based on the total voltage modulation wave.

[0093] The second clamping unit is used to clamp the voltage of the two-level inverter to the first maximum negative voltage modulation wave corresponding to the intermediate carrier when the phase current is negative, and to calculate the voltage modulation wave of the three-level inverter based on the total voltage modulation wave.

[0094] Based on the above embodiments, the second clamping module includes:

[0095] The definition unit is used to define the modulation degree within one modulation cycle, and to define the time intersection points of the modulation degree and the first maximum voltage modulation wave as t1, t2, t3 and t4.

[0096] The first calculation unit is used to clamp the voltage of the two-level inverter to the first maximum negative voltage modulation wave when the modulation index is less than the first maximum voltage modulation wave and the phase current is positive, and to calculate the compensation voltage modulation wave of the three-level inverter based on the total voltage modulation wave.

[0097] The second calculation unit is used to clamp the voltage of the two-level inverter to the first maximum positive voltage modulation wave when the modulation index is less than the first maximum voltage modulation wave and the phase current is negative, and to calculate the compensation voltage modulation wave of the three-level inverter based on the total voltage modulation wave.

[0098] The third calculation unit is used to clamp the three-level inverter to the second maximum positive voltage modulation wave when the modulation index is greater than the first maximum voltage modulation wave and within the time intervals (0, t1) and (t4, 2π), and calculate the compensation voltage modulation wave of the two-level inverter based on the total voltage modulation wave.

[0099] The fourth calculation unit is used to clamp the three-level inverter to the second maximum negative voltage modulation wave when the modulation index is greater than the first maximum voltage modulation wave and within the time period (t2, t3), and calculate the compensation voltage modulation wave of the two-level inverter based on the total voltage modulation wave.

[0100] The fifth calculation unit is used to clamp the voltage of the two-level inverter to the first maximum negative voltage modulation wave when the modulation index is greater than the first maximum voltage modulation wave and within the time intervals of (t1, π / 2) and (3π / 2, t4), and calculate the compensation voltage modulation wave of the three-level inverter based on the total voltage modulation wave.

[0101] The sixth calculation unit is used to clamp the voltage of the two-level inverter to the first maximum positive voltage modulation wave when the modulation index is greater than the first maximum voltage modulation wave and within the time intervals of (π / 2, t2) and (t3, 3π / 2), and to calculate the compensation voltage modulation wave of the three-level inverter based on the total voltage modulation wave.

[0102] Based on the above embodiments, the device further includes:

[0103] The first signal output unit is used to output a bridge arm PWM signal P when the first maximum voltage modulation wave is greater than the intermediate carrier wave;

[0104] The second signal output unit is used to output a bridge arm PWM signal N when the first maximum voltage modulation wave is less than the intermediate carrier wave;

[0105] The third signal output unit is used to output a bridge arm PWM signal P when the compensation voltage modulation wave of the three-level inverter is greater than the upper carrier wave.

[0106] The fourth signal output unit is used to pause the output of the bridge arm PWM signal when the compensation voltage modulation wave of the three-level inverter is greater than the download wave and less than the up carrier wave.

[0107] The fifth signal output unit is used to output the bridge arm PWM signal N when the compensation voltage modulation wave of the three-level inverter is less than the download wave.

[0108] Based on the above embodiments, the device further includes:

[0109] The sixth signal output unit is used to output the bridge arm PWM signal P when the second maximum voltage modulation wave is greater than the upper carrier wave;

[0110] The seventh signal output unit is used to output a bridge arm PWM signal O when the second maximum voltage modulation wave is greater than the download wave and less than the up carrier wave;

[0111] The eighth signal output unit is used to output the bridge arm PWM signal N when the second maximum voltage modulation wave is less than the download wave;

[0112] The ninth signal output unit is used to output a bridge arm PWM signal P when the compensation voltage modulation wave of the two-level inverter is greater than the intermediate carrier wave;

[0113] The tenth signal output unit is used to output the bridge arm PWM signal N when the compensation voltage modulation wave of the two-level inverter is less than the intermediate carrier.

[0114] The power distribution device for an asymmetric inverter system provided in this embodiment of the invention can execute the power distribution method for an asymmetric inverter system provided in any embodiment of the invention, and has the corresponding functional modules and beneficial effects of executing the method.

[0115] Example 4

[0116] Figure 9 This is a schematic diagram of the structure of a device provided in Embodiment 4 of the present invention. Figure 9 A block diagram of an exemplary device 12 suitable for implementing embodiments of the present invention is shown. Figure 9 The device 12 shown is merely an example and should not impose any limitations on the functionality and scope of use of the embodiments of the present invention.

[0117] like Figure 9 As shown, device 12 is represented as a general-purpose computing device. Components of device 12 may include, but are not limited to: one or more processors or processing units 16, system memory 28, and a bus 18 connecting different system components (including system memory 28 and processing unit 16).

[0118] Bus 18 represents one or more of several bus architectures, including a memory bus or memory controller, a peripheral bus, a graphics acceleration port, a processor, or a local bus using any of the various bus architectures. For example, these architectures include, but are not limited to, the Industry Standard Architecture (ISA) bus, the Micro Channel Architecture (MAC) bus, the Enhanced ISA bus, the Video Electronics Standards Association (VESA) local bus, and the Peripheral Component Interconnect (PCI) bus.

[0119] Device 12 typically includes a variety of computer system readable media. These media can be any available media that can be accessed by device 12, including volatile and non-volatile media, removable and non-removable media.

[0120] System memory 28 may include computer system readable media in the form of volatile memory, such as RAM 30 and / or cache 32. Device 12 may further include other removable / non-removable, volatile / non-volatile computer system storage media. By way of example only, storage system 34 may be used to read and write non-removable, non-volatile magnetic media ( Figure 9 Not shown; usually referred to as a "hard drive"). Although Figure 9Not shown, a disk drive for reading and writing to a removable non-volatile disk (e.g., a "floppy disk") and an optical disk drive for reading and writing to a removable non-volatile optical disk (e.g., a CD-ROM, DVD-ROM, or other optical media) may be provided. In these cases, each drive may be connected to bus 18 via one or more data media interfaces. System memory 28 may include at least one program product having a set (e.g., at least one) of program modules configured to perform the functions of the embodiments of the present invention.

[0121] A program / utility 40 having a set (at least one) of program modules 42 may be stored, for example, in system memory 28. Such program modules 42 include, but are not limited to, an operating system, one or more application programs, other program modules, and program data. Each or some combination of these examples may include an implementation of a network environment. Program modules 42 typically perform the functions and / or methods described in the embodiments of the present invention.

[0122] Device 12 can also communicate with one or more external devices 14 (e.g., keyboard, pointing device, display 24, etc.), and with one or more devices that enable a user to interact with device 12, and / or with any device that enables device 12 to communicate with one or more other computing devices (e.g., network interface card, modem, etc.). This communication can be performed via I / O interface 22. Furthermore, device 12 can also communicate with one or more networks (e.g., local area network (LAN), wide area network (WAN), and / or public networks, such as the Internet) via network adapter 20. As shown, network adapter 20 communicates with other modules of device 12 via bus 18. It should be understood that, although not shown in the figures, other hardware and / or software modules can be used in conjunction with device 12, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems.

[0123] Processing unit 16 executes various functional applications and data processing by running programs stored in system memory 28, such as implementing the power distribution method for the asymmetric inverter system provided in this embodiment of the invention.

[0124] Example 5

[0125] Embodiment 5 of the present invention also provides a storage medium containing computer-executable instructions, which, when executed by a computer processor, are used to perform a power distribution method for an asymmetric inverter system as described in any of the above embodiments.

[0126] The computer storage medium of this invention can be any combination of one or more computer-readable media. A computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. A computer-readable storage medium can be, for example,—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of computer-readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this document, a computer-readable storage medium can be any tangible medium that contains or stores a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0127] Computer-readable signal media may include data signals propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. Computer-readable signal media may also be any computer-readable medium other than computer-readable storage media, capable of sending, propagating, or transmitting programs for use by or in connection with an instruction execution system, apparatus, or device.

[0128] Program code contained on a computer-readable medium may be transmitted using any suitable medium, including—but not limited to—wireless, wire, optical fiber, RF, etc., or any suitable combination thereof.

[0129] Computer program code for performing the operations of this invention can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, as well as conventional procedural programming languages ​​such as "C" or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or device. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0130] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. A power distribution method for an asymmetric inverter system, characterized by, The method comprises the following steps: obtaining an asymmetric inverter system total voltage modulation wave and a user-set weight factor, the asymmetric inverter comprising a two-level inverter and a three-level inverter, the weight factor ranging from 0 to 1, representing the proportion of the time of two power strategies in a modulation wave period, wherein each strategy represents a full load state of one inverter; generating a modulation triangular carrier according to a preset carrier modulation mode, and generating a weight triangular wave according to the value range of the weight factor; converting the triangular carrier into an upper carrier and a lower carrier used by the three-level inverter, and converting the triangular carrier into a middle carrier used by the two-level inverter, and using the upper carrier, the middle carrier and the lower carrier to provide a unified modulation reference and a clamping level for the asymmetric inverter; in the modulation wave period, when the weight factor is greater than the instantaneous amplitude of the weight triangular wave, clamping the voltage of the two-level inverter to a first maximum voltage modulation wave according to the amplitude of the middle carrier, and calculating a compensation voltage modulation wave of the three-level inverter according to the total voltage modulation wave, the first maximum voltage modulation wave being a limit value of the voltage amplitude modulated by the middle carrier; when the weight factor is less than the instantaneous amplitude of the weight triangular wave, clamping the voltage of the three-level inverter to a second maximum voltage modulation wave according to the amplitudes of the upper carrier and the lower carrier, and calculating a compensation voltage modulation wave of the two-level inverter according to the total voltage modulation wave, the second maximum voltage modulation wave being a limit value of the voltage amplitude modulated by the upper carrier and the lower carrier.

2. The method of claim 1, wherein, The conversion of the triangular carrier into the upper carrier and the lower carrier used by the three-level inverter comprises: linearly transforming the triangular carrier to generate the upper carrier, the lower carrier and the middle carrier; the amplitudes of the upper carrier, the lower carrier and the middle carrier are equal, the amplitudes of the upper carrier, the lower carrier and the middle carrier are consistent with the amplitude range of the total voltage modulation wave, the upper carrier and the lower carrier are located in a high voltage area and are used for the modulation of the three-level inverter; the middle carrier is located between the upper carrier and the lower carrier and is used for the modulation of the two-level inverter.

3. The method of claim 1, wherein, The clamping of the voltage of the two-level inverter to the first maximum voltage modulation wave according to the amplitude of the middle carrier and the calculation of the compensation voltage modulation wave of the three-level inverter according to the total voltage modulation wave comprise: when the phase current is positive, clamping the voltage of the two-level inverter to a first maximum positive voltage modulation wave corresponding to the middle carrier, and calculating the voltage modulation wave of the three-level inverter according to the total voltage modulation wave; when the phase current is negative, clamping the voltage of the two-level inverter to a first maximum negative voltage modulation wave corresponding to the middle carrier, and calculating the voltage modulation wave of the three-level inverter according to the total voltage modulation wave.

4. The method of claim 1, wherein, The clamping of the voltage of the three-level inverter to the second maximum voltage modulation wave according to the amplitudes of the upper carrier and the lower carrier and the calculation of the compensation voltage modulation wave of the two-level inverter according to the total voltage modulation wave comprise: defining a modulation degree in a modulation period, and defining the time intersection points of the modulation degree and the first maximum voltage modulation wave as t1, t2, t3 and t4; clamping the voltage of the two-level inverter to the first maximum positive voltage modulation wave, and calculating the compensation voltage modulation wave of the three-level inverter according to the total voltage modulation wave when the modulation degree is less than the first maximum voltage modulation wave and the phase current is positive; clamping the voltage of the two-level inverter to the first maximum positive voltage modulation wave, and calculating the compensation voltage modulation wave of the three-level inverter according to the total voltage modulation wave when the modulation degree is less than the first maximum voltage modulation wave and the phase current is negative.

5. The method of claim 4, wherein, The method further comprises the following steps after the step of clamping the voltage of the three-level inverter to the second maximum voltage modulation wave according to the amplitudes of the upper carrier and the lower carrier, and calculating the compensation voltage modulation wave of the two-level inverter according to the total voltage modulation wave in a modulation wave period when the weight factor is less than the weight triangular wave: clamping the three-level inverter to the second maximum positive voltage modulation wave, and calculating the compensation voltage modulation wave of the two-level inverter according to the total voltage modulation wave when the modulation degree is greater than the first maximum voltage modulation wave and in the time (0, t1) and (t4, 2π); clamping the three-level inverter to the second maximum negative voltage modulation wave, and calculating the compensation voltage modulation wave of the two-level inverter according to the total voltage modulation wave when the modulation degree is greater than the first maximum voltage modulation wave and in the time (t2, t3); clamping the voltage of the two-level inverter to the first maximum negative voltage modulation wave, and calculating the compensation voltage modulation wave of the three-level inverter according to the total voltage modulation wave when the modulation degree is greater than the first maximum voltage modulation wave and in the time (t1, π / 2) and (3π / 2, t4); clamping the voltage of the two-level inverter to the first maximum positive voltage modulation wave, and calculating the compensation voltage modulation wave of the three-level inverter according to the total voltage modulation wave when the modulation degree is greater than the first maximum voltage modulation wave and in the time (π / 2, t2) and (t3, 3π / 2).

6. The method of claim 1, wherein, The method further comprises the following steps after the step of clamping the voltage of the three-level inverter to the second maximum voltage modulation wave according to the amplitudes of the upper carrier and the lower carrier, and calculating the compensation voltage modulation wave of the two-level inverter according to the total voltage modulation wave in a modulation wave period when the weight factor is less than the weight triangular wave: outputting the bridge arm PWM signal P when the first maximum voltage modulation wave is greater than the intermediate carrier; outputting the bridge arm PWM signal N when the first maximum voltage modulation wave is less than the intermediate carrier; outputting the bridge arm PWM signal P when the compensation voltage modulation wave of the three-level inverter is greater than the upper carrier; suspending the output of the bridge arm PWM signal when the compensation voltage modulation wave of the three-level inverter is greater than the lower carrier and less than the upper carrier; outputting the bridge arm PWM signal N when the compensation voltage modulation wave of the three-level inverter is less than the lower carrier.

7. The method of claim 1, wherein, The method further comprises the following steps after the step of clamping the voltage of the three-level inverter to the second maximum voltage modulation wave according to the amplitudes of the upper carrier and the lower carrier, and calculating the compensation voltage modulation wave of the two-level inverter according to the total voltage modulation wave in a modulation wave period when the weight factor is less than the weight triangular wave: outputting the bridge arm PWM signal P when the second maximum voltage modulation wave is greater than the upper carrier; outputting the bridge arm PWM signal N when the second maximum voltage modulation wave is less than the lower carrier. outputting a bridge arm PWM signal O when the second maximum voltage modulation wave is greater than the down carrier wave and less than the up carrier wave; outputting a bridge arm PWM signal N when the second maximum voltage modulation wave is less than the down carrier wave; outputting a bridge arm PWM signal P when the compensation voltage modulation wave of the two-level inverter is greater than the middle carrier wave; outputting a bridge arm PWM signal N when the compensation voltage modulation wave of the two-level inverter is less than the middle carrier wave.

8. A power distribution method apparatus for an asymmetric inverter system, characterized by, comprising: an acquisition module configured to acquire a total voltage modulation wave of an asymmetric inverter system in operation and a weight factor set by a user, the asymmetric inverter comprising a two-level inverter and a three-level inverter, the weight factor having a value range of (0, 1) and representing a proportion of time of action of two power strategies in a modulation wave period, wherein each strategy represents a full load state of one inverter; a generation module configured to generate a modulation triangular carrier wave according to a preset carrier wave modulation mode, and generate a weight triangular wave according to a value range corresponding to the weight factor; a conversion module configured to convert the triangular carrier wave into an up carrier wave and a down carrier wave used by the three-level inverter, convert the triangular carrier wave into a middle carrier wave used by the two-level inverter, and provide a unified modulation reference and a clamping level for the asymmetric inverter by using the up carrier wave, the middle carrier wave and the down carrier wave; a first clamping module configured to, in the modulation wave period, clamp a voltage of the two-level inverter to a first maximum voltage modulation wave according to an amplitude of the middle carrier wave when the weight factor is greater than an instantaneous amplitude of the weight triangular wave, and calculate a compensation voltage modulation wave of the three-level inverter according to the total voltage modulation wave, the first maximum voltage modulation wave being a limit value of a voltage amplitude modulated by the middle carrier wave; a second clamping module configured to, in the modulation wave period, clamp a voltage of the three-level inverter to a second maximum voltage modulation wave according to amplitudes of the up carrier wave and the down carrier wave when the weight factor is less than the instantaneous amplitude of the weight triangular wave, and calculate a compensation voltage modulation wave of the two-level inverter according to the total voltage modulation wave, the second maximum voltage modulation wave being a limit value of a voltage amplitude modulated by the up carrier wave and the down carrier wave.

9. An apparatus, comprising: The device comprises: one or more processors; a storage device configured to store one or more programs; when the one or more programs are executed by the one or more processors, the one or more processors implement the power distribution method of the asymmetric inverter system as claimed in any one of claims 1-7.

10. A storage medium containing computer executable instructions for performing the power distribution method of the asymmetric inverter system as claimed in any one of claims 1-7 when executed by a computer processor.

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