A direct current bus voltage sampling method and motor controller

Abstract

The present application relates to the technical field of motor control, in particular to a DC bus voltage sampling method and motor controller, which is applied to a permanent magnet synchronous motor controller driven by a three-phase inverter, the positive and negative poles of the DC bus of the three-phase inverter are p and n respectively, and the output three-phase terminals are a, b and c respectively, the method comprising: sampling at least one phase terminal voltage signal in the three-phase terminals; performing pre-signal processing on the sampled phase terminal voltage signal; extracting a DC component capable of reflecting the DC bus voltage from the output after the pre-signal processing; and calculating the DC bus voltage value based on the DC component. The present application directly samples the phase voltage and indirectly calculates the bus voltage, which ensures the low-speed control accuracy of the motor while reducing the system hardware cost, and is particularly suitable for permanent magnet synchronous motor driving occasions with requirements on cost and performance.

Description

Technical Field

[0001] This invention relates to the field of motor control technology, and in particular to a DC bus voltage sampling method and a motor controller. Background Technology

[0002] When a three-phase permanent magnet synchronous motor controller employs a sensorless control strategy, it needs to obtain DC bus voltage and three-phase terminal voltage information. Existing technologies for obtaining DC bus voltage and three-phase terminal voltage include:

[0003] On the one hand, in scenarios where control performance requirements are not high, the DC bus voltage is directly sampled through a single ADC sampling circuit, while the three-phase phase voltage information is indirectly calculated through a voltage reconstruction algorithm.

[0004] On the other hand, in scenarios with high control performance requirements, the DC bus voltage and three-phase terminal voltage are directly sampled using a four-channel ADC sampling circuit. Although directly acquiring voltage information is highly efficient, it requires four sets of hardware sampling circuits, resulting in high hardware costs, especially in applications requiring electrical isolation, which puts significant pressure on costs.

[0005] To address the problems in the existing technology, this invention provides a DC bus voltage sampling method and a motor controller. Summary of the Invention

[0006] The purpose of this invention is to provide a DC bus voltage sampling method and a motor controller to solve the technical problem of high hardware cost in existing multi-channel direct sampling circuits.

[0007] The technical solution of this invention is: a DC bus voltage sampling method, applied to a permanent magnet synchronous motor controller driven by a three-phase inverter, wherein the positive and negative terminals of the DC bus of the three-phase inverter are p and n respectively, and the three-phase output terminals are a, b, and c respectively, and the method includes:

[0008] Sample the voltage signal of at least one phase terminal of the three-phase terminals;

[0009] The sampled phase terminal voltage signal undergoes pre-signal processing, implemented through hardware circuitry, including:

[0010] The three-phase phase terminal voltage signals are subjected to resistor voltage division, analog low-pass filtering, and signal modulation;

[0011] The signal modulation employs three-phase SVPWM modulation technology to convert the DC bus voltage into a three-phase sinusoidal voltage with adjustable amplitude and frequency.

[0012] Extract the DC component reflecting the DC bus voltage from the output of the pre-processed signal, including:

[0013] The three-phase terminal voltages output from the pre-processing signal are subjected to proportional addition processing, which includes three-phase coordinate transformation to obtain the zero-axis voltage component.

[0014] The zero-axis voltage component is sampled by an ADC and then filtered to remove the AC component and retain the DC component.

[0015] The vector matrix coefficients of the three-phase coordinate transformation are adjustable, and when the obtained DC component is a multiple of the target DC bus voltage, the multiple is canceled out through mathematical operations to obtain the DC bus voltage.

[0016] The DC bus voltage value is calculated based on the DC component.

[0017] Preferably, the method for extracting the DC component reflecting the DC bus voltage from the output after pre-processing of the signal includes:

[0018] The three-phase terminal voltage output from the pre-processing signal is subjected to a first filtering process and ADC sampling. The first filtering process filters out the AC component and retains the DC component.

[0019] Preferably, the output of the pre-processed signal is sampled by an ADC, the ADC sampling result is subjected to a first digital filtering process implemented in software, and the output of the first digital filtering process is subjected to mathematical operations to obtain the DC bus voltage.

[0020] Preferably, the output of the pre-processed signal is subjected to a first analog filtering process implemented by hardware circuitry, the output of the first analog filtering process is sampled by an ADC, and the DC bus voltage value is obtained by mathematical operations on the ADC sampling result.

[0021] Preferably, the proportional addition processing of the three-phase terminal voltages is implemented based on hardware circuitry, and the DC bus voltage value is obtained through ADC sampling and second filtering processing.

[0022] Preferably, the three-phase terminal voltages output by the pre-processing signal are sampled by an ADC, and the sampled three-phase terminal voltages are subjected to software-based proportional addition and second filtering to obtain the DC bus voltage value.

[0023] Preferably, the signal modulation content includes: constructing a functional relationship between the three-phase terminal voltage, the DC bus voltage, and the three-phase duty cycle within one pulse width modulation cycle. ;

[0024] This indicates the voltage at phase A terminal within one PWM cycle. The average value is ;

[0025] This indicates the voltage at phase B within one PWM cycle. The average value is ;

[0026] This represents the voltage at the C-phase terminal within one PWM cycle. The average value is ;

[0027] in, Indicates the DC bus voltage; This indicates the duty cycle of the A-phase bridge arm switch state. This indicates the duty cycle of the B-phase bridge arm switch state. The duty cycle indicates the switching state of phase C bridge arm;

[0028] Obtain the functional relationship between the three-phase duty cycle and the electrical angle, satisfying:

[0029] ;

[0030] ;

[0031] ;

[0032] ;

[0033] in, Indicates the modulation ratio. Indicates electrical angle;

[0034] Therefore, the functional relationships between the three-phase terminal voltage, DC bus voltage, modulation ratio, electrical angle, and duty cycle are as follows:

[0035] ;

[0036] ;

[0037] .

[0038] A motor controller, comprising:

[0039] The three-phase inverter bridge connects the positive and negative terminals p and n of the DC bus to the three-phase terminals a, b and c of the motor.

[0040] The voltage sampling circuit is provided with at least one channel for sampling the phase terminal voltage signal of at least one of the three phases a, b, and c;

[0041] The control unit includes a processor and a memory. The memory stores a computer program. When the computer program is executed by the processor, it implements the DC bus voltage sampling method to obtain the DC bus voltage value and perform motor control based on the DC bus voltage value.

[0042] Compared with the prior art, the advantages of the present invention are:

[0043] This invention obtains the DC bus voltage by directly sampling the voltage of one phase terminal, performing resistive voltage division, analog low-pass filtering, signal modulation, filtering, and sampling on the voltage of that phase terminal, filtering out the AC component and retaining the DC component; or, by directly sampling the voltage of all three phase terminals, performing resistive voltage division, analog low-pass filtering, and signal modulation on the three phase voltages respectively, performing proportional addition, filtering, and sampling on the modulated three-phase voltages, filtering out other AC components and retaining only the DC component.

[0044] This invention directly samples the three-phase voltage and indirectly obtains the DC bus voltage value with high precision, avoiding the errors introduced by dead zone and tube voltage drop in traditional voltage reconstruction algorithms, thus improving the control accuracy and stability of the motor in the low-speed range.

[0045] Compared to directly sampling the three-phase terminal voltage and DC bus voltage, this invention eliminates the need for a separate DC bus voltage sampling circuit, thereby reducing hardware costs while ensuring system control performance.

[0046] In its specific implementation, this invention can use software-implemented low-pass filtering and proportional adders to process the modulated signal, and can correct the parameters of the sampling circuit through software, thus offering high flexibility. Attached Figure Description

[0047] The present invention will be further described below with reference to the accompanying drawings and embodiments:

[0048] Figure 1 A power topology diagram of the permanent magnet synchronous motor controller provided by the present invention;

[0049] Figure 2 This is a schematic flowchart of the DC bus voltage sampling method described in this invention;

[0050] Figure 3 This is a circuit block diagram of the present invention for obtaining DC bus voltage based on the first embodiment.

[0051] Figure 4 This is a circuit block diagram of the present invention for obtaining DC bus voltage based on the second embodiment.

[0052] Figure 5This is a circuit block diagram of the present invention for obtaining DC bus voltage based on the third embodiment.

[0053] Figure 6 This is a circuit block diagram of the present invention for obtaining DC bus voltage based on the fourth embodiment. Detailed Implementation

[0054] The present invention will be further described in detail below with reference to specific embodiments:

[0055] See attached document Figure 1 A schematic diagram of the power topology of a permanent magnet synchronous motor controller is provided. In the topology network structure, P represents the positive terminal of the DC bus, n represents the negative terminal of the DC bus, and the three-phase terminals a, b, and c of the inverter output are connected to the permanent magnet synchronous motor. The switching states of the three-phase bridge arms are controlled by the corresponding binary logic switching functions. , , Control and representation, binary logic switching functions , , When the corresponding value is 1, it indicates that the upper bridge arm of the corresponding phase is turned on, which is the binary logic switching function. , , When the corresponding value is 0, it indicates that the lower bridge arm of the corresponding phase is conducting.

[0056] See attached document Figure 2 This invention provides a DC bus voltage sampling method, which includes the following steps:

[0057] The voltage sampling circuit is set in at least one of the three phases. It measures at least one of the phase A, phase B and phase C terminal voltages through a resistor voltage divider network. The resistor voltage divider can reduce the high amplitude three-phase terminal voltages to the input voltage range of ACD sampling in a proportional manner, while achieving electrical isolation or impedance matching.

[0058] The output signal after voltage division is then low-pass filtered by an analog low-pass filter to filter out high-frequency switching harmonics introduced by the PWM switch.

[0059] The filtered analog signal is modulated and then sampled by the ADC module of the microcontroller. Filtering is performed before or after ADC sampling (implemented by software or hardware circuitry) to remove other AC components from the signal, retaining only the DC component. The DC bus voltage is then obtained by performing mathematical operations on the DC component.

[0060] Directly sampling the three-phase terminal voltage via ADC can avoid deviations introduced by non-ideal factors such as diode voltage drop and dead zone, which helps to improve system control performance.

[0061] In the specific implementation process, in order to protect the circuit and ensure the stability of the circuit system, an electrical isolation module is also set between the signal modulation and analog filtering modules to suppress common-mode interference and improve system stability. The specific structure of the electrical isolation module includes an isolation amplifier or an isolation power supply module.

[0062] The signal modulation of this invention is achieved through power transistor control using space vector pulse width modulation (SVPWM). The specific modulation methods include the following:

[0063] Instantaneous value of phase A terminal voltage Instantaneous value of phase B terminal voltage Instantaneous value of C-phase terminal voltage .

[0064] in, and Indicates the DC bus voltage. ; This represents the voltage at phase A. This represents the voltage at phase B. This represents the voltage at the C-phase terminal.

[0065] Define duty cycle: , , .

[0066] in, Indicates the duty cycle of the A-phase bridge arm switch state. Indicates the duty cycle of the B-phase bridge arm switch state. Indicates the duty cycle of the C-phase bridge arm switch state. Indicates the PWM period.

[0067] The average value of the voltage at phase A during one PWM cycle. ;

[0068] The average value of the voltage at phase B during one PWM cycle. ;

[0069] The average value of the C-phase terminal voltage within one PWM cycle. .

[0070] Assuming the modulation ratio is m, in order to approximate a circular rotating magnetic field, when using three-phase SVPWM modulation, the three-phase duty cycle varies with the electrical angle. The changes satisfy:

[0071] ;

[0072] ;

[0073] ;

[0074] .

[0075] Analysis of three-phase duty cycle , , The expression, with For example, we can see that this duty cycle includes three components:

[0076] The first component is the DC component, i.e., 1 / 2; the second component is the fundamental frequency component, i.e. The third component is the third harmonic component, i.e. .

[0077] Correspondingly, the voltage at phase A is also obtained by superimposing three components:

[0078] .

[0079] Similarly, the superposition of the components of the phase B terminal voltage can be expressed as:

[0080] .

[0081] Similarly, the superposition of the components of the C-phase terminal voltage can be expressed as:

[0082] .

[0083] On the one hand, by filtering one phase of the three-phase terminal voltage represented by the amplitude and frequency of the modulated signal, the DC component corresponding to the first component is retained, and the DC bus voltage is obtained. .

[0084] Example 1.

[0085] Choose any one of the three-phase terminal voltages, refer to the appendix. Figure 3 A schematic diagram of an embodiment sampling the voltage at phase A is provided, which uses a resistor voltage divider sampling circuit for sampling. or or The signal first passes through an analog low-pass filter with a cutoff frequency lower than the PWM switching frequency but much higher than the motor's highest electrical frequency to filter out PWM switching harmonics. After electrical isolation and signal modulation, the filtered analog signal undergoes a first filtering process to remove the fundamental and third harmonic components. The remaining DC component is then sampled by an ADC and subjected to mathematical operations to obtain the DC bus voltage. In this embodiment, the first filtering process is a low-pass filter implemented through hardware circuitry.

[0086] Example 2.

[0087] Choose any one of the three-phase terminal voltages, refer to the appendix. Figure 4 A schematic diagram of an embodiment sampling the voltage at phase A is provided, which uses a resistor voltage divider sampling circuit for sampling. or or The signal first passes through an analog low-pass filter with a cutoff frequency lower than the PWM switching frequency but higher than the motor's highest electrical frequency to filter out PWM switching harmonics. After electrical isolation and signal modulation, the filtered analog signal is sent to the microcontroller's ADC module for sampling. It then undergoes a first filtering process to remove the fundamental and third harmonic components. The remaining DC component is then used to obtain the DC bus voltage through mathematical calculations. In this embodiment, the first filtering process is configured as a digital low-pass filter implemented in software.

[0088] On the other hand, a three-channel ADC voltage sampling circuit is set up to sample the voltages separately. , and .

[0089] The three-phase terminal voltages are modulated separately, and then the modulated three-phase terminal voltages are superimposed using a proportional adder. For example, a three-phase coordinate transformation can be used, i.e., by setting vector matrix coefficients, the corresponding voltage vectors are synthesized on the three-phase ABC coordinate system (corresponding to the α-axis, β-axis, and zero axis), thus obtaining the zero-axis voltage component. or The zero-axis voltage component is then filtered to remove the third harmonic component, retaining the DC component corresponding to the first component, thus obtaining the corresponding DC bus voltage. or Multiples of.

[0090] The specific process is as follows:

[0091] The vector matrix coefficients of the three-phase coordinate transformation are set as follows: The corresponding transformation formula is:

[0092] .

[0093] get: .

[0094] in, This indicates that after coordinate transformation, the voltage is transformed to... Voltage components of the axis; This indicates that after coordinate transformation, the voltage is transformed to... Voltage components of the axis; This represents the voltage component that is transformed to the zero axis after coordinate transformation.

[0095] The fundamental component of the three-phase terminal voltage is decomposed into α-axis and β-axis components; according to The expression can be derived from the superposition of two components:

[0096] The first component is the DC component, that is... ;

[0097] The second component is the third harmonic component, that is... .

[0098] Based on the three-phase coordinate transformation results, a second filtering process is performed. In this invention, the second filtering process uses a digital low-pass filter to obtain the DC voltage component. .

[0099] Example 3.

[0100] See attached document Figure 5 The document provides a schematic diagram of an embodiment for three-phase terminal voltage sampling. Identical resistor voltage divider sampling circuits, analog low-pass filter circuits, and signal modulation circuits are set up in phases a, b, and c respectively to sample the three-phase terminal voltages. , and The analog low-pass filter circuit filters out PWM switching harmonics, and the three-phase terminal voltage analog signal after signal modulation is sent to a proportional adder (built by an operational amplifier) ​​implemented based on hardware circuitry. The proportional adder performs three-phase coordinate transformation to obtain the zero-axis voltage component, and the output zero-axis voltage signal is sent to the microprocessor through the ADC sampling module.

[0101] In the microprocessor, the voltage component on the zero axis undergoes a second filtering process to remove the third harmonic component, thereby obtaining the DC bus voltage. .

[0102] Example 4.

[0103] See attached document Figure 6 The document provides a schematic diagram of an embodiment for three-phase terminal voltage sampling. Identical resistor voltage divider sampling circuits, analog low-pass filter circuits, and signal modulation circuits are set up in phases a, b, and c respectively to sample the three-phase terminal voltages. , and The analog low-pass filter circuit filters out PWM switching harmonics. The modulated three-phase terminal voltage signal is sampled by an ADC and sent to the microprocessor. In the microprocessor, a software-implemented proportional adder performs a three-phase coordinate transformation to obtain the zero-axis voltage component, which does not contain the fundamental component. A second filtering process is then applied to the zero-axis voltage component to remove the third harmonic component, retaining the DC component corresponding to the first harmonic component, thus obtaining the DC bus voltage. .

[0104] In Examples 3 and 4, the vector matrix coefficients in the three-phase coordinate transformation are determined according to specific circumstances. The zero-axis voltage component obtained through the three-phase coordinate transformation... or zero-axis voltage component The multiple, the value of which depends on the coefficients of the chosen vector matrix. For example:

[0105] The vector matrix coefficients used in the proportional adder are At that time, the three-phase terminal voltages are superimposed using a proportional addition method (the superposition result is obtained through...). (represented), directly obtained The corresponding DC bus voltage is expressed as The corresponding formula for proportional addition is:

[0106] .

[0107] The vector matrix coefficients used in the proportional adder are When the three-phase terminal voltages are superimposed using a proportional addition method, the zero-axis voltage component is obtained as follows: This directly corresponds to the DC bus voltage. The corresponding formula for proportional addition is:

[0108] .

[0109] When the vector matrix coefficients of the proportional adder are 1, the three-phase terminal voltages are superimposed through proportional addition (the superposition result is obtained through...). (representation), obtained The corresponding DC bus voltage is expressed as The corresponding formula for proportional addition is:

[0110] .

[0111] The vector matrix coefficients used in the proportional adder are At that time, the three-phase terminal voltages are superimposed using a proportional addition method (the superposition result is obtained through...). (This indicates that) 4 is obtained directly. The corresponding DC bus voltage is expressed as The corresponding formula for proportional addition is:

[0112] .

[0113] Based on the proportional addition calculation content in the above embodiments, in the specific implementation process:

[0114] If, through three-phase coordinate transformation and the selection of its vector matrix coefficients, the zero-axis voltage component based on the output ( or (multiples of), which can directly obtain the DC bus voltage Then, after digital low-pass filtering, the DC bus voltage is directly output. .

[0115] If, through three-phase coordinate transformation and the selection of its vector matrix coefficients, the zero-axis voltage component based on the output ( or The multiple of ( ) yields the DC bus voltage. If the factor is a multiple, then after digital low-pass filtering, mathematical operations are performed (to eliminate the factor, making...) (with a coefficient of 1) to obtain the DC bus voltage .

[0116] In embodiments 3 and 4 of the invention, the microprocessor of the motor controller includes one or more of the following: a microcontroller, a DSP, an FPGA, and a PLC. The software / program for running proportional addition, digital filtering, and ADC sampling runs in the microprocessor and is implemented accordingly.

[0117] By using a three-phase terminal voltage superposition design, the zero-axis voltage component, which does not contain the fundamental frequency component, is directly extracted, simplifying the hardware circuit, reducing hardware costs, and facilitating filter design. Furthermore, in practical implementation, the proportional adder achieves the superposition of the three-phase terminal voltages, and software implements digital low-pass filtering. This allows for software correction of gain errors in each sampling circuit, offering high flexibility.

[0118] Compared with existing technologies, this invention directly samples the three-phase terminal voltages using an ADC, and indirectly calculates the DC bus voltage value based on the sampled phase voltages. This not only ensures low-speed control performance but also saves circuit costs.

[0119] Furthermore, the present invention provides a motor controller, comprising:

[0120] The three-phase inverter bridge connects the positive and negative terminals p and n of the DC bus to the three-phase terminals a, b and c of the motor.

[0121] The voltage sampling circuit is provided with at least one channel for sampling the phase terminal voltage signal of at least one of the three phases a, b, and c;

[0122] The control unit includes a processor and a memory. The memory stores a computer program. When the computer program is executed by the processor, it implements the aforementioned DC bus voltage sampling method to obtain the DC bus voltage value and performs motor control based on the DC bus voltage value.

[0123] The above embodiments are merely illustrative of the technical concept and features of the present invention, intended to enable those skilled in the art to understand the content of the present invention and implement it accordingly, and should not be construed as limiting the scope of protection of the present invention. It will be apparent to those skilled in the art that the present invention is not limited to the details of the above exemplary embodiments, and that the present invention can be implemented in other specific forms without departing from the spirit or essential characteristics of the present invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects. The scope of the present invention is defined by the appended claims rather than the foregoing description, and thus all changes falling within the meaning and scope of the equivalents of the claims are intended to be included within the present invention.

Claims

1. A DC bus voltage sampling method, applied to a permanent magnet synchronous motor controller driven by a three-phase inverter, wherein the positive and negative terminals of the DC bus of the three-phase inverter are p and n, respectively, and the three-phase output terminals are a, b, and c, respectively, characterized in that, The method includes: Sample the voltage signal of at least one phase terminal of the three-phase terminals; The sampled phase terminal voltage signal undergoes pre-signal processing, implemented through hardware circuitry, including: The three-phase phase terminal voltage signals are subjected to resistor voltage division, analog low-pass filtering, and signal modulation; The signal modulation employs three-phase SVPWM modulation technology to convert the DC bus voltage into a three-phase sinusoidal voltage with adjustable amplitude and frequency. Extract the DC component reflecting the DC bus voltage from the output of the pre-processed signal, including: The three-phase terminal voltages output from the pre-processing signal are subjected to proportional addition processing, which includes three-phase coordinate transformation to obtain the zero-axis voltage component. The zero-axis voltage component is sampled by an ADC and then filtered to remove the AC component and retain the DC component. The vector matrix coefficients of the three-phase coordinate transformation are adjustable, and when the obtained DC component is a multiple of the target DC bus voltage, the multiple is canceled out through mathematical operations to obtain the DC bus voltage. The DC bus voltage value is calculated based on the DC component.

2. The DC bus voltage sampling method according to claim 1, characterized in that, The method for extracting the DC component reflecting the DC bus voltage from the output after pre-processing includes: The three-phase terminal voltage output from the pre-processing signal is subjected to a first filtering process and ADC sampling. The first filtering process filters out the AC component and retains the DC component.

3. The DC bus voltage sampling method according to claim 2, characterized in that, The output of the pre-processed signal is sampled by an ADC, the ADC sampling result is subjected to a first digital filtering process implemented in software, and the output of the first digital filtering process is mathematically calculated to obtain the DC bus voltage.

4. The DC bus voltage sampling method according to claim 2, characterized in that, The output of the pre-processed signal is subjected to a first analog filtering process implemented by hardware circuitry. The output of the first analog filtering process is sampled by an ADC. The DC bus voltage value is obtained by mathematical calculation of the ADC sampling result.

5. The DC bus voltage sampling method according to claim 1, characterized in that, The proportional addition of the three-phase terminal voltages is implemented in hardware circuitry. The DC bus voltage value is obtained through ADC sampling and a second filtering process implemented in software.

6. The DC bus voltage sampling method according to claim 1, characterized in that, The three-phase terminal voltages output from the pre-processing signal are sampled by an ADC. The sampled three-phase terminal voltages are then subjected to software-based proportional addition and second filtering to obtain the DC bus voltage value.

7. The DC bus voltage sampling method according to claim 1, characterized in that, The signal modulation content includes: constructing a functional relationship between the three-phase terminal voltage, DC bus voltage, and three-phase duty cycle within one pulse width modulation cycle. ; This indicates the voltage at phase A terminal within one PWM cycle. The average value is , This indicates the voltage at phase B within one PWM cycle. The average value is , This represents the voltage at the C-phase terminal within one PWM cycle. The average value is ; in, Indicates the DC bus voltage; This indicates the duty cycle of the A-phase bridge arm switch state. This indicates the duty cycle of the B-phase bridge arm switch state. The duty cycle indicates the switching state of phase C bridge arm; Obtain the functional relationship between the three-phase duty cycle and the electrical angle, satisfying: ； ； ； ； in, Indicates the modulation ratio. Indicates electrical angle; Therefore, the functional relationships between the three-phase terminal voltage, DC bus voltage, modulation ratio, electrical angle, and duty cycle are as follows: ； ； 。 8. A motor controller, characterized in that, include: The three-phase inverter bridge connects the positive and negative terminals p and n of the DC bus to the three-phase terminals a, b and c of the motor. The voltage sampling circuit is provided with at least one channel for sampling the phase terminal voltage signal of at least one of the three phases a, b, and c; The control unit includes a processor and a memory, the memory storing a computer program that, when executed by the processor, implements the DC bus voltage sampling method as described in any one of claims 1-7 to obtain a DC bus voltage value and perform motor control based on the DC bus voltage value.

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