Switching circuit, power module unit, motor controller circuit and support circuit

Abstract

A switching circuit, a power module unit, a motor controller circuit and a support circuit are provided. The switching circuit (300) includes a power semiconductor device (310) and a current mirror circuit (320). A power semiconductor device (310) is in a switching current path (315) between the switching node (620) and a reference potential. The current mirror circuit (320) includes a first transistor (Q1) and a second transistor (Q2), and replicates a reference current IRef through the first transistor (Q1) by controlling an output current Iout through the second transistor (Q2). The first transistor (Q1) is electrically connected outside the switching current path (315) and is electrically connected in series with the power semiconductor device (310) in the first current path (100). A second transistor (Q2) is in the second current path (200). The first current path (100) and the second current path (200) are electrically connected in parallel.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a switching circuit for voltage monitoring of a power semiconductor device. The switching circuit can be combined with or integrated into a power module cell or a motor controller circuit. BACKGROUND

[0002] Resilience of technical systems is of utmost importance. Real-time monitoring techniques that are able to track the state of a power semiconductor device enable sending of warning signals before a catastrophic system failure occurs and / or can be used for failure prediction. For some power semiconductor devices, the voltage drop across the power semiconductor device when it is turned on provides information about the health / aging state of the power semiconductor device. There is a continuous need to perform reliable voltage measurements in a switching circuit with a power semiconductor device with little effort during operation. SUMMARY

[0003] A switching circuit comprises a power semiconductor device and a current mirror circuit. The power semiconductor device is in a switching current path between a switching node and a reference potential. The current mirror circuit comprises a first transistor and a second transistor and replicates a reference current IRef through the first transistor by controlling an output current Iout through the second transistor. The first transistor is electrically connected outside the switching current path and in series with the power semiconductor device in a first current path. The second transistor is in a second current path. The first current path and the second current path are electrically connected in parallel.

[0004] The current mirror circuit enables imaging of the voltage drop across the power semiconductor device as a voltage drop or a combination of voltage drops across elements in the first current path and the second current path. The monitored voltage can remain unaffected by high switching voltages handled by the power semiconductor device. Voltage monitoring can be performed in the switching circuit without a shunt at typical low voltages of logic circuits.

[0005] A compensating pn-junction can be used to map the voltage drop across the power semiconductor device to a voltage drop across one of the elements in the second current path. The second current path can remain unaffected by high switching voltages handled by the power semiconductor device. By observing a single voltage in a low voltage domain, the voltage across the power semiconductor device can be monitored.

[0006] Those skilled in the art will recognize additional features and advantages upon reading the following detailed description, and upon viewing the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0007] The accompanying drawings are provided to further understand the embodiments and form a part of the specification. The drawings illustrate embodiments of a switching circuit, a power module unit, and a motor controller circuit, and together with the description, explain the principles of the embodiments. Further embodiments are described in the following detailed description and claims. Features of various embodiments can be combined with each other.

[0008] Figure 1 is a circuit diagram of a current mirror circuit based on two npn bipolar junction transistors for discussing a background that is helpful to understand the embodiments.

[0009] Figure 2 is a circuit diagram of a current mirror circuit based on two pnp bipolar junction transistors for discussing a background that is helpful to understand the embodiments.

[0010] Figure 3 is a circuit diagram of a switching circuit having a power semiconductor device and a current mirror circuit based on two npn bipolar junction transistors according to an embodiment.

[0011] Figure 4 is a circuit diagram of a switching circuit having a power semiconductor device and a current mirror circuit based on two npn bipolar junction transistors and having a high voltage diode according to an embodiment.

[0012] Figure 5 is a circuit diagram of a switching circuit having a power semiconductor device and a current mirror circuit based on two pnp bipolar junction transistors and having a high voltage diode according to an embodiment.

[0013] Figure 6 is a circuit diagram of a switching circuit having a power semiconductor device and a current mirror circuit based on two npn bipolar junction transistors and having a compensating pn junction according to an embodiment.

[0014] Figure 7 is a circuit diagram of a switching circuit having a power semiconductor device and a current mirror circuit based on two n-channel field effect transistors (FETs) and having a compensating FET according to an embodiment.

[0015] Figure 8 is a circuit diagram of a switching circuit having a power semiconductor device and a current mirror circuit based on two pnp bipolar junction transistors and having a compensating pn junction according to an embodiment.

[0016] Figure 9 is a circuit diagram of a switching circuit having a power semiconductor device and a current mirror circuit based on two p-channel FETs and having a compensating FET according to an embodiment.

[0017] Figure 10is a simplified circuit diagram of a power module unit with a switching circuit according to an embodiment including a measurement across the transistor load path in the output branch of the current mirror circuit, the switching circuit having a power semiconductor device, a current mirror circuit based on two npn bipolar junction transistors, and a voltage monitoring unit.

[0018] Figure 11 is a simplified circuit diagram of a motor controller circuit with a switching circuit according to an embodiment including a measurement across the compensating pn junction in the output branch of the current mirror circuit, the switching circuit having a power semiconductor device, a current mirror circuit based on two npn bipolar junction transistors, and a voltage monitoring unit.

[0019] Figure 12 is a schematic diagram of a multi-device package integrating three transistors according to an embodiment.

[0020] Figure 13 is a schematic diagram of a multi-diode package integrating two matching diodes according to an embodiment.

[0021] Figure 14 is a simplified circuit diagram of an integrated gate driver support circuit according to an embodiment. DETAILED DESCRIPTION

[0022] In the following detailed description, reference is made to the accompanying drawings, which form a part hereof, and in which are shown, by way of illustration, specific embodiments of switching circuits, power module units, and motor controller circuits. Structural or logical modifications of the illustrated embodiments can be made without departing from the scope of the present disclosure. For example, certain features of one embodiment can be used on or in combination with other embodiments to yield yet another embodiment. The present disclosure is intended to embrace all such modifications and changes and aspects thereof. The embodiments are described with specificity to the extent necessary to convey a complete understanding of the disclosure. The figures are not drawn to scale and are used solely for illustrative purposes. Corresponding elements throughout the various figures are designated by like reference numerals unless otherwise specified.

[0023] The terms "having," "containing," "including," "comprising," and the like are open-ended and are intended to mean the presence of the stated structure, element, or feature, but do not preclude the presence or addition of additional elements or features. Unless otherwise indicated, the articles "a," "an," and "the" are intended to include both the singular and the plural.

[0024] The term“direct electrical connection” can describe a permanent low-resistance ohmic connection between directly electrically connected elements, such as a direct contact between the relevant elements or a low-resistance connection via a metal and / or a heavily doped semiconductor material.

[0025] The terms“signal connection” and“electrically coupled” can include a permanent low-resistance ohmic connection between electrically connected elements, such as a direct contact between the relevant elements or a low-resistance connection via a metal and / or a heavily doped semiconductor material, but do not exclude the presence of further passive and / or active elements in the signal path between the“signal connection” or“electrically coupled” elements. For example, further elements can include resistors, resistive conductor lines, capacitors and / or inductors, transistors, semiconductor diodes, Schottky diodes, transformers, optocouplers, and others.

[0026] The term“power semiconductor device” refers to a semiconductor device having a voltage blocking capability of at least 30 V, such as 48 V, 100 V, 600 V, 1.6 kV, 3.3 kV, or more, and having a nominal on-state current or forward current of at least 200 mA, such as 1 A, 10 A, or more.

[0027] The present disclosure relates to a switching circuit, which can comprise a power semiconductor device and a current mirror circuit. The power semiconductor device is in a switching current path between a switching node and a reference potential. The current mirror circuit can comprise a first transistor and a second transistor and can replicate a reference current IRef through the first transistor by controlling an output current Iout through the second transistor. The first transistor can be electrically connected outside the switching current path and in series with the power semiconductor device in a first current path. The second transistor can be in a second current path. The first current path and the second current path can be electrically connected in parallel.

[0028] The power semiconductor device can be a field effect transistor (FET), such as, by way of example, an insulated gate field effect transistor (IGFET) such as a silicon metal-oxide semiconductor FET (Si-MOSFET) or a silicon carbide metal-oxide semiconductor FET (SiC-MOSFET), a high electron mobility transistor (HEMT), or an insulated gate bipolar transistor (IGBT).

[0029] The potential of the switching node can vary between a high potential and a low potential. For example, the switching node can be a switching node of a half-bridge comprising a high-side switch and a low-side switch electrically connected in series between a high potential and a reference potential GND.

[0030] A controlled load path between the load terminals of the power semiconductor device is electrically connected between the switching node and the reference potential. The controlled load path can be an emitter-collector path of an IGBT or a source-drain path of a FET or HEMT. In addition to parasitic elements, the controlled load path of the power semiconductor device can be the only component in the switching current path. The first load terminal, e.g. the collector of an IGBT or the drain of a FET, can be directly connected to the switching node and the emitter of an IGBT or the source of a FET can be directly connected to the reference potential.

[0031] The controlled load path of the first transistor of the current mirror circuit is electrically connected in series with the controlled load path of the power semiconductor device and outside the switching current path. In the on-state of the power semiconductor device, the total current flowing through the controlled load path of the power semiconductor device comprises the switching current Isw flowing between the switching node and the reference potential and the reference current Iref.

[0032] The first and second transistors can be a matched pair of transistors having the same nominal characteristics and absolute maximum ratings and can be arranged in such a way that no or only an edge junction temperature difference can be generated between the first and second transistors. The output current Iout through the controlled load path of the second transistor is then adjusted to the reference current Iref through the controlled load path of the first transistor of the current mirror.

[0033] When the power semiconductor device is on, a voltage drop Vdrop is generated across the controlled load path of the power semiconductor device by the total current through the power semiconductor device. Since the total voltage drop in the loop of the first current path is equal to the total voltage drop in the loop of the second current path in parallel, the voltage drop Vdrop influences the voltage across the active devices in the second current path. From one or more voltage measurements across the active devices in the second current path, conclusions can be drawn about the voltage drop Vdrop.

[0034] According to an embodiment, the switching circuit can further comprise a voltage monitoring unit configured to monitor the voltage in the second current path.

[0035] The voltage monitoring unit can comprise a comparator comparing the voltage obtained from the second current path to one or more threshold voltages. Alternatively, the voltage monitoring unit can comprise an analog-to-digital converter converting the voltage in the second current path to a digital voltage value.

[0036] The voltage can be tapped from more than two nodes of the first current path and / or the second current path, wherein the voltage monitoring unit can comprise a voltage subtracter circuit for combining more than one tapped voltage. Alternatively, one or two voltages can be tapped from the second current path and directly passed to the voltage monitoring unit. The voltage to be monitored can be tapped at a terminal of the second transistor. The voltage monitoring unit can be a separate circuit or can be integrated in a gate driver integrated circuit or in a motor controller integrated circuit.

[0037] According to an embodiment, the switching circuit can further comprise a compensating pn junction, wherein the compensating pn junction and the second transistor are electrically connected in series in the second current path.

[0038] The compensating pn junction is electrically connected in series with the controlled load path of the second transistor. The cathode side of the compensating pn junction and the second transistor can be directly electrically connected to each other.

[0039] When the forward characteristic of the compensating pn junction and the corresponding characteristic of the second transistor of the current mirror circuit are sufficiently similar, the forward voltage drop across the compensating pn junction can be almost the same as the voltage drop between the base and the emitter or between the gate and the source of the second transistor. A single voltage measurement in the second current path can be sufficient to determine the voltage drop.

[0040] According to an embodiment, the compensating pn junction can comprise an auxiliary transistor in diode configuration, wherein the base-emitter junction or the body-source junction of the auxiliary transistor and the second transistor are electrically connected in series.

[0041] A transistor in diode configuration is diode-connected. A diode-connected transistor is made by directly connecting the base and the collector of a BJT or the gate and the drain of an IGFET.

[0042] The first transistor, the second transistor and the auxiliary transistor can be matched transistors having the same or almost the same nominal characteristics and absolute maximum ratings, and can be arranged in such a way that no or almost no junction temperature difference is created between the first transistor, the second transistor and the auxiliary transistor. Then, the base-to-emitter voltage of the auxiliary transistor of the bipolar junction transistor (BJT) type and the base-to-emitter voltage of the second transistor, or the gate-to-source voltage of the auxiliary transistor of the insulated gate field effect transistor type and the gate-to-source voltage of the second transistor are always sufficiently the same, so that the voltage drop Vdrop can be obtained from a single voltage measurement in the second current path.

[0043] According to an embodiment, the compensating pn junction, the first transistor and the second transistor can be integrated in a multi-device package.

[0044] Integrating the first transistor, the second transistor and the auxiliary transistor in a single package can reduce the difference between the junction temperatures of the first transistor, the second transistor and the auxiliary transistor.

[0045] According to an embodiment, the switching circuit can further comprise a voltage supply circuit configured to supply an auxiliary supply voltage across both the first current path and the second current path.

[0046] The voltage supply circuit can be a dedicated circuit whose only purpose is to supply the auxiliary supply voltage to the first current path and the second current path of the switching circuit. Alternatively, the voltage supply circuit can be a supply circuit for supplying further circuits, for example logic circuits integrated in a gate driver integrated circuit and / or a motor controller integrated circuit.

[0047] According to an embodiment, the first current path can comprise a further first electrical element and the second current path can comprise a further second electrical element, wherein for a predefined current, a first voltage drop across the first electrical element and a second voltage drop across the second electrical element can be equal or almost equal.

[0048] The further first electrical element and the further second electrical element can comprise resistors, diodes and / or further transistors. Each further first electrical element can have a corresponding further second electrical element. The first voltage drop is the total voltage drop across all further first electrical elements. The second voltage drop is the total voltage drop across all further second electrical elements. For any arbitrary current in a range of currents of interest, the individual voltage drop across one of the further first elements can be equal or almost equal to the voltage drop across the corresponding further second element.

[0049] When for each current in a range of currents of interest, the current generates the same voltage drop across symmetrical elements in the first current path and the second current path, the voltage monitored in the second current path can be a linear function or even a constant function of the voltage drop across the power semiconductor device in the on state.

[0050] According to an embodiment, the ohmic resistances in the first current path and the ohmic resistances in the second current path deviate from each other by no more than 5% of the average of the ohmic resistances.

[0051] For example, the ohmic resistances in the first current path and the ohmic resistances in the second current path deviate from each other by no more than 2% or 1% of the average of the ohmic resistances.

[0052] The smaller the difference between the ohmic resistances in the first current path and the ohmic resistances in the second current path, the simpler the relationship between the voltage monitored in the second current path and the voltage drop Vdrop.

[0053] According to an embodiment, the switching circuit can further comprise a first diode in the first current path and a second diode in the second current path, wherein the first diode is configured to block a blocking voltage across the power semiconductor device in the off state of the power semiconductor device, wherein the first diode and the second diode are forward biased when the power semiconductor device is in the on state, and wherein the first diode and the second diode have equal nominal characteristics.

[0054] The smaller the difference between the forward voltage between the first diode and the second diode at the same current, the simpler the relationship between the voltage monitored in the second current path and the voltage drop Vdrop.

[0055] According to an embodiment, the first diode and the second diode can be integrated in a multi-diode package.

[0056] Integrating the first diode and the second diode in a single package can reduce the difference between the junction temperature of the first diode and the second diode. The smaller the dependence of the difference between the forward voltage between the first diode and the second diode on temperature, the better the single voltage monitored in the second current path can approximate the voltage drop Vdrop. The first diode and the second diode can be single diode devices selected from the same batch, and / or such that the measured diode parameters match better than 50% of any diode devices with the same nominal characteristics. According to another example, the first diode and the second diode can be formed on the same semiconductor die.

[0057] According to an embodiment, the first transistor, the second transistor, the first diode, the second diode, the further first electrical element, and the further second electrical element are integrated in a multi-device package.

[0058] For example, an integrated gate driver support circuit can integrate the first transistor, the second transistor, the first diode, the second diode, the further first electrical element, and the further second electrical element. Alternatively, the first transistor, the second transistor, the first diode, the second diode, the further first electrical element, and the further second electrical element can be integrated in a gate driver circuit or a motor controller circuit.

[0059] According to an embodiment, the first transistor and the second transistor can comprise bipolar junction transistors, and the emitter of the first transistor and the emitter of the second transistor can be directly electrically connected to each other.

[0060] According to another embodiment, the first transistor and the second transistor can comprise field effect transistors, and the source of the first transistor and the source of the second transistor can be directly electrically connected to each other.

[0061] According to the implementation, the first transistor and the second transistor may include a p-channel field-effect transistor, or the first transistor and the second transistor may include a pnp bipolar junction transistor.

[0062] According to an embodiment, the switching circuit may further include a voltage monitoring unit configured to monitor the voltage across the second transistor.

[0063] According to another embodiment, the first transistor and the second transistor include an n-channel field-effect transistor, or the first transistor and the second transistor include an npn bipolar junction transistor.

[0064] According to an embodiment, the switching circuit may further include a voltage monitoring unit electrically connected to the load electrode of the second transistor and configured to monitor the voltage across the second transistor.

[0065] According to an embodiment, the switching circuit may further include a voltage monitoring unit configured to monitor the voltage between the anode side of the compensated pn junction and a network node in the first current path between the power semiconductor device and the first transistor.

[0066] Another embodiment of this disclosure relates to a power module unit. The power module unit may include a switching circuit and a gate driver circuit as described above. The gate driver circuit drives a gate signal to the gate of a power semiconductor device. The gate driver circuit and a voltage monitoring unit may be integrated into a gate driver integrated circuit.

[0067] Another embodiment of this disclosure relates to a motor controller circuit. The motor controller circuit may include a switching circuit as described above and a motor controller driving an H-bridge, the H-bridge including power semiconductor devices of the switching circuit, wherein the motor controller and voltage monitoring unit are integrated in a motor controller integrated circuit.

[0068] Another embodiment of this disclosure relates to an integrated gate driver support circuit. The integrated gate driver support circuit may include a current mirror circuit comprising a first transistor and a second transistor and configured to replicate a reference current Iref passing through the first transistor by controlling an output current Iout passing through the second transistor. The first transistor is electrically connected between a sensing terminal SNS and a reference terminal REF. A first diode may be electrically connected between a power supply terminal V+ and a drive terminal DRV, wherein the cathode of the first diode faces the drive terminal DRV. A second diode may be electrically connected in series with the second transistor between the power supply terminal V+ and the reference terminal REF, wherein the anode of the second diode faces the power supply terminal V+. The first and second diodes may have equal nominal characteristics.

[0069] Figure 1 A current mirror circuit 320 including a first transistor Q1 and a second transistor Q2 is shown, wherein the first transistor Q1 and the second transistor Q2 are npn bipolar junction transistors. A resistor R and the load path of the first transistor Q1 between its collector and emitter are electrically connected in series in a first current path 100 between the auxiliary supply voltage VCC and the reference potential GND. The load path of the second transistor Q2 between its collector and emitter is located in a second current path 200 between the auxiliary supply voltage VCC and the reference potential. The emitters of the first transistor Q1 and the second transistor Q2 are directly connected to each other and to the reference potential GND. The DC current gain β of the first transistor Q1 is... Q1 It is the collector current I of the first transistor Q1 c_Q1 With base current I b_Q1 The ratio between them (Equation (1)). The DC current gain β of the second transistor Q2 Q2 It is the collector current I of the second transistor Q2 c_Q2 With base current I b_Q2 The ratio between them (Equation (2)):

[0070] Equation (1):

[0071] Equation (2):

[0072] The first transistor Q1 and the second transistor Q2 are matched transistor pairs, such as differential pairs. The DC current gain β including the first transistor Q1... Q1 DC current gain β of the second transistor Q2 The nominal characteristics are the same (Equation (3)):

[0073] Equation (3): β Q1 =β Q2 =β

[0074] In the current mirror circuit 320, the base-to-emitter voltage V of the first transistor Q1 be_Q1 The base-to-emitter voltage V of the second transistor Q2 be_Q2 Equal to (Equation (5)), therefore the base current I of the first transistor Q1 is equal to... b_Q1 The base current I of the second transistor Q2 b_Q2 Equal (Equation (4)):

[0075] Formula (4): I b_Q1 =I b_Q2 =I b

[0076] Equation (5): V be_Q1 =V be_Q2 =Vbe

[0077] As shown in equation (6), when the DC current gain β >> 1, the reference current Iref through the resistor R in the first current path 100 is almost equal to the collector current I of the first transistor Q1. c_Q1 The collector current I of the second transistor Q2 c_Q2 The collector current I of the second transistor Q2 c_Q2 Equal to the output current Iout of the current mirror circuit 320 in the second current path:

[0078] Formula (6): I ref ~I c_Q1 =I c_Q2 =I out

[0079] The reference current Iref flowing through the first current path 100 generates a base-to-emitter voltage V between the base and emitter of the first transistor Q1. be_Q1 The second base-to-emitter voltage V between the base and emitter of the second transistor Q2. be_Q2 Adjust to the first base-to-emitter voltage V be_Q1 Since the first transistor Q1 and the second transistor Q2 have the same characteristics, assuming that the DC current gain β of the two transistors Q1 and Q2 is significantly greater than 1, the output current Iout driven by the second transistor Q2 in the second current path 200 is equal to the reference current Iref.

[0080] exist Figure 2 In the current mirror circuit 320, the first transistor Q1 and the second transistor Q2 are PNP bipolar junction transistors. The load path of the first transistor Q1 between its emitter and collector, and the resistor R, are connected in series in the first current path 100 between the auxiliary supply voltage VCC and the reference potential GND. The load path of the second transistor Q2 between its emitter and collector is located in the second current path 200 between the auxiliary supply voltage VCC and the reference potential GND. The emitters of the first transistor Q1 and the second transistor Q2 are directly connected to each other and to the auxiliary supply voltage VCC. The DC current gain β of the first transistor Q1... Q1 DC current gain β of the second transistor Q2 Q2 It is defined by equations (1) and (2) above.

[0081] The first transistor Q1 and the second transistor Q2 are matched transistor pairs, such as differential pairs. The DC current gain β including the first transistor Q1... Q1 DC current gain β of the second transistor Q2 The nominal characteristics are the same, as given in equation (3) above.

[0082] As given by equations (4) and (5), the base-to-emitter voltage V of the first transistor Q1 be_Q1 The base-to-emitter voltage V of the second transistor Q2 be_Q2 The base current I of the first transistor Q1 is equal to that of the second transistor Q1. b_Q1 The base current I of the second transistor Q2 b_Q2 equal.

[0083] When the DC current gain β >> 1, the reference current Iref through the resistor R in the first current path 100 is approximately equal to the collector current I of the first transistor Q1. c_Q1 The collector current I of the second transistor Q2 c_Q2 As given in equation (6), the collector current I of the second transistor Q2 c_Q2 It is equal to the output current Iout of the current mirror circuit 320 in the second current path 200.

[0084] The reference current Iref flowing through the first current path 100 generates a base-to-emitter voltage V between the base and emitter of the first transistor Q1. be_Q1 The second base-to-emitter voltage V between the base and emitter of the second transistor Q2. be_Q2 Adjust to the first base-to-emitter voltage V be_Q1 Since the characteristics of the first transistor Q1 and the second transistor Q2 are approximately the same, assuming that the DC current gain β of the first transistor Q1 and the second transistor Q2 is significantly greater than 1, the output current Iout driven by the second transistor Q2 in the second current path 200 is approximately equal to the reference current Iref.

[0085] Figure 3 A switching circuit 300 with a power semiconductor device 310 and a current mirror circuit 320 is shown. The power semiconductor device 310 is an IGBT that operates as a low-side switch in a half-bridge 600. In the on state, the power semiconductor device 310 conducts a switching current Isw flowing in the switching current path between the switching node 620 of the half-bridge 600 and the switching reference potential AGND.

[0086] The current mirror circuit 320 includes a first transistor Q1 and a second transistor Q2. The power semiconductor device 310, the first transistor Q1, and the generator produce a first additional voltage V... p1 The first additional component 190 is connected in series in the first current path 100 between the auxiliary supply voltage VCC and the logic reference potential VEE. The second transistor Q2 generates the second additional voltage V. p2The second additional component 290 is connected in series in the second current path 200 between the auxiliary supply voltage VCC and the logic reference potential VEE. The first current path 100 and the second current path 200 are connected in parallel. The switching current Isw and the reference current Iref flowing through the first transistor Q1 generate a voltage drop V across the power semiconductor device 310. drop The total voltage drop in the first current path 100 is equal to the total voltage drop in the second current path 200 (Equation (7)):

[0087] Equation (7): V p1 +V drop +V be_Q1 =V p2 +V ce_Q2

[0088] The current mirror circuit 320 replicates the reference current Iref flowing through the first transistor Q1 and the power semiconductor device 310 by controlling the output current Iout through the second transistor Q2. A first additional element 190 in the first current path 100 and a second additional element 290 in the second current path 200 are symmetrically arranged such that a first additional voltage V caused by the reference current Iref in the first current path 100 is generated. p1 and the second additional voltage V generated by the output current Iout in the second current path 200 p2 Same. Equation (7) simplifies to Equation (8):

[0089] Equation (8): V drop +V be_Q1 =V ce_Q2

[0090] Equation (9):

[0091] The voltage drop V across the power semiconductor device 310 drop It can be obtained from the collector-emitter voltage V ce_Q2 Subtract the base-to-emitter voltage V from the middle be_Q2 To obtain (Equation (9)). For example, the collector-to-emitter voltage V ce_Q2 and base-to-emitter voltage V be_Q2 A voltage monitoring unit, including a voltage subtractor circuit, can be provided, wherein the voltage subtractor circuit generates an output voltage proportional to the voltage difference between two input signals applied to the inverting and non-inverting terminals of an operational amplifier.

[0092] In the example shown, the first voltage monitoring unit 381 is electrically connected between the collector and emitter of the second transistor Q2, and the second voltage monitoring unit 382 is electrically connected between the base and emitter of the second transistor Q2.

[0093] Figure 4 A switching circuit 300 is shown, which has a first additional element in a first current path including a first diode 130 and a first resistor 140, and a second additional element in a second current path 200 including a second diode 230 and a second resistor 240.

[0094] The first resistor 140 may include the total ohmic resistance in the first current path 100 and may include wiring resistance and / or one or more discrete resistors. The second resistor 240 may include the total ohmic resistance in the second current path 200 and may include wiring resistance in the second current path 200 and / or one or more discrete resistors. The first resistor 140 and the second resistor 240 have the same resistance, or the resistance of the first resistor 140 and the resistance of the second resistor 240 deviate from each other by no more than 5% of the average value of the two resistances, for example, no more than 2% or 1% of the average value of the two resistances. Since the reference current Iref through the first resistor 140 and the output current Iout through the second resistor 240 are equal, the voltage V across the first resistor 140 is equal. R1 The voltage V across the second resistor 240 R2 Equal (Equation (10)):

[0095] Equation (10): V R1 =V R2 =V R

[0096] The first current path 100 includes a first diode 130, and the second current path 200 includes a second diode 230. The first diode 130 is electrically connected between the auxiliary supply voltage VCC and the power semiconductor device 310, and blocks the blocking voltage across the power semiconductor device 310 when the power semiconductor device 310 is off. When the power switching device 310 is on, the first diode 130 and the second diode 230 are forward biased.

[0097] The first diode 130 and the second diode 230 can have the same type and nominal characteristics, and can exhibit the same or nearly the same dependence of forward voltage on forward current, such that, at least within the range of interest of the reference current Iref and the output current Iout, if the reference current Iref in the first current path 100 and the output current Iout in the second current path 200 are equal, then the diode forward voltage V across the first diode 130 is... D1 The forward voltage V across the second diode 230 D2 Equal (Equation (11)):

[0098] Equation (11): VD1 =V D2 =V D

[0099] The total voltage drop in the first current path 100 and the total voltage drop in the second current path 200 are equal (Equation (12)):

[0100] Equation (12): V R1 +V D1 +V drop +V be_Q1 =V R2 +V D2 +V ce_Q2

[0101] When the output current Iout and the reference current Iref are equal, equation (12) simplifies to equation (12a):

[0102] Equation (12a):

[0103] A single voltage monitoring unit 380 can directly measure the collector-to-base voltage V. cb_Q2 .

[0104] The integrated gate driver support circuit 700 can integrate a first transistor Q1, a second transistor Q2, a first diode 130, a second diode 230, a first resistor 140, and a second resistor 240. The bases of the first transistor Q1 and the second transistor Q2 are directly connected to the sensing terminal SNS of the integrated gate driver support circuit 700. The cathode of the first diode 130 is electrically connected to the drive output DRV. The first current path 100 and the second current path 200 are connected in parallel between the power supply terminal V+ and the reference terminal REF.

[0105] In the example shown, the integrated gate driver support circuit 700 also integrates a voltage monitoring unit 380. Alternatively, or in addition to the integrated voltage monitoring unit 380, the integrated gate driver support circuit 700 may include a monitor terminal MON that is directly connected to the collector of the second transistor Q2.

[0106] The voltage supply circuit 350 provides an auxiliary supply voltage VCC across the first current path 100 and the second current path 200. The voltage supply circuit 350 can be electrically connected between the power supply terminal V+ and the reference terminal REF.

[0107] Figure 5The equivalent switching circuit where the first transistor Q1 and the second transistor Q2 are PNP transistors is shown. A first diode 130 and a first resistor 140 are connected in series between the collector of the first transistor Q1 and the switching node 620. A second diode 230 and a second resistor 240 are connected in series between the collector of the second transistor Q2 and the reference potential GND.

[0108] exist Figure 6 In the second current path 200, an auxiliary transistor Q3 configured as a diode is included. The base-emitter junction of the auxiliary transistor Q3 and the controlled load path of the second transistor Q2 are connected in series. The base-emitter junction of the auxiliary transistor Q3 forms a compensation pn junction 295, wherein the compensation pn junction 295 and the second transistor Q2 are connected in series in the second current path 200. When the compensation pn junction 295 is forward biased, the compensation voltage V across the compensation pn junction 295 is... be_Q3 The voltage drop along the first current path 100 is equal to the total voltage drop along the second current path 200 (Equation 13).

[0109] Equation (13): V R1 +V D1 +V drop +V be_Q1 =V R2 +V D2 +V be_Q3 +V ce_Q2

[0110] The auxiliary transistor Q3 has the same nominal characteristics as the first transistor Q1 and the second transistor Q2. The auxiliary transistor Q3, the first transistor Q1, and the second transistor Q2 can be selected from the same batch and / or chosen to match the measured transistor parameters better than 50% of any three-element transistors with the same nominal characteristics. The auxiliary transistor Q3, the first transistor Q1, and the second transistor Q2 are a matched three-element. When the reference current Iref and the output current Iout are equal, the base-to-emitter voltages of the first transistor Q1, the second transistor Q2, and the auxiliary transistor Q3 are equal (Equation (14)):

[0111] Equation (14): V be_Q1 =V be_Q2 =V be_Q3

[0112] Equation (13) simplifies to equation (15):

[0113] Equation (15): V drop =V ce_Q2

[0114] Voltage drop V dropThe collector-emitter voltage V is replicated to the second transistor Q2. ce_Q2 And it can be monitored by a single voltage monitoring unit 380 connected to the collector and emitter of the second transistor Q2.

[0115] exist Figure 7 In the diagram, the first transistor Q1 and the second transistor Q2 are n-channel field-effect transistors, wherein the sources of the first transistor Q1 and the second transistor Q2 are directly electrically connected to each other. Voltage drop V drop The drain-to-source voltage V that is replicated to the second transistor Q2 ds_Q2 .

[0116] exist Figure 8 In the diagram, the first transistor Q1 and the second transistor Q2 are pnp bipolar junction transistors. The emitters of the first transistor Q1 and the second transistor Q2 are directly electrically connected to each other and connected to the auxiliary supply voltage VCC. The voltage drop V... drop The collector-emitter voltage V is replicated to the second transistor Q2. ce_Q2 .

[0117] exist Figure 9 In the diagram, the first transistor Q1 and the second transistor Q2 are p-channel field-effect transistors, wherein the sources of the first transistor Q1 and the second transistor Q2 are directly electrically connected to each other. Voltage drop V drop The drain-to-source voltage V that is replicated to the second transistor Q2 ds_Q2 .

[0118] Figure 10 A gate driver integrated circuit 400 is shown, integrating a gate driver circuit 410 and an analog-to-digital converter 420 serving as a voltage monitoring unit 380. The analog-to-digital converter 420 converts the voltage received between the analog input pin ADin and the signal ground pin SGND into a digital value. The analog input pin ADin is electrically connected to the collector of a second transistor Q2. The signal ground pin SGND is electrically connected to the emitter of the second transistor Q2, which has a logic reference potential VEE. A power semiconductor device 310 is electrically connected between the switching node 620 and the switching reference potential AGND.

[0119] The signal ground pin SGND is independent of the switch reference potential AGND and can be the potential of the emitters of the first transistor Q1 and the second transistor Q2, which is lower (more negative) than the switch reference potential AGND.

[0120] exist Figure 11In this circuit, the motor controller integrated circuit 500 integrates a motor controller circuit 510 and an analog-to-digital converter 420. The motor controller circuit 510 controls multiple power semiconductor devices arranged to control the motor, and the analog-to-digital converter 420 converts the voltage received between the analog input pin ADin and the internal reference potential. The motor controller integrated circuit 500 has an internal connection between the internal reference potential and the reference potential GND, so that the analog-to-digital converter 420 does not convert the collector-to-emitter voltage V. ce_Q2 The required full-swing operation. Considering equation (15), the voltage drop V drop Equal to the collector-to-base voltage V of the second transistor Q2 cb_Q2 With base-to-emitter voltage V be_Q2 The sum (equation (16)):

[0121] Equation (16): V drop =V cb_Q2 +V be_Q2

[0122] The second transistor Q2 and the third transistor Q3 are matched transistors (Equation (17)):

[0123] Equation (17): V be_Q2 =V be_Q3

[0124] Regarding voltage drop V drop The measurement can be performed using the base-to-emitter voltage V of auxiliary transistor Q3. be_Q3 Instead of the base-to-emitter voltage V of the second transistor Q2 be_Q2 (Equation (18)):

[0125] Equation (18): V drop =V cb_Q2 +V be_Q3

[0126] Therefore, the analog input pin ADin of the motor controller integrated circuit 500 is electrically connected to the base or collector of the auxiliary transistor Q3.

[0127] As described above, the analog-to-digital converter 420 is used as the voltage monitoring unit 380. The motor controller integrated circuit 500 can output a digital value of the voltage drop Vdrop to a higher processing instance via a data interface at regular intervals or as needed to estimate remaining life or check for pre-failure conditions.

[0128] Figure 12A multi-device package 340 integrating at least a first transistor Q1, a second transistor Q2, and an auxiliary transistor Q3 is shown. In the shared multi-device package 340, the first transistor Q1, the second transistor Q2, and the auxiliary transistor Q3 are exposed to the same temperature and temperature budget, such that the identity or near-identity of the device parameters is not compromised by the different junction temperatures of the first transistor Q1, the second transistor Q2, and the auxiliary transistor Q3.

[0129] If the first transistor Q1, the second transistor Q2, and the auxiliary transistor Q3 are obtained from the same semiconductor die, then the characteristic parameters of the first transistor Q1, the second transistor Q2, and the auxiliary transistor Q3 can be highly identical.

[0130] Figure 13 A multi-diode package 345 integrating at least a first diode 130 and a second diode 230 is shown. In the shared multi-diode package 345, the first diode 130 and the second diode 230 are exposed to the same temperature and temperature budget, such that the identity or near-identity of device parameters is not compromised by the different junction temperatures of the first diode 130 and the second diode 230.

[0131] If the first diode 130 and the second diode 230 are obtained from the same semiconductor die, then the characteristic parameters of the first diode 130 and the second transistor 230 can be highly identical.

[0132] Figure 14 An integrated gate driver support circuit 700 is shown, integrating a current mirror circuit 320 with a first transistor Q1 and a second transistor Q2. The current mirror circuit 320 replicates a reference current Iref passing through the first transistor Q1 by controlling the output current Iout passing through the second transistor Q2. The load path of the first transistor Q1 is electrically connected between the sensing terminal SNS and the reference terminal REF. The bases of the second transistor Q2 and the first transistor Q1 are electrically connected to the sensing terminal SNS. The emitters of the first transistor Q1 and the second transistor Q2 are electrically connected to the reference terminal REF.

[0133] A first diode 130 and a first resistor 140 are electrically connected between the power supply terminal V+ and the drive terminal DRV, wherein the cathode of the first diode 130 faces the drive terminal DRV. A second diode 230 and a second resistor 240 are electrically connected between the power supply terminal V+ and the collector of the second transistor Q2, wherein the cathode of the second diode 230 faces the collector of the second transistor Q2. The collector of the second transistor Q2 is electrically connected to the monitor terminal MON. The first diode 130 and the second diode 230 have equal nominal characteristics. The first resistor 140 and the second resistor 240 have equal nominal resistances.

[0134] The integrated gate driver support circuit 700 may also include a voltage monitoring unit and / or a compensated pn junction as described above, and may be used in each of the switching circuits described above.

Claims

1. A switching circuit (300), comprising: A power semiconductor device (310) in a switching current path (315) between a switching node (620) and a reference potential; A current mirror circuit (320) includes a first transistor (Q1) and a second transistor (Q2), and is configured to replicate a reference current IRef passing through the first transistor (Q1) by controlling the output current Iout passing through the second transistor (Q2). The first transistor (Q1) is electrically connected outside the switching current path (315) and is connected in series with the power semiconductor device (310) in the first current path (100). The second transistor (Q2) is connected in the second current path (200), and the first current path (100) and the second current path (200) are connected in parallel.

2. The switching circuit (300) according to claim 1 further includes: A voltage monitoring unit (380) is configured to monitor the voltage in the second current path (200).

3. The switching circuit (300) according to any one of claims 1 to 2 further includes: A compensation pn junction (295) is provided, wherein the compensation pn junction (295) and the second transistor (Q2) are connected in series in the second current path (200).

4. The switching circuit (300) according to claim 3, in, The compensation pn junction (295) includes an auxiliary transistor (Q3) configured as a diode, wherein the base-emitter junction or body-source junction of the auxiliary transistor (Q3) is connected in series with the second transistor (Q2).

5. The switching circuit (300) according to any one of claims 3 to 4, in, The compensated pn junction (295), the first transistor (Q1), and the second transistor (Q2) are integrated in a multi-device package (340).

6. The switching circuit (300) according to any one of the preceding claims further includes: A voltage supply circuit (350) is configured to supply an auxiliary supply voltage across the first current path (100) and the second current path (200).

7. The switching circuit (300) according to any one of the preceding claims, in, The first current path (100) includes an additional first electrical element (190), and the second current path (200) includes an additional second electrical element (290), wherein, for a predefined current, a first voltage drop across the additional first electrical element (190) and a second voltage drop across the additional second electrical element (290) are equal.

8. The switching circuit (300) according to any one of the preceding claims, in, The ohmic resistance in the first current path (100) and the ohmic resistance in the second current path (200) deviate from each other by no more than 5% of the average value of the ohmic resistance.

9. The switching circuit (300) according to any one of the preceding claims further includes: The first diode (130) in the first current path (100) and the second diode (230) in the second current path (200) are configured such that the first diode (130) is configured to block the blocking voltage across the power semiconductor device (310) when the power semiconductor device (310) is off, and the first diode (130) and the second diode (230) are forward biased when the power semiconductor device (310) is on, and the first diode (130) and the second diode (230) have equal nominal characteristics.

10. The switching circuit (300) according to claim 9, in, The first diode (130) and the second diode (230) are integrated in a multi-diode package (345).

11. The switching circuit (300) according to claim 9, in, The first transistor (Q1), the second transistor (Q2), the first diode (130), the second diode (230), the additional first electrical component (190), and the additional second electrical component (290) are integrated in a multi-device package.

12. The switching circuit (300) according to any one of claims 1 to 11, in, The first transistor (Q1) and the second transistor (Q2) are bipolar junction transistors, and the emitters of the first transistor (Q1) and the second transistor (Q2) are directly electrically connected to each other.

13. The switching circuit (300) according to any one of claims 1 to 11, in, The first transistor (Q1) and the second transistor (Q2) are field-effect transistors, and the source of the first transistor (Q1) and the source of the second transistor (Q2) are directly electrically connected to each other.

14. The switching circuit (300) according to any one of claims 1 to 11, in, The first transistor (Q1) and the second transistor (Q2) are either p-channel field-effect transistors or pnp bipolar junction transistors.

15. The switching circuit (300) according to claim 14, It also includes a voltage monitoring unit (380) configured to monitor the voltage across the second transistor (Q2).

16. The switching circuit (300) according to any one of claims 1 to 11, in, The first transistor (Q1) and the second transistor (Q2) are either n-channel field-effect transistors or npn bipolar junction transistors.

17. The switching circuit (300) according to claim 16, It also includes a voltage monitoring unit (380) which is electrically connected to the load electrode of the second transistor (Q2) and is configured to monitor the voltage across the second transistor (Q2).

18. The switching circuit (300) according to claim 16, It also includes a voltage monitoring unit (380) configured to monitor the voltage between the anode side of the compensated pn junction (295) and the network node between the power semiconductor device (310) and the first transistor (Q1) in the first current path (100).

19. A power module unit, comprising: The switching circuit (300) according to any one of claims 15 to 18; as well as A gate driver circuit (410) is configured to drive a gate signal to the gate of the power semiconductor device (310), wherein the gate driver circuit (410) and the voltage monitoring unit (380) are integrated in a gate driver integrated circuit (400).

20. A motor controller circuit, comprising: The switching circuit (300) according to any one of claims 15 to 18; as well as A motor control circuit (510) is configured to drive an H-bridge of the power semiconductor device (310) including the switching circuit (300), wherein the motor control circuit (510) and the voltage monitoring unit (380) are integrated in a motor controller integrated circuit (500).

21. An integrated gate driver support circuit (700), comprising: A current mirror circuit (320) includes a first transistor (Q1) and a second transistor (Q2) and is configured to replicate a reference current Iref through the first transistor (Q1) by controlling the output current Iout through the second transistor (Q2), wherein the first transistor (Q1) is electrically connected between a sensing terminal SNS and a reference terminal REF. A first diode (130) is electrically connected between a power supply terminal V+ and a drive terminal DRV, wherein the cathode of the first diode (130) faces the drive terminal DRV; and A second diode (230) is electrically connected in series with the second transistor (Q2) in the path between the power supply terminal V+ and the reference terminal REF, wherein the anode of the second diode (230) faces the power supply terminal V+, and wherein the first diode (130) and the second diode (230) have equal nominal characteristics.

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