Range image pickup element and range image pickup device

Abstract

The invention relates to a range image capturing element and a range image capturing apparatus. A range image pickup element is provided with: a pixel array in which a plurality of pixels are arranged, each pixel having a photoelectric conversion element and N charge storage units (where N > = 2); and a pixel driving circuit that drives the pixel and distributes and accumulates the charges to the charge accumulation units, the pixel including: N transfer transistors that transfer the charges from the photoelectric conversion element to the N charge accumulation units, and N transfer transistors that transfer the charges from the photoelectric conversion element to the N charge accumulation units; n reset transistors that reset the charge storage unit; and N control transistors connected between the reset transistor and the power supply line, in the pixel, a control terminal of at least one of the N control transistors is connected to a control wiring capable of controlling an on state of the control transistor, the control terminals of the remaining control transistors, excluding the at least one control transistor, among the N control transistors are connected so as to fix the control transistors in a non-conductive state.

Description

Technical Field

[0001] This invention relates to distance image capturing elements and distance image capturing devices. Background Technology

[0002] Distance imaging devices that utilize the known speed of light and determine the distance between a measuring device and an object based on the time of flight of light in space (measurement space) have been realized (see, for example, Patent Document 1). In such imaging devices, for example, a distance imaging element including a photoelectric conversion element such as a photodiode is used for imaging. Furthermore, as a TOF-type distance imaging device, a known configuration includes a photoelectric conversion element that converts incident light into electrical charge and a distance imaging element that distributes and stores the charge converted by the photoelectric conversion element in multiple charge storage units.

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent No. 4235729

[0006] However, sometimes distance imaging sensors are used to perform addition operations on the pixels of each pixel. In such cases, additional control transistors are needed for the addition operation on each pixel and for eliminating the charge resulting from the addition. In existing distance imaging sensors, for example, when it is desired to perform addition operations on (2×2) pixels, a control transistor is added at a ratio of one transistor for every four pixels; when it is desired to perform addition operations on (4×4) pixels, a control transistor is added at a ratio of one transistor for every 16 pixels. That is, in conventional distance imaging sensors, when performing addition operations on (K×K) pixels, one control transistor is needed for every (K×K) pixels.

[0007] However, in conventional distance imaging sensors, when multiple pixel addition operations are treated as a single pixel, as described above, a mixture of pixels with and without control transistors exists, disrupting pixel symmetry and compromising the uniformity of pixel output characteristics. Therefore, in conventional distance imaging sensors, the uniformity of pixel output characteristics is compromised, sometimes resulting in reduced distance measurement accuracy. Summary of the Invention

[0008] The present invention was made to solve the above-mentioned problems, and its purpose is to provide a distance image imaging element and a distance image imaging device that can make pixel output characteristics uniform and improve the accuracy of distance measurement.

[0009] To address the aforementioned problems, one aspect of the present invention relates to a distance image imaging element comprising: a pixel array having a plurality of pixels arranged thereon, each pixel having a photoelectric conversion element that generates a charge corresponding to incident light, and N charge storage portions for storing the charge, wherein N is an integer greater than or equal to 2; and a pixel driving circuit that drives the pixel to distribute and store the charge to the charge storage portions, wherein the pixel comprises: N transfer transistors that transfer the charge from the photoelectric conversion element to the N charge storage portions; N reset transistors corresponding to the N charge storage portions and resetting the charge storage portions to a predetermined reset potential supplied from a power line; and N control transistors corresponding to the N reset transistors and connected between the reset transistors and the power line, wherein in the pixel, at least one of the N control transistors has a control terminal connected to a control wiring capable of controlling the conduction state of the control transistor, and the control terminals of the remaining control transistors (excluding the at least one control transistor) are connected in a manner that fixes the control transistors in a non-conducting state.

[0010] Furthermore, in another aspect of the present invention, the distance image camera element described above may have an even number of N charge storage units.

[0011] Furthermore, in the aforementioned distance image camera element, one aspect of the present invention may be that the pixel array has K types of pixels, where K is an integer less than or equal to N, and in each of the K types of pixels, the positions of the control transistors connected to the control wiring among the N control transistors are different.

[0012] In addition, in the distance image camera element described above, one aspect of the present invention may be that the K types of pixels are respectively arranged in a column, and a unit pixel structure consisting of the K types × K matrices is formed on a semiconductor substrate.

[0013] Furthermore, in the aforementioned distance image imaging element, one aspect of the present invention may be that the pixel array is formed by repeating the unit pixel structure.

[0014] Furthermore, in the aforementioned distance image imaging element, one embodiment of the present invention may be that the pixel comprises: a source follower transistor for converting the charge into an electrical signal; a selection transistor for selecting the readout of the electrical signal of the pixel; and a charge discharge transistor for discharging the charge from the photoelectric conversion element.

[0015] Furthermore, in another embodiment of the present invention, the distance image imaging element described above may have a pixel array having K types of pixels, where K is an integer less than or equal to N. In each of the K types of pixels, the positions of the control transistors connected to the control wiring among the N control transistors are different. The K types of pixels are respectively arranged in a column, and a unit pixel structure consisting of the K types × K matrices is formed on a semiconductor substrate. The pixel array is formed by repeating the unit pixel structure. Each pixel includes: a source follower transistor that converts the charge into an electrical signal; a selection transistor that selects the readout of the electrical signal of the pixel; and a charge discharge transistor that discharges the charge from the photoelectric conversion element.

[0016] Furthermore, one aspect of the present invention relates to a distance image imaging device comprising: a light source unit that irradiates a light pulse onto a subject; a light receiving unit having the aforementioned distance image imaging element; and a distance image processing unit that controls the pixel driving circuit to cause the charge accumulation portion to accumulate charge respectively, and calculates the distance to the subject based on the amount of charge accumulated by the charge accumulation portion respectively.

[0017] Invention Effects

[0018] According to the present invention, pixel output characteristics can be made uniform, thereby improving the accuracy of distance measurement. Attached Figure Description

[0019] Figure 1 This is a block diagram illustrating an example of the distance image camera device according to this embodiment.

[0020] Figure 2 This is a block diagram illustrating an example of the distance image camera element in this embodiment.

[0021] Figure 3 This is a diagram showing an example of pixel layout in this embodiment.

[0022] Figure 4 The first figure is an example of a pixel in this embodiment.

[0023] Figure 5 The second figure shows an example of pixels in this embodiment.

[0024] Figure 6 The third figure shows an example of pixels in this embodiment.

[0025] Figure 7 The fourth figure shows an example of pixels in this embodiment.

[0026] Figure 8 This is a diagram illustrating an example of the pixel array in this embodiment.

[0027] Figure 9This is a timing diagram illustrating an example of the normal operation of the distance image camera element in this embodiment.

[0028] Figure 10 This is a timing diagram illustrating an example of the operation of the merging mode of the distance image camera element in this embodiment.

[0029] Explanation of reference numerals in the attached figures

[0030] 1… distance image camera element

[0031] 2…Light Source Section

[0032] 3…Light-receiving section

[0033] 4… Distance Image Processing Unit

[0034] 10… pixels

[0035] 11…pixel array

[0036] 12…pixel driving circuit

[0037] 21…Light source device

[0038] 22…diffuser plate

[0039] 31…lens

[0040] 41…Timing Control Department

[0041] 42…Distance Calculation Unit

[0042] 43… Measurement and Control Department

[0043] 100… distance image camera device

[0044] CS, CS1, CS2, CS3, CS4… Charge accumulation section

[0045] FD, FD1, FD2, FD3, FD4, FDC1, FDC2, FDC3, FDC4… Floating diffusion zone

[0046] G, G1, G2, G3, G4… Transmission transistors

[0047] GD, GD1, GD2… Charge discharge transistors

[0048] OB…subject

[0049] PIXOUT…output line

[0050] PD… Photoelectric conversion element

[0051] PO…light pulse

[0052] RL…reflected light

[0053] RS, RS1, RS2, RS3, RS4… control transistors

[0054] RT, RT1, RT2, RT3, RT4… Reset transistors

[0055] SF, SF1, SF2, SF3, SF4... source follower transistors

[0056] SL, SL1, SL2, SL3, SL4… select transistors Detailed Implementation

[0057] Hereinafter, a distance image imaging element and a distance image imaging device according to an embodiment of the present invention will be described with reference to the accompanying drawings.

[0058] Figure 1 This is a block diagram illustrating an example of the distance image capturing device 100 according to this embodiment. For example... Figure 1 As shown, the distance image capturing device 100 includes a light source unit 2, a light receiving unit 3, and a distance image processing unit 4. Additionally, in Figure 1 The image also shows the object, namely the subject OB, whose distance is measured using a distance image camera device 100.

[0059] The light source unit 2, under the control of the distance image processing unit 4, irradiates light pulses PO into the space of the photographic object where the subject OB, whose distance is measured in the distance image imaging device 100, exists. The light source unit 2 is, for example, a surface-emitting semiconductor laser module such as a vertically oriented surface-emitting laser (VCSEL). In addition, the light source unit 2 includes a light source device 21 and a diffuser plate 22.

[0060] The light source device 21 is a laser light source that emits a near-infrared wavelength (e.g., a wavelength range of 850 nm to 940 nm) that forms a light pulse PO that irradiates the subject OB. The light source device 21 is, for example, a semiconductor laser light-emitting element. The light source device 21 emits pulsed laser light according to the control from the measurement and control unit 43.

[0061] The diffuser plate 22 is an optical component that diffuses the near-infrared laser emitted by the light source device 21 into a surface area that illuminates the subject OB. The pulsed laser light diffused by the diffuser plate 22 is emitted as a light pulse PO and illuminates the subject OB.

[0062] The light-receiving unit 3 receives the reflected light RL from the light pulse PO reflected by the subject OB, whose distance is measured in the distance imaging device 100, and outputs a pixel signal corresponding to the received reflected light RL. The light-receiving unit 3 includes a lens 31 and a distance imaging element 1.

[0063] Lens 31 is an optical lens that guides the incident reflected light RL to the distance image camera element 1. Lens 31 directs the incident reflected light RL toward the distance image camera element 1, so that the pixel array 11 in the light-receiving area of ​​the distance image camera element 1 is illuminated (incidentally).

[0064] The distance image capturing element 1 is a capturing element used in the distance image capturing device 100.

[0065] Here, refer to Figure 2 The structure of the distance image camera element 1 will be explained.

[0066] Figure 2 This is a block diagram illustrating an example of the distance image camera element 1 in this embodiment.

[0067] like Figure 2 As shown, the distance image camera element 1 includes a pixel array 11 containing a plurality of pixels 10 in a two-dimensional light-receiving area, and a pixel driving circuit 12 for controlling each pixel 10.

[0068] The pixel 10 of the pixel array 11 includes, for example, a photoelectric conversion element PD, a plurality of charge storage units CS corresponding to the photoelectric conversion element PD, and components for distributing charge to each charge storage unit CS. The detailed structure of the pixel 10 in this embodiment will be described later with reference to the accompanying drawings.

[0069] The pixel driving circuit 12 distributes and stores charge to each charge storage section CS at a predetermined storage timing synchronized with the illumination of the light pulse PO.

[0070] Furthermore, the pixel driving circuit 12 switches pixel regions such as normal mode (single pixel) and binning mode used for adding multiple pixels 10 according to the camera scene (measurement scene).

[0071] return Figure 1 As explained, the distance image processing unit 4 controls the distance image capturing device 100 to calculate the distance to the subject OB. The distance image processing unit 4 measures the distance to the subject OB existing in the measurement space based on the amount of charge stored in each charge storage unit CS.

[0072] In addition, the distance image processing unit 4 includes a timing control unit 41, a distance calculation unit 42, and a measurement control unit 43.

[0073] The timing control unit 41, under the control of the measurement control unit 43, controls the timing of various control signals required for measurement. These control signals include, for example, signals controlling the illumination of the light pulse PO, signals distributing and accumulating reflected light RL in multiple charge accumulation units CS, and signals controlling the number of accumulations per frame. The number of accumulations refers to the number of times the process of distributing and accumulating charge in the charge accumulation units CS is repeated; it is a predetermined number of distributions within the frame period. The product of this number of accumulations and the time width (accumulation time width) during each distribution and charge accumulation process constitutes the exposure time.

[0074] The distance calculation unit 42 outputs distance information obtained by calculating the distance to the subject OB based on the pixel signal output from the distance image imaging element 1. The distance calculation unit 42 calculates the delay time from the illumination light pulse PO to the reception of the reflected light RL based on the amount of charge stored in the multiple charge storage units CS. The distance calculation unit 42 calculates the distance to the subject OB based on the calculated delay time.

[0075] With this structure, in the distance image imaging device 100, the light receiving unit 3 receives the reflected light RL after the near-infrared light pulse PO irradiated by the light source unit 2 to the subject OB is reflected by the subject OB, and the distance image processing unit 4 outputs distance information (distance image) obtained by measuring the distance to the subject OB.

[0076] Next, we will refer to Figures 3-7 The detailed structure of pixel 10 in this embodiment will be described.

[0077] Figure 3 This is a diagram showing an example of the layout of pixel 10 in this embodiment.

[0078] like Figure 3 As shown, in this embodiment, pixel 10 has a photoelectric conversion element PD, four transmission transistors G (G1 to G4), two charge discharge transistors GD (GD1, GD2), four reset transistors RT (RT1 to RT4), four capacitors CAP (CAP1 to CAP4), four source follower transistors SF (SF1 to SF4), four select transistors SL (SL1 to SL4), and four control transistors RS (RS1 to RS4) on a semiconductor substrate SB.

[0079] In addition, Figure 3In the diagram, the horizontal axis is defined as the X-axis and the vertical axis as the Y-axis when viewed from above. The photoelectric conversion element PD is disposed in the center of the semiconductor substrate SB of pixel 10. Two charge discharge transistors GD (GD1, GD2) are arranged to the left and right along the X-axis, and two transfer transistors G (G1, G3) and two transfer transistors G (G2, G4) are arranged to the top and bottom along the Y-axis.

[0080] Additionally, a reset transistor RT1 is connected to the transfer transistor G1, and a reset transistor RT2 is connected to the transfer transistor G2. Furthermore, a reset transistor RT3 is connected to the transfer transistor G3, and a reset transistor RT4 is connected to the transfer transistor G4.

[0081] The four capacitors CAP (CAP1 to CAP4) are arranged in a manner that is symmetrical about each other with respect to the center line CX of the X-axis and the center line CY of the Y-axis.

[0082] Additionally, the selector transistor SL1, the source follower transistor SF1, and the control transistor RS1 are positioned above the capacitor CAP1 and the reset transistor RT1.

[0083] Additionally, the selector transistor SL2, the source follower transistor SF2, and the control transistor RS2 are positioned below the capacitor CAP2 and the reset transistor RT2.

[0084] Additionally, the selector transistor SL3, the source follower transistor SF3, and the control transistor RS3 are positioned above the capacitor CAP3 and the reset transistor RT3.

[0085] Additionally, the selector transistor SL4, the source follower transistor SF4, and the control transistor RS4 are positioned below the capacitor CAP4 and the reset transistor RT4.

[0086] In pixel 10, there are four control transistors RS, the same number as the capacitor CAP which is the charge storage unit CS described later. The four control transistors RS (RS1 to RS4) are arranged to be linearly symmetrical with respect to the X-axis center line CX and the Y-axis center line CY.

[0087] like Figure 3 As shown, in pixel 10, each component is arranged in a manner that is linearly symmetrical with respect to the center line CX of the X-axis and the center line CY of the Y-axis.

[0088] in addition, Figures 4-7 This is a diagram showing an example of pixel 10 in this embodiment.

[0089] In this embodiment, the pixel 10 is equipped with four control transistors RS (RS1 to RS4) in the same number as the charge storage section CS (capacitor CAP) for driving the merging mode. There are four types of pixels 10 (pixel 10-A to pixel 10-B) with different signal connections to the control terminals of the four control transistors RS (RS1 to RS4).

[0090] In addition, Figures 3-7 The example shown illustrates a case where the number of charge storage units CS (capacitors CAP) is 4 (N=4), where N is an integer greater than or equal to 2.

[0091] Figure 4 An example of a pixel of type A (hereinafter, sometimes referred to as pixel A), namely pixel 10-A, is shown in this embodiment.

[0092] also, Figures 4-7 The example of pixel 10 shown illustrates one instance of merging (4×4) pixels 10.

[0093] like Figure 4 As shown, pixel 10-A has one photoelectric conversion element PD, four transmission transistors G (G1 to G4), two charge discharge transistors GD (GD1 and GD2), four reset transistors RT (RT1 to RT4), four capacitors CAP (CAP1 to CAP4), four source follower transistors SF (SF1 to SF4), four select transistors SL (SL1 to SL4) and four control transistors RS (RS1 to RS4).

[0094] A photoelectric conversion element (PD) is an embedded photodiode that converts incident light into photoelectric value, generates a charge corresponding to the incident light, and stores the generated charge. In this embodiment, the incident light enters from the space of the object being measured. The anode terminal of the photoelectric conversion element (PD) is connected to a grounded power supply line, and the cathode terminal is connected to the source terminal of the transmission transistors G (G1 to G4).

[0095] In pixel 10-A(10), the charge generated by the photoelectric conversion element PD through photoelectric conversion of incident light is distributed to four charge storage units CS (CS1~CS4) respectively, and each voltage signal corresponding to the amount of charge of the distributed charge is output to the output line PIXOUT.

[0096] The pixel driving circuit 12, under the control of the measurement and control unit 43, synchronously with the irradiation of the light pulse PO according to the frame period, switches the transmission transistors G (G1, G2, G3, G4) according to their respective timing supply of the accumulation control signal TX (TX1~TX4), thereby sequentially accumulating the charge generated in the photoelectric conversion element PD into the charge accumulation units CS1, CS2, CS3, CS4.

[0097] Here, the charge storage section CS is composed of a floating diffusion region FD and a capacitor CAP. That is, the charge storage section CS1 is composed of a floating diffusion region FD1 and a capacitor CAP1, and the charge storage section CS2 is composed of a floating diffusion region FD2 and a capacitor CAP2. In addition, the charge storage section CS3 is composed of a floating diffusion region FD3 and a capacitor CAP3, and the charge storage section CS4 is composed of a floating diffusion region FD4 and a capacitor CAP4.

[0098] The floating diffusion region FD (FD1~FD4) is the wiring between the transfer transistor G (G1~G4) and the source follower transistor SF (SF1~SF4).

[0099] Capacitors CAP (CAP1~CAP4) are, for example, CMOS capacitors.

[0100] The transfer transistors G (G1~G4) are turned on (ON state) by the control signal TX (TX1~TX4), so that the charge generated by the photoelectric conversion element PD is stored in the charge storage section CS (CS1~CS4) and the charge is transferred to the source follower transistors SF (SF1~SF4).

[0101] The source follower transistor SF (SF1 to SF4) is a transistor that converts charge into an electrical signal and outputs an electrical signal (voltage) corresponding to the charge stored in the charge storage section CS (CS1 to CS4) to the selection transistor SL (SL1 to SL4).

[0102] The selection transistors SL (SL1 to SL4) select the readout of the electrical signal of pixel 10. The selection transistors SL (SL1 to SL4) are turned on (ON state) by the control signals SEL (SEL1 to SEL4) and output the pixel value (output signal) to the output line PIXOUT.

[0103] The reset transistors RT (RT1 to RT4) correspond to the charge storage units CS (CS1 to CS4), respectively, and reset the charge storage units CS (CS1 to CS4) to the specified reset potential supplied from the power supply line VDD. The reset transistors RT (RT1 to RT4) are turned on (ON state) by the control signal RST (RST1 to RST4), and reset the charge storage units CS (CS1 to CS4) to the reset potential supplied from the power supply line VDD via the control transistors RS (RS1 to RS4) described later.

[0104] The control transistors RS (RS1 to RS4) are the control transistors RS corresponding to the reset transistors RT (RT1 to RT4), and are connected between the reset transistors RT (RT1 to RT4) and the power supply line VDD. The wiring between the control transistors RS (RS1 to RS4) and the reset transistors RT (RT1 to RT4) functions as a floating diffusion region FDC (FDC1 to FDC4) that outputs the charge obtained from the addition operation when using the merge mode by performing addition operations on multiple pixels 10.

[0105] Furthermore, the control terminal of at least one of the four control transistors RS (RS1 to RS4) (RS1 in pixel A) is connected to the wiring (control wiring) of the control signal RTC1 that controls the conduction state of the control transistor RS. In addition, the control terminals of the remaining control transistors of the four control transistors RS (RS1 to RS4) except for at least one (excluding RS1 in pixel A) are connected to the power supply line VSS, thereby fixing the control transistor RS in the off state.

[0106] In pixel A (pixel 10-A), the floating diffusion region FDC1 is turned on by the wiring of the control signal RTC1 (control wiring) and is reset to the reset potential supplied from the power line VDD.

[0107] Two charge discharge transistors GD (GD1, GD2) are connected between the photoelectric conversion element PD and the power line VDD to discharge charge from the photoelectric conversion element PD. The charge discharge transistors GD (GD1, GD2) are turned on by the control signal RSTD, causing the charge generated in the photoelectric conversion element PD to flow to the power line VDD and discharge (eliminate the charge).

[0108] In addition, the transfer transistor G (G1~G4), charge discharge transistor GD (GD1, GD2), reset transistor RT (RT1~RT4), source follower transistor SF (SF1~SF4), select transistor SL (SL1~SL4), and control transistor RS (RS1~RS4) are NMOS (N-channel Metal Oxide Semiconductor) transistors.

[0109] in addition, Figure 5 An example of a type B pixel (hereinafter, sometimes referred to as pixel B), namely pixel 10-B, is shown in this embodiment.

[0110] Figure 5 The basic structure of pixel 10-B shown is the same as that of pixel 10-A, but the connection of the control signals (control wiring) of the control transistor RS (RS1~RS4) is different.

[0111] exist Figure 5 In pixel 10-B, the control terminal of at least one of the four control transistors RS (RS1 to RS4) (RS2 in pixel B) is connected to the wiring (control wiring) of the control signal RTC2 that controls the conduction state of the control transistor RS. Furthermore, the control terminals of the remaining control transistors (excluding at least one of the four control transistors RS1 to RS4, and excluding RS2 in pixel B) are connected to the power supply line VSS, thus fixing the control transistor RS in the off state.

[0112] Additionally, in pixel B (pixel 10-B), the floating diffusion region FDC2 is turned on by the wiring of the control signal RTC2 (control wiring) and is reset to the reset potential supplied from the power line VDD.

[0113] in addition, Figure 6 An example of a type C pixel (hereinafter, sometimes referred to as pixel C) namely pixel 10-C is shown in this embodiment.

[0114] Figure 6 The basic structure of pixel 10-C shown is the same as that of pixel 10-A, but the connection of the control signals (control wiring) of the control transistor RS (RS1~RS4) is different.

[0115] exist Figure 6In pixel 10-C, the control terminal of at least one of the four control transistors RS (RS1 to RS4) (RS3 in pixel C) is connected to the wiring (control wiring) of the control signal RTC3 that controls the conduction state of the control transistor RS. Furthermore, the control terminals of the remaining control transistors (excluding at least one of the four control transistors RS1 to RS4, except for control transistor RS3 in pixel C) are connected to the power supply line VSS, thus fixing the control transistor RS in the off state.

[0116] Additionally, in pixel C (pixel 10-C), the floating diffusion region FDC3 is turned on by the wiring of the control signal RTC3 (control wiring) and is reset to the reset potential supplied from the power line VDD.

[0117] also, Figure 7 An example of a type D pixel (hereinafter, sometimes referred to as pixel D), namely pixel 10-D, is shown in this embodiment.

[0118] Figure 7 The basic structure of pixel 10-D shown is the same as that of pixel 10-A, but the connection of the control signals (control wiring) of the control transistor RS (RS1~RS4) is different.

[0119] exist Figure 7 In pixel 10-D, the control terminal of at least one of the four control transistors RS (RS1 to RS4) (RS4 in pixel D) is connected to the wiring (control wiring) of the control signal RTC4 that controls the conduction state of the control transistor RS. Furthermore, the control terminals of the remaining control transistors (excluding at least one of the four control transistors RS1 to RS4, except for RS4 in pixel D) are connected to the power supply line VSS, thus fixing the control transistor RS in the off state.

[0120] In addition, in pixel D (pixel 10-D), the floating diffusion region FDC4 is turned on by the wiring of the control signal RTC4 (control wiring) and is reset to the reset potential supplied from the power line VDD.

[0121] Therefore, in each of the four types of pixels 10, from pixel A to pixel D, the positions of the control transistor RS connected to the control signal RTC (RTC1 to RTC4) in the four (in one example of N) control transistors RS (RS1 to RS4) are different.

[0122] Next, refer to Figure 8 The structure of pixel array 11 will be explained.

[0123] Figure 8 This is a diagram illustrating an example of the pixel array 11 in this embodiment.

[0124] like Figure 8 As shown in (a), the pixel array 11 has four types of pixels 10 (one example of K types), namely pixels A to pixels D (where K is an integer less than or equal to the number of charge storage units CS).

[0125] In pixel array 11, the four types of pixels 10 (pixel 10-A to pixel 10-D) are each configured in a column (e.g., Figure 8 In (a) the horizontal column), pixel units GU1 (unit pixel structure) consisting of 4×4 matrices are formed on the semiconductor substrate SB. The pixel array 11 is formed by repeating the pixel units GU1.

[0126] in addition, Figure 8 (b) shows Figure 8 Example of wiring in pixel array 11 of (a).

[0127] exist Figure 8 In (b), wiring LN1 represents the wiring of floating diffusion zone FDC1, and wiring LN2 represents the wiring of floating diffusion zone FDC2. In addition, wiring LN3 represents the wiring of floating diffusion zone FDC3, and wiring LN4 represents the wiring of floating diffusion zone FDC4.

[0128] In addition, the wiring of the floating diffusion region FDC (FDC1~FDC4), namely wiring LN1~LN4, is led out to the upper layer wiring of the semiconductor substrate SB for wiring.

[0129] By configuring pixels 10-A to 10-D as a horizontal column of the same type, such as... Figure 8 As shown in (b), the wiring LN1 to LN4 of the floating diffusion region FDC (FDC1 to FDC4) can be wired as a straight line and can be wired as the shortest.

[0130] Next, with reference to the accompanying drawings, the operation of the distance image camera element 1 of this embodiment will be described.

[0131] Figure 9 This is a timing diagram illustrating an example of the normal operation of the distance image camera element 1 in this embodiment.

[0132] exist Figure 9In the diagram, the horizontal axis represents time, and the vertical axis, from top to bottom, represents the waveforms of control signals TX1 to TX4, control signal RTC, control signal RSTA, control signal SELa, control signal RSTb, control signal SELb, control signal RSTc, control signal SELc, control signal RSTd, and control signal SELd.

[0133] In addition, Figure 9 In this process, the reset signal (control signal RST) sent to pixel A is set as control signal RSTa, and the control signal SEL sent to pixel A is set as control signal SELa. Furthermore, the reset signal (control signal RST) sent to pixel B is set as control signal RSTb, and the control signal SEL sent to pixel B is set as control signal SELb.

[0134] Similarly, the reset signal (control signal RST) sent to pixel C is set as control signal RSTc, and the control signal SEL sent to pixel C is set as control signal SELc. Additionally, the reset signal (control signal RST) sent to pixel D is set as control signal RSTd, and the control signal SEL sent to pixel D is set as control signal SELd.

[0135] First of all, Figure 9 In the normal mode shown, the pixel driving circuit 12 fixes the control signal RTC to the H (high) state and fixes the control transistor RS (RS1 to RS4) to the on state.

[0136] In addition, such as Figure 9 As shown, during the period up to time T1, the pixel driving circuit 12 turns on the transmission transistors G (G1 to G4) through the control signal TX (TX1 to TX4), so that the charge storage section CS (CS1 to CS4) stores charge.

[0137] Next, at time T1, the pixel driving circuit 12 sets the control signal SELa (SEL1~SEL4) to the H state and outputs the pixel value (output signal) of pixel A to the output line PIXOUT.

[0138] Next, at time T2, the pixel driving circuit 12 sets the control signal RSTa (RST1 to RST4) to the H state and resets the charge storage section CS (CS1 to CS4) of pixel A.

[0139] Next, at time T3, the pixel driving circuit 12 sets the control signal SELb (SEL1~SEL4) to the H state and outputs the pixel value (output signal) of pixel B to the output line PIXOUT.

[0140] Next, at time T4, the pixel driving circuit 12 sets the control signal RSTb (RST1 to RST4) to the H state and resets the charge storage section CS (CS1 to CS4) of pixel B.

[0141] Next, at time T5, the pixel driving circuit 12 sets the control signal SELc (SEL1~SEL4) to the H state and outputs the pixel value (output signal) of pixel C to the output line PIXOUT.

[0142] Next, at time T6, the pixel driving circuit 12 sets the control signal RSTc (RST1 to RST4) to state H and resets the charge storage section CS (CS1 to CS4) of pixel C.

[0143] Next, at time T7, the pixel driving circuit 12 sets the control signal SELd (SEL1~SEL4) to the H state and outputs the pixel value (output signal) of pixel D to the output line PIXOUT.

[0144] Next, at time T8, the pixel driving circuit 12 sets the control signal RSTd (RST1 to RST4) to the H state and resets the charge storage section CS (CS1 to CS4) of pixel D.

[0145] in addition, Figure 10 This is a timing diagram illustrating an example of the operation of the (4×4) pixel merging mode of the distance image camera element 1 in this embodiment.

[0146] exist Figure 10 In the diagram, the horizontal axis represents time, and the vertical axis, from top to bottom, represents the waveforms of control signals TX1 to TX4, control signal RTC, control signal RSTA, control signal SELa, control signal RSTb, control signal SELb, control signal RSTc, control signal SELc, control signal RSTd, and control signal SELd.

[0147] In addition, Figure 10 In this context, control signals RSTA, SELa, RSTb, SELb, RSTc, SELc, RSTd, and SELd are related to the above. Figure 9 same.

[0148] First of all, Figure 10In the merge mode shown, the pixel driving circuit 12 fixes the control signals RSTA, RSTb, RSTc, and RSTd to the H state and fixes the reset transistors RT (RT1 to RT4) to the ON state. Furthermore, the pixel driving circuit 12 fixes the control signals SELb, SELc, and SELd to the L (low) state and fixes the selection transistors SL (SL1 to SL4) for pixels B to D to the OFF state.

[0149] In addition, such as Figure 10 As shown, during the period up to time T11, the pixel driving circuit 12 turns on the transmission transistors G (G1 to G4) through the control signal TX (TX1 to TX4), so that the charge storage section CS (CS1 to CS4) stores charge.

[0150] Next, at time T11, the pixel driving circuit 12 sets the control signal SELa (SEL1~SEL4) to the H state and outputs the pixel value (output signal) corresponding to the charge added by merging from pixel A to the output line PIXOUT.

[0151] Next, at time T12, the pixel driving circuit 12 sets the control signal RTC (RTC1~RTC4) to the H state and resets the charge storage section CS (CS1~CS4) of the (4×4) pixel.

[0152] As described above, the distance image imaging element 1 of this embodiment includes: a pixel array 11 with a plurality of pixels 10 arranged therein; and a pixel driving circuit 12 that drives the pixels 10 to distribute and store charge to each charge storage unit CS. Each pixel 10 has a photoelectric conversion element PD that generates charge corresponding to incident light, and N charge storage units CS (where N is an integer of 2 or more) for storing charge. Each pixel 10 includes N transfer transistors G, N reset transistors RT, and control transistors RS. The N transfer transistors G transfer charge from the photoelectric conversion element PD to each of the N charge storage units CS. The N reset transistors RT are reset transistors RT corresponding to each of the N charge storage units CS, resetting the charge storage units CS to a predetermined reset potential supplied from the power supply line VDD. The N control transistors RS are control transistors RS corresponding to the N reset transistors RT, connected between the reset transistors RT and the power supply line. In pixel 10, the control terminal of at least one of the N control transistors RS is connected to a control wiring capable of controlling the conduction state of the control transistor RS, and the control terminals of the remaining control transistors of the N control transistors RS, excluding the at least one control transistor, are connected in a manner that fixes the control transistor RS in a non-conducting state.

[0153] Therefore, by having the same number of control transistors RS as the charge storage unit CS, the distance image capturing element 1 of this embodiment does not produce a mixture of pixels 10 with and without control transistors, and can maintain the uniformity of pixel output characteristics. Thus, the distance image capturing element 1 of this embodiment can achieve uniform pixel output characteristics and improve the accuracy of distance measurement.

[0154] Furthermore, in this embodiment, the pixel array 11 has K types (for example, four types of pixels A to D) of pixels 10 (where K is an integer less than or equal to N), and the positions of the control transistor RS connected to the wiring of the control signal RTC in the N control transistor RS of each of the K types of pixels 10 are different.

[0155] Therefore, by using K types (e.g., four types of pixels A to D) of pixels 10, the distance image camera element 1 of this embodiment can achieve the introduction of control and maintain the uniformity of pixel output characteristics.

[0156] In addition, in this embodiment, the K types of pixels 10 are respectively arranged in a column (e.g., a horizontal column) and a pixel unit GU1 (unit pixel structure) consisting of a matrix of K types × K (e.g., (4×4) pixels) is formed on the semiconductor substrate SB.

[0157] Therefore, the distance image camera element 1 of this embodiment can form the wiring of the floating diffusion region FDC (FDC1 to FDC4) in a straight line, and can minimize the wiring. Therefore, the distance image camera element 1 of this embodiment can reduce the parasitic capacitance in the wiring of the floating diffusion region FDC (FDC1 to FDC4) and can reduce the influence of noise.

[0158] Furthermore, in this embodiment, the pixel array 11 is formed by repeating the pixel unit GU1.

[0159] Therefore, the distance image camera element 1 of this embodiment forms a pixel array 11 by repeating pixel units GU1 consisting of K types × K (e.g. (4×4) pixels) matrices, which can maintain the uniformity of pixel output characteristics and safely increase the number of pixels.

[0160] In addition, in this embodiment, the pixel 10 includes a source follower transistor SF that converts charge into an electrical signal, a selection transistor SL that selects the readout of the electrical signal of the pixel 10, and a charge discharge transistor GD that discharges charge from the photoelectric conversion element PD.

[0161] Therefore, the distance image camera element 1 of this embodiment can properly read out the electrical signal of the pixel 10 through the source follower transistor SF and the select transistor SL, and can properly initialize the photoelectric conversion element PD through the charge discharge transistor GD.

[0162] In addition, the distance image imaging device 100 of this embodiment includes: a light source unit 2 that irradiates light pulses PO onto the subject OB; a light receiving unit 3 that has the distance image imaging element 1 described above; and a distance image processing unit 4 that controls the pixel driving circuit 12 to cause the charge storage unit CS to store charge, and calculates the distance to the subject based on the amount of charge stored in the charge storage unit CS.

[0163] Therefore, the distance image camera device 100 of this embodiment achieves the same effect as the distance image camera element 1 described above, enabling uniform pixel output characteristics and improving the accuracy of distance measurement.

[0164] Furthermore, the present invention is not limited to the embodiments described above, and modifications can be made without departing from the spirit of the present invention.

[0165] For example, in the above embodiments, the photoelectric conversion element PD is described as an example of an embedded photodiode that generates and stores charge by photoelectric conversion of incident light, but it is not limited to this, and the structure of the photoelectric conversion element PD can be arbitrary. The photoelectric conversion element PD can be, for example, a PN photodiode with a structure that combines P-type and N-type semiconductors, or a PIN photodiode with an I-type semiconductor sandwiched between P-type and N-type semiconductors. Furthermore, the photoelectric conversion element PD is not limited to a photodiode; for example, it can also be a grating-type photoelectric conversion element.

[0166] Furthermore, in the above embodiment, an example of pixel 10 having four charge storage units CS was described, but it is not limited to this. It can have any number (N) of charge storage units CS, as long as there are two or more charge storage units CS. The number (N) of charge storage units CS can be even.

[0167] Furthermore, in the above embodiment, the pixel array 11 was described as having four types of pixels 10 as an example of K types of pixels 10, but the present invention is not limited to this. For example, when merging (2×2) pixels, it may also have two types of pixels 10. In addition, for example, when merging (3×3) pixels, it may also have three types of pixels 10.

[0168] Furthermore, in the above embodiment, an example of arranging the same type of pixels 10 in a horizontal column of the pixel array 11 was described, but it is not limited to this. For example, the same type of pixels 10 may also be arranged in a vertical column.

[0169] Furthermore, in the above embodiment, examples of NMOS transistors being used for the transfer transistor G (G1 to G4), charge discharge transistor GD (GD1, GD2), reset transistor RT (RT1 to RT4), source follower transistor SF (SF1 to SF4), select transistor SL (SL1 to SL4), and control transistor RS (RS1 to RS4) are described, but this is not a limitation; for example, other transistors such as PMOS transistors may also be used.

[0170] Furthermore, each structure of the aforementioned distance image camera device 100 or pixel driving circuit 12 has an internal computer system. Moreover, programs for implementing the functions of each structure of the aforementioned distance image camera device 100 or pixel driving circuit 12 can be recorded on a computer-readable recording medium, allowing the computer system to read and execute the program recorded on the recording medium, thereby performing the processing within each structure of the aforementioned distance image camera device 100 or pixel driving circuit 12. Here, "allowing the computer system to read and execute the program recorded on the recording medium" includes installing programs in the computer system. The term "computer system" here includes hardware such as an operating system and peripheral devices.

[0171] Additionally, "computer system" can also include multiple computer devices connected via a network of communication lines, including the Internet, WAN, LAN, and dedicated lines. Furthermore, "computer-readable recording media" refers to removable media such as floppy disks, optical disks, ROMs, and CD-ROMs, as well as storage devices such as hard disks built into a computer system. Thus, the recording medium storing programs can also be a non-transitory recording medium such as a CD-ROM.

[0172] In addition, the recording medium also includes internal or external recording media that can be accessed from a distribution server for distributing the program. Furthermore, the distribution server may be different from one that distributes the program by combining the components of the image capture device 100 or the pixel drive circuit 12 after downloading them at different time intervals. Moreover, the "computer-readable recording medium" also includes a medium that retains the program for a certain period of time, such as volatile memory (RAM) within a computer system that acts as a server or client when the program is sent via a network. Additionally, the program described above may be a program used to implement the aforementioned functions. Furthermore, it may be a so-called differential file (differential program) that can achieve the aforementioned functions by combining with a program already recorded in the computer system.

[0173] Alternatively, some or all of the above functions can be implemented as integrated circuits such as LSI (Large Scale Integration). Each of these functions can be processorized individually, or some or all can be integrated and processorized. Furthermore, the method of integrated circuit implementation is not limited to LSI; it can also be implemented using dedicated circuits or general-purpose processors. Additionally, when advancements in semiconductor technology have led to the development of integrated circuit technologies that replace LSI, integrated circuits based on these technologies can also be used.

Claims

1. A distance image capturing element, comprising: A pixel array, comprising multiple pixels, wherein each pixel has a photoelectric conversion element that generates a charge corresponding to incident light, and N charge storage sections for storing the charge, wherein... N is an integer greater than 2; and A pixel driving circuit drives the pixel to distribute and store the charge in the charge storage portion. The pixel has the following characteristics: N transmission transistors transfer the charge from the photoelectric conversion element to the N charge storage sections respectively; N reset transistors, each corresponding to one of the N charge storage sections, reset the charge storage sections to a predetermined reset potential supplied from the power line; as well as N control transistors, corresponding to the N reset transistors, are connected between the reset transistors and the power supply line. In the pixel, the control terminal of at least one of the N control transistors is connected to a control wiring capable of controlling the conduction state of the control transistor, and the control terminals of the remaining N control transistors (excluding the at least one control transistor) are connected in a manner that fixes the control transistor in a non-conducting state.

2. The distance image capturing element according to claim 1, wherein, The number of the N charge storage units is even.

3. The distance image capturing element according to claim 1, wherein, The pixel array has K types of pixels, where K is an integer less than or equal to N. In each of the K types of pixels, the positions of the control transistors connected to the control wiring among the N control transistors are different.

4. The distance image capturing element according to claim 3, wherein, The K types of pixels are configured into a column. A unit pixel structure consisting of the K types × K matrices is formed on a semiconductor substrate.

5. The distance image capturing element according to claim 4, wherein, The pixel array is formed by repeating the construction of the unit pixels.

6. The distance image capturing element according to claim 5, wherein, The pixel has the following characteristics: A source follower transistor converts the charge into an electrical signal; Select the transistor to select the readout of the electrical signal of the pixel; as well as A charge discharge transistor discharges the charge from the photoelectric conversion element.

7. The distance image capturing element according to claim 1, wherein, The pixel array has K types of pixels, where K is an integer less than or equal to N. In each of the K types of pixels, the positions of the control transistors among the N control transistors that are connected to the control wiring are different. The K types of pixels are configured into a column. A unit pixel structure consisting of the aforementioned K types × K matrices is formed on a semiconductor substrate. The pixel array is formed by repeating the construction of the unit pixels. The pixel has the following characteristics: A source follower transistor converts the charge into an electrical signal; Selecting a transistor to select the readout of the electrical signal of the pixel; and A charge discharge transistor discharges the charge from the photoelectric conversion element.

8. A distance image camera device, comprising: The light source irradiates the subject with light pulses; The light-receiving part includes a distance image capturing element as described in any one of claims 1 to 7; and The distance image processing unit controls the pixel driving circuit to cause the charge accumulation parts to accumulate charge respectively, and calculates the distance to the subject based on the amount of charge accumulated by the charge accumulation parts respectively.

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