Optical device and optical transmission-reception module

Abstract

The invention relates to an optical device and an optical transmission-reception module. The optical device includes a photonic integrated circuit chip and a resin member. The photonic integrated circuit chip has a first surface on which an optical circuit and a first electrical wiring are formed. The resin member is in contact with at least a portion of the photonic integrated circuit chip. A dam structure is formed along an outer periphery of the first surface. At least a portion of the light circuit is formed using a different material that is different from the material of the photonic integrated circuit chip. The resin member seals the photonic integrated circuit chip without sealing a region inside with respect to the dam structure of the first surface. A second electrical wiring is formed on a surface of the resin member. The second electrical wiring is electrically connected to the first electrical wiring.

Description

Technical Field

[0001] The implementation methods discussed in this article involve optical devices and optical transmit-receive modules. Background Technology

[0002] In recent years, the demand for faster and smaller optical devices that convert electrical and optical signals in long-distance optical communication or optical data communication between servers has increased. For example, there is a need to house optical devices in small components, referred to as form factors that can be inserted into optical communication devices. New high-density packaging technologies at the photonic chip level, known as CPO (co-packaged optical devices) or chiplets, have been developed. In promoting this high integration / density, photonic integrated circuit chips represented by silicon photonics are attracting attention.

[0003] In silicon photonic integrated circuit chips, optical modulators, optical receivers, multiplexers, demultiplexers, and optical waveguides are precisely formed in a highly integrated manner using semiconductor processes. Note that as the signal transmission rate of each channel increases significantly, it becomes difficult to further increase the modulation rate in optical devices using silicon materials. Therefore, a configuration has been proposed in which optical modulators, etc., are formed using materials other than silicon on a silicon chip that enable high-speed operation (e.g., Japanese Patent No. 6453796).

[0004] In addition, with the increase in signal transmission rate, there is a demand for configurations that shorten the transmission distance of electrical signals in the device. For example, it is preferable to shorten the transmission distance between the optical modulator and the driver chip, and between the optical receiver element and the amplifier (TIA: transimpedance amplifier) ​​chip. From this point of view, not only conventional planar packaging structures have been proposed, but also structures that mount chips in a direction perpendicular to the substrate (e.g., layered structures) have been proposed (e.g., SBNGourikutty et al., 2023 IEEE 73rd Conference on Electronic Components and Technology (ECTC), 207-211).

[0005] As mentioned above, a technique has been proposed to shorten the transmission distance between the optical modulator and driver chips, and between the optical receiver element and the TIA chip, using a layered structure. Note that in conventional techniques, the molding resin is even formed onto the surface of the photonic integrated circuit chip. This increases the dielectric constant around the optical waveguides and wiring forming the optical elements, and poses a risk of preventing high-speed operation.

[0006] Therefore, one aspect of the embodiments of the present invention is to provide an optical device that achieves both size reduction and speed increase. Summary of the Invention

[0007] According to one aspect of the embodiment, an optical device includes a photonic integrated circuit chip and a resin component. The photonic integrated circuit chip has a first surface on which an optical circuit and a first electrical wiring are formed. The resin component is in contact with at least a portion of the photonic integrated circuit chip. A dam structure is formed along the outer periphery of the first surface. At least a portion of the optical circuit is formed using a material different from that of the photonic integrated circuit chip. The resin component seals the photonic integrated circuit chip without sealing the region inside the dam structure relative to the first surface. A second electrical wiring is formed on the surface of the resin component. The second electrical wiring is electrically connected to the first electrical wiring. Attached Figure Description

[0008] Figure 1 This is a diagram illustrating an example of an optical transmit-receive module according to an embodiment of the present disclosure;

[0009] Figure 2 This is a diagram showing an example of a photonic integrated circuit chip;

[0010] Figure 3A , Figure 3B and Figure 3C This is a first figure illustrating an example of a process for manufacturing an optical device according to an embodiment of the present disclosure;

[0011] Figure 4A , Figure 4B and Figure 4C This is a second figure illustrating an example of a process for manufacturing an optical device according to an embodiment of the present disclosure;

[0012] Figure 5A , Figure 5B and Figure 5C This is a diagram (third) illustrating an example of a process for manufacturing an optical device according to an embodiment of the present disclosure;

[0013] Figure 6A and Figure 6B This is a fourth figure illustrating an example of a process for manufacturing an optical device according to an embodiment of the present disclosure;

[0014] Figure 7A and Figure 7B Figure (fifth) illustrates an example of a process for manufacturing an optical device according to an embodiment of the present disclosure;

[0015] Figure 8A , Figure 8B and Figure 8C This is a diagram showing a variation of a molded resin sealing structure including a photonic integrated circuit chip;

[0016] Figure 9A , Figure 9B and Figure 9CThis is a diagram showing a variation of a molded resin sealing structure including a photonic integrated circuit chip;

[0017] Figure 10A and Figure 10B This is a diagram illustrating an example of an optical transmitting-receiving module according to the second embodiment; and

[0018] Figure 11A and Figure 11B This is a diagram illustrating a variation of the optical transmit-receive module according to the second embodiment. Detailed Implementation

[0019] (a) First embodiment

[0020] Figure 1 This is a diagram illustrating an example of an optical transmit-receive module according to an embodiment of the present disclosure. The optical transmit-receive module 1 includes a digital signal processor (DSP) 2, a driver 3, a photonic integrated circuit (TIA) 4, and a photonic integrated circuit chip 5. Note that the optical transmit-receive module 1 may also include... Figure 1 Another circuit, another component, and another function not shown in the diagram.

[0021] DSP 2 is one of the electronic integrated circuit chips included in the optical transmit-receive module 1, and DSP 2 generates a modulation signal corresponding to the modulation system from the transmitted data. The modulation signal has amplitude and phase information about the transmitted symbols. Driver 3 is one of the electronic integrated circuit chips included in the optical transmit-receive module 1, and driver 3 amplifies the modulation signal to drive the optical modulator. TIA4 is one of the electronic integrated circuit chips included in the optical transmit-receive module 1, and TIA4 amplifies the small current signal output from the photonic integrated circuit chip 5 and outputs the amplified signal as a voltage signal. DSP 2 performs the process of demodulating the output signal from TIA4. Therefore, DSP 2 can reproduce the received data based on the output signal from TIA4.

[0022] The photonic integrated circuit chip 5 includes an optical modulator and an optical receiver, and is formed from silicon photonics. Furthermore, optical circuitry and electrical wiring are formed on the surface of the photonic integrated circuit chip 5. The optical circuitry includes optical circuitry for configuring the optical modulator and optical circuitry for configuring the optical receiver. The electrical wiring includes electrical wiring for transmitting drive signals generated by the driver 3 and electrical wiring for transmitting output signals from the optical receiver.

[0023] The optical modulator includes an optical waveguide circuit 11 and optical element wiring 12 (12a). The optical waveguide circuit 11 includes at least one Mach-Zehnder interferometer. Continuous light generated by a light source (not shown) is guided into the optical waveguide circuit 11. The optical element wiring 12a is formed near the optical waveguide corresponding to the optical waveguide circuit 11. A drive signal generated by the driver 3 is applied to the optical element wiring 12a. Therefore, the continuous light passing through the optical waveguide circuit 11 is modulated by the drive signal. Thus, a modulated optical signal is generated.

[0024] The optical waveguide circuit 11 forming the optical modulator is formed of a material different from silicon. This different material is a material whose refractive index changes according to an externally applied electric field. In other words, the refractive index of the different material changes according to the external electric field. Therefore, when a drive signal is applied to the optical element wiring 12a, the refractive index of the optical waveguide circuit 11 changes according to the change in the electric field caused by the drive signal. Thus, a modulated optical signal corresponding to the drive signal is generated.

[0025] In this example, the optical receiver includes a photodiode 13. The optical signal received by the optical transmitter-receiver module 1 is guided to the photodiode 13 via an optical waveguide (not shown). This generates a current signal representing the received optical signal. The current signal generated by the photodiode 13 is transmitted via optical element wiring 12b. Note that the photodiode 13 can also be formed of a material different from silicon.

[0026] The photonic integrated circuit chip 5 is sealed with molding resin 21. Note that the areas forming the optical waveguide circuit 11 and the optical element wiring 12 are not sealed with molding resin 21. In other words, even after the photonic integrated circuit chip 5 is sealed with molding resin 21, the optical waveguide circuit 11 and the optical element wiring 12 are exposed to the air surrounding the photonic integrated circuit chip 5. In the following description, the structure in which the photonic integrated circuit chip 5 is sealed with molding resin 21 is sometimes referred to as a "molded resin sealed structure". Molding resin 21 is an example of a resin material that is in at least partial contact with the photonic integrated circuit chip 5.

[0027] A redistribution layer 22 is disposed on the surface of the molding resin 21. Molded wiring 23 is formed using the redistribution layer 22. Molded wiring 23 is electrically connected to optical element wiring 12 formed on the photonic integrated circuit chip 5. Some terminals of the DSP 2, driver 3, and TIA 4 are connected to the molded wiring 23. Note that, from a reliability perspective, the area around the solder bumps can be sealed with an underfill or similar material.

[0028] The molding resin sealing structure is fixed to the substrate 25 using a mold adhesive 24 or similar agent. For example, low-speed electrical signal lines, power lines, and control lines can be implemented using wire bonding, etc. In this case, the wires electrically connect the molding resin sealing structure and the substrate 25. To shorten the length of the wires, the rear surface of the molding resin sealing structure can be smoothed or polished to thin the molding resin 21. Note that in... Figure 1 In order to make the attached diagram easier to observe, the guide wires have been omitted.

[0029] A dam structure 14 is formed near the outer periphery of the surface of the photonic integrated circuit chip 5 (on which the optical waveguide circuit 11 and optical element wiring 12 are formed). The photonic integrated circuit chip 5 is rectangular in shape. In one example, the dam structure 14 is formed near three of the four sides of the outer periphery of the component mounting surface forming the photonic integrated circuit chip 5. In another mode, the dam structure can be formed along all four sides. Note that the top view shows dam structures 14a and 14b formed along one side of the upper side and one side of the lower side of the photonic integrated circuit chip 5. The cross-sectional view shows dam structure 14c formed along one side where the driver 3 is disposed.

[0030] The dam structure 14 is configured such that the molding resin 21 does not reach the component mounting surface of the photonic integrated circuit chip 5 during the sealing process. Therefore, the different materials mounted on the photonic integrated circuit chip 5 are exposed to air. In other words, the different materials come into contact with a substance (air, in this context) whose relative permittivity is lower than that of the resin. When the different materials used in the photonic integrated circuit chip 5 (e.g., lithium niobate used in an LN modulator) are used in contact with a substance having a low relative permittivity (air, in this context), the response speed increases.

[0031] Therefore, according to the embodiments of this disclosure, an increase in speed is achieved in the optical device. Furthermore, electrically connecting the device on the molding resin 21 using the shortest possible electrical wiring (i.e., molding wiring 23) reduces transmission loss of high-speed signals.

[0032] Note that the fiber optic assembly is attached to the optical transmitter-receiver module 1. Accurate optical axis alignment is performed on the input / output units of the photonic integrated circuit chip 5, and the fiber optic assembly is secured using transparent adhesives or similar methods.

[0033] Figure 2 An example of a photonic integrated circuit chip 5 is shown. As described above, the photonic integrated circuit chip 5 includes an optical modulator and an optical receiver. The optical modulator includes an optical waveguide circuit 11 and optical element wiring 12a, and the optical receiver includes a photodiode 13.

[0034] Photonic integrated circuit chip 5 is formed on a silicon wafer. In wafer processes such as silicon photonics, a portion of an optical waveguide and optical element is formed. To achieve high-speed operation, a different material from silicon is formed (or attached) at a given location. For example, oxide ferroelectrics, such as lithium niobate, lanthanum-modified lead zirconate titanate or barium titanate, or compound semiconductors, such as indium phosphide or gallium arsenide, can be used as different materials. For example, different materials can be formed by thin-film transfer processes such as micro-transfer printing. In this example, for instance, at least a portion of the optical waveguide circuit 11 forming the optical modulator is formed of a different material.

[0035] Furthermore, optical element wiring 12 is formed on the surface of the photonic integrated circuit chip 5. Optical element wiring 12 includes transmission from... Figure 1 The conductive pattern (optical element wiring 12a) is shown for the drive signal output by the driver 3. The optical element wiring 12 includes a conductive pattern (optical element wiring 12b) for transmitting the current signal generated by the photodiode 13.

[0036] A dam structure 14 (14a to 14d) is formed on the surface of the photonic integrated circuit chip 5. The dam structure 14 is formed along the outer periphery of the photonic integrated circuit chip 5 on a component mounting surface on which an optical waveguide circuit 11, an optical element wiring 12, and a photodiode 13 are formed. The dam structure 14 is formed such that it surrounds the optical waveguide circuit 11, the optical element wiring 12, and the photodiode 13. The height H of the dam structure 14 is equal to or greater than the height of the protruding structure formed on the surface of the photonic integrated circuit chip 5. In other words, the height of the dam structure 14 relative to the surface of the photonic integrated circuit chip 5 is equal to or greater than the height of the protruding structure formed on the surface of the photonic integrated circuit chip 5. The protruding structure formed on the photonic integrated circuit chip 5 consists of the optical waveguide circuit 11 and the optical element wiring 12. Alternatively, the protruding structure consists of the photodiode 13.

[0037] The dam structure 14 can be formed using the same process as the optical element wiring 12, or it can be formed using a different process. For example, the dam structure 14 can be implemented using a plating layer with a thickness of approximately 10 μm. In this case, a plating layer of Au or Cu can be used to form the dam structure 14. The photonic integrated circuit chip 5 on which the dam structure 14 is formed is cut from the wafer by dicing or the like.

[0038] Figures 3A to 7B An example of a process for manufacturing an optical device according to an embodiment of the present disclosure is shown. Here, Figure 2 The photonic integrated circuit chip 5 shown is formed on a wafer and cut out of the wafer by dicing or the like. In other words, as Figure 3A The photonic integrated circuit chip 5 is shown in the figure.

[0039] like Figure 3B and Figure 3C As shown, in its vertically flipped state, the photonic integrated circuit chip 5 is pressed and fixed onto the heat-releasing sheet 31. The component mounting surface of the photonic integrated circuit chip 5 (the surface on which the optical waveguide circuit 11, optical element wiring 12, and photodiode 13 are formed) presses against the heat-releasing sheet 31. Note that a dam structure 14 is formed on the component mounting surface of the photonic integrated circuit chip 5. Therefore, the photonic integrated circuit chip 5 is effectively fixed to the heat-releasing sheet 31, such that the dam structure 14 presses against the heat-releasing sheet 31.

[0040] With the photonic integrated circuit chip 5 fixed to the heat-releasing sheet 31, it is housed in a mold in a given shape. A specified amount of molding resin 21 is poured into the mold and heated and molded. Thus, as Figure 4A As shown, the photonic integrated circuit chip 5 is sealed with molding resin 21. Note that because the dam structure 14 is formed on the component mounting surface of the photonic integrated circuit chip 5, the area inside the dam structure 14 is not filled with molding resin 21.

[0041] After the molding resin 21 has cured, as Figure 4B and Figure 4C As shown, the heat release sheet 31 is released. Here, the region on the inner side relative to the dam structure 14 is not filled with molding resin 21. Therefore, the optical waveguide circuit 11, the optical element wiring 12, and the photodiode 13 are not sealed with molding resin 21. In other words, the different materials disposed on the component mounting surface of the photonic integrated circuit chip 5 are exposed to air.

[0042] Subsequently, molded wiring is formed on the molded resin sealing structure. The molded wiring is formed, for example, through semiconductor manufacturing processes. The specific process is as follows.

[0043] like Figure 5A As shown, an insulating layer 41 is formed on the upper surface of the molding resin 21. The insulating layer 41 is formed to the end of the photonic integrated circuit chip 5. Specifically, the insulating layer 41 is formed on the upper side relative to the optical element wiring 12. For example, a photosensitive resin is used to realize the insulating layer 41. In this case, after performing surface treatment, the insulating layer 41 is formed only in the desired area by applying spin coating and exposure development processes. Subsequently, as... Figure 5B As shown, an opening 42 is formed at a given location in the insulating layer 41. For example, the opening 42 is formed on a pad of either or both of the optical element wiring 12 and the control line disposed on the photonic integrated circuit chip 5.

[0044] like Figure 5CAs shown, an electrical wiring layer 43 is formed to form molded wiring. The electrical wiring layer 43 is formed on the insulating layer 41 by electroplating. Specifically, firstly, a seed layer is formed on the opening 42 and the upper surface of the insulating layer 41. The seed layer is, for example, a Cu / Ti thin film. A resist opening pattern is formed for forming the electrical wiring layer. In other words, Cu pattern electroplating is performed by conducting the seed layer through conductivity in an electroplating bath, followed by resist stripping and wet etching of the seed layer to obtain the desired Cu wiring. Thus, the electrical wiring layer 43 is formed. The electrical wiring layer 43 is electrically connected to the optical element wiring 12, such as... Figure 5C As shown in the image.

[0045] like Figure 6A As shown, insulating layer 44 is formed on electrical wiring layer 43. The method of forming insulating layer 44 can be the same as that of forming... Figures 5A to 5C The method for forming insulating layer 41 is the same as shown. Molded wiring can be further formed on the upper surface of insulating layer 44. The method for forming molded wiring on the upper surface of the insulating layer can be the same as that for forming... Figures 5A to 5C The method is the same for the wiring layer 43 shown. In this example, the opening 45 is formed at a given location, such as... Figure 6A As shown. Each opening 45 is used as... Figure 6B The through-holes are shown. Pads 46 are formed to connect to the corresponding through-holes. Preferably, the surface of the pads 46 is plated with Ni or the like, so that the surface is connected to the solder bumps.

[0046] Insulating layer 41, wiring layer 43, insulating layer 44 and pad 46 are formed in Figure 1 The redistribution layer 22 and the molded wiring 23 shown correspond to the redistribution layers. Note that in this example, the redistribution layer is a two-layer structure; however, a multi-layer structure with three or more layers is possible. For example, the corresponding pad 46 can be associated with the corresponding Figure 1 The terminals of DSP 2, driver 3 and TIA4 shown are in direct contact.

[0047] In the molding resin sealing process, sometimes on the substrate ( Figure 1 There is a positional offset between the electrical connection terminals on the substrate 25 shown and the electrical connection terminals at the ends of the optical element wiring formed on the photonic integrated circuit chip 5. When the positional gap is large, in order to absorb the positional offset, it is preferable to use a direct imaging exposure device to magnify or reduce and rotate the pattern and pattern layer when forming the molded wiring layer, so that electrical connection can be achieved.

[0048] After that, as Figure 7A As shown, the rear surface of the molded resin sealing structure is ground, thus thinning the device. In other words, a portion of the molding resin 21 is removed. Furthermore, as... Figure 7BAs shown, the end of the photonic integrated circuit chip 5 is cut off. The dam structure 14 is partially cut off. Specifically, in Figure 1 The dam structure 14, formed on the side where light input or output is shown, was cut off. Figure 2 In the example shown, dam structure 14d is cut off. Additionally, optical end-face polishing is performed.

[0049] After the above processing, a molded resin sealing structure is mounted onto another substrate using a mold attacher and a mold adhesive. In other words, as... Figure 1 As shown, a molding resin sealing structure is fixed to a substrate 25 using a molding adhesive 24. Electrical wiring for connection to corresponding conductive patterns on the substrate 25 is provided via wire bonding. Furthermore, an optical input / output unit composed of optical waveguides on the photonic integrated circuit chip 5 is used to perform [the process]. Figure 1 The optical axes of the fiber optic assembly components shown are aligned. The fiber optic assembly components are secured using a transparent adhesive. Thus, an optical device according to an embodiment of this disclosure is configured.

[0050] According to embodiments of this disclosure, high-speed operation is achieved by mounting different materials in which the refractive index changes effectively under an external electric field on a photonic integrated circuit chip 5 sealed with molding resin 21. A dam structure 14 is formed along the outer periphery of the photonic integrated circuit chip 5, thus preventing molding resin from entering the component mounting surface of the photonic integrated circuit chip 5 during the molding resin sealing process. Therefore, the component mounting surface of the photonic integrated circuit chip 5 can be exposed to air, resulting in a surrounding environment of the optical modulator that is a medium with a low dielectric constant (i.e., air), and further speed increases are achieved in the optical modulator. Additionally, electrical terminals (pads 46) for connecting to the electronic integrated circuit chips (DSP 2, driver 3, and TIA 4) are formed using a molded wiring layer formed on the upper surface of the molding resin 21. The signal lines for transmitting high-speed signals between the photonic integrated circuit chip 5 and the electronic integrated circuit chip are shorter. Therefore, a reduction in size and an increase in speed are achieved in the optical transmit-receive module 1.

[0051] Figures 8A to 8C and Figures 9A to 9C A variation of the molded resin sealing structure including the photonic integrated circuit chip 5 is shown. Note that... Figures 8A to 8C and Figures 9A to 9C A partial cross-section of the molded resin sealing structure is shown.

[0052] exist Figures 2 to 7B In the illustrated embodiment, the cross-sectional shape of the dam structure is rectangular. Note that the cross-sectional shape of the dam structure 14 is not limited to rectangular. Figures 8A to 8C and Figures 9A to 9C In the variant shown, the shape of the dam structure's cross-section is different. Figures 2 to 7B The shape of the cross section of the embodiment shown.

[0053] exist Figures 8A to 8C In the variant shown, the cross-section of the dam structure 15 is tapered. Specifically, the cross-section of the dam structure 15 has a shape where the width on the lower side (or bottom side) is greater than that on the upper side (or top side). The cross-section of the dam structure 15 is tapered on the side surface facing the inner side of the component mounting surface of the photonic integrated circuit chip 5. In other words, as shown... Figure 8A As shown, the dam structure 15 is tapered on one side where the optical elements (optical waveguide circuit 11, optical element wiring 12, and photodiode 13) are formed on the photonic integrated circuit chip 5.

[0054] For example, the dam structure 15 is formed by stepwise exposure of a photosensitive polymer. Note that the material of the dam structure 15 is not limited to polymers. In other words, the dam structure 15 can be formed by patterned electroplating, or other methods besides polymers. Figure 2 In addition to the dam structure 14 shown, another dam structure component can also be attached.

[0055] There is a step between the upper surface of the molding resin 21 and the surface of the photonic integrated circuit chip 5. Therefore, when the side surface of the dam structure is perpendicular to the surface of the photonic integrated circuit chip 5, there is a risk that the insulating layer 41 will be thinner at the corners of the dam structure 14, such as... Figures 5A to 5C As shown. In this case, the risk lies at the corner of dam structure 14 ( Figures 5A to 5C Sufficient insulation will not be achieved at the upper right corner of dam structure 14.

[0056] On the other hand, the cross-section of dam structure 15 is conical, and the corners are obtuse angles, such as... Figures 8A to 8C As shown. Therefore, the insulating layer 41 is not thin at the corners of the dam structure 15 and can cover the area from the upper surface of the molding resin 21 to the surface of the photonic integrated circuit chip 5 without exposure. Furthermore, because the insulating layer 41 is formed progressively from the upper surface of the molding resin 21 to the surface of the photonic integrated circuit chip 5, and therefore a resist for patterning can be appropriately applied during the process of forming the electrical wiring layer 43 on the insulating layer 41, thus... Figure 8C As shown, the risk of electrical wiring layer 43 breaking around the interface between the molding resin 21 and the photonic integrated circuit chip 5 is reduced.

[0057] exist Figures 9A to 9C In the variant shown, the dam structure 16 is formed from droplets. Therefore, the cross-section of the dam structure 16 is tapered on both the inner side surface facing the photonic integrated circuit chip 5 and the outer side surface facing the photonic integrated circuit chip 5. Thus, even using... Figures 9A to 9C The structure shown also obtains the same Figures 8A to 8C The effect shown is the same.

[0058] For example, the dam structure 16 is formed by applying resin in droplet form along the outer periphery of the surface of the photonic integrated circuit chip 5. In this case, the resin used to form the dam structure 16 is, for example, epoxy resin or polyimide resin.

[0059] (b) Second Embodiment

[0060] Figure 10A and Figure 10B This is a diagram illustrating an example of an optical transmitting-receiving module according to a second embodiment of the present disclosure. In the second embodiment, an auxiliary circuit board is embedded in molding resin or the like.

[0061] At least one through hole is formed in the auxiliary circuit board 50, such as Figure 10A As shown. Conductive patterns and pads are formed on each of the upper and lower surfaces of the auxiliary circuit board 50. Each electrical connection in the through-hole is formed on the conductive pattern on the upper surface and the conductive pattern on the lower surface of the auxiliary circuit board 50. The auxiliary circuit board 50 is implemented, for example, using an organic substrate or a ceramic substrate. The auxiliary circuit board 50 can be a silicon substrate or a glass substrate in which the through-holes are formed. The auxiliary circuit board 50 is sealed with molding resin 21. Specifically, the photonic integrated circuit chip 5 and the auxiliary circuit board 50 are sealed with molding resin 21 in the same process.

[0062] The photonic integrated circuit chip 5 and the auxiliary circuit board 50 are mounted on the upper surface of the substrate 25 by a sealed molding resin sealing structure, such as... Figure 10B As shown. A redistribution layer 22 is formed on the upper surface of the molding resin sealing structure. Electronic integrated circuit chips (DSP 2, driver 3, and TIA 4) are mounted on the upper side of the redistribution layer 22. A redistribution layer 26 is formed on the upper surface of the molding resin sealing structure. The redistribution layer 26 provides connections to conductive patterns formed on the substrate 25. A given terminal of the electronic integrated circuit chip is electrically connected to a corresponding conductive pattern formed on the substrate 25 via a through-hole 51 of the auxiliary circuit board 50.

[0063] Note that in Figure 10A and Figure 10B In the example shown, an auxiliary circuit board 50 is provided for each electronic integrated circuit chip; however, the second embodiment is not limited to this configuration. In other words, a configuration in which a single auxiliary circuit board 50 is provided for multiple electronic integrated circuits can be used.

[0064] According to the second embodiment, the connection between each electronic integrated circuit chip and the circuitry on the substrate 25 can be achieved using a ball grid array (BGA), copper pillars, etc., instead of wire bonding. Therefore, this configuration helps to reduce the size of the substrate 25 and the optical transceiver module 1. Furthermore, it enables the connection of components with inductance smaller than that of wires using small vias, thus suppressing losses in high-frequency signal lines and reducing the increase in impedance in power lines.

[0065] Note that terminals (e.g., pads or under-bump metal (UBM)) of the auxiliary circuit board 50 can be used without altering the upper surface of the molded resin seal structure. On the lower surface of the molded resin seal structure, terminals for connection to the lower substrate, such as copper pillars, can be formed using a molding wiring process.

[0066] Figure 11A and Figure 11B A variation of the optical transmit-receive module according to the second embodiment is shown. In this example, one or more circuit elements are provided for the through-holes 51 in the auxiliary circuit board 50. Specifically, as... Figure 11A As shown, any one, some, or all of the capacitor C, inductor L, and resistor R are formed in the auxiliary circuit board 50. Figure 11B As shown, an auxiliary circuit board 50, on which any one or all of a capacitor C, an inductor L, and a resistor R are formed, is sealed with molding resin 21.

[0067] The capacitor C is implemented, for example, by forming capacitance between wiring layers on the layers or surface of the auxiliary circuit board 50. In this case, a ferroelectric material can be used to form the capacitance. The inductor L is implemented using a rectangular spiral coil structure. The resistor R can be implemented by arranging a material with high resistivity in the layers of the auxiliary circuit board 50.

[0068] according to Figure 11A and Figure 11B The configuration shown allows for a compact package structure without using chip components. Forming a capacitor C in the substrate provides a large-capacity component for power wiring, thus reducing power supply impedance. Introducing an inductor L into a portion of the signal line reduces transmission losses caused by peaks at specific frequencies due to resonance in the signal line. A resistor R serves as a damping resistor to control resonance in the signal line and resonance caused by power supply impedance.

[0069] Based on the above model, it is possible to reduce the size of optical devices and increase their speed.

Claims

1. An optical device, the optical device comprising: A photonic integrated circuit chip, the photonic integrated circuit chip having a first surface on which an optical circuit and a first electrical wiring are formed; as well as A resin component that is in at least partial contact with the photonic integrated circuit chip. A dam structure is formed along the outer periphery of the first surface. At least a portion of the optical circuit is formed using a different material than that used in the photonic integrated circuit chip. The resin component seals the photonic integrated circuit chip without sealing the region inside the dam structure relative to the first surface. A second electrical wiring is formed on the surface of the resin component, and The second electrical wiring is electrically connected to the first electrical wiring.

2. The optical device according to claim 1, wherein, The dam structure has a height relative to the first surface, the height being equal to or greater than the height of the optical circuit and the first electrical wiring.

3. The optical device according to claim 1, wherein, The first surface is rectangular, and The dam structure is formed near at least three of the four sides of the outer periphery forming the first surface.

4. The optical device according to claim 1, wherein, The different materials have refractive indices that vary according to an external electric field.

5. The optical device according to claim 4, wherein, The optical circuit includes an optical waveguide circuit formed from the different materials. At least a portion of the first electrical wiring is formed near the optical waveguide circuit, and The formation of the optical waveguide circuit and the first electrical wiring near the optical waveguide circuit at least partially forms an optical modulator.

6. The optical device according to claim 1, wherein, The cross-section of the dam structure is tapered on the side surface facing the inner side of the first surface.

7. The optical device according to claim 1, wherein, The second electrical wiring includes pads for electrical connection to terminals of an electronic integrated circuit chip.

8. The optical device according to claim 1, wherein, The second electrical wiring is formed on the first surface of the resin component. A third electrical wiring is formed on the second surface of the resin component. An auxiliary circuit board with through holes is embedded in the resin component, and The second electrical wiring and the third electrical wiring are electrically connected via the through-hole.

9. The optical device according to claim 8, wherein, A capacitor, inductor, or resistor is electrically connected to the through-hole in the auxiliary circuit board.

10. An optical transmit-receive module, the optical transmit-receive module comprising: A photonic integrated circuit chip, the photonic integrated circuit chip having a first surface on which optical circuitry for configuring an optical modulator and an optical receiver and a first electrical wiring are formed; A resin component that is in at least partial contact with the photonic integrated circuit chip; A driver chip that drives the optical modulator; An amplifier chip that amplifies the output signal of the optical receiver; as well as A digital signal processor chip that controls the driver chip and processes the output signal of the amplifier chip. A dam structure is formed along the outer periphery of the first surface. At least a portion of the optical circuit is formed using a different material than that used in the photonic integrated circuit chip. The resin component seals the photonic integrated circuit chip without sealing the region inside the dam structure relative to the first surface. A second electrical wiring is formed on the surface of the resin component. Each of the terminals of the driver chip, the amplifier chip, and the digital signal processor chip is electrically connected to the second electrical wiring on the resin component, and The second electrical wiring is electrically connected to the first electrical wiring.

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