Hamming window and Hanning window function processing method oriented to SW platform
By combining scalarization and vectorization operations on the Shenwei platform and optimizing the Hamming and Hanning window functions using SIMD technology, the problem of low computational efficiency in existing technologies is solved, and more efficient data processing is achieved.
Patent Information
- Application Number
- CN202511623205.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-07
- Publication Date
- 2026-02-03
AI Technical Summary
In existing technologies, the scalar computation efficiency of Hamming and Hanning windows is low, which cannot fully utilize the hardware memory access bandwidth and parallel capabilities of the Shenwei processor, resulting in wasted processor resources and slow computation speed.
A method combining scalar and vectorized computation is adopted, utilizing the SIMD technology of the Shenwei platform to distinguish between cache line aligned regions and non-cache line aligned regions, and different computation methods are used for different regions to perform parallel computation.
It improves the efficiency of Hamming and Hanning window operations, reduces memory access overhead, increases cache hit rate, enhances processor throughput and utilization, and significantly improves data processing speed.
Smart Images
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Abstract
Description
TECHNICAL FIELD
[0001] The application belongs to the technical field of computers, and particularly relates to a Hamming window and Hanning window function processing method for a Sunway platform. BACKGROUND
[0002] In signal analysis, Hamming window and Hanning window are two commonly used window functions, which are mainly used for spectrum analysis and filter design to reduce the spectrum leakage effect caused by truncating non-periodic signals. Both window functions are raised cosine windows, have a smooth bell shape, and can significantly reduce the mutation at the signal truncation point, thereby suppressing the high-frequency sidelobes and leakage generated in spectrum analysis. The Hanning window is suitable for scenarios that require high dynamic range analysis, such as accurate measurement of signal amplitude or separation of weak signals and strong signals with similar frequencies, and the Hamming window pays more attention to frequency resolution. Scalar calculation of the above two window functions requires separate execution of the window function formula for each sampling point, resulting in a large number of repeated trigonometric function calculations, poor cache locality, and low calculation efficiency.
[0003] The field of signal analysis often involves processing large-scale data sets, and scalar operation mode processing is low in efficiency, usually requiring processing of data points one by one and relying on complex loop structures, with data operations being processed in series, which cannot fully utilize the hardware memory bandwidth and parallel capabilities of the processor, resulting in waste of processor resources and poor software running speed and efficiency.
[0004] SIMD (Single Instruction Multiple Data) is a parallel computing technology that allows a single instruction to simultaneously perform the same operation on multiple data, can efficiently process large-scale data, reduce the number of loop iterations, fully utilize the parallel capabilities of the processor, reduce complex loops and branch structures, and thus improve the execution speed of the program. Sunway processor, as a 64-bit RISC (Reduced Instruction Set Computer) architecture (referred to as SW64), has a rich set of SIMD (Single Instruction Multiple Data) instruction sets that can effectively improve data parallelism. Scalar instructions can process 2-byte half-word integers, 4-byte single-precision floating-point or 8-byte double-precision floating-point data at a time. The SW64 architecture SIMD instruction can process 256-bit data, which can include a half-word integer vector of length 16 (16x16 bits), a single-precision floating-point vector of length 4 (4x32 bits), and a double-precision floating-point vector of length 4 (4x64 bits).
[0005] However, how to fully utilize the characteristics of the SW64 vector instruction set, optimize the Hamming window and Hanning window operation in the signal analysis field, and thus play the hardware characteristics of the Sunwei processor and improve the throughput and utilization of the processor, still needs to be studied. SUMMARY
[0006] The application aims to provide a Hamming window and Hanning window function processing method for a Sunwei platform, which combines scalar operation and vector operation, and uses the SIMD technology to optimize the operation process of the Hamming window and Hanning window function of the Sunwei platform, fully plays the hardware characteristics of the Sunwei processor, reduces the memory access overhead in the program, increases the cache hit rate, improves the throughput and utilization of the processor, realizes parallel processing, and significantly improves the data processing speed.
[0007] To achieve the above-mentioned purpose, the application is implemented by using the following technical scheme.
[0008] The application provides a Hamming window and Hanning window function processing method for a Sunwei platform, which comprises the following steps of:
[0009] obtaining the total length and the data type of data to be subjected to window function operation;
[0010] distinguishing the cache line alignment region and the non-cache line alignment region of the data to be operated according to the memory address interval, the total length of the data to be operated and the cache line length of the SW64 architecture;
[0011] for the data to be operated in the non-cache line alignment region, using a scalar window function calculation mode for calculation;
[0012] for the data to be operated in the cache line alignment region, using the SW64 architecture SIMD instruction to perform vector window function calculation according to the vector window function operation strategy corresponding to the data type of the data to be operated;
[0013] outputting the results of the scalar window function calculation and the vector window function calculation.
[0014] Optionally, the step of distinguishing the cache line alignment region and the non-cache line alignment region of the data to be operated according to the memory address interval, the total length of the data to be operated and the cache line length of the SW64 architecture comprises the following steps of: judging whether the total length of the data to be operated is greater than 0 and the memory occupies less than the cache line length of the SW64 architecture, if yes, using the scalar window function calculation mode to calculate all the data to be operated; if the total length of the data to be operated is equal to 0, regarding the data to be operated as invalid input, and not performing the window function operation processing operation.
[0015] Optionally, the distinguishing the cache line aligned region and the non-cache line aligned region of the to-be-operated data according to the memory address range, the total length of data and the cache line length of the SW64 architecture further comprises:
[0016] If the memory occupied by the to-be-operated data is greater than the cache line length, it is judged whether the memory start address of the to-be-operated data is an integer multiple of the cache line length, the memory address of the first to-be-operated data which is an integer multiple of the cache line length is taken as the start address of the cache line aligned region, the start index position of the cache line aligned region is determined, and the end index position of the cache line aligned region of the to-be-operated data is determined according to the start index position and the cache line length, so as to obtain the to-be-operated data in the cache line aligned region, and the other to-be-operated data is in the non-cache line aligned region.
[0017] Optionally, the data type includes a real data type and a complex data type, the real data type includes a half-word real number, a single-precision floating-point real number and a double-precision floating-point real number, and the complex data type includes a half-word complex number, a single-precision floating-point complex number and a double-precision floating-point complex number.
[0018] Corresponding to different data types, corresponding vectorization window function operation strategies are respectively arranged.
[0019] Optionally, the method further comprises, before the vectorization window function calculation, obtaining the window function type to be operated, and performing an initialization operation of the vectorization operation strategy, including:
[0020] According to the window function type, the window function coefficients a0 and a1 of the window function formula are configured;
[0021] The window function coefficients a0 and a1, the scale factor 4.0 / (len-1) and the step factor 16.0 / (len-1) are respectively copied into 4 same elements to form a 4-way parallel floating-point vector, which is recorded as a first window function floating-point coefficient vector v_a0, a second window function floating-point coefficient vector v_a1, a scale factor vector v_tmp and a step factor vector v_step; wherein len is the number of data samples to be windowed in the cache line aligned region; the parallel floating-point vector with 4 double-precision type data (0.0, 1.0, 2.0, 3.0) is multiplied by v_tmp element by element to obtain an initial equidistant abscissa vector v_cos_init, and the cosine calculation initialization is completed; the v_a0, v_a1, v_tmp, v_step and v_cos_init jointly constitute a constant input table of the vectorization window function operation, and the equidistant abscissa vector is incremented by v_step after each window function calculation to update the data index for the next calculation.
[0022] Optionally, in a cache line, different times of vectorization calculation are performed on the to-be-operated data of different data types according to a vectorization window function calculation strategy, and each time of vectorization calculation process includes:
[0023] The cosine function is calculated on the equidistant abscissa vector to obtain a cosine calculation result;
[0024] The vector negative multiplication and addition calculation is performed on the first window function floating point coefficient vector, the cosine calculation result and the second window function floating point coefficient vector to obtain a window function vector;
[0025] The window function vector is multiplied by the to-be-operated data vector to obtain a windowed vectorization operation result;
[0026] The vectorization operation result is stored in a memory area for storing a calculation result.
[0027] Considering that the 16s and 16sc data types are only integers and cannot be calculated by the cosine function, in a possible embodiment, when the vectorization window function calculation is performed, the single-time vectorization calculation process of the vectorization window function operation strategy for the 16s data type includes:
[0028] 16 half-word real data are taken out from the data in the cache line alignment area and written into the corresponding 16 half-word element positions in the vector register, denoted as v_src16s;
[0029] The type conversion is performed on v_src16s to convert it into a double-precision floating point type and store it in 4 vector registers, each of which stores 4 double-precision floating point data; after the window function vector is obtained, the type-converted data in the vector register is multiplied by the window function vector to obtain a windowed vectorization operation result;
[0030] The type conversion is performed on the vectorization operation result to convert it into a half-word real type and store it in 1 vector register, and the vectorization operation result is stored in the calculation result memory area pointed to by the current sample index as a final vectorization operation result.
[0031] Similarly, in a possible embodiment, when the vectorization window function calculation is performed, the single-time vectorization calculation process of the vectorization window function operation strategy for the 16sc data type includes:
[0032] 8 half-word complex data are taken out from the data in the cache line alignment area and written into the vector register, denoted as v_src16sc;
[0033] The v_src16sc is type-converted into a double-precision floating point type and stored in four vector registers, each of which stores four double-precision floating point data; after obtaining the window function vector, the window function vector is subjected to long word vector element cross insertion, the lower 128 bits are taken as v_ya, and the higher 128 bits are subjected to vector shuffling and recorded as v_yb, and the real part and the imaginary part of the type-converted data in the vector register are multiplied by v_ya and v_yb respectively to obtain the windowed vectorized operation result;
[0034] The vectorized operation result is type-converted into a half-word complex number type and stored in a vector register, and is stored in the calculation result memory area pointed to by the current sample index as the final vectorized operation result.
[0035] In a second aspect, the present application provides a computer readable storage medium having computer instructions stored thereon, wherein the computer instructions are executed by a processor to implement the steps of the Hamming window and Hanning window function processing method for a SW platform according to the first aspect.
[0036] In a third aspect, the present application provides a computer device, comprising:
[0037] a memory for storing computer instructions;
[0038] a processor for executing the computer instructions to implement the steps of the Hamming window and Hanning window function processing method for a SW platform according to the first aspect.
[0039] Compared with the prior art, the present application has the following beneficial effects:
[0040] The Hamming window and Hanning window function processing method for a SW platform according to the present application, in view of the SIMD instruction characteristics of the SW64 architecture, first distinguishes the cache line alignment region and the non-cache line alignment region of the data to be operated, then combines scalar operation with vector operation, adopts different calculation methods according to different regions, and in the process of vector calculation, adopts different optimization strategies for different data types for parallel calculation, which can optimize the Hamming window and Hanning window two window function operation processes, improve the operation efficiency, reduce the memory access overhead in the program, increase the cache hit rate, and thus improve the overall performance of the Hamming window and Hanning window operation. BRIEF DESCRIPTION OF DRAWINGS
[0041] Figure 1 The figure shows the memory arrangement diagram of the six data types of half-word real number, single-precision floating point real number, double-precision floating point real number, half-word complex number, single-precision floating point complex number and double-precision floating point complex number provided by the present application;
[0042] Figure 2The diagram shows different calculation methods for the cache line aligned region and the non-cache line aligned region provided by the present invention.
[0043] Figure 3 The diagram shown is a flowchart of a Hamming window and Hanning window function processing method for the Shenwei platform provided by the present invention.
[0044] Figure 4 The diagram shown is a schematic diagram of the experimental results of Hamming window and Hanning window function processing for the Shenwei platform provided by the present invention. Detailed Implementation
[0045] The technical solution of the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the embodiments of the present invention and the specific features in the embodiments are detailed descriptions of the technical solution of the present invention, rather than limitations thereof. In the absence of conflict, the embodiments of the present invention and the technical features in the embodiments can be combined with each other.
[0046] Example 1
[0047] This embodiment introduces a method for processing Hamming and Hanning window functions for the Shenwei platform, referencing... Figure 3 ,include:
[0048] Obtain the window function operation type, as well as the total length and data type of the data to be operated on using the window function;
[0049] Based on the memory address range of the data to be processed, the total length of the data, and the cache line length of the SW64 architecture, distinguish between the cache line aligned region and the non-cache line aligned region of the data to be processed;
[0050] For data to be processed in non-cache row aligned regions, a scalar window function is used for calculation.
[0051] For the data to be processed within the cache line alignment region, vectorized window function calculation is performed using SW64 architecture SIMD instructions, based on the vectorized window function operation strategy corresponding to its data type.
[0052] Output the results of scalar window function calculation and vectorized window function calculation.
[0053] The Hamming and Hanning window function processing method proposed in this embodiment for the Shenwei platform can optimize the operation process of the two window functions, improve the efficiency of operation by using the SW64 architecture SIMD instruction parallel computing method, reduce memory access overhead in the program, increase cache hit rate, and thus improve the overall performance of Hamming and Hanning window operations.
[0054] Example 2
[0055] Based on the same inventive concept as Embodiment 1, this embodiment specifically introduces a method for processing Hamming and Hanning window functions for the Shenwei platform. (Refer to...) Figure 3 The method mainly involves the following aspects.
[0056] I. Acquisition and Analysis of Data to be Calculated
[0057] This section mainly involves obtaining the original input data and related parameters for the Hamming window and Hanning window function operations to be performed. The related parameters include memory address, data length, data type, and window function type, etc.
[0058] Both the Hanming window and the Hanning window are raised cosine windows, with similar formulas, such as: ,
[0059] When the window function type is a Hamming window, the window function coefficients a0 = 0.54 and a1 = 0.46, and the calculation formula is as follows:
[0060] ;
[0061] When the window function type is Hanning window, the window function coefficients a0 = 0.5 and a1 = 0.5, and the calculation formula is as follows:
[0062] ;
[0063] In this embodiment, during the vectorization operation processing of the two window functions on the Shenwei platform, it is only necessary to distinguish the values of the floating-point coefficient a0 of the first window function and the floating-point coefficient a1 of the second window function; the other operation processing procedures are the same.
[0064] The commonly used window function interface form in signal processing libraries is as follows:
[0065] status Wintype(datatype* pSrc, datatype* pDst, int len);
[0066] Here, Wintype is the window function type, representing a Hamming window or a Hanning window; datatype is the supported data type. For the SIMD instruction set of the SW64 architecture, the supported data types are divided into real numbers and complex numbers. Real numbers support half-word (16s), single-precision floating-point (32f), and double-precision floating-point (64f), while complex numbers support half-word (16sc), single-precision floating-point (32fc), and double-precision floating-point (64fc); pSrc pointer points to the contiguous memory area where the data to be operated on is stored; pDst pointer points to the contiguous memory area where the calculation result is stored; len represents the number of data samples to be windowed, i.e., the data length.
[0067] The memory distribution of the above six data types is as follows: Figure 1 As shown, the real and imaginary parts of a single complex number element are usually stored alternately in memory, that is, the real part is stored first at the lower memory address and the imaginary part is stored at the higher memory address.
[0068] In some possible embodiments, after obtaining the window function operation type, the window function coefficients can be initialized, or the window function coefficients can be set before the specific operation.
[0069] II. Handling of Hamming and Hanning Window Function Operations
[0070] This section mainly covers the length verification of the data to be processed, the distinction between cache line alignment regions, the different window function processing methods for cache line alignment regions and non-aligned regions, and the vectorized window function operation strategy for different data types in cache line alignment regions.
[0071] 2.1 Length verification and cache line alignment region differentiation
[0072] An initial judgment is made on the reasonableness of the total length len of the data to be processed by the window function. If the total length of the data is less than 0, it is regarded as an abnormal input, which has no calculation meaning and will not be processed by the window function.
[0073] If the total length of the data to be processed is greater than 0 and the number of bytes occupied in memory is less than the cache line length of the SW64 architecture, then the scalar window function is used to calculate all the data to be processed.
[0074] If the memory occupied by the data to be processed is greater than the length of the cache line, then it is determined whether the starting address of the memory of the data to be processed is an integer multiple of the length of the cache line. The first memory address of the data to be processed that is an integer multiple of the length of the cache line is taken as the starting address of the cache line alignment region. The starting index position begin_idx of the cache line alignment region is determined, and the ending index position end_idx of the cache line alignment region of the data to be processed is determined according to the starting index position and the length of the cache line. The data to be processed in the cache line alignment region is obtained, that is, the original length index range of the cache line alignment region is obtained. Then, the other data to be processed outside the index range is in the non-cache line alignment region.
[0075] In some possible embodiments, after determining the start index position begin_idx and end index position end_idx of the cache line alignment region, each piece of data in the data to be processed is traversed. For any original data with length index i, if its length index is less than the original length index of the data at the start index position begin_idx, or greater than the original length index of the data at the end index position end_idx, then the data is located in the non-cache line alignment region. Figure 2 As shown.
[0076] 2.2 Different window function handling methods for cache line aligned and unaligned regions
[0077] After determining the index range of the cache line alignment region, this embodiment proposes the following window function processing for different regions: a vectorized window function calculation method is used for the data in the cache line alignment region; and a scalarized window function calculation method is used for the data in the non-cache line alignment region.
[0078] 2.2.1 Calculation of Scalar Window Function
[0079] When performing scalar window function calculations on data in non-cached row-aligned regions, the current data pointed to by the pSrc pointer in the non-cached row-aligned region is read sequentially, the scalar calculation of the window function is performed, and the calculation result is stored in the memory pointed to by the pDst pointer. After each scalar window function operation, the positions of the pSrc pointer, the pDst pointer, and the current index of the sample to be windowed are updated. The relevant pseudocode is as follows:
[0080] for i from 0 to len step 1
[0081] pDst[i] = Wintype_op_scalar(pSrc[i])
[0082] end for
[0083] 2.2.2 Vectorized Window Function Calculation
[0084] For data within cache line aligned regions, parallel processing of window function computations is implemented using SIMD instructions from the SW64 architecture. Different vectorized window function computation strategies are employed for different data types. After completing a vectorized window function computation of a cache line memory region, the pSrc pointer, pDst pointer, and the current index position are updated. The relevant pseudocode is as follows:
[0085] for i from 0 to begin step 1
[0086] pDst[i] = Wintype_op_scalar(pSrc[i])
[0087] end for
[0088] for i from begin to end step VLEN_CACHE
[0089] / / VLEN_CACHE is the number of elements processed in one cache line calculation by SW64.
[0090] for j from 0 to VLEN step 1
[0091] / / VLEN is the number of vectorizations in one cache line of SW64, and cap is the number of different data types processed by simd instructions.
[0092] load &pSrc[i+cap*j] to vSrc
[0093] vDst = Wintype_op_simd(vSrc)
[0094] store vDst to &pDst[i+cap*j]
[0095] end for
[0096] end for
[0097] for i from end to len step 1
[0098] pDst[i] = Wintype_op_scalar(pSrc[i])
[0099] end for
[0100] 2.3 Vectorized window function operation strategy for different data types in cache line alignment region
[0101] 2.3.1 Initialization of Vectorized Window Function Operations
[0102] In some possible embodiments, the initialization process of the vectorized window function operation is as follows, for any data type:
[0103] Set the window function coefficients as follows: when the window function is a Hamming window, a0 = 0.54, a1 = 0.46; when the window function type is a Hanning window, a0 = 0.5, a1 = 0.5.
[0104] The floating-point data a0, a1, 4.0 / (len-1), and 16.0 / (len-1) are copied into four identical elements to form a new floating-point vector, denoted as the first window function coefficient vector v_a0, the second window function coefficient vector v_a1, the scaling factor vector v_tmp, and the step factor vector v_step. The scaling factor vector v_tmp is used to adjust the sequence of the single / double precision vector registers to a range that fits the window length.
[0105] The cosine calculation is initialized by passing four double-precision data values (0.0, 1.0, 2.0, 3.0) to a vector variable. This vector is then multiplied by the scaling factor vector v_tmp to obtain an initial equidistant x-coordinate vector, denoted as v_cos_init. This vector stores the initial values for parallel calculations using four single / double-precision vector registers and serves as the direct input for the subsequent cosine function.
[0106] 2.3.2 Vectorized Window Function Operation Strategy
[0107] Based on the above design, this embodiment performs 4 vectorization calculations on 16s half-word real numbers, 8 vectorization calculations on 32f single-precision floating-point real numbers, 4 vectorization calculations on 64f double-precision floating-point real numbers, 4 vectorization calculations on 16sc half-word complex numbers, 4 vectorization calculations on 32fc single-precision floating-point complex numbers, and 2 vectorization calculations on 64fc double-precision floating-point complex numbers.
[0108] (1) Vectorization optimization strategy for 16s data types
[0109] Four vectorization calculations are performed on the 16s data type data in the cache line alignment area. The vectorization calculation process is as follows:
[0110] Retrieve 16 half-word real numbers from the memory pointed to by the pSrc pointer and write them into the corresponding 16 half-precision element positions in the vector register, denoted as v_src16s;
[0111] Since window function calculations require high-precision floating-point operations, v_src16s is converted to a double-precision floating-point type and stored in four vector registers. Each vector register stores four double-precision floating-point data. v_x0, v_x1, v_x2, and v_x3 represent the data vectors in the four vector registers, respectively. Four reference tuples are created to establish a one-to-one correspondence between the original data and the calculation results, namely (v_x0, v_r0), (v_x1, v_r1), (v_x2, v_r2), and (v_x3, v_r3). These tuples are used to store the original data v_x0, v_x1, v_x2, and v_x3 before the calculation, and the corresponding results v_r0, v_r1, v_r2, and v_r3 after the calculation.
[0112] The vectorized window function of double-precision floating-point data type is calculated for each of the four tuples. Each calculation corresponds to the four double-precision floating-point data in one tuple. Taking the tuple (v_x0, v_r0) as an example, the calculation process is as follows:
[0113] The initialization vector v_cos_init is calculated using the cosine function, and the result is denoted as v_cos.
[0114] During initialization, the floating-point coefficients a0 of the first window function and a1 of the second window function are copied into four identical elements to form new floating-point vectors, denoted as v_a0=[a0, a0, a0, a0] and v_a1=[a1, a1, a1, a1], respectively.
[0115] Perform a vector negative multiplication and addition operation on v_a0, v_cos and v_a1 to obtain the window function vector v_w;
[0116] The window function vector v_w is multiplied element by element with the data vector v_x0 of the first vector register to obtain the calculation result after windowing, and then stored in the result vector v_r0 of the tuple;
[0117] The step size coefficient 16.0 / (len-1) is copied into four identical elements to form a new floating-point vector, denoted as v_step=[16.0 / (len-1), 16.0 / (len-1), 16.0 / (len-1), 16.0 / (len-1)], which is used to store the update step size of the initial value of the cosine calculation.
[0118] After the calculation is complete, v_cos_init is updated to the result after adding v_step, preparing a new initialization vector for the next calculation.
[0119] The calculation process for tuples (v_x1, v_r1), (v_x2, v_r2), and (v_x3, v_r3) is the same as described above.
[0120] Furthermore, in order to restore the data type and save memory storage, v_r0, v_r1, v_r2 and v_r3 are converted to half-word data types, merged and stored in a vector register to obtain the final calculation result, denoted as v_dst16s; and v_dst16s is stored in the memory area pointed to by the pDst pointer.
[0121] (2) Vectorization optimization strategy for 32f data types
[0122] Eight vectorization calculations are performed on the 32f data type data in the cache line alignment area. The vectorization calculation process is as follows:
[0123] Retrieve four single-precision floating-point real numbers from the memory pointed to by the pSrc pointer and write them into the corresponding four single-precision floating-point element positions in the vector register, denoted as v_src32f;
[0124] The initialization vector v_cos_init is calculated using the cosine function, and the result is denoted as v_cos.
[0125] The floating-point coefficients a0 of the first window function and a1 of the second window function are copied into four identical elements to form new floating-point vectors, denoted as v_a0=[a0, a0, a0, a0] and v_a1=[a1, a1, a1, a1] respectively.
[0126] Perform a vector negative multiplication and addition operation on v_a0, v_cos and v_a1 to obtain the window function vector v_w;
[0127] Multiply the window function vector v_w element by element with the original data vector v_src32f to obtain the windowed calculation result, denoted as v_dst32f;
[0128] The step size coefficient 16.0 / (len-1) is copied into four identical elements to form a new floating-point vector, denoted as v_step=[16.0 / (len-1), 16.0 / (len-1), 16.0 / (len-1), 16.0 / (len-1)], which is used to store the update step size of the initial value of the cosine calculation.
[0129] After the calculation is complete, v_cos_init is updated to the result after adding v_step, and a new initialization vector is prepared for the next calculation.
[0130] Finally, v_dst32f is stored in the memory area corresponding to pDst.
[0131] (3) Vectorization optimization strategy for 64f data type
[0132] Four vectorization calculations are performed on the 64f data type data in the cache line alignment area. The vectorization calculation process is as follows:
[0133] Retrieve four double-precision floating-point real numbers from the memory pointed to by the pSrc pointer and write them into the corresponding four double-precision floating-point element positions in the vector register, denoted as v_src64f;
[0134] The initialization vector v_cos_init is calculated using the cosine function, and the result is denoted as v_cos.
[0135] The floating-point coefficients a0 of the first window function and a1 of the second window function are copied into four identical elements to form new floating-point vectors, denoted as v_a0=[a0, a0, a0, a0] and v_a1=[a1, a1, a1, a1] respectively.
[0136] Perform a vector negative multiplication and addition operation on v_a0, v_cos and v_a1 to obtain the window function vector v_w;
[0137] The window function vector v_w is multiplied element by element with the original data vector v_src64f to obtain the windowed calculation result, denoted as v_dst64f;
[0138] The step size coefficient 16.0 / (len-1) is copied into four identical elements to form a new floating-point vector, denoted as v_step=[16.0 / (len-1), 16.0 / (len-1), 16.0 / (len-1), 16.0 / (len-1)], which is used to store the update step size of the initial value of the cosine calculation.
[0139] After the calculation is complete, v_cos_init is updated to the result after adding v_step, preparing a new initialization vector for the next calculation.
[0140] Finally, v_dst64f is stored in the memory area corresponding to pDst.
[0141] (4) Vectorization optimization strategy for 16sc data types
[0142] Four vectorization calculations are performed on the 16sc data type data in the cache line alignment area. The vectorization calculation process is as follows:
[0143] Take 8 half-word complex data from the memory pointed to by the pSrc pointer and write them into the corresponding 16 half-word element positions in the vector register, denoted as v_src16sc;
[0144] Since window function calculations require high-precision floating-point operations, v_src16sc is converted to a double-precision floating-point type and stored in four vector registers. Each vector register stores four double-precision floating-point data. v_x0, v_x1, v_x2, and v_x3 represent the data in the four vector registers, respectively. Two reference tuples are created to establish a one-to-one correspondence between the real and imaginary parts of the original complex number data and the corresponding calculation results, namely (v_x0, v_r0, v_x1, and v_r1) and (v_x2, v_r2, v_x3, and v_r3).
[0145] The vectorized window function of double-precision floating-point data type is calculated for each of the two tuples. Each calculation corresponds to the double-precision floating-point data in one tuple. Taking the tuple (v_x0, v_r0, v_x1, and v_r1) as an example, the calculation process is as follows:
[0146] The cosine function is calculated on the equidistant horizontal coordinate vector v_cos_init, and the result is denoted as v_cos.
[0147] The floating-point coefficients a0 of the first window function and a1 of the second window function are copied into four identical elements to form new floating-point vectors, denoted as v_a0=[a0, a0, a0, a0] and v_a1=[a1, a1, a1, a1] respectively.
[0148] Perform vector negative multiplication and addition on v_a0, v_cos and v_a1 to obtain the window function vector, denoted as v_y;
[0149] The window function vector v_y is subjected to long word vector element interleaving and insertion, and the lower 128 bits are taken and denoted as v_ya; the higher 128 bits of the window function vector v_y are shuffled and denoted as v_yb.
[0150] Store the result of multiplying v_x0 by v_ya in v_r0, and store the result of multiplying v_x2 by v_yb in v_r1.
[0151] The step size coefficient 16.0 / (len-1) is copied into four identical elements to form a new floating-point vector, denoted as v_step=[16.0 / (len-1), 16.0 / (len-1), 16.0 / (len-1), 16.0 / (len-1)], which is used to store the update step size of the initial value of the cosine calculation.
[0152] After the calculation is complete, v_cos_init is updated to the result after adding v_step, preparing a new initialization vector for the next calculation.
[0153] The calculation process for tuples (v_x2, v_r2, v_x3, and v_r3) is the same as described above.
[0154] Furthermore, in order to save memory storage, v_r0, v_r1, v_r2 and v_r3 are type-converted to half-word data types, and stored in a single vector register to obtain the final calculation result, denoted as v_dst16sc;
[0155] Finally, v_dst16sc is stored in the memory area corresponding to pDst.
[0156] (5) Vectorization optimization strategy for 32fc data type
[0157] Four vectorization calculations are performed on the 32fc data type data in the cache line alignment area. The vectorization calculation process is as follows:
[0158] Retrieve four single-precision floating-point complex numbers from the memory pointed to by the pSrc pointer and write them into the corresponding four single-precision floating-point element positions in the two vector registers, denoted as v_x0 and v_x1 respectively;
[0159] The initialization vector v_cos_init is calculated using the cosine function, and the result is denoted as v_cos.
[0160] The floating-point coefficients a0 of the first window function and a1 of the second window function are copied into four identical elements to form new floating-point vectors, denoted as v_a0=[a0, a0, a0, a0] and v_a1=[a1, a1, a1, a1] respectively.
[0161] Perform a negative vector multiplication and addition operation on v_a0, v_cos and v_a1 to obtain the window function vector v_y;
[0162] The window function vector v_y is subjected to long word vector element interleaving, and the lower 128 bits are taken and denoted as v_ya;
[0163] Shuffle the high 128 bits of the window function vector v_y, and denote it as v_yb;
[0164] The result of multiplying v_x0 by v_y0 is denoted as v_r0, and the result of multiplying v_x1 by v_y1 is denoted as v_r1;
[0165] The step size coefficient 16.0 / (len-1) is copied into four identical elements to form a new floating-point vector, denoted as v_step=[16.0 / (len-1), 16.0 / (len-1), 16.0 / (len-1), 16.0 / (len-1)], which is used to store the update step size of the initial value of the cosine calculation.
[0166] After the calculation is complete, v_cos_init is updated to the result after adding v_step, and a new initialization vector is prepared for the next calculation.
[0167] Finally, v_r0 and v_r1 are stored sequentially into the memory area corresponding to the location in pDst.
[0168] (6) Vectorization optimization strategy for 64fc data types
[0169] Two vectorization calculations are performed on the 64fc data type data in the cache line alignment area. The first vectorization calculation process is as follows:
[0170] Retrieve four double-precision floating-point complex numbers from the memory pointed to by the pSrc pointer and write them into the corresponding four double-precision floating-point element positions in the two vector registers, denoted as v_x0 and v_x1 respectively;
[0171] The initialization vector v_cos_init is calculated using the cosine function, and the result is denoted as v_cos.
[0172] The floating-point coefficients a0 of the first window function and a1 of the second window function are copied into four identical elements to form new floating-point vectors, denoted as v_a0=[a0, a0, a0, a0] and v_a1=[a1, a1, a1, a1] respectively.
[0173] Perform a negative vector multiplication and addition operation on v_a0, v_cos and v_a1 to obtain the window function vector v_y;
[0174] The window function vector v_y is subjected to long word vector element interleaving, and the lower 128 bits are taken and denoted as v_ya;
[0175] Shuffle the high 128 bits of the window function vector v_y, and denote it as v_yb;
[0176] The result of multiplying v_x0 by v_y0 is denoted as v_r0, and the result of multiplying v_x1 by v_y1 is denoted as v_r1;
[0177] The step size coefficient 16.0 / (len-1) is copied into four identical elements to form a new floating-point vector, denoted as v_step=[16.0 / (len-1), 16.0 / (len-1), 16.0 / (len-1), 16.0 / (len-1)], which is used to store the update step size of the initial value of the cosine calculation.
[0178] After the calculation is complete, v_cos_init is updated to the result after adding v_step, preparing a new initialization vector for the next calculation.
[0179] Finally, v_r0 and v_r1 are stored sequentially into the memory area corresponding to the location in pDst.
[0180] like Figure 4 As shown, in this embodiment, for the data of the above-mentioned 16s, 32f, 64f, 16sc, 32fc, and 64fc data types, with a data size of 16M, the speedup ratio of the Hamming window and Hanning window interfaces in the signal processing library is tested using scalar interface and vector interface respectively, and the throughput of each calculation is statistically analyzed. In the figure, the left vertical axis unit is MiB / s.
[0181] from Figure 4 The results show that the speedup ratios for the 16s, 32f, 64f, 16sc, 32fc, and 64fc data types in the Hamming window interface are 5.27, 7.08, 5.10, 5.94, 5.59, and 4.80, respectively, while the speedup ratios for the 16s, 32f, 64f, 16sc, 32fc, and 64fc data types in the Hanning window interface are 5.3, 6.98, 5.81, 5.78, 5.59, and 4.80, respectively.
[0182] In summary, the present invention proposes a vectorization optimization method for Hamming and Hanning window functions for different data types. By using SW64 architecture SIMD instructions and multiple vector registers for parallel computation, the method reduces memory access overhead, improves computational efficiency, and increases cache hit rate, thereby enhancing the overall performance of Hamming and Hanning window operations.
[0183] Example 3
[0184] This embodiment describes a computer-readable storage medium storing computer instructions that, when executed by a processor, implement the steps of the Hamming window and Hanning window function processing method for the Shenwei platform described in Embodiment 1 or 2.
[0185] Example 4
[0186] This embodiment describes a computer device, including:
[0187] Memory, used to store computer instructions;
[0188] A processor is configured to execute the computer instructions to implement the steps of the Hamming window and Hanning window function processing method for the Shenwei platform as described in Embodiment 1 or 2.
[0189] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0190] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0191] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.
[0192] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.
[0193] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims. All of these forms are within the protection scope of the present invention.
Claims
1. A method for processing Hamming and Hanning window functions for the Shenwei platform, characterized in that, include: Obtain the total length and data type of the data to be processed by the window function; Based on the memory address range of the data to be processed, the total length of the data, and the cache line length of the SW64 architecture, distinguish between the cache line aligned region and the non-cache line aligned region of the data to be processed; For data to be processed in non-cache row aligned regions, a scalar window function is used for calculation. For the data to be processed within the cache line alignment region, vectorized window function calculation is performed using SW64 architecture SIMD instructions, based on the vectorized window function operation strategy corresponding to its data type. Output the results of scalar window function calculation and vectorized window function calculation.
2. The method for processing Hamming and Hanning window functions for the Shenwei platform according to claim 1, characterized in that, The step of distinguishing between cache line-aligned and non-cache line-aligned regions of the data to be processed based on the memory address range, total data length, and cache line length of the SW64 architecture includes: Determine if the total length of the data to be processed is greater than 0 and the number of bytes occupied in memory is less than the cache line length of the SW64 architecture. If the conditions are met, then perform calculations on all the data to be processed using scalar window functions. If the total length of the data to be processed is equal to 0, then treat the data to be processed as invalid input and do not perform window function calculations.
3. The method for processing Hamming and Hanning window functions for the Shenwei platform according to claim 1 or 2, characterized in that, The step of distinguishing between cache line aligned regions and non-cache line aligned regions of the data to be processed based on the memory address range, total data length, and cache line length of the SW64 architecture further includes: If the memory occupied by the data to be processed is greater than the length of the cache line, then it is determined whether the starting address of the memory of the data to be processed is an integer multiple of the length of the cache line. The memory address of the first data to be processed that is an integer multiple of the length of the cache line is taken as the starting address of the cache line alignment region. The starting index position of the cache line alignment region is determined, and the ending index position of the cache line alignment region of the data to be processed is determined according to the starting index position and the length of the cache line. The data to be processed in the cache line alignment region is obtained, and the other data to be processed is in the non-cache line alignment region.
4. The method for processing Hamming and Hanning window functions for the Shenwei platform according to claim 1, characterized in that, The data types include real number data types and complex number data types. The real number data types include half-word real numbers, single-precision floating-point real numbers, and double-precision floating-point real numbers. The complex number data types include half-word complex numbers, single-precision floating-point complex numbers, and double-precision floating-point complex numbers. Different vectorized window function operation strategies are provided for different data types.
5. The method for processing Hamming and Hanning window functions for the Shenwei platform according to claim 1, characterized in that, It also includes obtaining the type of the window function to be computed and performing the initialization operation of the vectorization operation strategy before the vectorized window function is computed, specifically including: Configure the window function coefficients a0 and a1 of the window function formula according to the window function type; The window function coefficients a0 and a1, as well as the scaling factor 4.0 / (len-1) and step factor 16.0 / (len-1), are copied into four identical elements to form four parallel floating-point vectors, denoted as the first window function floating-point coefficient vector v_a0, the second window function floating-point coefficient vector v_a1, the scaling factor vector v_tmp, and the step factor vector v_step; where len is the number of data samples to be windowed in the cache row alignment region. The parallel floating-point vector with four double-precision data types (0.0, 1.0, 2.0, 3.0) is multiplied element-wise with v_tmp to obtain the initial equidistant horizontal coordinate vector v_cos_init, completing the cosine calculation initialization. v_a0, v_a1, v_tmp, v_step, and v_cos_init together constitute the constant input table for vectorized window function operations, and the equidistant horizontal coordinate vector is incremented by v_step after each window function calculation to update the data index for the next calculation.
6. The method for processing Hamming and Hanning window functions for the Shenwei platform according to claim 5, characterized in that, Within a cache line, for data of different data types to be processed, the vectorized window function operation strategy performs different vectorization calculations, where each vectorization calculation process includes: The cosine function is calculated on the equally spaced abscissa vectors to obtain the cosine calculation result; The window function vector is obtained by performing a vector negative multiplication and addition on the floating-point coefficient vector of the first window function, the cosine calculation result, and the floating-point coefficient vector of the second window function. Multiply the window function vector with the data vector to be operated on to obtain the vectorized operation result after windowing; The vectorized operation result is stored in a memory area used for storing calculation results.
7. The method for processing Hamming and Hanning window functions for the Shenwei platform according to claim 6, characterized in that, In vectorized window function computation, the single vectorization computation process for the vectorized window function operation strategy of 16s data type includes: Take 16 half-word real data from the data in the cache line-aligned region and write them into the corresponding 16 half-word element positions in the vector register, denoted as v_src16s; The v_src16s type is converted to a double-precision floating-point type and stored in four vector registers, each storing four double-precision floating-point data. After obtaining the window function vector, the type-converted data in the vector registers is multiplied by the window function vector to obtain the vectorized operation result after windowing. The vectorized operation result is converted to a half-word real number type and stored in a vector register. It is then stored as the final vectorized operation result in the memory area of the calculation result pointed to by the current sample index.
8. The method for processing Hamming and Hanning window functions for the Shenwei platform according to claim 6, characterized in that, In vectorized window function computation, the single vectorization computation process for the vectorized window function operation strategy of 16sc data type includes: Take eight half-word complex data from the data in the cache line-aligned region and write them into the vector register, denoted as v_src16sc; The v_src16sc type is converted to a double-precision floating-point type and stored in four vector registers, each storing four double-precision floating-point data. After obtaining the window function vector, the window function vector is subjected to long word vector element interleaving, and the lower 128 bits are taken as v_ya. The higher 128 bits are shuffled into a vector and denoted as v_yb. The real and imaginary parts of the type-converted data in the vector registers are multiplied by v_ya and v_yb respectively to obtain the vectorized operation result after windowing. The vectorized operation result is converted to a half-word complex number and stored in a vector register. It is then stored as the final vectorized operation result in the memory area of the calculation result pointed to by the current sample index.
9. A computer-readable storage medium storing computer instructions thereon, characterized in that, When the computer instruction is executed by the processor, it implements the steps of the Hamming window and Hanning window function processing method for the Shenwei platform as described in any one of claims 1 to 8.
10. A computer device, characterized in that, include: Memory, used to store computer instructions; A processor for executing the computer instructions to implement the steps of the Hamming window and Hanning window function processing method for the Shenwei platform as described in any one of claims 1 to 8.