Anti-edge-breakage silicon wafer coating bearing frame

By setting up baffle steps, clearance spaces, and anti-film accumulation areas inside the wafer support stage, combined with the chamfered design of the support stage, the problem of edge chipping during silicon wafer coating process is solved, achieving high-efficiency coating yield and improved product quality.

CN121472797APending Publication Date: 2026-02-06NAN TONG JIU FANG XIN CAI LIAO GU FEN YOU XIAN GONG SI
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Patent Information

Application Number
CN202511614924.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-11-06
Publication Date
2026-02-06

AI Technical Summary

Technical Problem

Traditional PVD carrier frames are prone to causing film buildup in corners during silicon wafer coating, resulting in stress at the contact point between the silicon wafer and the carrier, leading to edge chipping and affecting product quality and production efficiency.

Method used

A baffle step is machined on the inner side wall of the support platform, and a clearance space and anti-film accumulation area are set. The edge of the support platform is chamfered to avoid film accumulation and stress concentration.

Benefits of technology

It effectively prevents edge chipping during silicon wafer coating, increases the coating yield to 98%, ensures product quality, and improves production efficiency.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention discloses an anti-edge-breakage silicon wafer coating bearing frame which comprises a wafer bearing table (1), a wafer blocking step (3) is machined on the inner side wall of the wafer bearing table (1), the wafer bearing table (1) is provided with a plurality of vertexes provided with receding positions, and transition is conducted between the receding positions and the wafer blocking step (3) through an anti-film-deposition area. A plurality of supporting tables are arranged on the wafer bearing table (1) in the length direction and the width direction, the ITO film is prevented from being accumulated at the chamfering position of the wafer bearing table in the mode that the film accumulation prevention area is arranged between the wafer blocking step and the vacancy avoiding position for transition, it is guaranteed that edge breakage does not occur at the corner position of a silicon wafer in the film coating process, stress of the contact position of the silicon wafer and the supporting tables is reduced, and the stability of the film coating process is improved. And the edge breakage probability of the edge part of the silicon wafer is greatly reduced, so that the product quality is ensured, and the production efficiency is improved.
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Description

Technical Field

[0001] This invention belongs to the field of photovoltaic semiconductor equipment technology, and specifically relates to a silicon wafer coating support frame to prevent edge chipping. Background Technology

[0002] A silicon wafer coating carrier frame is a device used to carry silicon wafers and perform surface coating. The carrier frame is composed of an array structure, combined with a frame, beams and other structures to form a carrier plate. It can process multiple silicon wafers at the same time, and can achieve automated coating with the help of a conveying mechanism.

[0003] PVD equipment includes a PVD carrier, vacuum chamber, target material, substrate, plasma excitation power supply, and gas delivery system. Maintaining a high vacuum environment and efficient gas mass flow control are key to the design of PVD equipment, ensuring high quality and high efficiency of thin film deposition.

[0004] In the PVD process of the photovoltaic semiconductor equipment industry, the silicon wafer coating carrier frame is a key component for carrying silicon wafers for coating. Traditional PVD carrier frames have the following shortcomings: because the design of the clearance position only considers preventing corner chipping, there is no anti-film accumulation zone between the clearance position and the wafer support, which easily leads to film accumulation in the corners; the bosses on the wafer support have no chamfers, and their sharp edges will generate large stress with the silicon wafer. These problems result in a low coating yield of PVD equipment, obvious edge chipping characteristics during silicon wafer coating, affecting product quality and reducing production efficiency. Summary of the Invention

[0005] Purpose of the invention: The purpose of this invention is to overcome the shortcomings of the prior art and provide a silicon wafer coating support frame that prevents edge chipping.

[0006] Technical solution: A silicon wafer coating support frame for preventing edge chipping includes a wafer support platform. The wafer support platform has baffle steps processed on its inner sidewall. The wafer support platform is provided with several vertices equipped with clearance positions. The clearance positions and the baffle steps are transitioned through an anti-film accumulation area. The wafer support platform has several support platforms arranged in the length and width directions.

[0007] A further improvement of the present invention is that the plate receiving platform has baffle steps processed on its four internal side walls, and the plate receiving platform is provided with four vertices equipped with clearance positions, the clearance positions including a first clearance position, a second clearance position, a third clearance position and a fourth clearance position, and the anti-film accumulation area includes an anti-film accumulation area one and an anti-film accumulation area two.

[0008] A further improvement of the present invention is that the plate support stage has three support platforms arranged in the length direction and two support platforms arranged in the width direction, and the support platforms include support platform one, support platform two, support platform three, support platform four, support platform five and support platform six.

[0009] A further improvement of the present invention is that the thickness of the support platform is 0.3 to 0.8 mm, and the edge of the support platform that contacts the silicon wafer is provided with a first chamfer, the size of the first chamfer being C0.1 to C0.2 mm.

[0010] A further improvement of the present invention is that the plate support, the plate baffle step, and the support platform are made of metal or non-metal.

[0011] A further improvement of the present invention is that the metal includes stainless steel, aluminum, and titanium alloy, and the non-metal includes PPS and PEEK.

[0012] A further improvement of the present invention is that the clearance position is a circular hole or an arc-shaped groove.

[0013] A further improvement of the present invention is that the distance between the anti-accumulation film area and the apex is 3mm to 8mm.

[0014] A further improvement of the present invention is that the support platform is trapezoidal, semi-circular, or triangular in shape, and the number is 6 to 12.

[0015] Compared with the prior art, the present invention achieves at least the following beneficial effects: This invention discloses an anti-chipping silicon wafer coating support frame. The wafer support platform has baffle steps machined on its inner sidewall. The wafer support platform is provided with several vertices equipped with clearance positions. The clearance positions and baffle steps are transitioned by an anti-film accumulation area. The wafer support platform has several support platforms arranged in the length and width directions. The anti-film accumulation area can prevent the film layer from accumulating at the corners, thereby ensuring that the silicon wafer will not chip at the corners during the coating process. The edge of the support platform that contacts the silicon wafer has a first chamfer, which reduces the stress at the contact point between the silicon wafer and the support platform when the silicon wafer is coated in the process cavity, thereby greatly reducing the probability of chipping at the edge of the silicon wafer, ensuring product quality, and improving production efficiency. Attached Figure Description

[0016] Figure 1 This is a perspective view of a silicon wafer coating support frame for preventing edge chipping according to the present invention; Figure 2 This is a magnified view of point A; Figure 3 This is a magnified view of point B; Figure 4 This is the front view of the present invention; Figure 5 This is a rear view of the present invention.

[0017] Explanation of reference numerals in the attached figures: 1-Slab receiving platform; 2-Slab support one; 3-Slab blocking step; 4-Slab support two; 41-First chamfer; 5-Slab support three; 6-First clearance position; 7-Second clearance position; 8-Slab support four; 9-Slab support five; 10-Slab support six; 11-Third clearance position; 12-Fourth clearance position; 121-Anti-film accumulation zone one; 122-Anti-film accumulation zone two. Detailed Implementation

[0018] Various exemplary embodiments of the present invention will now be described in detail. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of the invention. The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the invention or its application or use.

[0019] Techniques, methods, and apparatus known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and apparatus should be considered part of the specification. In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not as limitations. Therefore, other examples of exemplary embodiments may have different values.

[0020] See Figure 1-5 A silicon wafer coating support frame for preventing edge chipping includes a wafer support platform 1. The wafer support platform 1 has baffle steps 3 processed on its inner sidewall. The wafer support platform 1 is provided with a number of vertices equipped with clearance positions. The clearance positions and the baffle steps 3 are transitioned through an anti-film accumulation area. The wafer support platform 1 has a number of support platforms arranged in the length and width directions.

[0021] The wafer support platform 1 has baffle steps 3 machined on its four internal side walls. The wafer support platform 1 is provided with four vertices equipped with clearance positions, including a first clearance position 6, a second clearance position 7, a third clearance position 11, and a fourth clearance position 12. The anti-deposition area includes an anti-deposition area one 121 and an anti-deposition area two 122. The wafer support platform 1 has three support platforms arranged in the length direction and two support platforms arranged in the width direction. The support platforms include support platform one 2, support platform two 4, support platform three 5, support platform four 8, support platform five 9, and support platform six 10. The thickness of the support platform is 0.3 to 0.8 mm. The edge of the support platform that contacts the silicon wafer is provided with a first chamfer 41, the size of which is C0.1 to C0.2 mm.

[0022] The materials used to make the plate support 1, the baffle step 3, and the support platform are metal or non-metal; the metal includes stainless steel, aluminum, and titanium alloy, and the non-metal includes PPS and PEEK; the clearance is a round hole or an arc-shaped groove; the distance between the anti-film accumulation area and the apex is 3mm to 8mm; the shape of the support platform is trapezoidal, semi-circular, or triangular, and the number is set to 6 to 12.

[0023] This invention uses an anti-film accumulation zone between the baffle step and the clearance position to prevent ITO film from accumulating at the chamfered corners of the wafer support platform, ensuring that the silicon wafer does not chip at any corner during the coating process. The wafer support platform has several support platforms arranged in the length and width directions, and the edges of the support platforms that contact the silicon wafer are chamfered, which reduces the stress at the contact points between the silicon wafer and the support platforms when the silicon wafer is coated in the process cavity. This greatly reduces the probability of chipping at the edges of the silicon wafer, increasing the coating yield of the carrier board from 80% to 98%, ensuring product quality and improving production efficiency.

[0024] The specific embodiments described herein are merely illustrative of the spirit of the invention. Those skilled in the art to which this invention pertains may make various modifications or additions to the described specific embodiments or use similar methods to substitute them, without departing from the spirit of the invention or exceeding the scope defined by the appended claims.

Claims

1. A silicon wafer coating support frame for preventing edge chipping, characterized in that, Includes a support platform (1), the support platform (1) has a baffle step (3) processed on its inner side wall, the support platform (1) is provided with several vertices equipped with clearance positions, the clearance positions and the baffle step (3) are transitioned through an anti-film area, and the support platform (1) has several support platforms arranged in the length and width directions.

2. The anti-chipping silicon wafer coating support frame according to claim 1, characterized in that, The receiving platform (1) has baffle steps (3) processed on its four internal side walls. The receiving platform (1) is provided with four vertices equipped with clearance positions. The clearance positions include a first clearance position (6), a second clearance position (7), a third clearance position (11), and a fourth clearance position (12). The anti-film accumulation area includes an anti-film accumulation area one (121) and an anti-film accumulation area two (122).

3. The anti-chipping silicon wafer coating support frame according to claim 2, characterized in that, The support platform (1) has three support platforms arranged in the length direction and two support platforms arranged in the width direction. The support platforms include support platform one (2), support platform two (4), support platform three (5), support platform four (8), support platform five (9) and support platform six (10).

4. The anti-chipping silicon wafer coating support frame according to claim 1, characterized in that, The thickness of the support platform is 0.3 to 0.8 mm, and the edge of the support platform that contacts the silicon wafer is provided with a first chamfer (41), the size of the first chamfer (41) being C0.1 to C0.2 mm.

5. The anti-chipping silicon wafer coating support frame according to claim 1, characterized in that, The materials used to make the plate support (1), the plate baffle step (3), and the support platform are metal or non-metal.

6. The anti-chipping silicon wafer coating support frame according to claim 5, characterized in that, The metals include stainless steel, aluminum, and titanium alloys, and the non-metals include PPS and PEEK.

7. The anti-chipping silicon wafer coating support frame according to claim 1, characterized in that, The clearance space is a circular hole or an arc-shaped groove.

8. The anti-chipping silicon wafer coating support frame according to claim 1, characterized in that, The distance between the anti-accumulation membrane area and the apex is 3mm to 8mm.

9. The anti-chipping silicon wafer coating support frame according to claim 1, characterized in that, The support platform is trapezoidal, semi-circular, or triangular in shape, and there are 6 to 12 of them.