Display panel and display terminal

Abstract

The invention relates to a display panel and a display terminal. The display panel comprises a substrate, a display part and a binding part, wherein the display part comprises a plurality of metal layers and at least one flat layer; the binding part comprises a test terminal, a binding terminal and a first protection part, and the first protection part and a flat layer are arranged on the same layer; the binding terminal comprises a first terminal and a second terminal, the test terminal is located between the first terminal and the second terminal, the first protection part is located between the binding terminal and the test terminal, and the thickness of the first protection part is smaller than that of each flat layer. According to the display panel, the thickness of the first protection part arranged on the same layer is set to be smaller than that of the first flat layer, so that the thickness difference between the first protection part and the film layer below can be reduced, and the shear stress borne by the film layer covering the edge of the first protection part in the binding process is reduced; therefore, the risk that the film layer covering the edge of the first protection part cracks due to overlarge stress is reduced.

Description

Technical Field

[0001] This application relates to the field of display technology, and more particularly to a display panel and a display terminal. Background Technology

[0002] The display panel includes a display area and a non-display area located on one side of the display area. The non-display area is usually provided with a bonding part, which is used to bond and connect with structures such as a driver chip. The driver chip can output driving signals to the sub-pixels of the display area.

[0003] The bonding section includes multiple bonding terminals, and the driver chip includes multiple connection pins. The connection pins of the driver chip are bonded to the bonding terminals of the bonding section. Due to the small size of the driver chip, cracks are prone to occur in the film layer in the area where the bonding section is located during the bonding process. Summary of the Invention

[0004] This application provides a display panel and display terminal, which improves the technical problem that the film layer in the bonding area is prone to cracking during the bonding process.

[0005] To achieve the above objectives, according to a first aspect of this application, a display panel is provided, including a display area and a non-display area disposed on one side of the display area, the display panel comprising: substrate; A display unit is disposed on one side of the substrate and located in the display area. The display unit includes multiple metal layers and at least one planarization layer disposed on the side of the multiple metal layers away from the substrate. A bonding portion is disposed on one side of the substrate and located in the non-display area. The bonding portion includes a test terminal, a bonding terminal, and a first protective portion. The test terminal includes at least one sub-part, which is disposed on the same layer as any of the multiple metal layers. The bonding terminal includes at least one sub-layer, which is disposed on the same layer as any of the multiple metal layers. The first protective portion is disposed on the same layer as a planarization layer. The bonding terminal includes a first terminal and a second terminal. The first terminal is located on the side of the second terminal away from the display portion. The test terminal is located between the first terminal and the second terminal. The first protective portion is located between the bonding terminal and the test terminal. The thickness of the first protective portion is less than the thickness of each planarization layer.

[0006] Optionally, the display portion further includes a pixel definition portion disposed on the side of the planarization layer away from the substrate, and the bonding portion further includes a second protection portion disposed on the same layer as the pixel definition portion. The second protection portion covers the test terminal and covers the edge of the first protection portion near the test terminal. The second protection portion and the bonding terminal do not overlap in the thickness direction of the display panel. The thickness of the second protective portion is the same as the thickness of the pixel definition portion, and the sum of the thicknesses of the first protective portion and the second protective portion is less than the thickness of each of the planarization layers.

[0007] Optionally, the sum of the thicknesses of the first protective part and the second protective part is greater than or equal to 1.2 micrometers and less than or equal to 1.6 micrometers.

[0008] Optionally, at least one of the planarization layers includes a first planar portion and a second planar portion stacked together, the second planar portion being disposed on the side of the first planar portion away from the substrate, the first protective portion being disposed in the same layer as the first planar portion, and the angle between the sidewall and the bottom wall of the second protective portion being smaller than the angle between the sidewall and the bottom wall of the first protective portion.

[0009] Optionally, the outer contour of the orthographic projection pattern of the second protective part on the substrate is located within the orthographic projection pattern of the first protective part on the substrate, and the outer contour of the orthographic projection pattern of the second protective part does not coincide with the outer contour of the orthographic projection pattern of the first protective part.

[0010] Optionally, the angle between the sidewall of the first protective part and the bottom wall of the first protective part is smaller than the angle between the sidewall of the first flat part and the bottom wall of the first flat part.

[0011] Optionally, the angle between the sidewall of the first protective part and the bottom wall of the first protective part is less than 35 degrees.

[0012] Optionally, the thickness of the first protective portion is less than or equal to half the thickness of the first flat portion.

[0013] Optionally, the display unit includes a driving circuit layer, which includes multiple metal layers and an interlayer insulating layer located between any two adjacent metal layers; The interlayer insulating layer extends into the non-display area, and the first protective part is disposed in contact with the interlayer insulating layer.

[0014] Optionally, the length of the first protective part extending beyond the test terminal in a first direction is greater than the length of the first protective part extending beyond the test terminal in a second direction, where the second direction is the direction from the first terminal to the second terminal, and the first direction is perpendicular to the second direction.

[0015] Optionally, the display panel further includes a driver chip, which is bonded to the bonding terminal.

[0016] According to a second aspect of this application, a display terminal is provided, including the display panel described above.

[0017] In the display panel of this application embodiment, by setting the thickness of the first protective part disposed in the same layer to be less than the thickness of each flat layer, the thickness difference between the first protective part and the underlying film layer can be reduced, the shear stress on the film layer covered by the edge of the first protective part during the bonding process can be reduced, thereby reducing the risk of cracks caused by excessive stress on the film layer covered by the edge of the first protective part.

[0018] Other features and advantages of this application will be described in detail in the following detailed description section. Attached Figure Description To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] To gain a more complete understanding of this application and its beneficial effects, the following description will be provided in conjunction with the accompanying drawings, wherein the same reference numerals in the following description denote the same parts.

[0020] Figure 1 This is a photograph of cracks appearing in the film layer in the bonding area of ​​a display panel in the prior art; Figure 2 This is a top view of a display panel provided in an exemplary embodiment of this disclosure; Figure 3 yes Figure 1 Schematic diagram of the cross-sectional structure at the CC point; Figure 4 yes Figure 1 An enlarged structural diagram of the binding part at point D; Figure 5A yes Figure 4 A cross-sectional view of the bonding terminals in the diagram; Figure 5B yes Figure 4 A cross-sectional view of the test terminals in the diagram; Figure 6 This is a schematic diagram of the cross-sectional structure of the edges of the first and second protective sections; Figure 7 This is a schematic diagram of the structure of a display terminal provided in an exemplary embodiment of this disclosure.

[0021] Explanation of reference numerals in the attached figures: 1-Display panel; AA-Display area; NA-Non-display area; 10-Substrate; 20 - Display section; 21 - Driving circuit layer; 211 - Metal layer; 212 - Interlayer insulating layer; 210 - Thin film transistor; 2101 - Gate; 2102 - Source; 2103 - Drain; 2104 - Active section; 22 - Planarization layer; 221 - First planarization section; 222 - Second planarization section; 23 - Pixel definition section; 30 - Binding part; 31 - Binding terminal; 311 - First terminal; 312 - Second terminal; 301 - First sub-layer; 302 - Second sub-layer; 303 - Third sub-layer; 32 - Test terminal; 321 - First sub-section; 322 - Second sub-section; 323 - Third sub-section; 33 - First protection part; 34 - Second protection part; 40 - Light-emitting layer; 41 - Anode; 42 - Light-emitting material layer; 43 - Cathode; 50 - Encapsulation layer; 51 - First encapsulation layer; 52 - Second encapsulation layer; 53 - Third encapsulation layer; 60-Driver chip; A1 - The angle between the side wall of the first protective part 33 and the bottom wall of the first protective part 33; A2 - The angle between the side wall and the bottom wall of the second protective part 34; A3 - The angle between the side wall of the first flat portion 221 and the bottom wall of the first flat portion 221; S1 - The first protective part 33 extends beyond the length of the test terminal 32 in the first direction D1; S2 - The first protective part 33 extends beyond the test terminal 32 in the second direction D2; D1 - First direction; D2 - Second direction; 2-Display terminal; 3-Terminal body. Detailed Implementation

[0022] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the protection scope of this application.

[0023] According to the first aspect of this application, Figures 2 to 6 As shown, a display panel 1 is provided, including a display area AA and a non-display area NA disposed on one side of the display area AA. The display panel 1 includes a substrate 10, a display portion 20, and a bonding portion 30. The display portion 20 is disposed on one side of the substrate 10 and located in the display area AA. The display portion 20 includes a multilayer metal layer 211 and at least one planarization layer 22 disposed on the side of the multilayer metal layer 211 away from the substrate 10. The bonding portion 30 is disposed on one side of the substrate 10 and located in the non-display area NA. The bonding portion 30 includes a test terminal 32, a bonding terminal 31, and a first protective portion 33. The test terminal 32 includes multiple sub-parts. The sub-layer is disposed on the same layer as any of the multilayer metal layers 211. The bonding terminal 31 includes at least one sub-layer, which is disposed on the same layer as any of the multilayer metal layers 211. The first protective part 33 is disposed on the same layer as a planarization layer 22. The bonding terminal 31 includes a first terminal 311 and a second terminal 312. The first terminal 311 is located on the side of the second terminal 312 away from the display part 20. The test terminal 32 is located between the first terminal 311 and the second terminal 312. The first protective part 33 is located between the bonding terminal 31 and the test terminal 32. The thickness of the first protective part 33 is less than the thickness of each planarization layer 22.

[0024] In some embodiments, the display panel 1 may be an LCD panel, an OLED panel, a Mini-LED panel, a Micro-LED panel, etc.

[0025] In some embodiments, the substrate 10 can be a rigid material or a flexible material. The rigid material can be glass, quartz, or silicon. The flexible material can be one of polyimide (PI), polycarbonate (PC), polynorbornene (PNB), and polyethylene terephthalate (PET).

[0026] like Figure 2 As shown, the display panel 1 includes a display area AA and a non-display area NA disposed around the periphery of the display area AA. The display area AA can be provided with multiple sub-pixels, which can include red sub-pixels, green sub-pixels, and blue sub-pixels, thereby realizing color display. The display area AA is provided with a pixel driving circuit, which is used to drive the sub-pixels to display. The non-display area NA can be provided with a gate driving circuit, etc., which can provide driving signals to the sub-pixels.

[0027] like Figure 2 and Figure 3 As shown, the display unit 20 is located on one side of the substrate 10, and the display unit 20 is used to realize the display function. The display unit 20 includes a multilayer metal layer 211 and at least one planarization layer 22 disposed on the side of the multilayer metal layer 211 away from the substrate 10.

[0028] In some embodiments, the metal layer 211 may be formed of any one of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu) or an alloy thereof.

[0029] The multilayer metal layer 211 can be used to form a pixel driving circuit, which includes a thin-film transistor 210, capacitors, wiring, etc. The pixel driving circuit is used to drive sub-pixel display. One sub-pixel can correspond to one pixel driving circuit.

[0030] The planarization layer 22 is made of an organic insulating material. The material of the planarization layer 22 can be selected from resin-based materials such as polyimide, epoxy resin, acrylic, polyester, photoresist, polyacrylate, polyamide, and siloxane. Organic insulating materials have leveling properties, which can fill in terrain differences in the pixel driving circuit, reduce unevenness in the film layer caused by the patterned metal layer 211 in the pixel driving circuit, and improve the display effect of the display panel 1.

[0031] like Figure 2 As shown, the bonding portion 30 and the display portion 20 are located on the same side of the substrate 10, and the bonding portion 30 is located in the non-display area NA. The bonding terminal 31 can be used for bonding and connection with the driver chip 60, etc. The bonding terminal 31 is disposed on the same layer as at least one metal layer 211 of the metal layer 211 of the display portion 20, so that a certain metal layer in the display portion 20 and the corresponding film layer in the bonding terminal 31 can be formed by the same patterning process. It should be noted that the bonding terminal 31 can be a single metal layer or a stack of multiple metal layers. When the bonding terminal 31 is a stack of multiple metal layers, each metal layer can be disposed on the same layer as one metal layer 211 of the metal layer 211 of the display portion 20.

[0032] like Figure 2 and Figure 4 As shown, the bonding terminal 31 includes a second terminal 312 and a first terminal 311 arranged sequentially in a direction away from the display unit 20. That is to say, the second terminal 312 is located between the first terminal 311 and the display unit 20.

[0033] In some embodiments, the first terminal 311 can be an input terminal and the second terminal 312 can be an output terminal, but this is not limited to these. When the first terminal 311 is an input terminal, external control signals can be input to the driver chip 60 via the first terminal 311. When the second terminal 312 is an output terminal, control signals from the driver chip 60 can be output via the second terminal 312, which can be electrically connected to the display unit 20, thereby inputting control signals from the driver chip 60 to the display unit 20.

[0034] Test terminal 32 is used to detect the performance of display panel 1 during the manufacturing process. For example, test terminal 32 can be an array test pad (AT pad). AT pad can be used to detect defects in the drive circuit, thereby intercepting or repairing them in time and preventing defective products from flowing into subsequent processes and causing production waste.

[0035] like Figure 5B As shown, the test terminal 32 is disposed on the same layer as at least one of the metal layers 211 of the display unit 20, so that a certain metal layer in the display unit 20 and the corresponding film layer in the test terminal 32 can be formed using the same patterning process. It should be noted that the test terminal 32 can be a single layer of metal or a stack of multiple metal layers. When the test terminal 32 is a stack of multiple metal layers, each metal layer can be disposed on the same layer as one of the metal layers 211 of the display unit 20. For ease of explanation, in the cross-sectional view, films having the same cross-sectional pattern are those disposed on the same layer.

[0036] like Figure 5B As shown, a test circuit exists between the test terminal 32 and the display unit 20. To prevent electrostatic discharge damage caused by exposed test circuitry, a first protective part 33 can be used to cover the test circuit. The material of the first protective part 33 can be an insulating material.

[0037] In some embodiments, to simplify the manufacturing process of the display panel 1, the first protective portion 33 can be disposed on the same layer as a planarization layer 22, thereby forming the first protective portion 33 and the planarization layer 22 using the same patterning process. In this case, the material of the first protective portion 33 is the same as the material of the planarization layer 22.

[0038] It should be understood that, such as Figure 5B As shown, the first protection part 33 is located between the bonding terminal 31 and the test terminal 32. That is to say, the first protection part 33 does not cover the bonding terminal 31 or the test terminal 32, but covers the test circuit area located between the bonding terminal 31 and the test terminal 32, thereby reducing the risk of electrostatic discharge in this area.

[0039] like Figure 1 The image shown is a photograph of a crack appearing in the membrane layer of the bonding portion 30 region in the prior art. Figure 1 The dashed box in the figure indicates the location of the crack. In the embodiments of this application, by setting the thickness of the first protective part 33 disposed in the same layer to be less than the thickness of each flat layer 22, the thickness difference between the first protective part 33 and the underlying film layer can be reduced, the shear stress on the film layer covered by the edge of the first protective part 33 during the bonding process can be reduced, thereby reducing the risk of the film layer covered by the edge of the first protective part 33 being subjected to excessive stress and cracking.

[0040] It should be noted that when the first protective layer 33 and the planarization layer 22 are formed using the same patterning process, the thicknesses of the planarization layer 22 and the first protective layer 33 can be made different by using a half-tone mask.

[0041] For example, a slit can be designed on the photomask corresponding to the first protective part 33 to adjust the exposure of the first protective part 33 and reduce the thickness of the first protective part 33.

[0042] In some embodiments, such as Figure 3 As shown, when the display panel 1 is an active-matrix light-emitting panel, such as an OLED panel, Mini-LED panel, or Micro-LED panel, the display panel 1 also includes a light-emitting layer 40, which is disposed on the side of the planarization layer 22 away from the substrate 10. The light-emitting layer 40 includes an anode 41, a light-emitting material layer 42, and a cathode 43 stacked together. Holes are injected into the anode 41, and electrons are injected into the cathode 43. Holes and electrons recombine in the light-emitting material layer 42 to emit light. A pixel driving circuit can be connected to the anode 41 to provide a driving signal to the anode 41.

[0043] In some embodiments, such as Figure 3 As shown, the display panel 1 also includes an encapsulation layer 50. The encapsulation layer 50 is disposed on the side of the cathode 43 away from the substrate 10. The encapsulation layer 50 can be formed by alternatingly stacked one or more inorganic layers and one or more organic layers. For example, the encapsulation layer 50 can be a first encapsulation layer 51, a second encapsulation layer 52, and a third encapsulation layer 53 stacked sequentially. The first encapsulation layer 51 and the second encapsulation layer 52 can be inorganic layers. The second encapsulation layer 52 can be an organic layer. The organic layer can be a single layer or multiple layers formed of polyethylene terephthalate, polyimide, polycarbonate, epoxy resin, polyethylene, and polyacrylate. The inorganic layer can be a single layer or multiple layers of metal oxide or metal nitride, such as silicon nitride, aluminum oxide, silicon oxide, etc.

[0044] When the display panel 1 is a non-actively light-emitting display panel, such as a liquid crystal panel, the display panel 1 also includes pixel electrodes, a liquid crystal layer, and a common electrode disposed on the side of the planarization layer 22 away from the substrate 10. The pixel electrodes and the common electrode are used to drive the liquid crystal molecules in the liquid crystal layer to deflect, thereby achieving brightness control of the image. A pixel driving circuit can be connected to the pixel electrodes to provide driving signals to the pixel electrodes.

[0045] Optionally, such as Figure 3 and Figure 5BAs shown, the display unit 20 also includes a pixel definition part 23 disposed on the side of the planarization layer 22 away from the substrate 10, and the bonding part 30 also includes a second protection part 34 disposed on the same layer as the pixel definition part 23. The second protection part 34 covers the test terminal 32 and covers the edge of the first protection part 33 near the test terminal 32. The second protection part 34 and the bonding terminal 31 do not overlap in the thickness direction of the display panel 1. The thickness of the second protection part 34 is the same as the thickness of the pixel definition part 23, and the sum of the thicknesses of the first protection part 33 and the second protection part 34 is less than the thickness of each planarization layer 22.

[0046] In some embodiments, the material of the pixel definition portion 23 may be an organic insulating material, such as polyacrylate, polyimide, etc.

[0047] like Figure 3 As shown, the pixel defining section 23 has multiple pixel openings, each exposing the anode 41 beneath the pixel defining section 23. Each pixel opening defines a light-emitting area. The light-emitting material layer 42 of the display panel 1 is formed within the pixel openings. The cathode 43 covers both the pixel defining section 23 and the light-emitting material layer 42.

[0048] like Figure 3 and Figure 5B As shown, the second protective portion 34 and the pixel defining portion 23 are disposed on the same layer, so that the second protective portion 34 and the pixel defining portion 23 can be formed by the same patterning process, simplifying the manufacturing process of the display panel 1. At this time, the material of the second protective portion 34 is the same as the material of the pixel defining portion 23.

[0049] In some embodiments, the thickness of the second protective portion 34 is the same as the thickness of the pixel defining portion 23, so that the second protective portion 34 and the pixel defining portion 23 can be formed using a common photomask, thereby reducing the manufacturing cost of the display panel 1.

[0050] like Figure 5B As shown, the second protective portion 34 covers the test terminal 32, and the second protective portion 34 and the bonding terminal 31 do not overlap in the thickness direction of the display panel 1. That is to say, the second protective portion 34 covers the test terminal 32, but does not cover the bonding terminal 31, thereby exposing the bonding terminal 31 so that it can be electrically connected to other materials such as the driver chip 60 in subsequent processes.

[0051] It should be understood that the sum of the thicknesses of the first protective portion 33 and the second protective portion 34 is less than the thickness of each planarization layer 22. Through this arrangement, even with both the first protective portion 33 and the second protective portion 34 present, they are prevented from becoming excessively thick. This avoids an excessively large discontinuity between the first protective portion 33 and the edge covering the film layer of the first protective portion 33 and the film layer covering the edge of the first protective portion 33. A larger discontinuity results in greater shear stress on the film layer covering the edge of the first protective portion 33 during the bonding process, making it more prone to cracking. In other words, by reducing the total thickness of the first protective portion 33 and the second protective portion 34, the risk of cracking in the film layer covering the edge of the first protective portion 33 can be reduced.

[0052] The thickness of the first protective part 33 and the second protective part 34 cannot be too thick, as this would increase the risk of cracks in the film layer covering the edge of the first protective part 33. At the same time, the thickness of the first protective part 33 and the second protective part 34 cannot be too thin, as this would make the film layer above the circuit between the test terminal 32 and the bonding terminal 31 too thin, affecting the effectiveness of electrostatic protection.

[0053] Optionally, the sum of the thicknesses of the first protective portion 33 and the second protective portion 34 is greater than or equal to 1.2 micrometers and less than or equal to 1.6 micrometers. For example, the sum of the thicknesses of the first protective portion 33 and the second protective portion 34 can be 1.2 micrometers, 1.3 micrometers, 1.4 micrometers, 1.5 micrometers, 1.6 micrometers, etc.

[0054] In some embodiments, the thickness of the first protective portion 33 is 0.5 micrometers to 1 micrometer. For example, the thickness of the first protective portion 33 is 0.5 micrometers, 0.6 micrometers, 0.7 micrometers, 0.8 micrometers, 0.9 micrometers, 1 micrometer, etc.

[0055] In some embodiments, the thickness of the second protective portion 34 is 0.5 micrometers to 1 micrometer. For example, the thickness of the second protective portion 34 is 0.5 micrometers, 0.6 micrometers, 0.7 micrometers, 0.8 micrometers, 0.9 micrometers, 1 micrometer, etc.

[0056] In some embodiments, the thickness of the second protective portion 34 is less than the thickness of the first protective portion 33. Since the thickness of the second protective portion 34 is equal to the thickness of the pixel defining portion 23, while the thickness of the first protective portion 33 is less than the thickness of each planarization layer 22, this arrangement allows the thickness of the pixel defining portion 23 to be less than the thickness of the planarization layer 22. The thicker the planarization layer 22, the better the effect of leveling the terrain differences in the underlying film layer, thereby further improving the display effect of the display panel 1.

[0057] Optionally, such as Figure 6As shown, the angle A2 between the side wall of the second protective part 34 and the bottom wall of the second protective part 34 is smaller than the angle A1 between the side wall of the first protective part 33 and the bottom wall of the first protective part 33.

[0058] The angle A2 between the sidewall and bottom wall of the second protective part 34 is also the taper angle of the second protective part 34. The angle A1 between the sidewall and bottom wall of the first protective part 33 is also the taper angle of the first protective part 33. By setting the taper angle of the second protective part 34 to be smaller than that of the first protective part 33, the slope of the edge of the second protective part 34 can be made gentler, thereby slowing down the increase in the thickness of the edge of the second protective part 34 and reducing the thickness difference between the edge of the second protective part 34 and the surface of the first protective part 33 below.

[0059] Optionally, such as Figure 4 As shown, the outer contour of the orthographic projection pattern of the second protective portion 34 on the substrate 10 is located within the orthographic projection pattern of the first protective portion 33 on the substrate 10, and the outer contour of the orthographic projection pattern of the second protective portion 34 does not coincide with the outer contour of the orthographic projection pattern of the first protective portion 33. That is to say, the outer contour of the orthographic projection pattern of the second protective portion 34 is within the range of the orthographic projection pattern of the first protective portion 33, and the outer contour of the orthographic projection pattern of the second protective portion 34 does not coincide with the outer contour of the orthographic projection pattern of the first protective portion 33. Through this arrangement, the edge of the second protective portion 34 can be partially exposed above the edge of the first protective portion 33, thus offsetting the edges of the second protective portion 34 and the first protective portion 33. This avoids the thickness of the edge of the second protective portion 34 overlapping with the thickness of the edge of the first protective portion 33, increasing the difference in thickness between the overlapped layer and the underlying film layer.

[0060] When the thickness of the organic material film is large, the resulting cone angle is also large; conversely, when the thickness of the organic material film decreases, the resulting cone angle can also decrease. In the stack of the second protective part 34 and the first protective part 33, setting the thickness of the first protective part 33 to be greater than the thickness of the second protective part 34 allows the cone angle of the first protective part 33 to be larger than that of the second protective part 34. Simultaneously, by spacing the boundary of the orthographic projection pattern of the second protective part 34 from the boundary of the orthographic projection pattern of the first protective part 33, the thickness transition at the edge of the overall stack of the second protective part 34 and the first protective part 33 can be made smoother, further improving the distribution of shear stress in the bonding process and preventing stress concentration.

[0061] Optionally, such as Figure 3 and Figure 6As shown, at least one planarization layer 22 includes a first planarization portion 221 and a second planarization portion 222 stacked together. The second planarization portion 222 is disposed on the side of the first planarization portion 221 away from the substrate 10. The first protective portion 33 is disposed in the same layer as the first planarization portion 221. The angle A1 between the sidewall and the bottom wall of the first protective portion 33 is smaller than the angle A3 between the sidewall and the bottom wall of the first planarization portion 221. Since the thickness of the first protective portion 33 is less than the thickness of the first planarization portion 221, the cone angle of the first protective portion 33 can be reduced, thereby making the cone angle of the first protective portion 33 smaller than the cone angle of the first planarization portion 221.

[0062] Optionally, the angle A1 between the side wall of the first protective part 33 and the bottom wall of the first protective part 33 is less than 35 degrees.

[0063] In some embodiments, the cone angle of the first protective part 33 is less than 35 degrees. For example, the cone angle of the first protective part 33 is 20 degrees, 21 degrees, 22 degrees, 23 degrees, 24 degrees, 25 degrees, 26 degrees, 27 degrees, 28 degrees, 29 degrees, 30 degrees, 31 degrees, 32 degrees, 33 degrees, 34 degrees, or 35 degrees.

[0064] Optionally, the thickness of the first protective portion 33 is less than or equal to half the thickness of the first flat portion 221.

[0065] In some embodiments, the thickness of the first flat portion 221 can be from 1 micrometer to 3 micrometers. For example, the thickness of the first flat portion 221 can be 1 micrometer, 1.2 micrometers, 1.4 micrometers, 1.6 micrometers, 1.8 micrometers, 2 micrometers, 2.2 micrometers, 2.4 micrometers, 2.6 micrometers, 2.8 micrometers, 3 micrometers, etc.

[0066] In some embodiments, the thickness of the first protective portion 33 can be from 0.5 micrometers to 1 micrometer. For example, the thickness of the first protective portion 33 is 0.5 micrometers, 0.6 micrometers, 0.7 micrometers, 0.8 micrometers, 0.9 micrometers, 1 micrometer, etc.

[0067] Optionally, such as Figure 3 As shown, the display unit 20 includes a driving circuit layer 21, which includes multiple metal layers 211 and an interlayer insulating layer 212 located between any two adjacent metal layers 211; wherein the interlayer insulating layer 212 extends to the non-display area NA, and the first protection unit 33 is disposed in contact with the interlayer insulating layer 212.

[0068] The driving circuit layer 21 can be a pixel driving circuit, etc. The driving circuit layer 21 includes a plurality of thin-film transistors 210, each thin-film transistor 210 including an active portion 2104, a gate 2101, a source 2102, and a drain 2103. The gate 2101, source 2102, and drain 2103 can be disposed on the same layer as one of the metal layers 211. For example, a first planarization portion 221 can directly contact and cover the source 2102 and drain 2103, and the first planarization portion 221 is located between the pixel definition portion 23 and the source 2102.

[0069] In some embodiments, the source electrode 2102 includes a stacked first source electrode and a second source electrode, with the second source electrode located on the side of the first source electrode away from the substrate 10. The drain electrode 2103 includes a stacked first drain electrode and a second drain electrode, with the second drain electrode located on the side of the first drain electrode away from the substrate 10. The gate electrode 2101 includes a stacked first gate electrode and a second gate electrode, with the second gate electrode located on the side of the first gate electrode away from the substrate 10. A first flattening portion 221 is located between the first source electrode and the second source electrode, and an interlayer insulating layer 212 is located on the side of the first source electrode closer to the substrate 10. The display panel 1 may also include a second flattening portion 222 located between the first flattening portion 221 and the pixel defining portion 23, which may further flatten the terrain. The material of the second flattening portion 222 may be the same as the material of the first flattening portion 221.

[0070] In some embodiments, the material of the interlayer insulating layer 212 may be a stack of one or more inorganic insulating materials, such as silicon oxide, silicon nitride, silicon oxynitride, etc.

[0071] In some embodiments, such as Figure 5A As shown, the bonding terminal 31 includes a first sub-layer 301, a second sub-layer 302, and a third sub-layer 303 stacked together. The first sub-layer 301 can be disposed on the same layer as the second gate 2101, the second sub-layer 302 can be disposed on the same layer as the first source, and the third sub-layer 303 can be disposed on the same layer as the second source.

[0072] In some embodiments, such as Figure 5B As shown, the test terminal 32 includes a first sub-part 321, a second sub-part 322, and a third sub-part 323 stacked together. The first sub-part 321 can be disposed on the same layer as the second gate 2101, the second sub-part 322 can be disposed on the same layer as the first source, and the third sub-part 323 can be disposed on the same layer as the second source. It should be noted that, in order to achieve conduction between the second sub-part 322 and the third sub-part 323, the first protection part 33 has an opening corresponding to the second sub-part 322, through which the third sub-part 323 passes and contacts the second sub-part 322.

[0073] It should be noted that inorganic insulating materials are more brittle than organic insulating materials and are more prone to cracking under stress. In particular, when the difference in thickness between the edge of the first protective portion 33 and the surface of the interlayer insulation layer 212 is significant, the junction between the edge of the interlayer insulation layer 212 and the edge of the first protective portion 33 is more susceptible to shear stress generated by the bonding process. Therefore, in the embodiments of this application, by setting the thickness of the first protective portion 33 to be less than the thickness of the first flat portion 221, the difference in thickness between the edge of the first protective portion 33 and the surface of the interlayer insulation layer 212 can be reduced, thereby reducing the risk of cracking in the interlayer insulation layer 212.

[0074] Optionally, such as Figure 4 As shown, the length S1 by which the first protective part 33 extends beyond the test terminal 32 in the first direction D1 is greater than the length S2 by which the first protective part 33 extends beyond the test terminal 32 in the second direction D2. The second direction D2 is the direction from the first terminal 311 to the second terminal 312, and the first direction D1 is perpendicular to the second direction D2. This means that the first protective part 33 can extend to the left and to the right in the first direction D1, and the length S1 by which the first protective part 33 extends beyond the test terminal 32 in the first direction D1 is the length by which the first protective part 33 extends to the left or to the right. Similarly, the first protective part 33 can extend upwards and downwards in the second direction D2, and the length S2 by which the first protective part 33 extends beyond the test terminal 32 in the second direction D2 is the length by which the first protective part 33 extends upwards or downwards.

[0075] The distance by which the first protective portion 33 extends to the left and to the right in the first direction D1 is greater than the distance by which it extends upward and downward. This arrangement increases the length of the first protective portion 33 in the first direction D1, thereby dispersing the shear stress generated during the bonding process over a longer distance, reducing stress concentration, and lowering the risk of cracks in the interlayer insulation layer 212.

[0076] In some embodiments, the length of the first protective portion 33 in the first direction D1 may be slightly less than the length of the binding portion 30 in the first direction D1. The length of the binding portion 30 in the first direction D1 is the length of the outer contour of the entire binding portion 30 in the first direction D1. Optionally, such as Figure 1 As shown, the display panel 1 also includes a driver chip 60, which is bonded to the bonding terminal 31.

[0077] Specifically, the driver chip 60 includes a third terminal corresponding to the first terminal 311 and a fourth terminal corresponding to the second terminal 312. The first terminal 311 is bonded to the third terminal, and the second terminal 312 is bonded to the fourth terminal. The bonding connection includes connection via anisotropic conductive adhesive (ACF) or the like.

[0078] According to a second aspect of this application, a display terminal 2 is provided, including the display panel 1 described above.

[0079] In this embodiment, as Figure 7 As shown, the display terminal 2 includes a display panel 1 and a terminal body 3, which are combined into one unit.

[0080] In this embodiment, the display terminal 2 can be any product or component with display function, such as a mobile phone, tablet computer, television, monitor, laptop computer, digital photo frame, or navigator.

[0081] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0082] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0083] The embodiments, implementation methods, and related technical features of this application can be combined and substituted for each other without conflict.

[0084] The above are merely preferred embodiments of this application and are not intended to limit this application in any way. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of this application without departing from the technical solution of this application shall still fall within the scope of the technical solution of this application.

Claims

1. A display panel, characterized in that, The display panel includes a display area and a non-display area disposed on one side of the display area. substrate; A display unit is disposed on one side of the substrate and located in the display area. The display unit includes multiple metal layers and at least one planarization layer disposed on the side of the multiple metal layers away from the substrate. A bonding portion is disposed on one side of the substrate and located in the non-display area. The bonding portion includes a test terminal, a bonding terminal, and a first protective portion. The test terminal includes at least one sub-part, which is disposed on the same layer as any of the multiple metal layers. The bonding terminal includes at least one sub-layer, which is disposed on the same layer as any of the multiple metal layers. The first protective portion is disposed on the same layer as a planarization layer. The bonding terminal includes a first terminal and a second terminal. The first terminal is located on the side of the second terminal away from the display portion. The test terminal is located between the first terminal and the second terminal. The first protective portion is located between the bonding terminal and the test terminal. The thickness of the first protective portion is less than the thickness of each planarization layer.

2. The display panel according to claim 1, characterized in that, The display section further includes a pixel definition section disposed on the side of the planarization layer away from the substrate, and the bonding section further includes a second protection section disposed on the same layer as the pixel definition section. The second protection section covers the test terminal and covers the edge of the first protection section near the test terminal. The second protection section and the bonding terminal do not overlap in the thickness direction of the display panel. The thickness of the second protective portion is the same as the thickness of the pixel definition portion, and the sum of the thicknesses of the first protective portion and the second protective portion is less than the thickness of each of the planarization layers.

3. The display panel according to claim 2, characterized in that, The sum of the thicknesses of the first protective part and the second protective part is greater than or equal to 1.2 micrometers and less than or equal to 1.6 micrometers.

4. The display panel according to claim 2, characterized in that, The angle between the side wall of the second protective part and the bottom wall of the second protective part is smaller than the angle between the side wall of the first protective part and the bottom wall of the first protective part.

5. The display panel according to claim 2, characterized in that, The outer contour of the orthographic projection pattern of the second protective part on the substrate is located within the orthographic projection pattern of the first protective part on the substrate, and the outer contour of the orthographic projection pattern of the second protective part does not coincide with the outer contour of the orthographic projection pattern of the first protective part.

6. The display panel according to any one of claims 1 to 5, characterized in that, At least one of the planarization layers includes a first planar portion and a second planar portion stacked together, the second planar portion being disposed on the side of the first planar portion away from the substrate, the first protective portion being disposed in the same layer as the first planar portion, and the angle between the sidewall of the first protective portion and the bottom wall of the first protective portion being smaller than the angle between the sidewall of the first planar portion and the bottom wall of the first planar portion.

7. The display panel according to claim 6, characterized in that, The thickness of the first protective portion is less than or equal to half the thickness of the first flat portion.

8. The display panel according to any one of claims 1 to 5, characterized in that, The angle between the side wall of the first protective part and the bottom wall of the first protective part is less than 35 degrees.

9. The display panel according to any one of claims 1 to 5, characterized in that, The display unit includes a driving circuit layer, which includes multiple metal layers and an interlayer insulating layer located between any two adjacent metal layers. The interlayer insulating layer extends into the non-display area, and the first protective part is disposed in contact with the interlayer insulating layer.

10. The display panel according to claim 9, characterized in that, The length of the first protective part extending beyond the test terminal in a first direction is greater than the length of the first protective part extending beyond the test terminal in a second direction, where the second direction is the direction from the first terminal to the second terminal, and the first direction is perpendicular to the second direction.

11. The display panel according to any one of claims 1 to 5, characterized in that, The display panel also includes a driver chip, which is bonded to the bonding terminal.

12. A display terminal, characterized in that, Includes the display panel as described in any one of claims 1 to 11.

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