A miniaturized on-chip internally matched power amplifier device with high harmonic suppression

Abstract

This invention provides a miniaturized, on-chip, internally matched power amplifier device with high harmonic suppression, belonging to the field of harmonic suppression amplifier technology. By introducing a cascaded design of multi-stage power amplifiers, combined with internal matching technology and the innovative application of high-dielectric ceramics and molybdenum-copper carriers, this invention successfully solves problems related to gain enhancement, harmonic suppression, and thermal management. This solution achieves miniaturization while simultaneously improving power density and gain, enhancing harmonic suppression performance to -45dBc, and optimizing efficiency. Furthermore, the combination of a molybdenum-copper carrier and a conformal heat dissipation module effectively reduces thermal resistance, extends device lifespan, and meets stringent high-temperature and high-frequency environmental requirements, improving system reliability and efficiency while reducing device size and weight.

Description

Technical Field

[0001] This invention relates to the field of harmonic suppression amplifier technology, specifically to a miniaturized on-chip internally matched power amplifier device with high harmonic suppression. Background Technology

[0002] In the 2.7GHz to 3.5GHz frequency band, 60W power devices are commonly used in high-frequency, high-power applications such as 5G communication base stations, satellite communications, and high-frequency radar. In traditional designs, the cascading of multi-stage power amplifiers and external harmonic filters often lead to problems such as large size, insufficient heat dissipation, and low efficiency. Especially in scenarios requiring compact size, such as automotive, drones, or small communication platforms, existing technologies cannot ensure power output while also considering the size and weight of the device.

[0003] In the prior art, CN117277979A discloses a C-band GaN harmonic suppression power amplifier, comprising: an input stage network matching unit for impedance matching adjustment of the input signal; a first transistor amplification unit for power amplification of the input stage network matching signal; an intermediate stage network matching unit for performing network impedance matching adjustment and power splitting of the first power amplified signal; a second transistor amplification unit for power amplification of the four intermediate stage network matching signals respectively; and an output stage network matching unit for combining and harmonic suppression of the four second power amplified signals. While it can improve output power, efficiency, and harmonic suppression, its high system complexity and difficulty in integration and miniaturization significantly reduce its applicability in scenarios requiring compact chip sizes.

[0004] The information disclosed in the background section is only intended to enhance the understanding of the background of this disclosure, and therefore may include information that does not constitute prior art known to those skilled in the art. Summary of the Invention

[0005] The purpose of this invention is to provide a miniaturized on-chip internally matched power amplifier device with high harmonic suppression, so as to solve the problems mentioned in the background art.

[0006] To achieve the above objectives, the present invention provides the following technical solution:

[0007] A miniaturized on-chip internally matched power amplifier device with high harmonic suppression, specifically comprising:

[0008] The distortion correction module is electrically connected to the signal input terminal. It is used to receive the signal to be amplified, perform pre-distortion and signal correction processing on the signal to be amplified to obtain a second signal, and send the second signal to the distributed amplification module.

[0009] A distributed amplification module, electrically connected to a distortion calibration module, includes two cascaded input structures. Each input structure comprises an input matching circuit, a GaN sub-unit, a nonlinear transmission line unit, and an output matching circuit connected in series.

[0010] Input matching circuit and output matching circuit are used to reduce the reflection and loss of the second signal during transmission;

[0011] The GaN sub-units closer to the distortion correction module are driving stages, and the GaN sub-units farther from the distortion correction module are amplification stages. The driving stage is used to provide driving signals to the amplification stage, and the amplification stage is used to amplify the second signal to obtain the third signal.

[0012] Nonlinear transmission line units are used to suppress harmonics generated during the amplification process of GaN subunits;

[0013] An isolation module is connected in series between two cascaded input structures to reduce signal interference between the two input structures by adjusting the impedance.

[0014] A filtering module, electrically connected to a distributed amplification module, is used to filter the third signal to generate an output signal.

[0015] Preferably, the two sets of GaN sub-units are arranged along the signal transmission direction, and the length difference between the two sets of nonlinear transmission line units is adjusted so that the harmonic phase difference generated by the second and third signals is... For odd multiples of the length, the length difference between the two sets of nonlinear transmission line elements satisfies:

[0016]

[0017] In the formula This represents the length difference between two sets of nonlinear transmission line units. Indicates the center wavelength of the second and third signals. Indicates an odd multiple of the center wavelength. This represents the multiplier, which is a natural number containing 0. Indicates the harmonic order;

[0018] The center wavelength is determined by the center frequency and the effective dielectric constant of the substrate material, and its calculation method is as follows:

[0019]

[0020] In the formula Represents the speed of light. Indicates the preset center frequency. This represents the effective dielectric constant of the substrate material.

[0021] Preferably, the filtering module employs a sixth elliptic harmonic filter, and the transfer function of the signal passing through the sixth elliptic harmonic filter is expressed as:

[0022]

[0023]

[0024]

[0025] In the formula The transfer function of a signal. Represents a complex frequency variable. Represents the imaginary unit. Indicates the angular frequency of the signal. Indicates signal frequency. This indicates the preset cutoff angular frequency. This indicates the preset cutoff frequency. Represents a zero-point polynomial. Represents a 6th-order elliptic function. This represents the passband ripple factor.

[0026] Preferably, the isolation module includes a spiral inductor and a thin-film resistor, and its impedance is calculated as follows:

[0027]

[0028] In the formula This represents the total impedance of the isolation module. , These represent the resistance value of the thin-film resistor and the inductance value of the spiral inductor, respectively.

[0029] By adjusting the inductance value of the spiral inductor, the total impedance of the isolation module is changed, thereby reducing the difference between the output power of the power amplifier device and the preset target power.

[0030] Preferably, the step of adjusting the inductance value of the spiral inductor to change the total impedance of the isolation module includes:

[0031] Determine the output power of the power amplifier device and the preset target power, and use the square root of the ratio of the target power to the output power as the first adjustment coefficient;

[0032] The inductance value of the original spiral inductor is adjusted by the first adjustment factor to obtain the inductance value of the adjusted spiral inductor. The inductance value of the adjusted spiral inductor is the product of the inductance value of the original spiral inductor and the first adjustment factor.

[0033] Preferably, the DPD algorithm model preset in the distortion correction module adopts a 5th-order memory polynomial model, the expression of which is:

[0034]

[0035] In the formula , Representing the model's first... The input signal and the first One output signal , These represent the maximum values ​​of memory depth and nonlinear order, respectively. , Indices representing memory depth and nonlinear order, respectively. The predistortion coefficients are represented by the least squares method. Iterative updates are performed, with an update cycle of less than 1 μs;

[0036] when hour, These are the linear predistortion coefficients, used to compensate for linear distortion;

[0037] when hour, These are nonlinear predistortion coefficients used to compensate for nonlinear distortion.

[0038] Preferably, the power amplification device further includes a conformal heat dissipation module, wherein the frame unit is a molybdenum copper frame and the heat conduction unit is a directional diamond micropillar.

[0039] Preferably, the molybdenum-copper frame is manufactured using 3D printing technology, with a honeycomb pore size of 200μm±10μm, a wall thickness of 50μm±5μm, and a porosity of 60%±3%.

[0040] The oriented diamond micropillars are grown in the crystal orientation, with a diameter of 50μm±5μm, a height of 300μm±20μm, and a spacing of 200μm±10μm.

[0041] Compared with the prior art, the beneficial effects of the present invention are:

[0042] This invention achieves phase cancellation and amplitude suppression of harmonic signals by designing a two-stage GaN sub-unit matching network and a nonlinear transmission line structure, thereby reducing the amplifier's nonlinear distortion. Combined with a high-dielectric-constant ceramic substrate matching circuit and a compact sixth-order elliptic harmonic filter, the overall system size and insertion loss are effectively reduced, while transmission efficiency and linearity are improved. The synergistic effect of the isolation module and the digital predistortion algorithm further optimizes signal quality and output power stability. The overall solution improves integration while meeting power and harmonic suppression requirements, significantly increasing its applicability in scenarios with compact chip layouts. Attached Figure Description

[0043] Figure 1 This is a schematic diagram of the circuit structure of the present invention.

[0044] Figure 2 This is a schematic diagram showing the changes in input power and output power of the power amplifier device at different frequencies in this invention;

[0045] Figure 3 This is a schematic diagram showing the changes in gain, efficiency, and second harmonic of the power amplifier device in this invention at different frequencies. Detailed Implementation

[0046] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to specific embodiments.

[0047] It should be noted that, unless otherwise defined, the technical or scientific terms used in this invention should have the ordinary meaning understood by one of ordinary skill in the art to which this invention pertains. The terms "first," "second," and similar terms used in this invention do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as "comprising" or "including" mean that the element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as "connected" or "linked" are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0048] Example:

[0049] Please see Figures 1-3 The present invention provides a technical solution:

[0050] A miniaturized on-chip internally matched power amplifier device with high harmonic suppression specifically includes: a distributed amplification module, a filtering module, an isolation module, and a distortion correction module.

[0051] The distributed amplification module includes two sets of input / output matching circuits, GaN sub-units, and nonlinear transmission line (NLTL) units. NLTL units are a mature, existing technology, and their specific principles will not be elaborated upon here. The two sets of GaN sub-units are connected in a two-stage cascade configuration. The stage closest to the signal input is the first stage, the driver stage, and the stage closest to the signal output is the second stage, the amplification stage. The driver-stage GaN sub-units provide the driving function; they have low power and high impedance, which can be matched to 50 ohms using an LC circuit. The amplification-stage GaN sub-units amplify the power; specifically, a transistor with a single bare core, a total gate width of 13mm, and a power of 70W can be selected. Typically, for GaN sub-units, the source is grounded, the drain is output, and the gate is used to input the control signal. For the second-stage GaN sub-unit, simulation can be performed first to extract the optimal matching source impedance point, optimal matching load impedance gain point, and power point within the operating frequency band. Then, an LC circuit is used to match these points to obtain the corresponding electrical parameters of the input / output matching circuits. Specifically, the input / output matching circuit impedance is matched to between 10 ohms and 15 ohms. The capacitor of the input matching circuit is set between 4.5pF and 6.0pF and can be made using a ceramic substrate with a dielectric constant of 80. The capacitor of the output matching circuit is set between 2pF and 4.5pF and can be made using a ceramic substrate with a dielectric constant of 40. As for the inductance value of the input / output matching circuit, it can be obtained from the simulation results.

[0052] Two sets of GaN sub-units are arranged along the signal transmission direction, and by adjusting the length difference between the two sets of nonlinear transmission line units, the harmonic phase difference generated by the second and third signals is made such that... An odd multiple of, that is, satisfying:

[0053]

[0054] Indicates harmonic phase difference, This represents the multiplier, which is a natural number containing 0.

[0055] The phase shift can be calculated using a wave-based phase constant model, and the model expression is as follows:

[0056]

[0057] in Indicates wavelength. This indicates the phase offset. Indicates the distance of propagation.

[0058] The center wavelength is determined by the center frequency and the effective dielectric constant of the substrate material, and it is calculated as follows:

[0059]

[0060] In the formula Represents the speed of light. Indicates the preset center frequency. This represents the effective dielectric constant of the substrate material.

[0061] The center frequency of the input signal is Since this value is fixed, and the substrate material is determined, the corresponding effective dielectric constant is also fixed. Therefore, the propagation speed and wavelength of the input signal are also fixed, with the center wavelength being [value missing]. And none of them will change with the amplification effect.

[0062] To ensure that the harmonics generated by the second and third signals cancel each other out, the corresponding phase shift difference (i.e., the phase difference of the harmonics) is: An odd multiple of, that is:

[0063]

[0064] In the formula , These represent the lengths of the two sets of nonlinear transmission line units, This represents the length difference between the two sets of nonlinear transmission line units.

[0065] The above two about By canceling out the parameters of the equations and introducing the concept of harmonic order, we can derive the formula satisfied by the length difference between the two sets of nonlinear transmission line elements:

[0066]

[0067] In the formula Indicates the center wavelength of the second and third signals. Indicates an odd multiple of the center wavelength. This indicates the harmonic order. Here, the phase relationship between the harmonics and the fundamental wave (i.e., the second and third signals) is changed by controlling the propagation path length and nonlinear characteristics of the harmonic signals. This allows different harmonic components to have a specific phase difference after passing through the nonlinear transmission line unit, thereby achieving the effect of mutual cancellation or mutual interference reduction of the harmonic signals at the output end.

[0068] In this step, the nonlinear operating point of the GaN power amplifier is optimized primarily through precise source / load impedance matching and appropriate selection of matching circuit parameters (capacitors, inductors, substrate dielectric constant). This method does not directly cancel out harmonic signals structurally (e.g., parallel harmonic cancellation), but rather uses fine matching of the LC circuit to ensure that both the driver stage (first stage) and the output stage (second stage) operate at their optimal impedance points. This means the amplifier operates in a region with less harmonic generation, reducing nonlinear distortion and minimizing harmonic generation at its source, thus achieving harmonic suppression. Furthermore, after reducing harmonic generation at the source through precise impedance matching, the addition of a downstream filter further suppresses harmonics, providing double protection. Moreover, this method allows for flexible adjustment of the capacitors and impedances of the LC circuit within a certain range, facilitating actual process compensation, reducing the impact of production deviations on performance, and promoting miniaturization and high-density assembly.

[0069] The filtering module is located at the output of the distributed amplifier module and is used to filter the amplified signal.

[0070] The filtering module uses a sixth elliptic harmonic filter, which is designed to have a steep roll-off characteristic and can improve the suppression of second harmonics to about -65dBc, which is better than the common -63dBc in existing technologies.

[0071] The transfer function of the signal after passing through the sixth elliptic harmonic filter is expressed as:

[0072]

[0073]

[0074]

[0075] In the formula The transfer function of a signal. Represents a complex frequency variable. Represents the imaginary unit. Indicates the angular frequency of the signal. Indicates signal frequency. This indicates the preset cutoff angular frequency. This indicates the preset cutoff frequency. Represents a zero-point polynomial. Represents a 6th-order elliptic function. This represents the passband ripple factor.

[0076] Specifically, when designing a sixth-order elliptic harmonic filter, parameters such as the passband ripple coefficient, stopband ripple coefficient, and cutoff frequency are determined according to actual requirements. These parameters are then input into a filter design tool (such as Matlab, ADS, or Filter Design Tool) to obtain the zero / pole polynomials and transfer function. Finally, inductors, capacitors, and other components are selected for simulation to confirm performance. This filter can use a barium titanate ceramic substrate with an effective dielectric constant of 120. The cutoff frequency can be set to 3.5 GHz. Assuming a center frequency of 3.0 GHz, the filter length is approximately 0.74 mm, only about 30% of that of a traditional filter (typically 5 mm x 3 mm). Furthermore, the insertion loss is reduced to about 0.5 dB, only about 40% of that of a traditional filter (typically 1.2 dB). This results in both smaller size and lower insertion loss.

[0077] In this step, by introducing a sixth-order elliptic harmonic filter, the design goals of high harmonic suppression, low insertion loss, and miniaturization are achieved. It can achieve ripple in both the passband and stopband, extremely steep roll-off, smaller size at the same order, and stronger harmonic suppression capability. It breaks through the traditional filter's trade-off relationship between harmonic suppression and size and loss, and can significantly improve harmonic suppression capability while maintaining miniaturization, thus providing key support for the overall solution's high efficiency, high stability, and miniaturization.

[0078] An isolation module is placed between the two GaN sub-units of the distributed amplifier module to reduce noise interference in the input signal.

[0079] The isolation module includes a spiral inductor and a thin-film resistor, and its impedance is calculated as follows:

[0080]

[0081] In the formula This represents the total impedance of the isolation module. , These represent the resistance value of the thin-film resistor and the inductance value of the spiral inductor, respectively.

[0082] By adjusting the inductance value of the spiral inductor, the total impedance of the isolation module is changed, thereby reducing the difference between the output power of the power amplifier device and the preset target power.

[0083] The steps for adjusting the inductance value of the spiral inductor to change the total impedance of the isolation module include:

[0084] Determine the output power of the power amplifier device and the preset target power, and use the square root of the ratio of the target power to the output power as the first adjustment coefficient;

[0085] The inductance value of the original spiral inductor is adjusted by the first adjustment factor to obtain the inductance value of the adjusted spiral inductor. The inductance value of the adjusted spiral inductor is the product of the inductance value of the original spiral inductor and the first adjustment factor.

[0086] Specifically, the calculation method for adjusting the inductance value of the spiral inductor based on the output power of the power amplification device and the preset target power is as follows:

[0087]

[0088] In the formula , These represent the output power and the target power, respectively. The arrow indicates that the adjustment operation on the right side is performed on the left side. This means multiplying the original inductance value of the spiral inductor according to the calculation method on the right side of the arrow, and using the product as the new inductance value of the spiral inductor, thereby adjusting the inductance value of the spiral inductor.

[0089] In this step, by adjusting the inductance value of the spiral inductor, the output power can be made closer to the target value, thereby reducing energy loss and improving efficiency, enabling the system to adapt to different operating conditions (such as temperature, power fluctuations, etc.). Furthermore, since the isolation module is integrated between the two sets of GaN sub-units, no additional packaging space is required, which not only reduces packaging steps and improves production efficiency, but also reduces material consumption and saves production costs.

[0090] The distortion correction module is a CMOS chip with a pre-built DPD algorithm model. Located between the input signal and the distributed amplification module, it pre-distorts the input signal to correct the overall signal of the power amplifier. Essentially, it uses digital signal processing to pre-apply an inverse nonlinear transformation (pre-distortion) to the power amplifier's input signal to counteract the PA's inherent nonlinear distortion, thereby improving the linearity of the output signal. The pre-built DPD algorithm model in the distortion correction module uses a 5th-order memory polynomial model, expressed as:

[0091]

[0092] In the formula , Representing the model's first... The input signal and the first One output signal , These represent the maximum values ​​of memory depth and nonlinear order, respectively. , Indices representing memory depth and nonlinear order, respectively. The predistortion coefficients are represented by the least squares method. Iterative updates are performed, with an update cycle of less than 1 μs;

[0093] when hour, These are linear predistortion coefficients used to compensate for linear distortion, such as gain compression and phase drift.

[0094] when hour, These are nonlinear predistortion coefficients used to compensate for nonlinear distortion, such as intermodulation distortion.

[0095] Specifically, the signal flow can be represented as input signal → distortion correction module → distributed amplification module → filtering module → isolation module → output signal. The distortion correction module is used to apply digital predistortion processing to the input signal, and can also collect the output signal to form a feedback loop. The sampled signal is converted into a digital signal by an ADC and sent to the distortion correction module, thereby iteratively updating the predistortion coefficients in the DPD algorithm model. The memory depth can be set to 3, which can cover the 30ns group delay of the power amplifier (corresponding to the memory effect of a 5G NR 100MHz bandwidth signal), thus effectively compensating for inter-symbol interference.

[0096] In this step, by introducing a 5th-order memory polynomial, not only can signal distortion be compensated, but by distinguishing the pre-distortion coefficients, linear and nonlinear distortions can be compensated in a coordinated manner to achieve full-dimensional compensation of signal distortion. Compared with traditional 2nd-3rd order models, this method can accurately capture the complex nonlinear characteristics of the power amplifier and reduce the error vector amplitude in typical scenarios, thereby improving the accuracy of signal distortion compensation.

[0097] The molybdenum-copper frame is manufactured using 3D printing technology. Its honeycomb pore size is 200μm±10μm, the wall thickness is 50μm±5μm, and the porosity is 60%±3%. This material has both high thermal conductivity (220 W / m·K) and low coefficient of thermal expansion (6.5 ppm / °C), which can achieve thermal expansion matching. Moreover, the 3D printing method can realize complex topological structures, reduce its overall weight, and set it as a honeycomb pore type, which can enhance the heat dissipation surface area and improve heat exchange efficiency.

[0098] The oriented diamond micropillars are grown along the crystal orientation, with a diameter of 50 μm ± 5 μm, a height of 300 μm ± 20 μm, and a spacing of 200 μm ± 10 μm. The axial thermal conductivity of these crystal-oriented diamond micropillars reaches 2000 W / m·K (compared to only 50 W / m·K laterally), enabling directional heat conduction and forming vertical heat transfer channels, which is more beneficial for the overall heat dissipation of power amplifier devices.

[0099] In this step, by introducing a synergistic design of molybdenum copper honeycomb frame and directional diamond micropillars, not only can three-dimensional high-efficiency heat dissipation be achieved, but this miniaturized and lightweight design can also meet the design requirements of "thin and highly integrated". Moreover, the process is simpler, thereby reducing machining steps and reducing production costs.

[0100] As shown in the table below, this embodiment performs multiple tests in the 2.7GHz~3.5GHz frequency band. The test conditions are: ambient temperature 25℃, DC voltage between the drain and source of GaN unit 28V, drain current 60mA, test mode is pulse test, pulse width is 1ms, and duty cycle is 10%.

[0101] From the test data table and Figures 2-3 As can be seen, the power amplifier device constructed using the above method maintains high output power in the 2.7-3.5GHz range, exhibiting good bandwidth characteristics and power linearity. Gain fluctuations are minimal, demonstrating good gain flatness. Efficiency decreases slightly at high frequencies, which is typical of high-frequency power amplifiers. Overall, the second harmonic distortion is low, and surface second harmonic distortion is effectively suppressed. In other words, the power amplifier device in this embodiment not only significantly reduces the device size but also meets the power requirements and harmonic suppression requirements.

[0102] Table 1 Test Data

[0103]

[0104] In summary, this invention successfully solves problems related to gain enhancement, harmonic suppression, and thermal management by optimizing the cascaded design of multi-stage power amplifiers and combining internal matching technology with the innovative application of high-dielectric ceramics and molybdenum-copper carriers. This solution achieves miniaturization, significantly improves power density and gain, enhances harmonic suppression performance to -45dBc, and optimizes efficiency. Furthermore, the combination of molybdenum-copper carriers and conformal heat dissipation modules effectively reduces thermal resistance, extends device lifespan, and meets stringent high-temperature and high-frequency environmental requirements, improving system reliability and efficiency while significantly reducing device size and weight.

[0105] The above formulas are all dimensionless calculations. The formulas are derived from software simulations based on a large amount of collected data to obtain the most recent real-world results. The preset parameters in the formulas are set by those skilled in the art according to the actual situation.

[0106] The above embodiments can be implemented, in whole or in part, by software, hardware, firmware, or any other combination thereof. When implemented in software, the above embodiments can be implemented, in whole or in part, as a computer program product. Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented by electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution.

[0107] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment, depending on actual needs.

[0108] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application.

Claims

1. A high harmonic rejection miniaturized die on chip internally matched power amplifier device, characterized by, Specifically comprising: a distortion correction module, which is electrically connected with the signal input end, is used for receiving the signal to be amplified, performing pre-distortion and signal correction processing on the signal to be amplified to obtain a second signal, and sending the second signal to the distributed amplification module; the distributed amplification module, which is electrically connected with the distortion correction module, comprises two groups of cascaded input structures, and the input structure comprises an input matching circuit, a GaN subunit, a nonlinear transmission line unit and an output matching circuit connected in series; the input matching circuit and the output matching circuit are used for reducing reflection and loss of the second signal in the transmission process; the GaN subunit close to the distortion correction module is a driving stage, and the GaN subunit far from the distortion correction module is an amplification stage, wherein the driving stage is used for providing a driving signal for the amplification stage, and the amplification stage is used for amplifying the second signal to obtain a third signal; The two groups of GaN sub-units are arranged along a signal transmission direction, and by adjusting the length difference of the two groups of nonlinear transmission line units, the harmonic phase difference generated by the second signal and the third signal is an odd multiple of The length difference of the two groups of nonlinear transmission line units satisfies: wherein denotes the length difference of two sets of nonlinear transmission line units, denotes the center wavelength of the second signal, the third signal, denotes an odd multiple of the center wavelength, denotes a multiple factor, being a natural number including 0, denotes the harmonic order; wherein the center wavelength is determined by the center frequency and the effective dielectric constant of the substrate material, and the calculation method is: In the formula denotes the speed of light, denotes a preset center frequency, denotes the effective dielectric constant of the substrate material; the nonlinear transmission line unit is used for suppressing harmonics generated in the amplification process of the GaN subunit; an isolation module, which is connected in series between the two groups of cascaded input structures, is used for reducing signal interference between the two groups of input structures by adjusting impedance; a filter module, which is electrically connected with the distributed amplification module, is used for filtering the third signal to generate an output signal.

2. A miniaturized chip type in-match power amplifier device with high harmonic suppression according to claim 1, characterized in that: The filter module adopts a sixth-order elliptic harmonic filter, and the transmission function of the signal passing through the sixth-order elliptic harmonic filter is represented as: wherein represents a transfer function of a signal, represents a complex frequency variable, represents an imaginary unit, represents an angular frequency of a signal, represents a signal frequency, represents a preset cutoff angular frequency, represents a preset cutoff frequency, represents a zero polynomial, represents a 6th order elliptic function, represents a passband ripple coefficient.

3. A miniaturized dielectrically loaded power amplifier device with high harmonic suppression and on-chip matching according to claim 2, characterized in that: The isolation module comprises a spiral inductor and a thin film resistor, and the impedance calculation method is: In the formula represents the total impedance of the isolation module, , respectively represent the resistance value of the thin-film resistor and the inductance value of the spiral inductor; By adjusting the inductance value of the spiral inductor, the total impedance of the isolation module is changed, and the difference between the output power of the power amplifier device and the preset target power is reduced.

4. A miniaturized dielectrically loaded power amplifier device with high harmonic suppression and on-chip matching according to claim 3, characterized in that: The step of adjusting the inductance value of the spiral inductor to change the total impedance of the isolation module comprises: determining the output power of the power amplifier device and the preset target power, and taking the square root of the ratio of the target power and the output power as a first adjustment coefficient; adjusting the inductance value of the original spiral inductor by the first adjustment coefficient to obtain the inductance value of the adjusted spiral inductor, which is the product of the inductance value of the original spiral inductor and the first adjustment coefficient.

5. A miniaturized dielectrically loaded power amplifier device with high harmonic suppression and on-chip matching according to claim 1, characterized in that: The preset DPD algorithm model in the distortion correction module adopts a 5th-order memory polynomial model, and its expression is: In the formula , respectively represent the first input signal and the first output signal of the model, , respectively represent the maximum values of the memory depth and the nonlinear order, , respectively represent the indexes of the memory depth and the nonlinear order, represent the predistortion coefficients, the predistortion coefficients are iteratively updated by the least square method, and the update period is less than 1 μs; When time, are linear predistortion coefficients for compensating linear distortions; When Time, is a nonlinear predistortion coefficient for compensating nonlinear distortion.

6. A miniaturized dielectrically loaded power amplifier device with high harmonic suppression and on-chip matching according to claim 1, characterized in that: The power amplifier device further comprises a conformal heat dissipation module, wherein the frame unit adopts a molybdenum copper frame, and the heat conduction unit adopts a directional diamond microcolumn.

7. A miniaturized chip type intra-matching power amplifier device with high harmonic suppression according to claim 6, characterized in that: The molybdenum copper frame is manufactured by a 3D printing process, and the honeycomb aperture is 200 μm±10 μm, the wall thickness is 50 μm±5 μm, and the porosity is 60%±3%; The growth direction of the directional diamond microcolumn is the crystal direction, the diameter is 50 μm±5 μm, the height is 300 μm±20 μm, and the spacing is 200 μm±10 μm.

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