Vector multiply-accumulate processing method, apparatus, storage medium, and program product

By selecting and copying the updated coefficients and multiplying and adding them with the data matrix, the problem of numerous operation instructions in the vector multiplication and accumulation process is solved, thus improving computational efficiency.

CN121523642BActive Publication Date: 2026-07-03SUNMMIO SCIENCE & TECHNOLOGY (BEIJING) CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
SUNMMIO SCIENCE & TECHNOLOGY (BEIJING) CO LTD
Filing Date
2025-10-31
Publication Date
2026-07-03

AI Technical Summary

Technical Problem

The existing vector multiplication and accumulation process requires multiple computer operation instructions in the attention mechanism calculation, resulting in a low operation speed and affecting computational efficiency.

Method used

In response to receiving the first multiply-accumulate instruction, (z) elements are selected from the updated coefficient vector as the current updated coefficients, and copied to (z) registers. These are then multiplied and added to the second data matrix to obtain the vector multiply-accumulate result, thus reducing the number of operation instructions.

Benefits of technology

This improves the computational efficiency of vector multiplication and accumulation, thereby enhancing the overall computational efficiency of the attention mechanism.

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    Figure CN121523642B_ABST
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Abstract

A vector multiply-accumulate processing method and device, a storage medium and a program product, the method comprising: in response to receiving a first multiply-accumulate instruction, the first multiply-accumulate instruction comprising a first register, a second register, a target register and a first coefficient z, selecting (z) elements from an update coefficient vector as current update coefficients according to the first coefficient z, and copying each current update coefficient to (z) respectively, wherein (z) and (z) are both preset functions of the first coefficient z, and the values of (z) and (z) are both greater than or equal to 1, the first register is used to store the update coefficient vector, the second register is used to store a first data matrix, the target register is used to store a second data matrix, and the first data matrix and the second data matrix have the same number of columns; multiplying (z)*(z) current update coefficients with elements in (z) rows and (z) columns in the second register respectively, and adding the multiplication results with elements in corresponding positions of the target register to obtain a vector multiply-accumulate result.
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Citation Information

Patent Citations

  • Computing device and method, chip, electronic equipment and computer readable storage medium

    CN112579042A

  • Apparatus and method for SIMD modular multiplication

    US20030212727A1