Display apparatus and control method thereof

Abstract

According to the display device and the control method thereof, after a light-emitting driving circuit obtains light-emitting current data, the data are transmitted to a control circuit, and when the gray value of the light-emitting current data is not within a preset gray range, the control circuit sends the light-emitting current data to the display device. The display requirement of the pixel can be met by determining that the light-emitting driving circuit does not need to compress the driving time of the driving signal, and the control signal is not output, so that the light-emitting duration control circuit outputs the first power supply signal, the pixel does not emit light for multiple times in the display period, the eye-protecting and energy-saving effects are achieved, and the image can be accurately displayed; the control circuit outputs a control signal when the gray value of the light-emitting current data is within a preset gray range, so that the light-emitting duration control circuit outputs a conduction control signal based on the light-emitting duration data, compresses the driving duration of the driving signal, increases the driving current of the driving signal, and guarantees the display effect of pixels.

Description

Technical Field

[0001] The embodiments of this application relate to the field of display technology, and more particularly to a display device and its control method. Background Technology

[0002] In recent years, due to the advantages of micro-LEDs over AMOLEDs (Active-matrix organic light emitting diodes), such as smaller device size, faster response speed, higher luminous efficiency, stronger stability and longer lifespan, the application of micro-LEDs in displays has developed rapidly and has become a research hotspot in display devices.

[0003] The pixel driving circuit of a micro LED can drive the micro LED to emit light through a pulse width modulation (PWM) driving circuit and / or a pulse amplitude modulation (PAM) driving circuit. The PWM driving circuit controls the light emission duration of the micro LED, and the PAM driving circuit controls the light emission current of the micro LED. The brightness of the micro LED is determined according to the light emission duration and / or light emission current.

[0004] During the process of driving micro-LEDs to emit light, the PAM driving circuit will be repeatedly turned on multiple times in each display cycle, which can damage the human eye. How to reduce the damage to the human eye of the display device while ensuring the normal driving of micro-LEDs has become the focus of research. Summary of the Invention

[0005] This application provides a display device and its control method to solve the above-mentioned technical problems.

[0006] In a first aspect, embodiments of this application provide a display device, including: a gate driving circuit, a data driving circuit, a power supply circuit, at least one pixel, and a corresponding pixel driving circuit;

[0007] The pixel driving circuit includes:

[0008] The light-emitting driving circuit and the data driving circuit are electrically connected and configured to obtain light-emitting current data and output light-emitting current data from their first output terminal.

[0009] The control circuit, which is electrically connected to the first output terminal of the light-emitting driving circuit, is configured to obtain light-emitting current data and output a control signal when the grayscale value corresponding to the light-emitting current data is within a preset grayscale range.

[0010] No control signal is output when the grayscale value corresponding to the luminous current data is not within the preset grayscale range;

[0011] The light emission duration control circuit is electrically connected to the control circuit, the data drive circuit, and the power supply circuit, and is configured to obtain light emission duration data and a first power supply signal.

[0012] When a control signal is received, a conduction control signal is output; when no control signal is received, a first power supply signal is output.

[0013] The light-emitting driving circuit is also electrically connected to the light-emitting duration control circuit, the gate driving circuit, and the pixel, and is configured to obtain the duration control signal and the first light-emitting control signal, output the driving signal, and drive the pixel to emit light; the light-emitting current data is the data for adjusting the current value of the driving signal.

[0014] The duration control signal is a signal that adjusts the driving duration of the drive signal, including a turn-on control signal or a first power supply signal. The driving duration corresponding to the turn-on control signal is less than the driving duration corresponding to the first power supply signal.

[0015] Secondly, embodiments of this application provide a control method for a display device, the method being applied to any display device according to the first aspect, the method comprising:

[0016] During the data writing phase, the luminous current data is transmitted through the light-emitting driving circuit;

[0017] The control circuit outputs a control signal when the grayscale value corresponding to the luminous current data is within a preset grayscale range.

[0018] The control circuit does not output a control signal when the grayscale value corresponding to the luminous current data is not within the preset grayscale range.

[0019] During the display phase, when the control circuit for controlling the light emission duration receives a control signal, it outputs a conduction control signal based on the light emission duration data.

[0020] When the control circuit for controlling the duration of light emission does not receive a control signal, it outputs the first power supply signal it receives.

[0021] The control circuit for the light-emitting drive determines the current value of the drive signal based on the light-emitting current data;

[0022] Based on the duration control signal and the first light emission control signal, a driving signal is output, and the driving duration of the driving signal is adjusted according to the duration control signal to drive the pixel to emit light;

[0023] The display cycle of a pixel includes a data writing phase and a display phase.

[0024] In the display device and control method provided in this application embodiment, after the light-emitting driving circuit obtains the light-emitting current data, it transmits the data to the control circuit. When the grayscale value of the light-emitting current data is not within the preset grayscale range, the control circuit determines that the light-emitting driving circuit does not need to compress the driving time of the driving signal to meet the display requirements of the pixel, and does not output a control signal, so that the light-emitting duration control circuit outputs a first power signal, so that the pixel will not emit light multiple times within the display cycle, achieving both eye protection and energy saving effects while accurately displaying the image. When the grayscale value of the light-emitting current data is within the preset grayscale range, the control circuit outputs a control signal, so that the light-emitting duration control circuit outputs a conduction control signal based on the light-emitting duration data, compressing the driving time of the driving signal, increasing the driving current of the driving signal, and ensuring the display effect of the pixel. Attached Figure Description

[0025] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0026] Figure 1 This is a schematic diagram of the structure of a display provided according to an exemplary embodiment of this application;

[0027] Figure 2 This is a schematic diagram of the structure of a display provided in this application according to another exemplary embodiment;

[0028] Figure 3A This is a circuit structure diagram of a conventional pixel driving circuit provided in accordance with an exemplary embodiment of this application;

[0029] Figure 3B This is a circuit structure diagram of a conventional pixel driving circuit provided in this application according to another exemplary embodiment;

[0030] Figure 4 This is a schematic diagram of the structure of a pixel driving circuit provided in an exemplary embodiment of this application;

[0031] Figure 5 This is a schematic diagram of the structure of a pixel driving circuit provided in another exemplary embodiment of this application;

[0032] Figure 6 This is a timing diagram of the driving signals of a pixel driving circuit provided in an exemplary embodiment of this application;

[0033] Figure 7A This is a diagram showing the operating state of a pixel driving circuit provided in this application according to an exemplary embodiment;

[0034] Figure 7B This is an operational state diagram of a pixel driving circuit provided in this application according to another exemplary embodiment;

[0035] Figure 7C This is an operational state diagram of a pixel driving circuit provided in this application according to another exemplary embodiment;

[0036] Figure 7D This is an operational state diagram of a pixel driving circuit provided in this application according to another exemplary embodiment;

[0037] Figure 7E This is an operational state diagram of a pixel driving circuit provided in this application according to another exemplary embodiment;

[0038] Figure 7F This is a diagram showing the operating state of a pixel driving circuit provided in this application according to another exemplary embodiment.

[0039] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0040] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0041] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, components, features, and elements with the same names in different embodiments of this application may have the same meaning or different meanings, the specific meaning of which must be determined by its interpretation in that specific embodiment or further in conjunction with the context of that specific embodiment. It should be further understood that the terms "comprising" or "including" indicate the presence of features, steps, operations, elements, components, items, kinds, and / or groups, but do not exclude the presence, occurrence, or addition of one or more other features, steps, operations, elements, components, items, kinds, and / or groups.

[0042] In the description of this disclosure, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this disclosure, "multiple" means two or more, unless otherwise expressly specified. The terms "or" and "and / or" are interpreted as inclusive, or mean any one or any combination thereof. Therefore, "A, B, or C" or "A, B, and / or C" means "any one of the following: A; B; C; A and B; A and C; B and C; A, B, and C." Exceptions to this definition occur only when combinations of elements, functions, steps, or operations are inherently mutually exclusive in some manner.

[0043] It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.

[0044] In recent years, due to the advantages of micro-LEDs over AMOLEDs (Active-matrix organic light emitting diodes), such as smaller device size, faster response speed, higher luminous efficiency, stronger stability and longer lifespan, the application of micro-LEDs in displays has developed rapidly and has become a research hotspot in display devices.

[0045] A schematic diagram of the display device is shown below. Figure 1 and Figure 2 As shown, the system includes a control circuit 250, a data drive circuit 20, a gate drive circuit 30, a display panel 40, and a power supply circuit 280. The control circuit 250 and the data drive circuit 20 are electrically connected, as are the gate drive circuit 30 and the display panel 40.

[0046] The display panel has a power line 90, multiple gate lines 60, multiple data lines 50 and multiple pixel units 80. The multiple pixel units 80 are arranged in an array, and each pixel unit 80 is located in the area where the gate line 60 and the data line 50 intersect.

[0047] The gate driving circuit 30 is electrically connected to the gate line 60. The gate driving circuit 30 is configured to obtain clock signals and trigger signals from the control circuit 250, generate gate driving signals according to the clock signals and trigger signals, and transmit the gate driving signals to the corresponding pixel unit 80 through the gate line 60 to control the transistors in the pixel unit 80 to be turned on or off.

[0048] More specifically, the gate driving circuit 30 can be fabricated as a separate gate driver integrated circuit (GDIC). Alternatively, the gate driving circuit 30 can be integrated into the display panel; this integration is called gate-in-panel (GIP). In some cases, the GDIC can be electrically connected to the display panel 40 via a COG (Chip on Glass) process, or via a COF (Chipon Film) process. In the COF process, the component is electrically connected to the display panel 40 via a flexible printed circuit (FPC).

[0049] The data driving circuit 20 is a circuit that drives the data line 50. It is configured to acquire display data from the control circuit 250, convert it into an analog data voltage (Vdata), and transmit the analog data voltage to the corresponding pixel unit 80 through the data line 50, so that the pixel 802 in the pixel unit 80 emits light according to the analog data voltage. The magnitude of the analog data voltage determines the transient brightness of the pixel 802.

[0050] The data driving circuit 20 may include one or more source driver integrated circuits (SDICs). Each source driver integrated circuit (SDIC) may include a shift register, latch circuit, digital-to-analog converter, and output buffer, etc.

[0051] The power supply circuit 280 is a circuit that provides stable electrical signals and is configured to provide the corresponding power signals to the display panel 40, control circuit 250, data drive circuit 20 and gate drive circuit 30.

[0052] In one configuration, each pixel unit 80 includes three pixel circuits 810, used to display red, blue, and green light respectively. In another configuration, each pixel unit 80 includes four pixel circuits 810, used to display red, blue, green, and white light respectively. No specific limitation is made here.

[0053] The color of light emitted by each pixel unit 810 is determined by the properties of its pixel 802. Pixel 802 can be any light-emitting device, including but not limited to OLED and micro LED.

[0054] A micro LED is a miniature light-emitting device manufactured using inorganic semiconductor layers. A micro LED typically includes a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer. The structure of such micro LEDs can be diverse, including vertical, horizontal, and flip-chip types, and is not particularly limited to a specific structure.

[0055] More specifically, a pixel circuit 810 includes a pixel driving circuit 801 and a pixel 802. The pixel driving circuit 801 is electrically connected to the pixel 802 and is configured to drive the pixel 802 to emit light. The signals required by the pixel driving circuit 801 include a driving signal, a scan signal, and an emission control signal (EM control signal).

[0056] The drive signal can be generated by the control circuit 250 or obtained from an external source. It includes, but is not limited to, start pulse signal, clock signal, and enable signal.

[0057] The EM control signal is configured to control the driving duration of the pixel driving circuit. The luminescence control signal can be a global signal provided by the control circuit 250 or a signal generated by the gate driving circuit 30; no specific limitation is made here.

[0058] The scan signal is configured to initialize the pixel drive circuit and store analog voltage data.

[0059] If the EM control signal is a global signal generated by the control circuit 250, the gate drive circuit 30 obtains the EM control signal from the control circuit 250 and transmits the EM control signal to the corresponding pixel drive circuit 814 through the gate line 60.

[0060] If both the EM control signal and the scan signal are generated by the gate drive circuit 30, the gate drive circuit 30 includes a scan signal generation circuit 301 and an EM control signal generation circuit 302. The scan signal is output by the scan signal generation circuit 301, and the EM control signal is output by the EM control signal generation circuit 302.

[0061] Both the scan signal and the EM control signal are shift signals. The scan signal is used as an example to explain the shift signal. The scan signal includes multiple scan signals with different phases. The scan signal generation circuit 301 includes multiple serially connected scan signal generation sub-circuits, each outputting a scan signal of one phase. Each scan signal generation sub-circuit is configured to obtain a clock signal from the control circuit 250, obtain a scan signal from the output of its preceding scan signal generation sub-circuit, or obtain a trigger signal from the control circuit 10, generate a scan signal corresponding to the scan signal generation sub-circuit, and transmit the scan signal through the corresponding gate line 60 to the corresponding pixel driving circuit 814 to control the pixel driving circuit 814 to acquire display data at regular intervals.

[0062] The phase of the output signal of each scan signal generation sub-circuit lags behind the phase of the input signal. The pixel driving circuit 814 in each pixel unit 80 can be electrically connected to the scan signal generation circuit 301 through at least one gate line 60 to obtain a scan signal of at least one phase.

[0063] Typically, the pixel driving circuit 801 includes a driving transistor, multiple control transistors, and a storage capacitor. For simplicity, the driving transistor is simply referred to as the driving transistor, and the control transistor is simply referred to as the control transistor. The storage capacitor is configured to store the display data analog voltage Vdata. The control transistor writes the data analog voltage to the storage capacitor. The data analog voltage is configured to be applied to the control terminal of the driving transistor, controlling the driving transistor to conduct, and the driving transistor outputs a driving current.

[0064] The display data includes grayscale values. The higher the grayscale value, the brighter the pixel 802. The lower the grayscale value, the lower the brightness of the pixel 802. The data driving circuit is configured to convert the grayscale values ​​into a data analog voltage output. When the driving transistor is a P-type transistor, the higher the grayscale value, the lower the data analog voltage, the higher the driving current output by the driving transistor, and the higher the brightness of the pixel 802. When the driving transistor is an N-type transistor, the higher the grayscale value, the higher the data analog voltage, the higher the driving current output by the driving transistor, and the higher the brightness of the pixel 802.

[0065] In some implementations, traditional pixel driving circuits use at least one of PAM driving and PWM driving methods to drive the pixels to emit light.

[0066] When a traditional pixel driving circuit uses PAM or PWM driving methods to drive the pixel to emit light, one possible circuit structure is as follows: Figure 3A As shown.

[0067] exist Figure 3AIn the circuit structure shown, the driving circuit is electrically connected to the pixel and is configured to acquire the luminous current data PAMD or the luminous duration data PWMD, and generate a driving signal based on the luminous current data PAMD or the luminous duration data PWMD to drive the pixel to emit light.

[0068] Among them, the light emission current data PAMD is the data that controls the magnitude of the current passing through the pixel, and the light emission duration data PWMD is the data that controls the duration of the current passing through the pixel.

[0069] exist Figure 3A In the conventional pixel driving circuit shown, the driving circuit includes a third capacitor C3, a ninth transistor T9, a tenth transistor T10, and the pixel includes a micro LED.

[0070] Among them, the tenth transistor T10 is a driver transistor, which is electrically connected to the micro LED and is configured to determine the current value of the drive current that can be transmitted based on the gate-source voltage difference, thereby adjusting the transient brightness of the pixel.

[0071] The ninth transistor T9 and the tenth transistor T10 are electrically connected and are configured to regulate the data transmission of each pixel driving circuit. When they are turned on, they output the obtained light emission current data PAMD or light emission duration data PWMD.

[0072] The third capacitor C3 is electrically connected to the ninth transistor T9 and the tenth transistor T10, and is configured to store the light emission current data PAMD or the light emission duration data PWMD transmitted by the ninth transistor T9.

[0073] In the circuit structure described above, when the data transmitted by the ninth transistor T9 is the light-emitting current data PAMD, the light-emitting current data PAMD corresponding to different grayscale values ​​are different. The tenth transistor T10 determines different current values ​​based on the different light-emitting current data PAMD, and continuously outputs a drive signal based on the current value during the display phase of the display cycle to regulate the light-emitting brightness of the micro LED.

[0074] When the data transmitted by the ninth transistor T9 is the light emission duration data PWMD, the light emission duration data PWMD includes the duty cycle and the current amplitude. Among them, the current amplitude is the same for different gray levels, but the duty cycle is different. The tenth transistor T10 conducts for different durations based on the light emission duration data PWMD with different duty cycles, and the driving time of the generated driving signal is different. The light emission duration of the micro LED is different, so as to control the brightness of the micro LED in each frame display time.

[0075] When the pixel driving circuit drives the micro LED to emit light based on the light emission current data PAMD, the tenth transistor T10 generates a small driving current value for the light emission current data PAMD corresponding to low grayscale, making it difficult to expand the grayscale and resulting in poor driving effect at low grayscale. When the pixel driving circuit drives the micro LED to emit light based on the light emission duration data PWMD, the tenth transistor T10 will be turned on multiple times in each frame display cycle to adjust the duty cycle, resulting in a high power load on the circuit that generates the light emission duration data PWMD.

[0076] When a traditional pixel driving circuit uses a combination of PAM and PWM driving methods to drive the pixel to emit light, one possible circuit structure is as follows: Figure 3B As shown.

[0077] and Figure 3A Compared to the circuit structure shown, Figure 3B The pixel driving circuit shown also includes an eighth transistor T8, which is connected in series between the tenth transistor T10 and the power line 90.

[0078] refer to Figure 3B The pixel driving circuit shown transmits the light emission current data PAMD to the tenth transistor T10 to regulate the current value of the driving signal generated by the tenth transistor T10. The eighth transistor T8 obtains the light emission duration data PWMD or a control signal generated based on the light emission duration data PWMD to regulate the duration of the driving signal generated by the tenth transistor T10. This ensures that the tenth transistor T10 can properly expand low grayscale data and further improves the driving accuracy of the driving data, thus improving the display effect. However, there is still the problem of damage to the human eye during the micro-LED display process. How to reduce the damage to the human eye of the display device while ensuring the normal driving of micro-LEDs has become the focus of research.

[0079] To address the aforementioned problems, this application provides a display device to solve the technical issues described above. The technical concept of this application is to provide a pixel driving circuit that, when processing low grayscale data, employs a combined PAM and PWM driving method to ensure display accuracy; and when processing high grayscale data, it can employ a PAM driving method to reduce the number of flickering events during pixel emission, thereby reducing damage to the human eye.

[0080] The pixel driving circuit proposed in this application will be explained in detail below. Figure 4 This is a schematic diagram of the structure of a pixel driving circuit provided in an exemplary embodiment of this application.

[0081] In some embodiments, the pixel driving circuit provided in this application includes a light-emitting driving circuit 805 and a data line 50 electrically connected, configured to obtain light-emitting current data PAMD and output light-emitting current data PAMD from its first output terminal (point C); wherein, the light-emitting current data PAMD is data for adjusting the current value of the driving signal;

[0082] In some embodiments, the pixel driving circuit provided in this application includes a control circuit 809 and a first output terminal of a light-emitting driving circuit 805, which are electrically connected and configured to obtain light-emitting current data PAMD. When the grayscale value corresponding to the light-emitting current data PAMD is within a preset grayscale range, a control signal is output.

[0083] When the grayscale value corresponding to the luminous current data PAMD is not within the preset grayscale range, no control signal is output;

[0084] The output terminal of the control circuit 809 is Figure 4 At point F, as shown, the control circuit 809 is configured to adjust the voltage value at point F based on the luminous current data PAMD.

[0085] In some embodiments, the pixel driving circuit provided in this application includes a light emission duration control circuit 806, which is electrically connected to a control circuit 809, a data line 50, and a power line 90, and is configured to output a corresponding duration control signal based on the control signal it receives.

[0086] In some embodiments, the duration control signal is a signal that adjusts the driving duration of the driving signal, including a turn-on control signal or a first power signal VGH, wherein the driving duration corresponding to the turn-on control signal is less than the driving duration corresponding to the first power signal VGH.

[0087] In some embodiments, the light emission duration control circuit 806 is configured to obtain light emission duration data and a first power supply signal VGH, output a conduction control signal when a control signal is obtained, and output the first power supply signal VGH when no control signal is obtained.

[0088] In some embodiments, the light-emitting driving circuit 805 is also electrically connected to the light-emitting duration control circuit 806, the gate line 60, and the pixel, and is configured to obtain a duration control signal and a first light-emitting control signal EM1, output a driving signal, and drive the pixel to emit light; in this application, the pixel includes a light-emitting diode (LED).

[0089] The driving current value of the driving signal is determined based on the light emission current data PAMD, and the driving duration is determined based on the duration control signal.

[0090] In the above technical solution, in the pixel driving circuit, a control circuit is set so that after the pixel driving circuit obtains the light-emitting current data, it determines whether the data needs to be compressed through driving time to ensure the display effect based on the grayscale value corresponding to the data. When it is determined that the driving time does not need to be compressed, the light-emitting duration control circuit outputs a first power signal so that the pixel can continuously output a stable current and will not emit light multiple times within the display cycle, thereby achieving eye protection and energy saving effects. When it is determined that the driving time needs to be compressed, the light-emitting duration control circuit 806 outputs a conduction control signal to shorten the driving time of the driving signal to meet the light-emitting requirements of the pixel.

[0091] In some embodiments, the control circuit 809 includes a gating unit. The gating unit is a unit that compares the grayscale value of the luminous current data PAMD with a preset grayscale range.

[0092] exist Figure 4 In the circuit structure shown, the gating unit includes the ninth transistor T9;

[0093] The gating unit and the light-emitting driving circuit 805 are electrically connected to the power supply line 90 and are configured to obtain the threshold voltage signal SET and the light-emitting current data PAMD; the threshold voltage signal SET corresponds to the boundary value of the preset grayscale range;

[0094] In some embodiments, when the preset grayscale range is divided according to high and low grayscale, the preset voltage signal corresponds to the threshold grayscale for dividing the high and low grayscale.

[0095] In some embodiments, the gating unit is configured to output a threshold voltage signal SET when the grayscale value corresponding to the luminous current data PAMD is within a preset grayscale range;

[0096] When the grayscale value corresponding to the luminous current data PAMD is within the preset grayscale range, the threshold voltage signal SET is not output.

[0097] When the selected unit divides the preset grayscale range into high and low grayscale according to the preset grayscale range, when the grayscale value corresponding to the luminous current data PAMD is less than the threshold grayscale, the threshold voltage signal SET is output.

[0098] When the grayscale value corresponding to the luminous current data PAMD is greater than or equal to the threshold grayscale, the threshold voltage signal SET is not output.

[0099] In some embodiments, the control circuit 809 includes a first writing unit. The first writing unit is a unit for generating control signals.

[0100] exist Figure 4 In the circuit structure shown, the first write unit includes the tenth transistor T10;

[0101] The first write unit and the gating unit are electrically connected to the power line 90 and are configured to obtain a second power signal.

[0102] When it obtains the threshold voltage signal SET, it outputs a second power supply signal as a control signal;

[0103] It does not output a control signal when it does not receive the threshold voltage signal SET.

[0104] In some embodiments, the control unit further includes a first reset unit; the first reset unit is a unit for initializing the first write unit to prevent the first write unit from mistakenly generating a control signal when no control signal needs to be generated.

[0105] refer to Figure 5 The circuit structure shown includes a first reset unit comprising a twelfth transistor T12.

[0106] The first reset unit is electrically connected to the gate line 60 and the power line 90, and is configured to obtain the third power signal VSS and the initialization signal RST. Its conduction state is controlled by the initialization signal RST, and the third power signal VSS is output when it is on.

[0107] The first write unit and the first reset unit are electrically connected and are configured such that when the third power signal VSS is obtained, the third power signal VSS controls them not to output a control signal.

[0108] In some embodiments, the light emission duration control circuit 806 includes a second writing unit; the second writing unit is a unit that generates a control signal that regulates the driving signal without compressing the duration.

[0109] refer to Figure 4 The circuit structure shown includes a second write unit comprising a sixth transistor T6.

[0110] The second writing unit is electrically connected to the power line 90 and the gate line 60, and is configured to obtain a second light emission control signal and a first power supply signal VGH, output the first power supply signal VGH when the second light emission control signal is at the first level, and turn off when the second light emission control signal is at the second level.

[0111] In some embodiments, the light emission duration control circuit 806 includes a storage unit, a reference unit. Figure 4 The circuit structure shown includes a storage unit with capacitor C2.

[0112] The output terminals of the storage unit and the second writing unit are electrically connected to the light-emitting driving circuit 805 and are configured to store the first power signal VGH and output the first power signal VGH to the light-emitting driving circuit 805.

[0113] In some embodiments, the light emission duration control circuit 806 includes a third writing unit, which is a unit that generates a control signal for the driving duration of the compressed driving signal.

[0114] refer to Figure 4 The circuit structure shown includes an eighth transistor T8 in the third write unit.

[0115] The output terminal of the third writing unit and the control unit are electrically connected to the data line 50 and are configured to obtain the light emission duration data PWMD.

[0116] When a control signal is received, the light emission duration data PWMD is output as the duration control signal.

[0117] Shut down when no control signal is received;

[0118] In some embodiments, the storage unit is also electrically connected to the output of the third writing unit and is configured to store the light emission duration data PWMD and output the light emission duration data PWMD to the light emission driving circuit 805.

[0119] In some embodiments, the light emission duration control circuit 806 further includes a second reset unit, which is a unit for initializing the output terminal of the storage unit;

[0120] In some embodiments, the second reset unit is also a unit that shuts off the path of the pixel receiving drive signal.

[0121] The output terminals, gate line 60, and power supply line 90 of the second reset unit and memory unit are electrically connected;

[0122] The second reset unit is configured to obtain an initialization signal RST and a third power supply signal VSS, and its conduction state is controlled by the initialization signal RST. When it is on, it outputs the third power supply signal VSS.

[0123] In some embodiments, the light-emitting driving circuit 805 includes a driving unit, which includes a driving transistor T5. The driving unit and the data driving unit are electrically connected and configured to obtain light-emitting current data PAMD and adjust the current value of the driving signal.

[0124] In some embodiments, the light-emitting driving circuit 805 includes a light-emitting control unit electrically connected between the driving unit and the pixel, and its control terminal is electrically connected to the output terminal of the storage unit. It is configured to obtain a duration control signal and adjust the duration of the driving signal it outputs.

[0125] The driving unit can be any circuit with a defined driving current value. For example, circuit structures such as 2T1C and 7T1C are not specifically limited here.

[0126] The following is based on Figure 4Using the schematic diagram of the pixel driving circuit shown as an example, the pixel driving circuit proposed in this application will be explained in detail. Except for the ninth transistor T9 in the gating unit, which is a P-type transistor, all other transistors in this pixel driving circuit are N-type transistors.

[0127] In some embodiments, the driving unit includes a first transistor T1.

[0128] The first terminal of the first transistor T1 is electrically connected to the power supply line 90, and its control terminal is electrically connected to the gate line 60. It is configured to obtain a fourth power supply signal VDD from its first terminal and a first light emission control signal EM1 from its control terminal, and its conduction state is controlled by the first light emission control signal EM1.

[0129] The first transistor T1 is turned on when the first light-emitting control signal EM1 is high, and outputs the fourth power supply signal VDD; it is turned off when the first light-emitting control signal EM1 is low, and stops outputting the fourth power supply signal VDD.

[0130] In some embodiments, the driving unit includes a compensation transistor T4 and a capacitor C1.

[0131] The first end of the compensation transistor T4 is electrically connected to the second end of the first transistor T1, and its second end is electrically connected to the first end of the capacitor C1. Its control end is electrically connected to the gate line 60. It is configured to obtain a first scan signal Gn-1 from its control end and a fourth power supply signal VDD from its first end, and its conduction state is controlled by the first scan signal Gn-1.

[0132] When the first scan signal Gn-1 is high, the compensation transistor T4 is turned on and outputs the fourth power supply signal VDD to the first terminal of capacitor C1 to reset the first terminal of capacitor C1 in preparation for the discharge operation when determining the compensation electrical signal. When the first scan signal Gn-1 is low, the compensation transistor T4 is turned off and stops outputting the fourth power supply signal VDD.

[0133] In some embodiments, the driving unit includes a driving transistor T5.

[0134] The first end of the driving transistor T5 is electrically connected to the first end of the compensation transistor T4, and its control end is electrically connected to the second end of the compensation transistor T4. It is configured to conduct based on the fourth power signal VDD after the capacitor C1 writes the fourth power signal VDD.

[0135] The driving transistor T5 is also configured to form a threshold compensation structure with the compensation transistor T4 when it is turned on and the compensation transistor T4 is turned on; the threshold compensation structure is a diode structure.

[0136] In some embodiments, the light-emitting control unit includes a seventh transistor T7;

[0137] The first terminal of the seventh transistor T7 is electrically connected to the second terminal of the driving transistor T5, and its second terminal is electrically connected to the pixel. The control terminal is electrically connected to the output terminal of the light emission duration control circuit 806. It is configured to obtain a third power supply signal VSS, a first power supply signal VGH, or a duration control signal from the light emission duration control circuit 806, and control its conduction state by the obtained electrical signals.

[0138] The seventh transistor T7 is turned off when it receives the third power supply signal VSS.

[0139] The seventh transistor T7 is turned on when it receives the first power supply signal VGH;

[0140] When the seventh transistor T7 receives a duration control signal, it is turned on based on the duty cycle of that duration control signal.

[0141] In some embodiments, after the driving transistor T5 and the compensation transistor T4 construct a threshold compensation structure, a discharge path is constructed between the capacitor C1 and the pixel by the seventh transistor T7, which is turned on based on the first power signal VGH, to discharge the fourth power signal VDD until the threshold compensation structure is turned off.

[0142] When the threshold compensation structure is turned off, the voltage value at point E is the sum of the voltage value of the third power supply signal VSS and the on-state voltage of the pixel.

[0143] Without considering the turn-on voltage of the seventh transistor T7, the voltage value at point B is the same as the voltage value at point E;

[0144] When considering the turn-on voltage of the seventh transistor T7, the voltage at point B is the sum of the voltage at point E and the turn-on voltage of the seventh transistor T7.

[0145] The voltage at point G is the sum of the voltage at point B and the threshold voltage of the driving transistor T5.

[0146] In some embodiments, the driving unit includes a third transistor T3.

[0147] The first terminal of the third transistor T3 is electrically connected to the power supply line 90, and its control terminal is electrically connected to the gate line 60. It is configured to obtain a reference electrical signal Vref from its first terminal and a first scan signal Gn-1 from its control terminal, and its conduction state is controlled by the first scan signal Gn-1.

[0148] The third transistor T3 is turned on when the first scan signal Gn-1 is high, and outputs the reference electrical signal Vref from its second terminal; it is turned off when the first scan signal Gn-1 is low, and stops the output of the reference electrical signal Vref.

[0149] In some embodiments, the driving unit includes a write transistor T2.

[0150] The first terminal of the write transistor T2 is electrically connected to the data line 50, and its control terminal is electrically connected to the gate line 60. It is configured to obtain the light emission current data PAMD from its first terminal and the second scan signal Gn from its control terminal, and its conduction state is controlled by the second scan signal Gn.

[0151] The write transistor T2 is turned on when the second scan signal Gn is high, and outputs the light emission current data PAMD from its second terminal; it is turned off when the second scan signal Gn is low, and stops the output of the light emission current data PAMD.

[0152] In some embodiments, the second terminal of capacitor C1 is electrically connected to the second terminal of third transistor T3 and the second terminal of write transistor T2, and is configured to adjust the voltage value of its second terminal based on the electrical signal obtained from its second terminal.

[0153] In some embodiments, during the process of capacitor C1 obtaining the threshold voltage of driving transistor T5 at its first end, the electrical signal obtained at its second end is the reference electrical signal Vref provided by third transistor T3, which ensures the accuracy of the first compensation data.

[0154] In other embodiments, when capacitor C1 obtains the luminous current data PAMD at its second terminal, the voltage difference generated at its second terminal is the difference between the luminous current data PAMD and the voltage value corresponding to the reference electrical signal Vref. Based on its coupling effect, the voltage difference generated at its first terminal is the same as the voltage difference generated at its second terminal. Therefore, the voltage value at its first terminal is adjusted to the sum of the voltage value corresponding to the first compensation data and the voltage difference, and this voltage is determined as the voltage of the luminous current driving electrical signal.

[0155] In some embodiments, the gating unit includes a ninth transistor T9.

[0156] The first terminal of the ninth transistor T9 is electrically connected to the power supply line 90, and the control terminal and the second terminal of the write transistor are electrically connected. It is configured to obtain the threshold voltage signal SET from its first terminal and the light emission current data PAMD from its control terminal. Its conduction state is determined by the voltage value of its first terminal, the voltage value of its control terminal and its threshold voltage.

[0157] Specifically, when the gray level corresponding to the luminous current data PAMD is a low gray level, the ninth transistor T9 is turned on and outputs the threshold voltage signal SET; when the gray level corresponding to the luminous current data PAMD is a high gray level, the ninth transistor T9 is turned off.

[0158] In some embodiments, the first writing unit includes a tenth transistor T10.

[0159] The first terminal of the tenth transistor T10 is electrically connected to the power supply line 90, and the control terminal is electrically connected to the second terminal of the ninth transistor T9. It is configured to obtain a second power supply signal from its first terminal, turn on when it obtains a threshold voltage signal SET at its control terminal, and output a second power supply signal from its second terminal as a control signal, wherein the second power supply signal is a high-level signal.

[0160] In some embodiments, the first power signal VGH can be used as the second power signal to achieve signal multiplexing.

[0161] The tenth transistor T10 is also configured to turn off and not output a control signal when it does not receive the threshold voltage signal SET at its control terminal.

[0162] In some implementations, the first reset unit includes a twelfth transistor T12;

[0163] The second terminal of the twelfth transistor T12 is electrically connected to the power supply line 90, the control terminal is electrically connected to the gate line 60, and the first terminal is electrically connected to the control terminal of the tenth transistor T10. It is configured to obtain a third power supply signal VSS from its second terminal and an initialization signal RST from its control terminal, and its conduction state is controlled by the initialization signal RST.

[0164] The twelfth transistor T12 is turned on when the initialization signal RST is high, and outputs the third power supply signal VSS from its first terminal to turn off the tenth transistor T10; it is turned off when the initialization signal RST is low.

[0165] In some embodiments, the second write unit includes a capacitor C2, the first end of which is electrically connected to a power line 90, and the output end, i.e., the second end of which is electrically connected to the control terminal of the sixth transistor T6, and is configured to obtain a third power signal VSS from its first end and store the electrical signals output by the second write unit and the third write unit at its output end.

[0166] In some embodiments, the second reset unit includes an eleventh transistor T11;

[0167] The second terminal of the eleventh transistor T11 is electrically connected to the power supply line 90, the control terminal is electrically connected to the gate line 60, and the first terminal is electrically connected to the second terminal of the capacitor C2. It is configured to obtain a third power supply signal VSS from its second terminal and an initialization signal RST from its control terminal, and its conduction state is controlled by the initialization signal RST.

[0168] The eleventh transistor T11 is turned on when the initialization signal RST is high, and outputs the third power supply signal VSS from its first terminal to initialize the voltage value of the second terminal of capacitor C2; it is turned off when the initialization signal RST is low.

[0169] In some embodiments, the second writing unit includes a sixth transistor T6.

[0170] The first terminal of the eighth transistor T8 is electrically connected to the power supply line 90, its control terminal is electrically connected to the gate line 60, and its second terminal is electrically connected to the second terminal of the capacitor C2. It is configured to obtain a second light emission control signal from its control terminal and a first power supply signal VGH from its first terminal, and its conduction state is controlled by the second light emission control signal.

[0171] The eighth transistor T8 is turned on when the second light-emitting control signal is high, and outputs the first power supply signal VGH; it is turned off when the second light-emitting control signal is low.

[0172] In some embodiments, the third write unit includes an eighth transistor T8.

[0173] The first terminal of the eighth transistor T8 is electrically connected to the data line 50, its control terminal is electrically connected to the second terminal of the tenth transistor T10, and its second terminal is electrically connected to the second terminal of the capacitor C2. It is configured to obtain the light emission duration data PWMD from its first terminal, turn on when it receives a control signal at its control terminal, and output the light emission duration data PWMD as the turn-on control signal; turn off when it does not receive a control signal at its control terminal, and does not output the light emission duration data PWMD.

[0174] In some embodiments, capacitor C2 first receives a first power supply signal VGH, and then receives a conduction control signal.

[0175] In some embodiments, the driving transistor T5 is configured to obtain a light-emitting current driving signal from its control terminal and generate a driving signal based on the light-emitting current driving signal and the voltage value at point B.

[0176] The current value of the drive signal is:

[0177] V gs =Vg-Vs=(VSS+VLED+Vth5+PAMD-Vref)-(VSS+VLED);

[0178] but

[0179] Where I represents the driving current value, μ represents the electron mobility in driving transistor T5, Cox represents the capacitance of the gate oxide layer in driving transistor T5, W represents the width of driving transistor T5, L represents the length of driving transistor T5, Vgs represents the voltage difference between the control terminal and the second terminal of driving transistor T5, Vth5 represents the threshold voltage of driving transistor T5, VSS represents the voltage value of the third power supply signal VSS, VLED represents the threshold voltage of the light-emitting diode LED in the pixel, and Vref represents the voltage value of the reference electrical signal Vref.

[0180] Based on the above driving current values, it can be seen that the threshold voltage has been canceled out, and its value is no longer affected by the threshold voltage.

[0181] Based on the above circuit structure, this application provides a control method for a display device, the method comprising:

[0182] During the data writing phase, the luminous current data is transmitted through the light-emitting driving circuit;

[0183] The control circuit outputs a control signal when the grayscale value corresponding to the luminous current data is within a preset grayscale range.

[0184] The control circuit does not output a control signal when the grayscale value corresponding to the luminous current data is not within the preset grayscale range.

[0185] During the display phase, when the control circuit for controlling the light emission duration receives a control signal, it outputs a conduction control signal based on the light emission duration data.

[0186] When the control circuit for controlling the duration of light emission does not receive a control signal, it outputs the first power supply signal it receives.

[0187] The control circuit for the light-emitting drive determines the current value of the drive signal based on the light-emitting current data;

[0188] Based on the duration control signal and the first light emission control signal, a driving signal is output, and the driving duration of the driving signal is adjusted according to the duration control signal to drive the pixel to emit light;

[0189] The display cycle of a pixel includes a data writing phase and a display phase.

[0190] The following is combined Figures 7A to 7F The process diagram shown Figure 6 The driving signal timing diagram shown is for Figure 4 The circuit structure shown is explained in terms of its operation within a display cycle. A display cycle T includes, in sequence, a reset phase t1, a compensation phase t2, a data writing phase t3, and a display phase t4.

[0191] During the reset phase t1 in the driving signal timing diagram, the initialization signal RST, the first scan signal Gn-1, and the first light emission control signal EM1 are at high level, while the second scan signal Gn and the second light emission control signal EM2 are at low level.

[0192] Since the first scan signal Gn-1 is at a high level, the third transistor T3 is turned on, and the reference electrical signal Vref obtained by it is written to the second terminal of capacitor C1; then the voltage value at the second terminal of capacitor C1 is Vref.

[0193] Since the first light-emitting control signal EM1 is at a high level, the first transistor T1 is turned on, and the fourth power supply signal VDD obtained from its first terminal is transmitted to the first terminal of the compensation transistor T4.

[0194] The compensation transistor T4 is turned on based on the high-level first scan signal Gn-1, and the fourth power supply signal VDD obtained from its first terminal is written into the first terminal of capacitor C1.

[0195] Since the initialization signal RST is high, the eleventh transistor T11 is turned on, and the third power supply signal VSS obtained from its second terminal is transmitted to its first terminal, which resets the second terminal of capacitor C2.

[0196] Because the third power supply signal VSS is low, the seventh transistor is turned off.

[0197] The pixels do not emit light.

[0198] During the reset phase t1, the operating state of the pixel driving circuit is as follows: Figure 7A As shown, the third transistor T3, the first transistor T1, the compensation transistor T4, and the eleventh transistor T11, which are marked with arrows, are turned on, while the other transistors are turned off.

[0199] During the compensation phase t2 in the driving signal timing diagram, the first scan signal Gn-1 and the second light emission control signal EM2 are at high level, while the initialization signal RST, the second scan signal Gn, and the first light emission control signal EM1 are at low level.

[0200] Since the first scan signal Gn-1 is high, the third transistor T3 remains on and continues to write the reference signal Vref to the second terminal of capacitor C1.

[0201] Since the first light-emitting control signal EM1 is at a low level, the first transistor T1 is turned off, and the transmission of the fourth power supply signal VDD is stopped.

[0202] Since the fourth power supply signal VDD is high, the driver transistor T5 is turned on.

[0203] Since the first scan signal Gn-1 is high, the compensation transistor T4 is turned on, and together with the turned-on drive transistor T5, a threshold compensation structure is constructed, and the fourth power supply signal VDD is output.

[0204] Since the second light-emitting control signal EM2 is at a high level, the sixth transistor T6 is turned on, and the first power signal VGH obtained from its first terminal is transmitted to the control terminal of the seventh transistor T7.

[0205] Since the first power signal VGH is high, the seventh transistor T7 is turned on, and the fourth power signal VDD obtained from its first terminal is transmitted to the first terminal of the pixel.

[0206] The pixel is turned on based on the fourth power signal VDD, and together with the threshold compensation structure and the seventh transistor T7, a discharge path is formed between capacitor C1 and power line 90.

[0207] Capacitor C1 discharges through the discharge circuit, and the voltage value at its first terminal is adjusted until the discharge ends. The voltage value at the second terminal of the driving transistor T5 is determined to be the sum of the pixel's turn-on voltage and the seventh transistor T7's turn-on voltage. The voltage value at the first terminal of capacitor C1 is determined to be the sum of the voltage value at the second terminal of the driving transistor T5 and the threshold voltage of the driving transistor T5.

[0208] Then, during the time period corresponding to compensation phase t2, the operating state of the pixel driving circuit is as follows: Figure 7B As shown, the third transistor T3, the driving transistor T5, the compensation transistor T4, the seventh transistor T7, and the sixth transistor T6, which are marked with arrows, are turned on, while the other transistors are turned off.

[0209] During the time period corresponding to the data writing stage t3 in the driving signal timing diagram, the second scan signal Gn is at a high level, while the initialization signal RST, the first scan signal Gn-1, the first light emission control signal EM1, and the second light emission control signal EM2 are at a low level.

[0210] Since the first scan signal Gn-1 is at a low level, the third transistor T3 is turned off.

[0211] Since the second scan signal Gn is high, the writing transistor T2 is turned on, and the luminous current data PAMD is written to the second terminal of capacitor C1.

[0212] Based on the voltage change at its second terminal, capacitor C1 adjusts the voltage value stored at its first terminal to determine the driving signal for the light-emitting current.

[0213] The voltage change is PAMD-Vref. The light-emitting current driving signal is the sum of the voltage change, the pixel's on-state voltage, the on-state voltage of the seventh transistor T7, and the threshold voltage of the driving transistor T5.

[0214] When the grayscale value corresponding to the luminous current data PAMD is a high grayscale value and not within the preset grayscale range, the ninth transistor T9 is turned off and does not output the threshold voltage signal SET, and the tenth transistor T10 does not output the second power supply signal.

[0215] Since the eighth transistor T8 does not receive the second power supply signal, the eighth transistor T8 is turned off and does not output the PWMD light emission duration data.

[0216] Since the voltage at the second terminal of capacitor C2 is the voltage of the first power supply signal VGH, which is high, the seventh transistor T7 remains on.

[0217] Then, during the data writing phase t3 corresponding to the high grayscale data writing stage, the operating state of the pixel driving circuit is as follows: Figure 7C As shown, the write transistor T2, drive transistor T5, and seventh transistor T7, which are marked with arrows, are turned on, while the other transistors are turned off.

[0218] When the grayscale value corresponding to the luminous current data PAMD is low and within the preset grayscale range, the ninth transistor T9 is turned on and outputs the threshold voltage signal SET. Then, the tenth transistor T10 outputs the second power supply signal as a control signal.

[0219] Since the eighth transistor T8 receives a high-level second power supply signal, the eighth transistor T8 is turned on and outputs the light emission duration data PWMD, which covers the first power supply signal VGH stored in capacitor C2.

[0220] The seventh transistor T7 adjusts its conduction state according to the level of the PWMD (PWM duration data). When it is on, the operating state of the pixel driving circuit and... Figure 7C The operating states shown are the same; when it is turned off, the operating state of the pixel driving circuit is as follows: Figure 7E As shown, the write transistor T2 and drive transistor T5, which are marked with arrows, are turned on, while the other transistors are turned off.

[0221] During the time period corresponding to stage t4 shown in the driving signal timing diagram, the first light emission control signal EM1 is at a high level, while the initialization signal RST, the second scan signal Gn, the first scan signal Gn-1, and the second light emission control signal EM2 are at a low level.

[0222] Since the first light-emitting control signal EM1 is at a high level, the first transistor T1 is turned on, and the fourth power supply signal VDD obtained at its first terminal is transmitted to the first terminal of the driving transistor T5.

[0223] The driving transistor T5 is turned on based on the voltage values ​​at its control terminal and its second terminal, and the current value of the driving signal it generates is determined.

[0224] When the gray level corresponding to the luminous current data PAMD is a high gray level and not within the preset gray level range, capacitor C2 continuously outputs the first power signal VGH, and the seventh transistor T7 is continuously turned on during the display stage.

[0225] Then, during the display phase t4, the operating state of the pixel driving circuit is as follows: Figure 7D As shown, the first transistor T1, the driving transistor T5, and the seventh transistor T7, which are marked with arrows, are turned on, while the other transistors are turned off.

[0226] When the grayscale value corresponding to the luminous current data PAMD is low and within the preset grayscale range, the states of the ninth transistor T9 and the tenth transistor T10 are the same as those during the data writing stage, remaining in the on state, and the tenth transistor T10 outputs the second power supply signal.

[0227] Since the second power supply signal is high, the eighth transistor T8 is turned on, and the output light emission duration data is a pulse width modulation signal with adjustable duty cycle.

[0228] The seventh transistor T7 adjusts its conduction status according to the level of the pulse width modulation signal. When it is on, in the pixel driving circuit, the first transistor T1, the driving transistor T5, the seventh transistor T7, the ninth transistor T9 and the tenth transistor T10 are on, and the other transistors are off.

[0229] When the seventh transistor T7 is turned off, the operating state of the pixel driving circuit is as follows: Figure 7F As shown, the first transistor T1, the driving transistor T5, the ninth transistor T9, and the tenth transistor T10, which are marked with arrows, are turned on, while the other transistors are turned off.

[0230] In other embodiments, the transistors in this application may be replaced with transistors of the opposite type, and their control logic is similar to that of the foregoing embodiments. They are only turned on when the transistor receives an inverted level electrical signal, and will not be described in detail here.

[0231] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this application that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the following claims.

[0232] It should be understood that this application is not limited to the precise structure described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this application is limited only by the appended claims.

Claims

1. A display device, comprising: Gate driving circuit, data driving circuit, power supply circuit, at least one pixel and corresponding pixel driving circuit; The pixel driving circuit is characterized by comprising: The light-emitting driving circuit, which is electrically connected to the data driving circuit, is configured to obtain light-emitting current data and output the light-emitting current data from its first output terminal. The control circuit, which is electrically connected to the first output terminal of the light-emitting driving circuit, is configured to obtain the light-emitting current data and output a control signal when the grayscale value corresponding to the light-emitting current data is within a preset grayscale range. When the grayscale value corresponding to the luminous current data is not within the preset grayscale range, the control signal is not output; The light emission duration control circuit is electrically connected to the control circuit, the data driving circuit, and the power supply circuit, and is configured to obtain light emission duration data and a first power supply signal. When the control signal is obtained, a conduction control signal is output; when the control signal is not obtained, the first power signal is output. The light-emitting driving circuit is also electrically connected to the light-emitting duration control circuit, the gate driving circuit, and the pixel, and is configured to obtain a duration control signal and a first light-emitting control signal, output a driving signal, and drive the pixel to emit light; the light-emitting current data is data for adjusting the current value of the driving signal. The duration control signal is a signal that adjusts the driving duration of the drive signal, including the conduction control signal or the first power signal, wherein the driving duration corresponding to the conduction control signal is less than the driving duration corresponding to the first power signal.

2. The display device according to claim 1, characterized in that, The control circuit includes: The gating unit, electrically connected to the light-emitting driving circuit and the power supply circuit, is configured to obtain a threshold voltage signal and the light-emitting current data; the threshold voltage signal corresponds to the boundary value of the preset grayscale range; When the grayscale value corresponding to the luminous current data is within the preset grayscale range, the threshold voltage signal is output; When the grayscale value corresponding to the luminous current data is within the preset grayscale range, the threshold voltage signal is not output. The first writing unit is electrically connected to the gating unit and the power circuit, and is configured to obtain a second power signal. When it obtains the threshold voltage signal, it outputs the second power supply signal as the control signal; The control signal is not output when the threshold voltage signal is not received.

3. The display device according to claim 2, characterized in that, The control unit further includes: The first reset unit is electrically connected to the gate drive circuit and the power supply circuit, and is configured to obtain a third power supply signal and an initialization signal. Its conduction state is controlled by the initialization signal, and the third power supply signal is output when it is on. The first writing unit and the first reset unit are electrically connected and are configured to, when the third power signal is received, be controlled by the third power signal to not output the control signal.

4. The display device according to claim 1, characterized in that, The light emission duration control circuit includes: The second writing unit is electrically connected to the power supply circuit and the gate driving circuit, and is configured to obtain a second light emission control signal and the first power supply signal, output the first power supply signal when the second light emission control signal is at a first level, and turn off when the second light emission control signal is at a second level. The storage unit and the output terminal of the second writing unit are electrically connected to the light-emitting driving circuit and are configured to store the first power signal and output the first power signal to the light-emitting driving circuit. The third writing unit is electrically connected to the output terminal of the control unit and the data driving circuit, and is configured to obtain the light emission duration data. When the control signal is obtained, the light emission duration data is output as the duration control signal; Turn off when the control signal is not received; The storage unit is also electrically connected to the output terminal of the third writing unit and is configured to store the light emission duration data and output the light emission duration data to the light emission driving circuit.

5. The display device according to claim 4, characterized in that, The light emission duration control circuit further includes a second reset unit, which is electrically connected to the output terminal of the storage unit, the gate driving circuit, and the power supply circuit. The second reset unit is configured to receive an initialization signal and a third power signal, with the initialization signal controlling its conduction state and the third power signal being output when it is on.

6. The display device according to claim 4 or 5, characterized in that, The light-emitting driving circuit includes: The driving unit, including a driving transistor and electrically connected to the data driving unit, is configured to obtain the light emission current data and adjust the current value of the driving signal; The light emission control unit is electrically connected between the driving unit and the pixel, and its control terminal is electrically connected to the output terminal of the storage unit. It is configured to obtain the duration control signal and adjust the duration of the driving signal it outputs.

7. The display device according to claim 6, characterized in that, The driving unit includes: A first transistor, whose first terminal is electrically connected to the power supply circuit and whose control terminal is electrically connected to the gate drive circuit, is configured to obtain a first light emission control signal and a fourth power supply signal, and is controlled by the first light emission control signal to output the fourth power supply signal. The compensation transistor has its first end electrically connected to the second end of the first transistor and its control end electrically connected to the gate drive circuit. It is configured to obtain the fourth power supply signal and the first scan signal, and to output the fourth power supply signal under the control of the first scan signal. A capacitor, whose first end is electrically connected to the second end of the compensation tube, is configured to store the fourth power signal; A driving transistor, whose first end is electrically connected to the first end of the compensation transistor, whose control end is electrically connected to the second end of the compensation transistor, and whose second end is electrically connected to the light-emitting control unit, is configured to construct a threshold compensation structure with the compensation transistor based on the fourth power signal, and to store its threshold voltage at the first end of the capacitor by discharging. A write transistor is configured to obtain the light emission current data and a second scan signal, and to output the light emission current data controlled by the second scan signal, so as to determine the light emission current driving signal at the first terminal of the capacitor. The driving transistor is configured to control its conduction state based on the electrical signal provided at the first end of the capacitor and the voltage value at its second end.

8. A control method for a display device, characterized in that, The method is applied to the display device as described in any one of claims 1-7, the method comprising: During the data writing phase, the luminous current data is transmitted through the light-emitting driving circuit; The control circuit outputs a control signal when the grayscale value corresponding to the luminous current data is within a preset grayscale range. The control circuit is controlled to not output the control signal when the grayscale value corresponding to the light emission current data is not within the preset grayscale range; During the display phase, when the control circuit for controlling the light emission duration receives the control signal, it outputs a conduction control signal based on the light emission duration data. When the light emission duration control circuit does not receive the control signal, it outputs the first power supply signal it receives. The light-emitting driving circuit determines the current value of the driving signal based on the light-emitting current data; The driving signal is output based on the duration control signal and the first light emission control signal, and the driving duration of the driving signal is adjusted according to the duration control signal to drive the pixel to emit light; The display cycle of the pixel includes the data writing phase and the display phase.

9. The method according to claim 8, characterized in that, The light-emitting driving circuit includes a driving unit and a light-emitting control unit. The driving unit includes a compensation transistor, a first transistor, and a capacitor. The light emission duration control circuit includes a second reset unit, which is electrically connected to the light emission control unit. The display cycle includes a reset phase, during which the initialization signal, the first scan signal, and the first light emission control signal are at a first level, and the second light emission control signal and the second scan signal are at a second level. The method also includes: The second reset unit is controlled to turn on based on the initialization signal and output the third power supply signal it obtains. The light-emitting control unit is controlled to turn off based on the third power supply signal; The first transistor is controlled to turn on based on the first light-emitting control signal, and outputs the fourth power supply signal obtained at its first terminal. The compensation transistor is turned on based on the first scanning signal to transmit the fourth power signal; The capacitor is controlled to store the fourth power signal.

10. The method according to claim 9, characterized in that, The light emission duration control circuit also includes a second writing unit and a storage unit; The display cycle further includes a compensation phase, during which the second light emission control signal and the first scan signal are at a first level, and the initialization signal, the first light emission control signal, and the second scan signal are at a second level. After controlling the capacitor to store the fourth power signal, the method further includes: The second reset unit is controlled to shut down based on the initialization signal, and the output of the fourth power signal is stopped. The first transistor is controlled to turn off based on the first light emission control signal; The second writing unit is controlled to turn on based on the second light emission control signal, and outputs the first power signal obtained therefrom. The first power signal is stored in the storage unit; The light-emitting control unit is turned on based on the first power signal; The driving transistor is controlled to turn on based on the fourth power signal, and a threshold compensation structure is constructed with the turned-on compensation transistor; The capacitor is controlled to discharge to the power supply circuit through the threshold compensation structure and the light-emitting control unit to obtain the threshold voltage of the driving transistor.

11. The method according to claim 10, characterized in that, The driving unit further includes a write transistor; the control circuit includes a gating unit and a first write unit, and the light emission duration control circuit further includes a third write unit; Within the display cycle, the data writing phase is the phase following the compensation phase; During the data writing phase, the second scan signal is at a first level, and the first scan signal, the initialization signal, the first light emission control signal, and the second light emission control signal are at a second level. After controlling the capacitor to obtain the threshold voltage of the driving transistor, the method further includes: The write transistor is controlled to turn on based on the second scan signal, and the obtained light-emitting current data is transmitted to the capacitor, so that the capacitor outputs a light-emitting current driving signal at its first terminal based on the light-emitting current data. The light-emitting current driving signal is the light-emitting current data compensated for the threshold voltage. When the grayscale value corresponding to the light emission current data is within a preset grayscale range, the control gating unit outputs the threshold voltage signal it obtains, so that the first writing unit is turned on based on the threshold voltage signal and outputs the second power supply signal it obtains. The gating unit is turned off when the grayscale value corresponding to the light emission current data is not within the preset grayscale range, so that the first writing unit is turned off and does not output the control signal. The second writing unit is controlled to turn off based on the second light emission control signal; The third writing unit is controlled to turn on when it receives the control signal, and outputs the light emission duration data it has obtained. The third writing unit is turned off when no control signal is received and does not output the light emission duration data; When the storage unit obtains the emission duration data, it stores the emission duration data.

12. The method according to claim 10, characterized in that, During the display phase, the first light emission control signal is at a first level, and the initialization signal, the first scan signal, the second scan signal, and the second light emission control signal are at a second level. The first transistor is controlled to turn on based on the first light-emitting control signal, and outputs the fourth power supply signal obtained at its first terminal. The driving transistor is controlled to turn on based on the light-emitting current driving electrical signal, and the current value of the driving signal output by the driving transistor is determined. The light-emitting control unit is controlled to obtain the driving signal and the light-emitting duration data or the first power signal provided by the storage unit, and adjust the time period of its output driving signal; The pixel emits light when it receives the driving signal.

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