Dynamic encryption and decryption device for CVBS analog video signals based on FPGA

By designing across control components and sliding end-mount structures, a dynamic encryption and decryption device for CVBS analog video signals is realized, enabling flexible switching between low latency and high security. This solves the problem of existing devices being unable to dynamically adjust, reducing latency and improving the device's flexibility and reliability.

CN121531077APending Publication Date: 2026-02-13SHENZHEN CHUANGYAN DIGITAL COMM CO LTD
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Patent Information

Application Number
CN202512023261.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-12-30
Publication Date
2026-02-13

AI Technical Summary

Technical Problem

Existing CVBS analog video signal encryption and decryption devices cannot be dynamically adjusted according to needs, nor can they flexibly switch between low latency and high security.

Method used

A dynamic encryption/decryption device based on FPGA was designed. By crossing the control component and the sliding end plate structure, the device can realize the direct transmission of CVBS analog video signals or the dynamic switching of encryption/decryption processing. The device utilizes the crossing control component and the sliding end plate structure to quickly switch contact points under the drive of the lead screw shaft, thereby reducing delay and improving flexibility.

Benefits of technology

In scenarios requiring low latency, signals are transmitted directly to reduce latency; in scenarios requiring high security, the system switches to encryption/decryption mode to improve transmission flexibility, and automatically opens and closes the array window slots to enhance heat dissipation and dust prevention, thus extending the lifespan of components.

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Abstract

The invention relates to the technical field of image communication, in particular to a dynamic encryption and decryption device for CVBS analog video signals based on an FPGA, which comprises a frame shell and a PCB installed in the frame shell, an ADC conversion chip, an FPGA core module and a DAC conversion chip are installed on the PCB, firstly, the CVBS analog video signals are converted into digital signals through the ADC conversion chip, and then the digital signals are encrypted and decrypted through the FPGA core module. The digital signal is encrypted or decrypted through the FPGA core module, and finally the digital signal is converted into a CVBS analog video signal through the DAC conversion chip to be output. In a special scene requiring extremely low delay, through self adjustment and control of the device, a CVBS analog video signal is directly output, analog signal and digital signal conversion and encryption and decryption processing are not carried out any more, and therefore transmission delay is reduced; and when the video signal secrecy requirement is higher than the delay requirement, the encryption and decryption processing state is switched back.
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Description

Technical Field

[0001] This invention relates to the field of image communication technology, specifically to a dynamic encryption and decryption device for CVBS analog video signals based on FPGA. Background Technology

[0002] The dynamic encryption and decryption device for CVBS analog video signals is a real-time encryption and decryption hardware device based on an FPGA for CVBS analog video signals. The core mechanism involves first digitizing the CVBS analog signal using an analog-to-digital converter (ADC), then executing a dynamically key-driven encryption algorithm in parallel on the FPGA, and finally restoring the signal to an analog signal via a digital-to-analog converter (DA). The receiving end performs the reverse operation for decryption; only those with the matching key can restore the normal video, thus achieving encryption for remote communication. Delays occur during the digitization of the CVBS analog signal, the execution of the dynamically key-driven encryption or decryption algorithm by the FPGA, and the restoration of the analog signal by the DA. For example, to ensure the timing integrity of the analog signal, the FPGA needs to incorporate a small amount of buffering and synchronization logic, which introduces a certain amount of delay.

[0003] The requirements for latency and transmission security are not static in many application scenarios. Taking a remote monitoring and control system for a robotic arm as an example, in monitoring mode, the security of video signal transmission outweighs the need for low latency; however, when remote operation and control require monitoring video, the need for low latency outweighs the need for video signal transmission security. Existing encryption and decryption devices, once installed in the video signal circuit, cannot be dynamically switched or dynamically adjusted according to requirements. Summary of the Invention

[0004] The purpose of this invention is to provide a dynamic encryption and decryption device for CVBS analog video signals based on FPGA, so as to solve the problem mentioned in the background art that existing encryption and decryption devices cannot be dynamically adjusted according to needs.

[0005] To achieve the above objectives, the present invention provides the following technical solution: a dynamic encryption and decryption device for CVBS analog video signals based on FPGA, comprising a frame housing and a PCB board installed inside the frame housing. The PCB board is equipped with an ADC conversion chip, an FPGA core module, and a DAC conversion chip. First, the CVBS analog video signal is converted into a digital signal by the ADC conversion chip. Then, the digital signal is encrypted or decrypted by the FPGA core module. Finally, the digital signal is converted back into a CVBS analog video signal for output by the DAC conversion chip. The PCB board is provided with chip contacts and cross-contacts. A cross-contact control component is provided in the frame housing. When the cross-contact control component contacts the chip contacts, the device performs encryption or decryption processing. When the cross-contact control component contacts the cross-contacts, the device directly transmits the CVBS analog video signal without encryption or decryption processing.

[0006] The frame shell is equipped with a CVBS input jack and a CVBS output jack. The CVBS analog video signal is input through the CVBS input jack and output through the CVBS output jack.

[0007] The crossing control component includes a fixed column and a support plate. The fixed column is fixedly installed inside the frame shell, and the support plate is installed on the fixed column. A limiting groove is formed on the support plate, and an alignment groove is formed in the limiting groove.

[0008] The frame housing has a sliding end seat inside, and a wall track is provided on the inner wall of the frame housing. The sliding end seat cooperates with the wall track to limit the sliding. A contact spring is embedded and fixed in the lower part of the sliding end seat. The contact spring can make contact with the chip contact or cross the contact as the sliding end seat slides.

[0009] A conductive element is fixedly provided on the sliding end seat. The conductive element is conductively connected to the contact spring. A flexible connecting wire is connected to the conductive element. The other end of the flexible connecting wire is connected to its corresponding CVBS input jack or CVBS output jack.

[0010] The sliding end seat is provided with a positioning spring, and the positioning spring is provided with a positioning protrusion; when the contact spring makes contact with the chip contact or when the contact spring makes contact with the cross contact, the positioning protrusion will cooperate with its corresponding positioning groove to lock the position.

[0011] Two sets of sliding end seats are symmetrically arranged, and a bridging middle plate is fixedly connected between the two sets of sliding end seats. A vertical page plate is fixedly arranged on the bridging middle plate, and a page plate shaft is inserted through the vertical page plate. C-shaped frames are fixedly arranged at both ends of the page plate shaft. A first spring and a second spring are sleeved on the outside of the page plate shaft, and the first spring and the second spring are respectively located on both sides of the vertical page plate.

[0012] A screw sleeve is fixedly installed on the C-shaped frame, and a lead screw shaft is inserted through the screw sleeve. The screw sleeve and the lead screw shaft are screwed together. When the lead screw shaft rotates, it can drive the screw sleeve to move along the axis of the lead screw shaft. A motor module for controlling the rotation of the lead screw shaft is provided at the end of the lead screw shaft.

[0013] A top cover is installed on the upper part of the frame shell. An array window slot is opened through the surface of the top cover. A dynamic cover is provided below the top cover. The dynamic cover can close or open the array window slot by moving its position. The dynamic cover is associated with the cross-control component, so that the array window slot is opened when the device performs encryption or decryption processing, and closed when the device does not perform encryption or decryption processing.

[0014] The lower surface of the upper cover is provided with a cover plate groove. The two ends of the dynamic cover plate are slidably limited and installed in the cover plate groove. A cover plate spring is provided on one side of the dynamic cover plate. The cover plate spring applies elastic pressure to the dynamic cover plate, so that the dynamic cover plate has a tendency to open the array window slot. A linkage protrusion is fixedly provided on the dynamic cover plate, and a linkage strut is fixedly provided on the C-shaped frame. When the device does not perform encryption or decryption processing, the linkage strut contacts and squeezes the linkage protrusion, so that the dynamic cover plate overcomes the elastic force of the cover plate spring and closes the array window slot.

[0015] Compared with the prior art, the beneficial effects of the present invention are: This invention relates to a dynamic encryption and decryption device for CVBS analog video signals based on FPGA. Through the coordination of chip contacts, cross-contacts, and cross-control components, it can directly output CVBS analog video signals in special scenarios requiring extremely low latency, eliminating the need for analog-to-digital conversion and encryption / decryption processing, thereby reducing transmission delay. When the video signal security requirement is higher than the latency requirement, it switches back to encryption / decryption processing, enabling dynamic adjustment and improving flexibility.

[0016] The traverse control component in this invention, in conjunction with structures such as a dynamic shield, a linkage protrusion, and a linkage strut, enables the device to automatically open the array window slot to enhance chip heat dissipation in encrypted / decrypted states; and to automatically close the array window slot in unencrypted / decrypted states, thereby reducing the opening time of the array window slot, reducing the probability of dust entering the PCB board, and improving the lifespan of components.

[0017] The traversal control component in this invention, through its own structural design, can accelerate the action when switching between the chip contact and the traversal contact. When the lead screw drives the screw sleeve and the C-shaped frame to move, the sliding end seat remains stationary. After the first spring or the second spring has accumulated enough force, the sliding end seat is driven to move quickly into place, reducing the signal transmission interruption time. Attached Figure Description

[0018] Figure 1 This is a schematic diagram of the overall structure of the present invention.

[0019] Figure 2 This is a schematic diagram of the top cover of the present invention being opened.

[0020] Figure 3 This is an enlarged schematic diagram of the structure at the sliding end seat of the present invention.

[0021] Figure 4 The top view of the top cover of this invention is shown.

[0022] Figure 5 This is an enlarged top view of the structure at the sliding end seat of the present invention.

[0023] Figure 6 This is an exploded view of the present invention.

[0024] Figure 7 This is a schematic diagram of the structure of the upper cover of the present invention.

[0025] Figure 8 This is a three-dimensional half-sectional schematic diagram of the lead screw shaft of the present invention.

[0026] Figure 9 This is a three-dimensional half-section front view of the lead screw shaft of the present invention.

[0027] In the diagram: 1. Frame shell; 2. PCB board; 3. ADC conversion chip; 4. FPGA core module; 5. DAC conversion chip; 6. Chip contact; 7. Cross contact; 101. CVBS input jack; 102. CVBS output jack; 103. Fixed column; 104. Support plate; 105. Limiting groove; 106. Alignment groove; 107. Sliding end seat; 108. Wall track; 109. Contact spring; 110. Conductor; 111. Flexible connecting wire; 112. Alignment spring; 13. Alignment protrusion; 114. Bridging middle plate; 115. Vertical leaf plate; 116. Leaf plate shaft; 117. C-shaped frame; 118. First spring; 119. Second spring; 120. Screw sleeve; 121. Lead screw shaft; 122. Motor module; 8. Top cover; 801. Array window groove; 802. Dynamic cover; 803. Cover slide groove; 804. Cover spring; 805. Linkage protrusion; 806. Linkage strut; 123. Bottom cover; 124. Frame hole; 201. Edge support plate; 701. Straight-through guide. Detailed Implementation

[0028] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0029] Please see Figures 1 to 9 This invention provides a technical solution: a dynamic encryption and decryption device for CVBS analog video signals based on FPGA, comprising a frame shell 1 and a PCB board 2 installed inside the frame shell 1, such as... Figure 8As shown, an edge support plate 201 is integrally formed on the inner wall of the frame shell 1. The PCB board 2 is detachably fixed to the edge support plate 201 by screws. An ADC conversion chip 3, an FPGA core module 4 and a DAC conversion chip 5 are installed on the PCB board 2. The ADC conversion chip 3, the FPGA core module 4 and the DAC conversion chip 5 are all processing chips in the prior art.

[0030] First, the CVBS analog video signal is converted into a digital signal by the ADC conversion chip 3. Then, the digital signal is encrypted or decrypted by the FPGA core module 4. Finally, the digital signal is converted into a CVBS analog video signal output by the DAC conversion chip 5. The PCB board 2 has a chip contact 6 and a bypass contact 7. A bypass control component is located in the frame housing 1. When the bypass control component contacts the chip contact 6, the device performs encryption or decryption processing; when the bypass control component contacts the bypass contact 7, the device directly transmits the CVBS analog video signal without encryption or decryption processing. Figure 6 As shown, a through conductor 701 is provided on the PCB board 2. Both ends of the through conductor 701 are connected to the crossover contact 7. When the crossover control component contacts the crossover contact 7, the CVBS analog video signal is directly output without processing through the through conductor 701 as a transmission wire.

[0031] The frame housing 1 is equipped with a CVBS input jack 101 and a CVBS output jack 102, such as Figure 6 As shown, a frame hole 124 is provided through the surface of the frame shell 1. The CVBS input jack 101 and the CVBS output jack 102 extend through the frame hole 124. The CVBS analog video signal is input through the CVBS input jack 101 and output through the CVBS output jack 102.

[0032] like Figure 2 As shown, the traverse control assembly includes a fixed column 103 and a support plate 104. The fixed column 103 is fixedly disposed inside the frame housing 1, and the support plate 104 is mounted on the fixed column 103. The support plate 104 is fixedly installed to the fixed column 103 by screws. Figure 3 As shown, a limiting groove 105 is provided on the pallet 104, and an alignment groove 106 is provided in the limiting groove 105. There are two alignment grooves 106 in the limiting groove 105.

[0033] The frame housing 1 has a sliding end seat 107 inside. The sliding end seat 107 is made of insulating material. The inner wall of the frame housing 1 has a wall track 108. The sliding end seat 107 cooperates with the wall track 108 to limit the sliding. The lower part of the sliding end seat 107 is embedded and fixed with a contact spring 109. The contact spring 109 can make contact with the chip contact 6 or the contact 7 as the sliding end seat 107 slides.

[0034] A conductive element 110 is fixedly installed on the sliding end seat 107. The conductive element 110 is conductively connected to the contact spring 109. A flexible connecting wire 111 is connected to the conductive element 110. The other end of the flexible connecting wire 111 is connected to its corresponding CVBS input jack 101 or CVBS output jack 102.

[0035] The sliding end seat 107 is provided with a positioning spring 112, and the positioning spring 112 is provided with a positioning protrusion 113. When the contact spring 109 makes contact with the chip contact 6 or makes contact with the cross contact 7, the positioning protrusion 113 will cooperate with its corresponding positioning groove 106 to lock the position.

[0036] Two sets of sliding end seats 107 are symmetrically arranged, and a bridging middle plate 114 is fixedly connected between the two sets of sliding end seats 107. A vertical page plate 115 is fixedly mounted on the bridging middle plate 114, and a page plate shaft 116 is inserted through the vertical page plate 115. C-shaped brackets 117 are fixedly mounted at both ends of the page plate shaft 116. A first spring 118 and a second spring 119 are sleeved on the outside of the page plate shaft 116. The first spring 118 and the second spring 119 are respectively located on both sides of the vertical page plate 115. Figure 3 As shown, when the vertical page plate 115 is in the middle position of the page plate shaft 116, the elastic forces of the first spring 118 and the second spring 119 reach equilibrium. The elastic force exerted on the vertical page plate 115 will gradually increase as the offset distance increases, regardless of which end of the vertical page plate 115 is biased towards.

[0037] A screw sleeve 120 is fixedly installed on the C-shaped frame 117. A lead screw shaft 121 is inserted through the screw sleeve 120. The screw sleeve 120 and the lead screw shaft 121 are screwed together. When the lead screw shaft 121 rotates, it can drive the screw sleeve 120 to move along the axial direction of the lead screw shaft 121. A motor module 122 for controlling the rotation of the lead screw shaft 121 is provided at the end of the lead screw shaft 121.

[0038] A top cover 8 is installed on the upper part of the frame shell 1, such as... Figure 8As shown, a bottom cover 123 is installed at the bottom of the frame shell 1. The bottom cover 123 is used to close the bottom of the frame shell 1. The frame shell 1, the top cover 8, and the bottom cover 123 cooperate to form a closed shell. An array window slot 801 is opened through the surface of the top cover 8. A dynamic baffle 802 is provided below the top cover 8. The dynamic baffle 802 can close or open the array window slot 801 by moving its position. The dynamic shield 802 is associated with the crossover control component, so that the array window slot 801 is opened when the device performs encryption or decryption processing, and the array window slot 801 is closed when the device does not perform encryption or decryption processing.

[0039] The lower surface of the upper cover 8 is provided with a cover plate groove 803. The two ends of the dynamic cover plate 802 are slidably limited and installed in the cover plate groove 803. A cover plate spring 804 is provided on one side of the dynamic cover plate 802. The cover plate spring 804 applies elastic pressure to the dynamic cover plate 802, so that the dynamic cover plate 802 has a tendency to open the array window groove 801. A linkage protrusion 805 is fixedly installed on the dynamic cover plate 802, and a linkage strut 806 is fixedly installed on the C-shaped frame 117. When the device does not perform encryption or decryption processing, the linkage strut 806 contacts and presses against the linkage protrusion 805, so that the dynamic cover plate 802 overcomes the elastic force of the cover plate spring 804 and closes the array window slot 801.

[0040] The dynamic encryption and decryption device of the present invention needs to be used in pairs. The FPGA core module 4 of the encryption end performs encryption processing, and the FPGA core module 4 of the decryption end performs decryption processing.

[0041] The encryption process involves digitizing the CVBS analog video signal via ADC converter chip 3, then loading a dynamic key and performing encryption via FPGA core module 4, followed by restoring the encrypted CVBS analog video signal via DAC converter chip 5, and finally outputting it to the transmitter.

[0042] The decryption process involves receiving the encrypted CVBS analog video signal, digitizing it via ADC converter chip 3, then loading and matching the dynamic key in the FPGA core module 4 and performing decryption. Finally, the signal is restored to the original CVBS analog video signal before encryption via DAC converter chip 5 and output to a display or storage medium.

[0043] CVBS analog video signals are input through CVBS input jack 101, such as... Figure 2 As shown, the signal is transmitted to the contact spring 109 via the flexible connecting wire 111 and the conductive element 110. The contact spring 109 selects to make contact with the chip contact 6 or the cross contact 7 for transmission. Finally, the signal is output sequentially through the contact spring 109, the conductive element 110, the flexible connecting wire 111 and the CVBS output jack 102 on the other side.

[0044] like Figure 6 As shown, when the contact spring 109 contacts the chip contact 6, the CVBS analog video signal will be processed sequentially through the ADC conversion chip 3, the FPGA core module 4 and the DAC conversion chip 5. When the contact spring 109 contacts the cross contact 7, the CVBS analog video signal is directly output to the CVBS output jack 102 through the through conductor 701 without encryption.

[0045] Contact spring 109 selects to switch between contact with chip contact 6 or cross contact 7, which is controlled by the cross control component. In actual use, it is necessary to control the cross control components of the encryption end and the decryption end to operate synchronously.

[0046] When the control component of this invention is working, it energizes the motor module 122, causing the lead screw shaft 121 to rotate. The lead screw shaft 121, through its helical engagement with the screw sleeve 120, drives the screw sleeve 120 and the C-shaped frame 117, among other structures, to move. Figure 3 As shown, with Figure 3 For example, when the C-shaped frame 117 moves to the left, the sliding end seat 107 and the vertical page plate 115 are limited and fixed because the alignment protrusion 113 is stuck in the alignment groove 106. When the C-shaped frame 117 moves to the left and the position of the vertical page plate 115 remains unchanged, the second spring 119 will gradually extend and the first spring 118 will gradually be compressed. When the vertical page plate 115 passes the midpoint of the page plate shaft 116, the elastic pressure applied by the C-shaped frame 117 to the vertical page plate 115 through the second spring 119 and the first spring 118 gradually increases.

[0047] When the elastic pressure exceeds a set threshold, the alignment spring 112 deforms, causing the alignment protrusion 113 to slide out of the alignment groove 106. At this time, the sliding end seat 107 and the vertical plate 115, etc., spring rapidly to the left under the force of the second spring 119 and the first spring 118, causing the alignment protrusion 113 to engage with the alignment groove 106 on the other side for position locking. With the movement of the sliding end seat 107, the contact spring 109 switches from conductive contact with the cross contact 7 to conductive contact with the chip contact 6, and the device enters the encryption or decryption working state. Similarly, when the device switches to the non-encryption or decryption working state, the lead screw 121 reverses, and the C-shaped frame 117 applies a reverse elastic force to the vertical plate 115 through the second spring 119 and the first spring 118 until the alignment protrusion 113 can disengage from the alignment groove 106, allowing the sliding end seat 107 to quickly move into place.

[0048] The present invention enables the control component to drive the lead screw shaft 121 to move the screw sleeve 120 and the C-shaped frame 117 at low speed, and the sliding end seat 107 and the contact spring 109 and other structures to quickly switch, reducing the path movement time of the contact spring 109 and thus reducing the signal transmission interruption time.

[0049] like Figure 8 and Figure 9 As shown, when the device switches to the unencrypted or decrypted working state, the C-shaped frame 117 is in the rightmost position. At this time, the C-shaped frame 117 applies a rightward pushing force to the linkage protrusion 805 through the linkage strut 806, causing the linkage protrusion 805 to drive the dynamic cover 802 to move to the right, as shown. Figure 7 As shown in the diagram. At this time, the shielding spring 804 is further elastically compressed, and the array window slot 801 is blocked and closed by the dynamic shielding plate 802, reducing dust from entering the PCB board 2 and improving the lifespan of components.

[0050] When the device switches to encryption or decryption mode, as the C-shaped frame 117 and other structures move to the left, the linkage strut 806 and the C-shaped frame 117, being fixed to each other, move to the left in sync. At this time, the linkage protrusion 805 loses its rightward thrust, and under the elastic force of the cover plate spring 804, the dynamic cover plate 802 moves to the left, so that the dynamic cover plate 802 no longer blocks and closes the array window slot 801, and the array window slot 801 opens. In the encryption and decryption mode, the array window slot 801 is automatically opened to enhance chip heat dissipation.

[0051] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A dynamic encryption and decryption device for CVBS analog video signals based on FPGA, comprising a frame housing and a PCB board installed inside the frame housing, characterized in that: The PCB board is equipped with an ADC conversion chip, an FPGA core module, and a DAC conversion chip. First, the ADC conversion chip converts the CVBS analog video signal into a digital signal. Then, the FPGA core module encrypts or decrypts the digital signal. Finally, the DAC conversion chip converts the digital signal back into a CVBS analog video signal for output. The PCB board is provided with chip contacts and cross-contacts, and the frame housing is provided with a cross-contact control component. When the cross-contact control component contacts the chip contacts, the device performs encryption or decryption processing; when the cross-contact control component contacts the cross-contacts, the device directly transmits CVBS analog video signals without encryption or decryption processing.

2. The dynamic encryption and decryption device for CVBS analog video signals based on FPGA according to claim 1, characterized in that: The frame shell is equipped with a CVBS input jack and a CVBS output jack. The CVBS analog video signal is input through the CVBS input jack and output through the CVBS output jack.

3. The dynamic encryption and decryption device for CVBS analog video signals based on FPGA according to claim 2, characterized in that: The crossing control component includes a fixed column and a support plate. The fixed column is fixedly installed inside the frame shell, and the support plate is installed on the fixed column. The pallet has a limiting groove, and the limiting groove has an alignment groove.

4. The dynamic encryption and decryption device for CVBS analog video signals based on FPGA according to claim 3, characterized in that: The frame housing has a sliding end seat inside, and a wall track is provided on the inner wall of the frame housing. The sliding end seat cooperates with the wall track to limit the sliding. A contact spring is embedded and fixed in the lower part of the sliding end seat. The contact spring can make contact with the chip contact or cross the contact as the sliding end seat slides.

5. The dynamic encryption and decryption device for CVBS analog video signals based on FPGA according to claim 4, characterized in that: A conductive element is fixedly provided on the sliding end seat. The conductive element is conductively connected to the contact spring. A flexible connecting wire is connected to the conductive element. The other end of the flexible connecting wire is connected to its corresponding CVBS input jack or CVBS output jack.

6. The dynamic encryption and decryption device for CVBS analog video signals based on FPGA according to claim 4, characterized in that: The sliding end seat is provided with a positioning spring, and the positioning spring is provided with a positioning protrusion; When the contact spring makes contact with the chip contact or when it makes contact with the cross contact, the alignment protrusion will lock its position by engaging with its corresponding alignment groove.

7. The FPGA-based dynamic encryption and decryption device for CVBS analog video signals according to claim 4, characterized in that: Two sets of sliding end seats are symmetrically arranged, and a bridging middle plate is fixedly connected between the two sets of sliding end seats. A vertical page plate is fixedly arranged on the bridging middle plate, and a page plate shaft is inserted through the vertical page plate. C-shaped frames are fixedly arranged at both ends of the page plate shaft. The page plate shaft is fitted with a first spring and a second spring, which are located on opposite sides of the vertical page plate.

8. The dynamic encryption and decryption device for CVBS analog video signals based on FPGA according to claim 7, characterized in that: A screw sleeve is fixedly installed on the C-shaped frame, and a lead screw shaft is inserted through the screw sleeve. The screw sleeve and the lead screw shaft are screwed together. When the lead screw shaft rotates, it can drive the screw sleeve to move along the axis of the lead screw shaft. The end of the lead screw shaft is equipped with a motor module for controlling the rotation of the lead screw shaft.

9. The dynamic encryption and decryption device for CVBS analog video signals based on FPGA according to claim 7, characterized in that: The upper part of the frame shell is equipped with a top cover, and an array of window slots is opened through the surface of the top cover. A dynamic cover is provided below the top cover. The dynamic cover can close or open the array of window slots by moving its position. The dynamic shield is associated with the traverse control component, causing the array window slot to open when the device performs encryption or decryption processing, and to close the array window slot when the device does not perform encryption or decryption processing.

10. The dynamic encryption and decryption device for CVBS analog video signals based on FPGA according to claim 9, characterized in that: The lower surface of the upper cover is provided with a cover plate groove, and the two ends of the dynamic cover plate are slidably limited and installed in the cover plate groove. A cover plate spring is provided on one side of the dynamic cover plate, and the cover plate spring applies elastic pressure to the dynamic cover plate, so that the dynamic cover plate has a tendency to open the array window slot. A linkage protrusion is fixedly provided on the dynamic shield, and a linkage strut is fixedly provided on the C-shaped frame. When the device does not perform encryption or decryption processing, the linkage strut contacts and presses against the linkage protrusion, so that the dynamic shield overcomes the elastic force of the shield spring and closes the array window slot.

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