Light source soft and hard trigger control system based on GPIO multiplexing

Abstract

The invention discloses a light source soft and hard trigger control system based on GPIO multiplexing, and relates to the technical field of electronic circuits and embedded control. The system comprises a main control unit, an IO expansion unit and a signal merging circuit. The main control unit is provided with a multiplexing pin which can be dynamically switched between a general input / output mode and an external interruption input mode; the IO expansion unit communicates with an upper system and is provided with a first output end for outputting a soft trigger signal and a first input end for receiving an external hard trigger signal; the signal merging circuit is a logic OR gate, the input end of the signal merging circuit is connected with the first output end and the first input end, and the output end of the signal merging circuit is connected with the multiplexing pin of the main control unit. According to the invention, the multiplexing of the same GPIO port between a common I / O function and a high-speed trigger function is realized, the advantages of microsecond trigger response and hardware resource saving are achieved, and the system integration level and the real-time performance are improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of electronic circuit and embedded control technology, more particularly, it relates to a light source soft and hard trigger control system based on GPIO multiplexing. BACKGROUND

[0002] In modern machine vision, industrial detection and precision control systems, controllable light sources are often used. The trigger control mode of such light sources mainly has two kinds: one is hard trigger directly controlled by external sensors or signals, which has fast response speed but needs exclusive GPIO port; the second is soft trigger by sending commands through serial port of upper computer, which has the advantage of not needing additional wiring but being limited by operating system scheduling and serial communication protocol, the delay is usually in the order of milliseconds (ms), and there is an uncertainty of 1-50 ms, which cannot meet the application requirements of high speed and high precision.

[0003] At present, many systems allocate independent GPIO for hard trigger, and reserve serial port for soft trigger. This leads to the fact that in most scenarios using soft trigger, the dedicated hard trigger GPIO port is in idle state, causing waste of valuable I / O resources and PCB space occupation. And the soft trigger cannot realize fast and certain trigger due to serial communication and operating system delay, which limits the system performance.

[0004] Therefore, a new scheme needs to be proposed to solve this problem. SUMMARY

[0005] To solve the above technical problems, the present application provides a light source soft and hard trigger control system based on GPIO multiplexing.

[0006] The technical scheme of the present application is: A light source soft and hard trigger control system based on GPIO multiplexing, comprising a main control unit U62, an IO expansion unit U65 and a signal merging circuit, the main control unit U62 has a multiplexing pin PA.1 which can be switched between general input and output mode and external interrupt input mode, the IO expansion unit communicates with the upper system and includes at least one first output end and at least one first input end, the first output end is used for outputting soft trigger signal, the first input end is used for receiving external hard trigger signal, the signal merging circuit is electrically connected with the first output end and the first input end of the IO expansion unit U65 and the multiplexing pin PA.1 of the main control unit U62, the signal merging circuit is an OR gate, when the first output end outputs valid level or the first input end receives external valid level signal, the multiplexing pin PA.1 of the main control unit U62 outputs valid interrupt level.

[0007] The application further provides that the signal merging circuit comprises a plurality of MOSFET switch devices, the first output end and the first input end are respectively connected to the gate of different MOSFET switch devices, the source of each of the plurality of MOSFET switch devices is grounded, and the drain of each of the plurality of MOSFET switch devices is connected in parallel to form a common output node, the output node is connected to a power supply through a pull-up resistor, and is electrically connected to a multiplexing pin PA.1 of the master control unit U62.

[0008] The application further provides that the MOSFET switch device is a dual-channel N-channel MOSFET switch device.

[0009] The application further provides that the master control unit U62 is a microcontroller with a model number of M031FC1AE, and the master control unit U62 has a PWM output channel to control the brightness and light-emitting time of the light source after being triggered.

[0010] The application further provides that when the trigger function is turned on, the master control unit U62 configures the multiplexing pin PA.1 as a low-level active interrupt input, and when the level of the common output node jumps from high to low, the master control unit enters an interrupt service program to control the light source to be turned on.

[0011] The application further provides that when the trigger function is turned off, the master control unit U62 configures the multiplexing pin PA.1 as a general GPIO, which is used for general input or output with an external interface and does not participate in the light source trigger logic.

[0012] The application further provides that the IO expansion unit U65 communicates with an upper-layer system through an LPC bus.

[0013] The application further provides that the power supply filtering network comprises a magnetic bead arranged on a power supply path and a decoupling capacitor distributed near the power supply pins of the master control unit U62 and the IO expansion unit U65.

[0014] The application has the following beneficial technical effects: 1. By multiplexing the same physical pin, an independent hard trigger control circuit is saved, and the PCB layout space and component cost are saved.

[0015] 2. Both soft trigger and hard trigger are realized through a hardware logic circuit, which bypasses the scheduling delay of the operating system and the serial communication delay, and the trigger response time is stabilized at the microsecond (µs) level, greatly improving the real-time performance of the system.

[0016] 3. The trigger function can be flexibly turned on or off through a firmware command, so that the system can dynamically switch between a "high-performance trigger mode" and a "general GPIO mode", and adapt to various application scenarios.

[0017] 4. The signal merging realized by MOSFET and other elements provides good electrical isolation and avoids potential conflicts between different power supply domains. BRIEF DESCRIPTION OF DRAWINGS

[0018] Fig. 1 is the circuit structure schematic diagram of the master control unit U62 of the present application; Fig. 2 is the circuit structure schematic diagram of the IO expansion unit U65 of the present application; Fig. 3 is the circuit structure schematic diagram of the signal merging circuit of the present application. DETAILED DESCRIPTION

[0019] In order to make the technical means of the present application more clearly understood and implemented according to the content of the specification, the specific embodiments of the present application are further described in detail below in combination with the drawings and examples, and the following examples are used to illustrate the present application but not to limit the scope of the present application.

[0020] A light source soft and hard trigger control system based on GPIO multiplexing, as shown in Figs. 1-3 , includes a master control unit U62, an IO expansion unit U65, and a signal merging circuit Q71-Q74, in addition, the system is also provided with a pull-up resistor, a magnetic bead, a power filter network and a plurality of debugging components to ensure the stability of the signal and the reliability of the trigger action.

[0021] The master control unit U62 preferably uses a microcontroller with model M031FC1AE. The microcontroller internally integrates an ARM Cortex-M0 processing core, a PWM control module and a plurality of GPIO / interrupt pins. In this embodiment, the 17th pin (PA.1) thereof is configured as a multiplexed GPIO / interrupt input end for receiving the trigger signal output from the signal merging circuit. The multiplexed pin PA.1 can be switched between two modes under firmware control: when the trigger function is turned on, PA.1 is set as a low-level effective external interrupt input, and any low-level signal from the outside can make the CPU respond immediately and enter the interrupt service program; if the trigger function is turned off, PA.1 is used as a normal GPIO and does not participate in the light source trigger logic. In this embodiment, after the trigger is confirmed, the U62 will generate a PWM waveform with a preset frequency and duty cycle from its PWM1-PWM4 timing output channels, and the typical frequency is set to 150 kHz to drive the light source to achieve precise brightness and light-emitting time control.

[0022] IO extension unit U65 preferably adopts a model F75113U LPC bus interface I / O expander to realize fast command communication between the upper system and the main control unit U62. In the embodiment, pin 36 (GPIO14 / LED14) of U65 is configured as a first output end, which serves as a software trigger signal output channel; pin 20 (GPIO34) of U65 is configured as a first input end, which is used to receive a hard trigger signal input by an external device (such as a sensor, a camera, a PLC control end). U65 is connected with the upper system through an LPC bus, and the instruction response delay is usually controlled within 1 ms, which is significantly better than the interaction delay of conventional UART communication.

[0023] The signal merging circuit Q71 to Q74 is composed of four 2N7002DW double-channel N-channel MOSFET switching devices. Each device contains two independently controllable MOSFETs inside, and a common output point, i.e. an INT1_NET node, is formed by connecting the drain nodes in parallel, which realizes the "hardware or logic" combination function of multiple trigger sources in cooperation with the source of the system ground and an external pull-up resistor R442 (10kΩ). Taking the soft trigger path of pin 36 of U65 as an example, when a high-level signal of pin 36 is applied to G1 (gate) of Q71, the corresponding channel is switched from a high-resistance state to a conductive state, and the INT1_NET node is quickly pulled to the ground potential, thereby triggering the PA.1 interrupt input of the main control unit U62. Similarly, when a high-level signal from an external device is received by pin 20 of the IO extension unit U65, the hard trigger is realized by controlling the G1 end of Q72, which has the same electrical behavior as the soft trigger path.

[0024] In the system static state, the pins 36 and 20 of the IO extension unit U65 remain low, at this time the gates of Q71 to Q74 are at 0V, which is lower than the opening threshold of the device, and each MOSFET is in the off state. The INT1_NET node is weakly pulled up to 3.3V by R442, and the multiplexing pin PA.1 of U62 detects a stable high level, and the system remains in standby state. When any trigger source outputs a high level, the corresponding MOSFET channel is turned on, and the INT1_NET node is strongly pulled down to nearly 0V, and U62 responds to the interrupt and executes the preset PWM control sequence immediately, triggering the light source to act; after the trigger signal ends, the MOSFET is turned off again, and the INT1_NET is restored to a high level by the pull-up resistor, ready for the next trigger.

[0025] The system is also provided with a power filter network, including magnetic beads L9 and L10, which are respectively used for isolating high-frequency noise of analog circuits and digital logic circuits, cooperating with the decoupling capacitors distributed around U62 and U65, can effectively suppress the burst current and high-speed switch noise, and improve the overall anti-interference ability of the system. In addition, fixed pull-up resistors such as R441, R444 are used to maintain the potential stability of the relevant signal lines when not driven; resistors R445, R446 are used as jumpers, which facilitate quick switching or isolation of signal paths during the research and development stage; adjustable resistors PR55, PR56 can be used to further debug the electrical parameters of key nodes.

[0026] When the trigger function is in the active state, the system avoids the delay and uncertainty caused by software polling and low-speed serial communication, so that the overall trigger delay is extremely low and stable. When the system does not need high-speed triggering, the trigger function can be turned off by the firmware command, so that the multiplexing pin PA.1 of U62 returns to the normal GPIO, and the pin 36 and pin 20 of U65 can also be reconfigured as the conventional input and output ports for interacting with other external devices. Thus, by multiplexing the functions of the same pin, the unification of the normal GPIO mode, the microsecond-level soft trigger mode and the microsecond-level hard trigger mode is realized, thereby improving the resource utilization efficiency of the whole system.

[0027] Through the cooperative design of the main control unit, the I / O expansion unit and the MOSFET "or logic" merging circuit, the fast triggering, high reliable response and dynamic multiplexing of the pin function of the light source are realized, the trigger performance, hardware isolation and resource utilization efficiency are taken into account, and the system has high engineering application value.

[0028] The above only describes the preferred embodiments of the present application and is not used to limit the present application. It should be pointed out that for ordinary skilled persons in the technical field, several improvements and modifications can be made without departing from the technical principles of the present application, and these improvements and modifications should also be considered as the protection scope of the present application.

Claims

1. A light source soft and hard triggering control system based on GPIO multiplexing, characterized in that: The system includes a main control unit U62, an I / O expansion unit U65, and a signal merging circuit. The main control unit U62 has a multiplexed pin PA.1 that can switch between a general input / output mode and an external interrupt input mode. The I / O expansion unit communicates with the upper-layer system and includes at least one first output terminal and at least one first input terminal. The first output terminal is used to output a soft trigger signal, and the first input terminal is used to receive an external hard trigger signal. The signal merging circuit is electrically connected to the first output terminal and the first input terminal of the I / O expansion unit U65, as well as the multiplexed pin PA.1 of the main control unit U62. The signal merging circuit is a logic OR gate. When the first output terminal outputs a valid level or the first input terminal receives an external valid level signal, it outputs a valid interrupt level to the multiplexed pin PA.1 of the main control unit U62.

2. The light source soft and hard triggering control system based on GPIO multiplexing according to claim 1, characterized in that: The signal merging circuit includes several MOSFET switching devices. The first output terminal and the first input terminal are respectively connected to the gates of different MOSFET switching devices. The sources of several MOSFET switching devices are all grounded. The drains of several MOSFET switching devices are connected in parallel to form a common output node. This output node is connected to the power supply through a pull-up resistor and is electrically connected to the multiplexing pin PA.1 of the main control unit U62.

3. The light source soft and hard triggering control system based on GPIO multiplexing according to claim 1, characterized in that: The MOSFET switching device is a dual-channel N-channel MOSFET switching device.

4. The light source soft and hard triggering control system based on GPIO multiplexing according to claim 1, characterized in that: The main control unit U62 uses a microcontroller of model M031FC1AE. The main control unit U62 has a PWM output channel to control the brightness and emission time of the light source after triggering.

5. The light source soft and hard triggering control system based on GPIO multiplexing according to claim 1, characterized in that: When the trigger function is enabled, the main control unit U62 configures the multiplexed pin PA.1 as a low-level active interrupt input. When the level of the common output node changes from high to low, the main control unit enters the interrupt service routine to control the light source to light up.

6. The light source soft and hard triggering control system based on GPIO multiplexing according to claim 1, characterized in that: When the trigger function is disabled, the main control unit U62 configures the multiplexed pin PA.1 as a general GPIO for general input or output with external interfaces, and does not participate in the light source triggering logic.

7. The light source soft and hard triggering control system based on GPIO multiplexing according to claim 1, characterized in that: The IO expansion unit U65 communicates with the upper-layer system via the LPC bus.

8. The light source soft and hard triggering control system based on GPIO multiplexing according to claim 1, characterized in that: It also includes a power filtering network, which includes ferrite beads disposed on the power path and decoupling capacitors distributed near the power pins of the main control unit U62 and the IO expansion unit U65.

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