Stacked battery and method of manufacturing the same and photovoltaic module

Abstract

The application discloses a laminated battery and a preparation method and a photovoltaic module thereof, and belongs to the technical field of photovoltaics. The laminated battery comprises a perovskite battery, a tunneling composite layer and a TOPCon battery; the perovskite battery comprises a hole transport layer; the tunneling composite layer is a MoS2-2 layer and a HfS2 layer composite layer; and the MoS2-2 layer is arranged between the hole transport layer and the HfS2 layer composite layer. The application introduces a novel two-dimensional material composite tunneling composite layer MoS2 / HfS2 heterojunction to replace a conventional metal oxide tunneling composite layer, realizes a light transmittance > 95%, a resistance loss < 0.5%, a quantum tunneling probability > 90%, and thus effectively promotes the efficient transmission of carriers between different battery layers, realizes the effective separation and collection of charges, and significantly improves the photoelectric efficiency of the perovskite-TOPCon laminated battery.

Description

Technical Field

[0001] This application relates to the field of photovoltaics, and in particular to a tandem solar cell, its preparation method, and a photovoltaic module. Background Technology

[0002] In traditional perovskite-crystalline silicon tandem solar cell architectures, the tunneling composite layer, as a key component connecting the top perovskite cell and the bottom crystalline silicon cell, directly affects the overall power conversion efficiency of the tandem cell. Currently, tunneling composite layer materials mainly rely on metal oxides such as transparent conductive oxides (ITO, Indium Tin Oxide) and IZO (Indium Zinc Oxide). However, while these materials possess certain conductivity and light transmittance, they have inherent limitations, including relatively low transmittance, high resistance (leading to increased internal electrical losses), and a low quantum tunneling probability (affecting the efficient transport of charge carriers). These factors limit the overall photoelectric conversion efficiency of the tandem cell, preventing the full utilization of the performance advantages of both perovskite materials and silicon-based cells, especially under high incident light intensity conditions, thus impacting its commercial potential in practical applications. Summary of the Invention

[0003] This application provides a tandem battery, its fabrication method, and a photovoltaic module, which at least helps to improve the photoelectric conversion efficiency of solar cells.

[0004] According to a first aspect of this application, a stacked solar cell is provided, including a perovskite solar cell, a tunneling composite layer, and a TOPCon solar cell; the perovskite solar cell includes a hole transport layer; wherein the tunneling composite layer is a composite layer of a MoS2-2 layer and an HfS2 layer; the MoS2-2 layer and the HfS2 layer are stacked in a stacked manner; the MoS2-2 layer is disposed between the hole transport layer and the HfS2 layer.

[0005] Furthermore, the thickness of the HfS2 layer is 1~3nm.

[0006] Furthermore, the thickness of the MoS2-2 layer is 2~4 nm.

[0007] Furthermore, the ratio of the number of Mo atoms in the MoS2-2 layer to the number of Hf atoms in the HfS2 layer is (1.9~2.1):1.

[0008] Furthermore, the thickness of the tunneling composite layer is 3~7nm.

[0009] Furthermore, the light transmittance of the tunneling composite layer is >95%.

[0010] Furthermore, the tandem solar cell includes, from the light-incident side to the back-light side, an antireflection layer, a top electrode layer, a conductive layer, an electron transport layer, a perovskite layer, a hole transport layer, a tunneling composite layer, a front passivation contact layer, a silicon substrate, a back passivation layer, and a back electrode layer, which are stacked sequentially.

[0011] Furthermore, the antireflection layer is a MgF2 layer; the thickness of the antireflection layer is 20~200nm.

[0012] Furthermore, the top electrode layer is a silver electrode; the thickness of the top electrode layer is 120 nm to 1 μm.

[0013] Furthermore, the thickness of the conductive layer is 10~100nm.

[0014] Furthermore, the electron transport layer is a composite layer of tin oxide and fullerene; the tin oxide and fullerene layers are stacked sequentially from the light-incident side to the back-light side; wherein the thickness of the tin oxide layer is 1~20nm; and the thickness of the fullerene layer is 5~30nm.

[0015] Furthermore, the hole transport layer is a composite layer of NiO layer and MoS2-1 layer; the NiO layer and MoS2-1 layer are stacked sequentially from the light-incident side to the back-light side; the thickness of the hole transport layer is 16~24nm; wherein the thickness of the NiO layer is 13~17nm; and the thickness of the MoS2-1 layer is 3~7nm.

[0016] According to a second aspect of this application, a method for preparing the above-mentioned stacked battery is provided, comprising the following steps:

[0017] Step S1: Deposit HfS2 material on the surface of the passivation contact layer on the front side of the TOPCon cell to obtain the HfS2 layer;

[0018] Step S2: MoS2-2 material is deposited on the surface of the HfS2 layer to obtain the MoS2-2 layer; the MoS2-2 layer and the HfS2 layer form a tunneling composite layer;

[0019] Step S3: Coat the surface of the MoS2-2 layer with hole transport material and anneal it to obtain the hole transport layer.

[0020] Further, in step S1, the HfS2 material is obtained by reacting TEMAHf and H2S in atomic layer deposition system I; wherein, the temperature of reaction I is 180~220℃; the cycle parameters of atomic layer deposition system I include: 80~120 pulse purgings for 0.2~0.5s; and the deposition time is 5~25min.

[0021] Further, in step S2, the MoS2-2 material is obtained by reacting (NtBu)2(NMe2)2Mo and H2S in atomic layer deposition system II; wherein, the temperature of reaction II is 180~220℃; the cycle parameters of atomic layer deposition system II include: 120~170 pulse purgings for 0.3~0.7s; and the deposition time is 15~35min.

[0022] Furthermore, in step S3, the deposition process of the hole transport layer includes:

[0023] MoS2-1 material monolayer chemical vapor deposition is performed on the surface of MoS2-2 layer to obtain MoS2-1 layer;

[0024] NiO solution was spin-coated onto the surface of the MoS2-1 layer and annealed at 90-110℃ for 5-15 min to obtain the NiO layer. The composite layer of the NiO layer and the MoS2-1 layer is the hole transport layer. The thickness of the hole transport layer is 16-24 nm, of which the thickness of the NiO layer is 13-17 nm and the thickness of the MoS2-1 layer is 3-7 nm.

[0025] Furthermore, step S4, following step S3, includes the deposition of the perovskite layer: (FA) 0.9 Cs 0.1 )Pb(I 0.75 Br 0.25 )3 The material was spin-coated onto the surface of the NiO layer and annealed in a nitrogen atmosphere at 100~150℃ for 5~15 min to obtain the perovskite layer.

[0026] Furthermore, step S0 is included before step S1: depositing a front passivation material on the first surface of the silicon substrate to obtain a front passivation contact layer.

[0027] According to a third aspect of this application, a photovoltaic module is provided, comprising:

[0028] A battery string, which is formed by connecting the above-described stacked battery or the stacked battery prepared by the above-described preparation method;

[0029] Connecting components are used to connect the various battery cells in the stack.

[0030] Encapsulating film, which is used to cover the surface of the battery string;

[0031] A cover plate, which is used to cover the surface of the encapsulating film that faces away from the battery string.

[0032] Compared with the prior art, the technical solution of this application has at least the following technical effects:

[0033] This application introduces a novel two-dimensional material composite tunneling composite layer, MoS2 / HfS2 heterojunction, to replace the traditional metal oxide tunneling composite layer, achieving a transmittance >95%, resistance loss <0.5%, and quantum tunneling probability >90%. This effectively promotes the efficient transport of charge carriers between different battery layers, realizes the effective separation and collection of charges, and significantly improves the photoelectric efficiency of perovskite-TOPCon tandem solar cells. Attached Figure Description

[0034] One or more embodiments are illustrated by way of example with reference to the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Unless otherwise stated, the drawings in the accompanying drawings do not constitute a limitation on scale. In order to more clearly illustrate the technical solutions in the embodiments of this application or in the conventional art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0035] Figure 1 This is a schematic diagram of the structure of the perovskite-TOPCon tandem solar cell provided in the embodiments of this application;

[0036] Figure 2 This is a schematic diagram of the structure of a photovoltaic module provided in an embodiment of this application.

[0037] Figure label:

[0038] 1. Antireflection layer; 2. Top electrode layer; 3. Conductive layer; 4. Electron transport layer; 41. Tin oxide layer; 42. Fullerene layer;

[0039] 5. Perovskite layer; 6. Hole transport layer; 61. NiO layer; 62. MoS2-1 layer; 7. Tunneling composite layer; 71. MoS2-2 layer; 72. HfS2 layer; 8. Front passivation contact layer; 81. Phosphorus-doped polycrystalline silicon layer; 82. SiO2 layer; 9. Silicon substrate; 10. Back passivation layer; 101. SiN4 layer; 102. Al2O3 layer; 11. Back electrode layer;

[0040] 100. Battery string; 1001. Stacked battery; 1002. Connecting component; 1003. Cover plate. Detailed Implementation

[0041] As the background technology shows, traditional tunneling layers such as metal oxides (ITO / IZO) have relatively low transmittance, high resistance, and low quantum tunneling probability, which in turn affects the photoelectric conversion efficiency of perovskite-TOPCon tandem solar cells.

[0042] This application provides a stacked battery, such as... Figure 1As shown, it includes a perovskite solar cell, a tunneling composite layer 7, and a TOPCon solar cell; the perovskite solar cell includes a hole transport layer 6; wherein, the tunneling composite layer 7 is a composite layer of MoS2-2 layer 71 and HfS2 layer 72; the MoS2-2 layer 71 and HfS2 layer 72 are composited in a stacked manner; the MoS2-2 layer 71 is disposed between the hole transport layer 6 and the HfS2 layer 72.

[0043] This application introduces a novel two-dimensional material composite tunneling composite layer, MoS2 / HfS2 heterojunction, to replace the traditional metal oxide tunneling composite layer, achieving a transmittance >95%, resistance loss <0.5%, and quantum tunneling probability >90%. This effectively promotes the efficient transport of charge carriers between different battery layers, enables effective separation and collection of charges, and significantly improves the photoelectric efficiency of perovskite-TOPCon tandem solar cells.

[0044] In some embodiments, the thickness of the HfS2 layer 72 is 1-3 nm, for example 2 nm; the thickness of the MoS2-2 layer 71 is 2-4 nm, for example 3 nm; and the thickness of the tunneling composite layer 7 is 3-7 nm, for example 4-6 nm, or even 5 nm. Choosing these two material layers results in high carrier selectivity, high transmittance >95%, low resistance, resistance loss <0.5%, and quantum tunneling probability >90%. The tunneling composite layer provided in this application not only effectively promotes selective carrier transport in tandem batteries but also optimizes energy level matching, maintains good transmittance and electrical performance, and provides physical barriers and interface support to ensure the efficient operation and long-term stability of the entire battery system.

[0045] Specifically, the main function of the MoS2-2 layer selected in this application is as an "electron selector" and "hole blocker" for the perovskite top cell. Band alignment: Monolayer / few-layer MoS2 is a typical n-type semiconductor with a low conduction band bottom (CBM) and a high valence band top (VBM). Its low CBM allows for excellent ohmic contact with the conduction band of the perovskite layer, enabling photogenerated electrons to be efficiently extracted from the perovskite layer and tunnel through. Its high VBM forms a large hole barrier with the valence band of the perovskite, effectively preventing holes in the perovskite from being transported back to the tunnel junction, thus greatly suppressing interfacial recombination. The MoS2 layer primarily ensures that electrons generated on the perovskite side are efficiently collected while "rejecting" holes, thus acting as both an "electron selector" and a "hole blocker."

[0046] Specifically, the main functions of the HfS2 layer are: to act as a "hole selector" and "electron barrier" for the TOPCon bottom cell; band alignment: the band structure of HfS2 differs from that of MoS2, with a higher valence band top (VBM); its higher VBM can be well aligned with the valence band of the TOPCon silicon cell, allowing holes generated from the silicon cell to be efficiently extracted and tunneled through; its lower CBM forms an electron barrier between itself and the conduction band of silicon; this barrier can effectively prevent electrons in silicon from being transported back to the tunnel junction, avoiding recombination with electrons from the perovskite side; the HfS2 layer mainly ensures that holes generated on the TOPCon side can be efficiently collected, while "rejecting" electrons, thus acting as a "hole selector" and "electron barrier".

[0047] Synergistic effects of HfS2 and MoS2-2 layers: Together, they form a "bipolar-selective tunneling junction." When MoS2-2 and HfS2 form a heterojunction, their energy bands bend and align at the interface, creating a built-in electric field that further promotes carrier separation and directional transport. Carrier selection: Electrons from perovskite and holes from silicon are pushed towards the junction region and recombine (or exchange through tunneling) under the influence of the built-in electric field of the recombination junction, achieving efficient electrical interconnection. Recombination suppression: The huge potential barriers established by the two layers confine both types of carriers to their respective regions, preventing them from easily passing through the entire junction, thus minimizing interfacial recombination losses.

[0048] To further enhance the individual and synergistic effects of the two materials, the ratio of molybdenum atoms to hafnium atoms is further optimized. In some embodiments, the ratio of Mo atoms in the MoS2-2 layer 71 to Hf atoms in the HfS2 layer 72 is (1.9~2.1):1; the thickness of the tunneling composite layer 7 is 3~7 nm; and the transmittance of the tunneling composite layer 7 is >95%. Using the above atomic ratio and thickness better confines both types of charge carriers within their respective regions, preventing them from easily passing through the entire junction, thereby minimizing interfacial recombination losses. Controlling the composite layer thickness within the above range ensures its high transmittance.

[0049] In some embodiments, the tandem solar cell, from the light-incident side to the back-light side, includes an antireflection layer 1, a top electrode layer 2, a conductive layer 3, an electron transport layer 4, a perovskite layer 5, a hole transport layer 6, a tunneling composite layer 7 (MoS2-2 layer 71, HfS2 layer 72), a front passivation contact layer 8, a silicon substrate 9, a back passivation layer 10, and a back electrode layer 11, stacked sequentially. The tandem solar cell provided in this application is an inverted tandem solar cell, also known as an inverted series solar cell. Through its meticulously designed inverted tandem solar cell structure, it possesses optimized optical and electrical performance, as well as enhanced material compatibility, thermal stability, and high efficiency.

[0050] In some embodiments, the antireflection layer 1 is a MgF2 layer; the thickness of the antireflection layer 1 is 20~200nm. The aforementioned antireflection layer, also known as an anti-reflection layer, is mainly used to reduce the reflection of incident light on its surface, thereby increasing the light transmittance and the amount of light absorbed inside the battery; the MgF2 antireflection layer can improve the light absorption rate, such as transmittance >90%; by controlling its thickness within the above range, it can be matched with light of a specific wavelength to achieve the best antireflection effect.

[0051] In some embodiments, the top electrode layer 2 is a silver electrode; the thickness of the top electrode layer 2 is 120 nm to 1 μm. The aforementioned top electrode has the function of collecting the current generated by the top layer and guiding the current to the external circuit of the battery. Silver, as the top electrode material, combined with its thickness within the aforementioned specific range, has advantages such as high conductivity and good light utilization.

[0052] In some embodiments, the conductive layer 3 is indium tin oxide (ITO); the thickness of the conductive layer 3 is 10~100 nm. The aforementioned ITO conductive layer and its matching thickness can achieve high transparency, such as transmittance >90%, good conductivity, sheet resistance <30Ω / □, stable contact performance with other layers, mechanical stability, and cell efficiency. This is beneficial for improving the fill factor, short-circuit current density, and open-circuit voltage of the solar cell, thereby improving the overall photoelectric conversion efficiency of the cell.

[0053] In some embodiments, the electron transport layer 4 is a composite layer of tin oxide layer 41 and fullerene layer 42; wherein the tin oxide layer 41 and fullerene layer 42 are stacked sequentially from the light-incident side to the back-light side; the thickness of the tin oxide layer 41 is 1~20 nm; and the thickness of the fullerene layer 42 is 5~30 nm. The fullerene layer (i.e., C60 material) has excellent electron accepting performance, effectively extracting photogenerated electrons from the perovskite layer, reducing electron transport barriers, and accelerating electron migration speed; the tin oxide layer can transport photogenerated electrons while blocking photogenerated holes, thereby improving electron collection efficiency and selectivity, and also has high transparency to maximize light absorption; when the two are used in combination at the above thicknesses, their advantages are fully utilized, with tin oxide providing a stable electron transport path and good transparency, while C60 enhances electron extraction efficiency and energy level matching, and the synergistic effect of the two significantly improves the overall efficiency of the battery.

[0054] In some embodiments, the perovskite layer 5 is (FA) 0.9 Cs 0.1 )Pb(I 0.75 Br 0.25 3; The thickness of the perovskite layer 5 is 400 nm to 1 μm. The above-mentioned perovskite layer material and matching thickness have good electron and hole transport properties, can efficiently absorb the visible light portion of the solar spectrum, and have extremely high photoelectric conversion efficiency.

[0055] In some embodiments, the hole transport layer 6 is a composite layer of NiO layer 61 and MoS2-1 layer 62; NiO layer 61 and MoS2-1 layer 62 are stacked sequentially from the light-incident side to the back-light side; the thickness of hole transport layer 6 is 16~24nm; wherein, the thickness of MoS2-1 layer 62 is 3~7nm; and the thickness of NiO layer 61 is 13~17nm. The aforementioned hole transport layer is mainly used to effectively extract and transport holes from the perovskite light absorption layer to the electrode, with an electron extraction efficiency >99%. In the aforementioned composite layer, the MoS2 layer facilitates rapid hole transport and reduces the probability of recombination during hole transport. The aforementioned NiO layer has excellent hole transport capabilities and can effectively transport holes from the perovskite layer to the electrode. The composite layer of the two materials can give full play to their roles. MoS2 provides quantum tunneling and selective transport characteristics, while NiO provides strong hole transport and collection capabilities. The synergy between the two significantly improves hole transport efficiency, reduces carrier recombination, reduces interlayer interface defects, and improves the quality of the carrier transport path from the perovskite layer to the electrode.

[0056] In some embodiments, the front passivation contact layer 8 is a phosphorus-doped polycrystalline silicon layer 81 and a SiO2 layer 82; wherein the phosphorus-doped polycrystalline silicon layer 81 and the SiO2 layer 82 are stacked sequentially from the light-incident side to the back-light side; the thickness of the front passivation contact layer 8 is 80~120nm; wherein the thickness of the phosphorus-doped polycrystalline silicon layer 81 is 80~100nm and the thickness of the SiO2 layer 82 is 1~2nm. The aforementioned front passivation contact layer 8 is used to provide effective carrier collection and also has good passivation function, reducing surface recombination; the aforementioned phosphorus-doped polycrystalline silicon has good conductivity and can effectively collect and transport photogenerated carriers; the polycrystalline silicon layer, through phosphorus doping, can effectively passivate the battery surface, reduce surface recombination, and improve battery efficiency and stability; SiO2 can further reduce surface defects and improve carrier lifetime; the combination of the two materials can synergistically provide a deep passivation effect and efficient carrier collection capability, significantly improving the photoelectric conversion efficiency of the battery.

[0057] In some embodiments, the silicon substrate 9 is an n-type silicon wafer with a thickness of 130~170 μm. By controlling the silicon wafer thickness within the above range, a resistivity of 1~10 Ω·cm can be achieved, ensuring an optimal balance between light absorption, carrier transport, and mechanical strength.

[0058] In some embodiments, an emitter region is also provided on the back side of the silicon substrate 9. The emitter region may be formed by boron diffusion treatment of the back side of the silicon substrate 9, or by depositing silicon oxide and boron-doped polysilicon to form a back passivation contact structure.

[0059] In some embodiments, the back passivation layer 10 is a composite layer of SiN4 layer 101 and Al2O3 layer 102; wherein, SiN4 layer 101 and Al2O3 layer 102 are stacked sequentially from the light-incident side to the back-light side; the thickness of the back passivation layer 10 is 90~110nm; wherein, the thickness of SiN4 layer 101 is 85~95nm; and the thickness of Al2O3 layer 102 is 8~12nm. The aforementioned back passivation layer 10 is a double-sided passivation layer with a Voc > 720mV. It is used to reduce recombination on the silicon surface and improve cell performance. Among them, silicon nitride has excellent surface passivation ability, reducing the surface recombination rate. It can also serve as an anti-reflection layer to reduce back reflection and increase light absorption. Alumina can penetrate deep into the silicon surface to passivate defects, further reducing carrier recombination. It can also selectively block electrons, promote hole transport, and improve hole collection efficiency. The combination of the two materials provides a dual passivation effect, enhancing the overall passivation effect, maximizing the reduction of carrier recombination, improving light absorption efficiency, while maintaining good charge transport and selectivity, significantly improving the efficiency and stability of the solar cell.

[0060] In some embodiments, the back electrode layer 11 is a screen-printed silver paste layer; the thickness of the back electrode layer 11 is 15~25μm. The aforementioned back electrode features a fine grid design with a linewidth of 10~15μm, primarily used to collect and transport charge carriers emitted from the back side and convert them into current in the external current. Choosing silver as the back electrode material and matching an appropriate thickness helps maintain its high conductivity, effectively transport current, and reduce internal resistance loss in the battery.

[0061] According to a second aspect of this application, a method for preparing the above-mentioned stacked battery is provided, comprising the following steps:

[0062] Step S1: Deposit HfS2 material on the surface of the front passivation contact layer 8 of the TOPCon cell to obtain HfS2 layer 72;

[0063] Step S2: MoS2-2 material is deposited on the surface of HfS2 layer 72 to obtain MoS2-2 layer 71; MoS2-2 layer 71 and HfS2 layer 72 form tunneling composite layer 7;

[0064] Step S3: Coat the surface of the MoS2-2 layer 71 with hole transport material, and anneal it to obtain the hole transport layer 6.

[0065] In some embodiments, in step S1, the HfS2 material is obtained by reacting TEMAHf (tetra(ethylmethylamino)hafnium) and H2S through reaction I; the temperature of reaction I is 180~220℃; TEMAHf and H2S react in an atomic deposition system; the cycling parameters of the atomic deposition system are: 80~120 pulse purges for 0.2~0.5s; the deposition time is controlled at 5~25min, and the deposition thickness is controlled at 1~3nm. The above interlayer transfer is completed in a glove box (O2 < 0.1ppm), and XPS verification shows that the S / (Mo+Hf) atomic ratio is 2.0±0.1. Using the above reaction temperature and deposition time helps to obtain accurate material layer thickness and promotes the overall photoelectric effect of the tandem solar cell.

[0066] In some embodiments, in step S1, the MoS2-2 material is obtained from (NtBu)2(NMe2)2Mo (N,N-di-tert-butylcarbodiimide-N,N-dimethylethylenediaminemolybdenum) and H2S via reaction II; the temperature of reaction II is 180~220℃; (NtBu)2(NMe2)2Mo and H2S react in an atomic deposition system; the cycling parameters of the atomic deposition system are: 120~170 pulse purgings for 0.3~0.7s; the deposition time is controlled at 15~35min; and the deposition thickness is controlled at 2~4nm. Using the above reaction temperature and deposition time, the expected material layer thickness can be obtained relatively accurately, thereby ensuring the overall photoelectric effect of the tandem solar cell.

[0067] In some implementations, the following steps are included before step S1:

[0068] Step S0-2: Deposit a front passivation material on the first surface of the silicon substrate 9 to form a front passivation contact layer 8 on the first surface;

[0069] Step S0-3: Deposit back passivation material on the second surface of the silicon substrate 9 opposite to the first surface to form a back passivation layer 10 on the second surface;

[0070] Step S0-4: Deposit the back electrode material on the surface of the back passivation layer 10 to form the back electrode layer 11.

[0071] The methods for preparing the front passivation contact layer, the back passivation layer, and the back electrode layer in this application can be selected from existing technologies according to actual conditions.

[0072] In some embodiments, step S0-1 is included before step S0-2: the silicon substrate 9 is subjected to double-sided polishing and texturing pretreatment sequentially; wherein, double-sided polishing uses RCA cleaning to remove metal impurities; and texturing pretreatment uses KOH solution + texturing additive (10wt%, 80℃) to form a pyramid structure (1.5μm in height). By performing the above pretreatment on the silicon wafer, the purity of the silicon wafer is improved and the influence of impurities is reduced.

[0073] In some embodiments, step S0-2, the deposition process of the front passivation contact layer 8 includes:

[0074] Step S0-2A: SiO2 material is deposited on the first surface of silicon substrate 9 (silicon wafer) under dry oxygen conditions at 930~980℃ to form SiO2 layer 82 on the first surface of silicon wafer.

[0075] Step S0-2B: Amorphous silicon material is deposited on the surface of the SiO2 layer at a temperature of 600~650℃ and a pressure of 250~350mTorr to form an amorphous silicon layer;

[0076] Step S0-2C: The silicon wafer obtained in step S0-2B is subjected to phosphorus diffusion in an atmosphere containing POCl3 at a temperature of 800~900℃ to obtain a composite layer of SiO2 layer and phosphorus-doped amorphous silicon layer (sheet resistance of 800~300Ω / □).

[0077] Step S0-2D: The silicon wafer obtained in step S0-2C is annealed in a nitrogen atmosphere at a temperature of 850~950℃ for 20~40 min to obtain a composite polycrystalline silicon consisting of an annealed SiO2 layer 82 and a phosphorus-doped polycrystalline silicon layer 81, i.e., the front passivation contact layer 8; the thickness of the front passivation contact layer 8 is 70~90nm; the silicon wafer is an n-type silicon wafer. Through the above preparation process, a front passivation contact layer with better performance can be obtained, which facilitates good adhesion with the hole transport layer, thereby contributing to the overall photoelectric effect of the tandem solar cell.

[0078] In some embodiments, the deposition process of the back passivation layer 10 in steps S0-3 includes:

[0079] Step S0-3A: Using atomic layer deposition, tetramethylaluminum and water are deposited on the second surface of the silicon wafer at a temperature of 140~160℃ and a growth rate of 0.10~0.15nm / cycle to form an Al2O3 layer 102 with a thickness of 5~10nm.

[0080] Step S0-3B: Using plasma-enhanced chemical vapor deposition, SiH4 is deposited on the surface of the Al2O3 layer in a nitrogen atmosphere (SiH4 / NH3=1:3, RF power 300W, refractive index 2.05) to obtain SiN4 layer 101 with a thickness of 85~90nm; the composite layer of Al2O3 layer 102 and SiN4 layer 101 is the back passivation layer 10; the thickness of the back passivation layer 10 is 90~100nm.

[0081] In some embodiments, the back electrode layer 11 is obtained by screen printing silver paste (line width 15μm) and sintering it in a nitrogen atmosphere in a chain furnace at a peak temperature of 750~850℃, with a thickness controlled at 18~22μm.

[0082] In some implementations, the specific deposition process of the hole transport layer 6 in step S3 includes:

[0083] MoS2-1 material monolayer chemical vapor deposition was performed on the surface of MoS2-2 layer 71 to obtain MoS2-1 layer 62.

[0084] NiO solution was spin-coated onto the surface of MoS2-1 layer 62 and annealed at 90-110℃ for 5-15 min to obtain NiO layer 61; the composite layer of NiO layer 61 and MoS2-1 layer 62 is hole transport layer 6.

[0085] The hole transport layer 6 has a thickness of 16-24 nm; the NiO layer 61 has a thickness of 13-17 nm; and the MoS2-1 layer 62 has a thickness of 3-7 nm. Preparing the composite hole transport layer using the above method facilitates good contact between the hole transport layer and the tunneling composite layer, as well as good adhesion between the hole transport layer and the front passivation contact layer, thereby contributing to the overall photoelectric effect of the tandem solar cell.

[0086] In some implementations, step S3 is followed by the following steps:

[0087] Step S4: (FA) 0.9 Cs 0.1 )Pb(I 0.75 Br 0.25 )3 The material was spin-coated onto the surface of NiO layer 61 and annealed in a nitrogen atmosphere at a temperature of 100~150℃ for 5~15 min to obtain perovskite layer 5 with a thickness of 400nm~1μm.

[0088] Step S5: Deposit electron transport layer material on the surface of perovskite layer 5 to form electron transport layer 4;

[0089] Step S6: Deposit conductive material on the surface of electron transport layer 4 to form conductive layer 3;

[0090] Step S7: Deposit electrode material on the surface of conductive layer 3 to form top electrode layer 2;

[0091] Step S8: Deposit antireflection material on the surface of the top electrode layer 2 to form antireflection layer 1.

[0092] The preparation methods for each of the above layers can be selected from existing technologies according to the actual situation.

[0093] In some embodiments, step S5, the deposition process of the electron transport layer 4 includes:

[0094] Step S5-1: Fullerene is vapor-deposited onto the surface of perovskite layer 5 to obtain fullerene layer 42 with a thickness of 5~30nm;

[0095] Step S5-2: Tin oxide is vapor-deposited onto the surface of fullerene layer 42 to obtain tin oxide layer 41 with a thickness of 15~25nm; the composite layer of fullerene layer 42 and tin oxide layer 41 is electron transport layer 4.

[0096] In some embodiments, an IZO conductive layer 3 is deposited on the surface of the electron transport layer 4 with a thickness controlled at 50-100 nm; a silver fine grid is deposited on the surface of the conductive layer 3 with a thickness controlled at 80-120 nm, serving as the top electrode layer 2; and MgF2 material is deposited on the surface of the top electrode layer 2 with a thickness controlled at 20-200 nm, or more specifically 50-100 nm, serving as the antireflection layer 1.

[0097] The method for fabricating tandem solar cells in this application proceeds from bottom to top, first fabricating the TOPCon bottom cell and then fabricating the perovskite top cell.

[0098] According to a third aspect of this application, a photovoltaic module is provided, comprising:

[0099] The battery string 100 is formed by connecting multiple stacked batteries 1001 as described above or stacked batteries 1001 obtained by the above-described method for preparing stacked batteries.

[0100] Connecting component 1002 is used to connect each stacked battery 1001 to form a battery string 100;

[0101] Encapsulating film, which is used to cover the surface of the battery string;

[0102] Cover plate 1003 is used to cover the surface of the encapsulating film away from the battery string 100.

[0103] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined.

[0104] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0105] In the description of the embodiments of this application, the term "and / or" is merely a description of the relationship between related objects, indicating that there can be three relationships. For example, A and / or B can mean: A exists, A and B exist simultaneously, and B exists.

[0106] In the description of the embodiments of this application, the term "multiple" refers to two or more (including two), similarly, "multiple sets" refers to two or more (including two sets), and "multiple pieces" refers to two or more (including two pieces).

[0107] In the description of the embodiments of this application, when a component "includes" another component, other components are not excluded unless otherwise stated, and other components may be further included. Furthermore, when a component such as a layer, film, region, or plate is referred to as being "on / located" on another component, it can be "directly on" the other component (i.e., located on the surface of the other component with no other components between them), or another component may be present therein. Moreover, when a component such as a layer, film, region, or plate is "directly located" on another component, or when a component such as a layer, film, region, or plate is located on the surface of another component, it indicates that no other components are located therein.

[0108] The terminology used in the description of the various embodiments herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used in the description of the various embodiments and the appended claims, the term "part" is also intended to include the plural form unless the context clearly indicates otherwise. Components include layers, films, regions, or plates, etc.

[0109] The embodiments of this application will now be described in detail with reference to the accompanying drawings. However, those skilled in the art will understand that many technical details have been provided in the embodiments of this application to facilitate a better understanding of the application. However, the technical solutions claimed in this application can be implemented even without these technical details and various variations and modifications based on the following embodiments.

[0110] Example 1

[0111] In the perovskite-TOPCon tandem solar cell, the TOPCon bottom cell is fabricated first, and then the perovskite top cell is fabricated.

[0112] The specific steps in the fabrication method of tandem solar cells are as follows:

[0113] Step S0-1: Pretreatment of silicon substrate 9 (n-type silicon wafer):

[0114] Material: n-type Cz-Si (resistivity 0.5 Ω·cm, thickness 160 μm);

[0115] Process: The silicon wafer is subjected to double-sided polishing and texturing in sequence; the double-sided polishing uses RCA cleaning to remove metal impurities; the texturing process uses KOH solution + texturing additive (10wt%, 80℃) to form a pyramid structure (1.5μm in height).

[0116] Step S0-2: Front passivation contact layer 8:

[0117] Structure: SiOx / n + -poly-Si;

[0118] Step S0-2A: SiO2 material is deposited and grown on the first surface of a silicon wafer under hot dry oxygen conditions at 950℃ to form a SiO2 layer 82 on the first surface of the silicon wafer, with the deposition thickness controlled to be 1.5nm.

[0119] Step S0-2B: LPCVD deposition of amorphous silicon: Amorphous silicon material is deposited on the surface of the SiO2 layer at a temperature of 620℃ and a pressure of 300mTorr to form an amorphous silicon layer, with the deposition thickness controlled to be 80nm.

[0120] Step S0-2C: Phosphorus diffusion: The silicon wafer obtained in step S0-2B is subjected to phosphorus diffusion in an atmosphere containing POCl3 at a temperature of 850℃ to obtain a composite layer of SiO2 layer and phosphorus-doped amorphous silicon layer, thus forming n + Layer (sheet resistance 300Ω / □);

[0121] Step S0-2D: High-temperature crystallization: The silicon wafer obtained in step S0-2C is annealed in a nitrogen atmosphere at 900℃ for 30 minutes and then converted into polycrystalline silicon to obtain a composite layer of annealed SiO2 layer 82 and phosphorus-doped polycrystalline silicon layer 81, namely the front passivation contact layer 8; the deposition thickness of the front passivation contact layer 8 is controlled to be 80nm.

[0122] Step S0-3: Deposit the back passivation layer 10;

[0123] Structure: Al2O3 (10nm) / SiN x (90nm);

[0124] Step S0-3A: ALD deposition of Al2O3: Atomic layer deposition (ALD) is used to deposit tetramethylaluminum (TMA) and water on the second surface of the silicon wafer at a temperature of 150°C and a growth rate of 0.12 nm / cycle to form an Al2O3 layer 102, with the deposition thickness controlled to be 10 nm.

[0125] Step S0-3B: PECVD deposition of SiN4: Plasma-enhanced chemical vapor deposition (PECVD) is used to deposit SiH4 on the surface of the Al2O3 layer in a nitrogen atmosphere (SiH4 / NH3=1:3, RF power 300W, refractive index 2.05) to obtain SiN4 layer 101, with the deposition thickness controlled at 90nm; the composite layer of Al2O3 layer 102 and SiN4 layer 101 is the back passivation layer 10; the thickness of the back passivation layer 10 is 100nm.

[0126] Step S0-4: Deposit back electrode layer 11;

[0127] Process: Screen printing silver paste (line width 15μm);

[0128] Sintering: Peak temperature is 800℃ (chain furnace, N2 atmosphere), forming back electrode layer 11 with a controlled thickness of 20μm;

[0129] Steps S1-S2: Deposit a two-dimensional tunneling composite layer 7 (HfS2 / MoS2 heterojunction).

[0130] Equipment: Thermal Atomic Deposition System (ALD);

[0131] Step S1: React TEMAHf and H2S at the chamber temperature to obtain HfS2 material; set the cycle parameters: 100 pulses / purge for 0.3s; deposit the HfS2 material in the ALD on the surface of the front passivation contact layer 8 to obtain HfS2 layer 72, control the deposition time to be 15min, and the deposition thickness to be 2nm.

[0132] Step S2: (NtBu)2(NMe2)2Mo and H2S are reacted at a chamber temperature of 200℃ to obtain MoS2-2 material; the cycle parameters are set as follows: 150 pulses / purge for 0.5s; the MoS2-2 material is deposited on the surface of HfS2 layer 72 in ALD, and the deposition time is controlled to be 25min, and the deposition thickness is 3nm to obtain MoS2-2 layer 71;

[0133] Among them, HfS2 layer 72 and MoS2-2 layer 71 are combined to form tunneling composite layer 7; interlayer transfer is completed in a glove box (O2<0.1ppm, XPS verification S / (Mo+Hf) atomic ratio=2.0±0.1).

[0134] Step S3: Deposit hole transport layer 6 (HTL);

[0135] Structure: NiO / MoS2 composite layer;

[0136] Step S3-1: MoS2-1 material is deposited as a single layer by chemical vapor deposition (CVD) on the surface of MoS2-2 layer 71 to obtain MoS2-1 layer 62, with the deposition thickness controlled at 5nm;

[0137] Step S3-2: Spin-coating a NiO solution (NiO nanoparticles dissolved in deionized water or IPA, concentration 20 mg / mL) onto the surface of MoS2-1 layer 62 at 2000 rpm for 30 s, and annealing at 1000℃ for 10 min to obtain NiO layer 61 with a thickness of 15 nm; the composite layer of NiO layer 61 and MoS2-1 layer 62 is hole transport layer 6; the thickness of hole transport layer 6 is 20 nm.

[0138] In step S4, perovskite layer 5 is deposited:

[0139] (FA) 0.9 Cs 0.1 )Pb(I 0.75 Br 0.25 Material 3 (band gap of 1.68 eV) was spin-coated onto the surface of NiO layer 61 and annealed in a nitrogen atmosphere at 130℃ for 10 min, with the deposition thickness controlled to be 1 μm, to obtain perovskite layer 5;

[0140] In step S5, electron transport layer 4 is deposited:

[0141] Step S5-1: Fullerene C60 is vapor-deposited onto the surface of perovskite layer 5 to obtain fullerene layer 42 with a thickness of 20 nm.

[0142] Step S5-2: Tin oxide is vapor-deposited onto the surface of fullerene layer 42 to obtain tin oxide layer 41 with a thickness controlled at 20 nm; the composite layer of fullerene layer 42 and tin oxide layer 41 is electron transport layer 4.

[0143] Step S6: IZO is vapor-deposited onto the surface of electron transport layer 4 to form conductive layer 3, with a thickness controlled to be 100nm;

[0144] Step S7: Deposit a silver fine gate on the conductive layer 3 to form the top electrode layer 2, with a thickness controlled to be 100 nm;

[0145] Step S8: MgF2 material is vapor-deposited on the surface of the top electrode layer 2 to form an anti-reflection layer 1 with a thickness of 100 nm.

[0146] The perovskite A-TOPConB tandem solar cell obtained by the above preparation method has the following structure, stacked sequentially from the light-incident side to the back-light side: antireflection layer 1, top electrode layer 2, conductive layer 3, electron transport layer 4 (tin oxide layer 41, fullerene layer 42), perovskite layer 5, hole transport layer 6 (NiO layer 61, MoS2-1 layer 62), tunneling composite layer 7 (MoS2-2 layer 71, HfS2 layer 72), front passivation contact layer 8 (phosphorus-doped polycrystalline silicon layer 81, SiO2 layer 82), silicon substrate 9, back passivation layer 10 (SiN4 layer 101, Al2O3 layer 102), and back electrode layer 11; as shown above. Figure 1 As shown.

[0147] Example 2

[0148] The difference between Example 2 and Example 1 is that in step S1, the deposition time is controlled at 25 min and the thickness of the deposited HfS2 layer 72 is 3 nm; in step S2, the deposition time is controlled at 25 min and the thickness of the deposited MoS2-2 layer 71 is 3 nm; the total thickness of the tunneling composite layer 7 is 6 nm.

[0149] Example 3

[0150] The difference between Example 3 and Example 1 is that in step S1, the deposition time is controlled at 15 min and the thickness of the deposited HfS2 layer 72 is 2 nm; in step S2, the deposition time is controlled at 35 min and the thickness of the deposited MoS2-2 layer 71 is 4 nm; the total thickness of the tunneling composite layer 7 is 6 nm.

[0151] Example 4

[0152] The difference between Example 4 and Example 1 is that in step S3, the thickness of NiO layer 61 is controlled to be 17 nm; the thickness of MoS2-1 layer 62 is 3 nm; and the total thickness of hole transport layer 6 is 20 nm.

[0153] Example 5

[0154] The difference between Example 5 and Example 1 is that in step S3, the thickness of NiO layer 61 is controlled to be 13 nm; the thickness of MoS2-1 layer 62 is 7 nm; and the total thickness of hole transport layer 6 is 20 nm.

[0155] Example 6

[0156] A photovoltaic module, such as Figure 2 As shown, it includes:

[0157] The battery string 100 is formed by connecting five stacked batteries 1001 of any one of embodiments 1 to 5;

[0158] Connecting component 1002 is used to connect each of the stacked batteries 1001;

[0159] An encapsulating film is used to cover the surface of the battery string 100;

[0160] Cover plate 1003 is used to cover the surface of the encapsulating film away from the battery string 100.

[0161] Comparative Example 1

[0162] The difference between Comparative Example 1 and Example 1 is that the tunneling composite layer 7 in steps S1-S2 is replaced by depositing an ITO metal oxide layer on the surface of the front passivation contact layer 8, and depositing a hole transport layer 6 on the ITO surface; the other layer deposition steps are the same as in Example 1.

[0163] Performance testing:

[0164] The performance of the tandem batteries prepared in each embodiment and comparative example was tested, and the results are shown in Table 1.

[0165] (1) The transmittance of the tunnel composite layer 7 was tested using a spectrometer;

[0166] (2) The photoelectric conversion performance of the tandem solar cell was tested using an IV tester;

[0167] (3) Resistance loss was detected using a sheet resistance tester;

[0168] (4) The quantum tunneling probability was detected using a QE tester.

[0169] Table 1

[0170]

[0171] The results in Table 1 show that in the tandem solar cells prepared in the various embodiments of this application, the transmittance of the tunneling composite layer reaches 95%~98%, the quantum tunneling probability is 90%~95%, and the photoelectric conversion efficiency reaches 30.02%~31.20%. In contrast, Comparative Example 1, using conventional ITO tunneling material, exhibits weaker transmittance, quantum tunneling probability, and photoelectric conversion efficiency, resulting in lower overall efficiency. In comparison, this application shows improvements of 15%, 14%, and 1% respectively, and a reduction of 3.9% in resistance loss, demonstrating significant improvement. The novel composite tunneling layer MoS2 / HfS2 studied in this application, when applied to perovskite-crystalline silicon solar cells, exhibits excellent photoelectric effects.

[0172] By using the novel two-dimensional material composite tunneling composite layer MoS2 / HfS2 heterojunction provided in this application to replace the traditional metal oxide tunneling composite layer, a light transmittance of >95%, resistance loss of <0.5%, quantum tunneling probability of >90%, and photoelectric conversion efficiency of >30% can be achieved. This effectively promotes the efficient transport of charge carriers between different battery layers, realizes the effective separation and collection of charge, and significantly improves the photoelectric efficiency of perovskite-TOPCon tandem solar cells.

[0173] Those skilled in the art will understand that the above embodiments are specific examples of implementing this application, and in practical applications, various changes in form and detail can be made without departing from the spirit and scope of this application. Any person skilled in the art can make various alterations and modifications without departing from the spirit and scope of this application; therefore, the scope of protection of this application should be determined by the scope defined in the claims.

Claims

1. A stacked battery, characterized by comprising: The stack cell comprises a perovskite cell, a tunneling composite layer (7) and a TOPCon cell; the perovskite cell comprises a hole transport layer (6); The tunneling composite layer (7) is a composite layer of a MoS2-2 layer (71) and a HfS2 layer (72); the MoS2-2 layer (71) and the HfS2 layer (72) are stacked in a laminated manner; The MoS2-2 layer (71) is arranged between the hole transport layer (6) and the HfS2 layer (72).

2. The stacked battery of claim 1, wherein, The thickness of the HfS2 layer (72) is 1-3 nm.

3. The stacked battery of claim 1, wherein, The thickness of the MoS2-2 layer (71) is 2-4 nm.

4. The stacked battery of claim 1, wherein, The ratio of the number of Mo atoms in the MoS2-2 layer (71) to the number of Hf atoms in the HfS2 layer (72) is (1.9-2.1):

1.

5. The stacked battery according to any one of claims 1 to 4, characterized by, The thickness of the tunneling composite layer (7) is 3-7 nm; and / or, the light transmittance of the tunneling composite layer (7) is >95%.

6. The stacked battery according to any one of claims 1 to 4, characterized by The stack cell comprises a perovskite cell, a tunneling composite layer (7) and a TOPCon cell; the perovskite cell comprises a hole transport layer (6); 7. The stacked battery of claim 6, wherein, The MgF2 layer (1) has a thickness of 20-200 nm; The top electrode layer (2) is a silver electrode; the thickness of the top electrode layer (2) is 120 nm-1 μm; The thickness of the conductive layer (3) is 10-100 nm.

8. The stacked battery of claim 6, wherein, The electron transport layer (4) is a composite layer of a tin oxide layer (41) and a fullerene layer (42); the tin oxide layer (41) and the fullerene layer (42) are stacked in a laminated manner from the light entrance side to the back light side; the thickness of the tin oxide layer (41) is 1-20 nm; the thickness of the fullerene layer (42) is 5-30 nm.

9. The stacked battery of any one of claims 1 to 4, wherein, The hole transport layer (6) is a composite layer of a NiO layer (61) and a MoS2-1 layer (62); the NiO layer (61) and the MoS2-1 layer (62) are stacked in a laminated manner from the light entrance side to the back light side; the thickness of the hole transport layer (6) is 16-24 nm; the thickness of the NiO layer (61) is 13-17 nm; the thickness of the MoS2-1 layer (62) is 3-7 nm.

10. A method of producing the stacked cell according to any one of claims 1 to 9, characterized by, The preparation method comprises the following steps: Step S1: depositing a HfS2 material on the surface of the front passivation contact layer (8) of the TOPCon cell to obtain a HfS2 layer (72); Step S2: depositing a MoS2-2 material on the surface of the HfS2 layer (72) to obtain a MoS2-2 layer (71); the MoS2-2 layer (71) and the HfS2 layer (72) form a tunneling composite layer (7); Step S3: coating a hole transport material on the surface of the MoS2-2 layer (71) to obtain a hole transport layer (6) after annealing.

11. The method of claim 10, wherein the step of forming the stack of cells is performed by a method comprising: In the step S1, the HfS2 material is obtained by reaction I of TEMAHf and H2S in an atomic layer deposition system I; wherein the temperature of the reaction I is 180-220 ℃; the cycle parameters of the atomic layer deposition system I include: purging for 0.2-0.5 s with 80-120 pulses; and the deposition time is 5-25 min.

12. The method of claim 10, wherein the step of forming the stack of cells is performed by a method comprising: In the step S2, the MoS2-2 material is obtained by reaction II of (NtBu)2(NMe2)2Mo and H2S in an atomic layer deposition system II; wherein the temperature of the reaction II is 180-220 ℃; the cycle parameters of the atomic layer deposition system II include: purging for 0.3-0.7 s with 120-170 pulses; and the deposition time is 15-35 min.

13. The method of manufacturing a stacked battery of claim 10, wherein, In the step S3, the deposition process of the hole transport layer (6) includes: Chemical vapor deposition of a MoS2-1 material single layer on the surface of the MoS2-2 layer (71) to obtain a MoS2-1 layer (62); Spin coating of a NiO solution on the surface of the MoS2-1 layer (62) and annealing treatment at a temperature of 90-110 ℃ for 5-15 min to obtain a NiO layer (61); the composite layer of the NiO layer (61) and the MoS2-1 layer (62) is the hole transport layer (6); the thickness of the hole transport layer (6) is 16-24 nm; wherein the thickness of the NiO layer (61) is 13-17 nm; and the thickness of the MoS2-1 layer (62) is 3-7 nm.

14. The method of claim 13, wherein the method further comprises: The step S3 is followed by a step S4. The step S4: spin-coating a (FA 0.9 Cs 0.1 )Pb(I 0.75 Br 0.25 )3 material on the surface of the NiO layer (61), and annealing in a nitrogen atmosphere at a temperature of 100-150°C for 5-15 min to obtain a perovskite layer (5); And / or, the step S1 is preceded by a step S0. The step S0: depositing a front passivation material on the first surface of the silicon substrate (9) to obtain a front passivation contact layer (8).

15. A photovoltaic module, characterized by, It comprises: A battery string (100) connected by a plurality of the stacked batteries (1001) of any one of claims 1-9 or the stacked batteries (1001) prepared by the preparation method of any one of claims 10-14; A connecting component (1002) for connecting each of the stacked batteries (1001); An encapsulation adhesive film for covering the surface of the battery string; A cover plate (1003) for covering the surface of the encapsulation adhesive film away from the battery string.

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