Chip based on novel heat dissipation structure and manufacturing method

Abstract

The invention discloses a chip based on a novel heat dissipation structure and a manufacturing method. The chip comprises a chip body, a 3D heat dissipation channel layer integrated on the surface of the chip body and a micro-nano structure heat dissipation fin layer covering the outer surface of the 3D heat dissipation channel layer. The 3D heat dissipation channel layer is made of a graphene-carbon nanotube composite heat conduction material, honeycomb-shaped heat dissipation channels which are communicated with one another are formed in the 3D heat dissipation channel layer, the aperture of each honeycomb-shaped heat dissipation channel is 5-20 microns, and the thickness of the channel wall is 1-3 microns; the fin height of the micro-nano structure heat dissipation fin layer is 10-50 microns, the fin distance is 5-15 microns, and the surfaces of the fins are provided with nanoscale concave-convex texture.The manufacturing method is simple, heat can be rapidly and effectively transmitted to the external environment from the interior of the chip, the temperature of the chip in the working process can be reduced, the heat dissipation efficiency of the chip is improved, and the service life of the chip is prolonged. And the problem of performance reduction caused by over-high temperature can be reduced, and the chip can be ensured to efficiently operate in a stable temperature range.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of chip manufacturing, in particular to a chip based on a new heat dissipation structure and a manufacturing method. BACKGROUND

[0002] With the rapid iteration of semiconductor technology towards high integration and high operation speed, the power density of chips continues to rise, and the heat dissipation problem has become a core bottleneck restricting the performance release and service life of chips. Current mainstream chip heat dissipation schemes mostly rely on traditional metal heat dissipation fins, heat dissipation paste or simple two-dimensional planar heat dissipation structures. Such schemes have obvious limitations: on the one hand, the thermal conductivity of traditional metals (such as pure copper and pure aluminum) is limited, and it is difficult to quickly dissipate the high-density heat generated in the core area of the chip, resulting in heat accumulation inside the chip; on the other hand, the planar heat dissipation structure has a small contact area with the external environment, and the heat exchange efficiency is low. In high-temperature working scenarios such as 5G base stations, AI servers and automotive electronics, the chip is prone to trigger frequency reduction protection due to excessive temperature, significantly reducing the operation performance, and even causing serious faults such as chip burning and system downtime.

[0003] At the same time, the material compatibility and process adaptability of the existing heat dissipation structure are insufficient. Although some high-performance heat-conducting materials (such as single graphene sheets) have excellent heat-conducting performance, they have low bonding strength with the chip body and are prone to delamination and falling off. In addition, traditional photolithography processes are difficult to prepare internal heat dissipation channels with high precision and high permeability, resulting in a significant "bottleneck" in the heat transfer path. Furthermore, traditional heat dissipation fins are mostly micron-level structures with smooth surfaces, and the convective heat exchange efficiency with air is limited, which cannot meet the stringent demands of the new generation of high-power chips on heat dissipation speed and stability. Therefore, it is necessary to design a chip based on a new heat dissipation structure and a manufacturing method. SUMMARY

[0004] The present application aims to provide a chip based on a new heat dissipation structure and a manufacturing method to solve the problems raised in the background.

[0005] To achieve the above-mentioned purpose, the present application provides the following technical solution: a chip based on a new heat dissipation structure, comprising a chip body, a 3D stereoscopic heat dissipation channel layer integrated on the surface of the chip body, and a micro-nano structure heat dissipation fin layer covering the outer surface of the 3D stereoscopic heat dissipation channel layer. The 3D stereoscopic heat dissipation channel layer is made of a graphene-carbon nanotube composite heat-conducting material, and the 3D stereoscopic heat dissipation channel layer has a honeycomb-shaped heat dissipation channel inside, the pore size of the honeycomb-shaped heat dissipation channel is 5-20 μm, and the channel wall thickness is 1-3 μm. The fin height of the micro-nano structure heat dissipation fin layer is 10-50 μm, the fin spacing is 5-15 μm, and the fin surface is provided with a nano-level concave-convex texture.

[0006] Preferably, in the graphene-carbon nanotube composite heat-conducting material, the mass percentage of graphene is 30%-60%, and the mass percentage of carbon nanotube is 40%-70%, and the carbon nanotube is a multi-walled carbon nanotube.

[0007] Preferably, a transition adhesive layer is further arranged between the chip body and the 3D stereoscopic heat dissipation channel layer, the transition adhesive layer is made of titanium-nickel alloy, and the thickness is 0.1-0.5 μm.

[0008] Preferably, the material of the micro-nano structure heat dissipation fin layer is aluminum-copper alloy, the mass percentage of aluminum is 60%-80%, the mass percentage of copper is 20%-40%, and 0.1%-0.5% of rare earth element lanthanum is added to the alloy.

[0009] Preferably, a method based on a new heat dissipation structure chip comprises the following steps: A. Chip body pretreatment, plasma cleaning is performed on the surface of the semiconductor chip body to remove the surface oxide layer and impurities, the cleaning power is 100-300 W, and the cleaning time is 5-15 min; B. 3D stereoscopic heat dissipation channel layer preparation, graphene-carbon nanotube composite heat-conducting material is deposited on the surface of the pretreated chip body by chemical vapor deposition method, the deposition temperature is 800-1200℃, the deposition pressure is 5-20 Pa, and at the same time, a honeycomb-shaped heat dissipation channel is formed in the composite heat-conducting material layer through a photoetching process; C. Micro-nano structure heat dissipation fin layer preparation, micro-nano structure heat dissipation fins are prepared on the outer surface of the 3D stereoscopic heat dissipation channel layer by nano-imprint lithography technology, the imprint temperature is 150-250℃, the imprint pressure is 5-15 MPa, the imprint time is 30-120 s, and then nano-scale concave-convex textures are formed on the surface of the fins through a plasma etching process; D. Post-processing, annealing treatment is performed on the prepared chip, the annealing temperature is 400-600℃, the holding time is 30-60 min, and then surface passivation treatment is performed to form a SiO2 passivation layer with a thickness of 0.5-2 μm.

[0010] Preferably, the reaction gas used in the chemical vapor deposition method in step B is a mixed gas of methane and hydrogen, the volume percentage of methane is 5%-20%, the volume percentage of hydrogen is 80%-95%, and the gas flow is 50-200 sccm.

[0011] Preferably, the imprinting template used in the nanoimprint lithography in step C is a silicon-based template, the micro-nano structure on the surface of the template is complementary to the structure of the micro-nano structure heat dissipation fin layer, and the surface of the template is provided with an anti-sticking coating, the anti-sticking coating is a perfluorooctyltriethoxysilane coating, and the thickness is 5-20nm.

[0012] Preferably, the surface passivation treatment in step D adopts a plasma enhanced chemical vapor deposition method, the reaction gas is a mixed gas of tetraethoxysilane and oxygen, the volume ratio of tetraethoxysilane is 10%-30%, the volume ratio of oxygen is 70%-90%, the deposition temperature is 200-400 DEG C, and the deposition pressure is 10-50Pa.

[0013] Beneficial effects: In the application, the 3D three-dimensional heat dissipation channel layer adopts a graphene-carbon nanotube composite heat conductive material, and adopts a honeycomb-shaped channel penetrating each other, which not only utilizes the synergistic advantages of high in-plane thermal conductivity of graphene and high axial thermal conductivity of carbon nanotube, but also builds a multi-dimensional heat transfer path through the honeycomb structure, greatly shortens the heat transfer distance from the chip body to the outside; the micro-nano structure heat dissipation fin layer cooperates with the nano-scale concave-convex texture, greatly increases the heat dissipation surface area, and strengthens the convective heat exchange with air, and the double structures cooperatively realize rapid heat dissipation.

[0014] In the application, the titanium-nickel alloy transition bonding layer between the chip body and the 3D heat dissipation channel layer effectively improves the interlayer bonding strength and avoids the delamination risk in a high-temperature environment; the rare earth lanthanum element added in the aluminum-copper alloy fin layer optimizes the alloy microstructure and improves the high-temperature oxidation resistance.

[0015] The above description is only a summary of the technical solutions of the embodiments of the application, in order to more clearly understand the technical means of the embodiments of the application, the embodiments of the application can be implemented according to the content of the specification, and in order to make the above and other purposes, characteristics and advantages of the embodiments of the application more obvious and easy to understand, the following specific embodiments of the application are described BRIEF DESCRIPTION OF DRAWINGS

[0016] Fig. 1 It is a structural schematic diagram of the application; Fig. 2 It is a manufacturing method flowchart of the application. DETAILED DESCRIPTION

[0017] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the protection scope of the present application.

[0018] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs; the terminology used in the specification herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application; the use of the terms "including," "comprising," "having" and variations thereof in the specification and claims herein is intended to be broad and encompass the terms "consisting of" and "consisting essentially of" and variations thereof.

[0019] Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the application. The appearances of the phrase "in an embodiment" in various places in the specification are not necessarily all referring to the same embodiment, nor are they necessarily all directed to the same embodiment, or to a single alternative embodiment.

[0020] In addition, the terms "first", "second", and the like in the specification and claims of the present application or the above-described drawings are used to distinguish different objects, and are not used to describe a particular order, and can explicitly or implicitly include one or more of the features.

[0021] In order for those skilled in the art to better understand the solutions of the present application, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings.

[0022] Please refer to Figs. 1-2 The application discloses a chip based on a novel heat dissipation structure, which comprises a chip body 1, a 3D heat dissipation channel layer 2 integrated on the surface of the chip body 1 and a micro-nano structure heat dissipation fin layer 3 covering the outer surface of the 3D heat dissipation channel layer 2. The 3D heat dissipation channel layer 2 is made of graphene-carbon nanotube composite heat conduction material, and the 3D heat dissipation channel layer 2 is internally provided with honeycomb-shaped heat dissipation channels which are mutually through, the pore diameter of the honeycomb-shaped heat dissipation channels is 5-20 μm, and the channel wall thickness is 1-3 μm. The fin 4 height of the micro-nano structure heat dissipation fin layer 3 is 10-50 μm, the fin 4 spacing is 5-15 μm, and the fin 4 surface is provided with nano-level concave-convex textures.

[0023] The graphene-carbon nanotube composite heat-conducting material has graphene with a mass ratio of 30-60% and carbon nanotubes with a mass ratio of 40-70%, and the carbon nanotubes are multi-walled carbon nanotubes; the transition bonding layer 5 is further arranged between the chip body 1 and the 3D three-dimensional heat dissipation channel layer 2, the transition bonding layer 5 is made of titanium-nickel alloy, and has a thickness of 0.1-0.5 μm; the material of the micro-nano structure heat dissipation fin layer is aluminum-copper alloy, the mass ratio of aluminum is 60-80%, the mass ratio of copper is 20-40%, and 0.1-0.5% of rare earth element lanthanum is added to the alloy. In the application, the titanium-nickel alloy transition bonding layer between the chip body and the 3D heat dissipation channel layer effectively improves the interlayer bonding strength and avoids the risk of delamination in a high-temperature environment; the addition of the rare earth lanthanum element in the aluminum-copper alloy fin layer optimizes the microstructure of the alloy and improves the high-temperature oxidation resistance.

[0024] Embodiment one: The embodiment provides a chip based on a novel heat dissipation structure and a manufacturing method, and the specific steps are as follows: Chip body pretreatment A semiconductor chip with a model of TSMC N7 is selected as the chip body 1, and the surface thereof is treated by using a plasma cleaning device. The cleaning power is set to 100 W, and the cleaning time is 5 min. Through physical bombardment and chemical reaction of the plasma, the oxide layer and organic impurities on the surface of the chip are removed.

[0025] Preparation of 3D three-dimensional heat dissipation channel layer Material deposition: a graphene-carbon nanotube composite heat-conducting material is deposited on the surface of the pretreated chip body by using a chemical vapor deposition device. The mass ratio of graphene is 30%, and the mass ratio of multi-walled carbon nanotube is 70%. The reaction gas is a mixed gas of methane and hydrogen, the volume ratio of methane is 5%, the volume ratio of hydrogen is 95%, the gas flow is controlled to be 50 sccm, the deposition temperature is set to be 800 DEG C, the deposition pressure is maintained at 20 Pa, the deposition time lasts for 2 h, and a composite heat-conducting material layer with a thickness of 50 μm is formed.

[0026] Channel forming: a photoetching-etching process is adopted, a photoresist is used as a mask, a honeycomb channel pattern is formed through deep ultraviolet photoetching exposure, and a honeycomb heat dissipation channel that is mutually penetrated is etched out in the composite heat-conducting material layer by using an inductively coupled plasma etching technology, the channel aperture is controlled to be 5 μm, the channel wall thickness is 3 μm, and a 3D three-dimensional heat dissipation channel layer 2 is obtained.

[0027] Preparation of micro-nano structure heat dissipation fin layer Fin forming: using nano-imprint lithography technology, a silicon-based template with a release coating on the surface is selected to imprint an aluminum-copper alloy on the outer surface of the 3D stereoscopic heat dissipation channel layer. The imprint temperature is set to 150°C, the imprint pressure is 15MPa, and the imprint time is 120s, forming a preliminary fin structure with a fin height of 10μm and a fin spacing of 15μm.

[0028] Surface texturing: using plasma etching process, argon gas is used as etching gas to etch nano-scale concave-convex texture on the surface of the fin, obtaining micro-nano structure heat dissipation fin layer 3.

[0029] Post-processing Annealing treatment: the prepared chip is placed in a vacuum annealing furnace, the annealing temperature is set to 400°C, and the holding time is 60min, to eliminate interlayer stress and improve material crystallinity and bonding strength.

[0030] Surface passivation: using plasma enhanced chemical vapor deposition equipment, tetraethoxysilane and oxygen are used as reaction gas to deposit SiO2 passivation layer on the surface of the chip. The deposition temperature is controlled at 200°C, the deposition pressure is 50Pa, and the deposition time is 30min, forming a passivation layer with a thickness of 0.5μm, completing the chip fabrication.

[0031] After testing, the chip of the embodiment reduces the working temperature by 28°C under the power density of 100W / cm² compared with the traditional metal heat dissipation fin chip, and there is no delamination and oxidation phenomenon after continuous working for 72h.

[0032] Example two Another chip based on a new heat dissipation structure and a manufacturing method are provided, and the specific steps are as follows: Chip body pretreatment A domestic 14nm logic chip is selected as the chip body 1, which is treated by plasma cleaning equipment with a cleaning power of 200W and a cleaning time of 10min to completely remove the surface oxide layer and impurities. At the same time, a titanium-nickel alloy transition bonding layer 5 is deposited on the surface of the chip body by magnetron sputtering process, the atomic ratio of titanium and nickel in the alloy is 1:1, the layer thickness is 0.3μm, and the adhesion of the subsequent 3D stereoscopic heat dissipation channel layer is improved.

[0033] 3D stereoscopic heat dissipation channel layer preparation Material deposition: graphene-carbon nanotube composite heat-conducting material is deposited by CVD equipment, in which the mass fraction of graphene is 45% and the mass fraction of multi-walled carbon nanotube is 55%. The reaction gas is methane, the gas flow is 120sccm, the deposition temperature is 1000°C, the deposition pressure is 12Pa, and the deposition time is 1.5h, forming a composite heat-conducting material layer with a thickness of 60μm.

[0034] Channel forming: Adopting lithography-etching process, etching to form honeycomb-shaped heat dissipation channels, controlling channel aperture 12 pm, channel wall thickness 2 pm, obtaining 3D stereoscopic heat dissipation channel layer 2.

[0035] Micro-nano structure heat dissipation fin layer preparation Fin forming: Adopting nano-imprint lithography technology, selecting silicon-based template, imprinting aluminum-copper alloy, aluminum mass ratio 70%, copper mass ratio 30%, adding 0.3% mass ratio of rare earth lanthanum. Setting imprinting temperature 200℃, imprinting pressure 10MPa, imprinting time 60s, forming preliminary fin structure with fin height 30pm, fin spacing 10pm.

[0036] Surface texturing: Forming nanoscale concave-convex texture on the fin surface through plasma etching, obtaining micro-nano structure heat dissipation fin layer 3.

[0037] Post-processing Annealing treatment: Setting temperature of vacuum annealing furnace to 500℃, holding time 45min, eliminating stress.

[0038] Surface passivation: PECVD equipment deposits SiO2 passivation layer, reaction gas is tetraethoxysilane and oxygen, deposition temperature 300℃, deposition pressure 30Pa, deposition time 25min, forming passivation layer with thickness 1.2pm.

[0039] After testing, the chip in this embodiment reduces the working temperature by 32℃ under the power density of 120W / cm² compared with the traditional chip, and the interlayer bonding strength reaches 25MPa, meeting the long-term use requirements in high temperature environment.

[0040] Example three This embodiment provides a new heat dissipation structure chip suitable for high-power AI chip and a manufacturing method, and the specific steps are as follows: Chip body pretreatment Selecting GPU chip for AI training as chip body 1, adopting plasma cleaning equipment for treatment, cleaning power 300W, cleaning time 5min, ensuring surface cleanliness. At the same time, depositing titanium-nickel alloy transition adhesive layer 5, layer thickness 0.5pm, improving interlayer bonding stability.

[0041] 3D stereoscopic heat dissipation channel layer preparation Material deposition: CVD equipment deposits graphene-carbon nanotube composite heat conductive material, graphene mass ratio 60%, multi-walled carbon nanotube mass ratio 40%. Reaction gas is methane and hydrogen, gas flow 200sccm, deposition temperature 1200℃, deposition pressure 5Pa, deposition time 2.5h, forming high thermal conductivity composite layer with thickness 80pm.

[0042] Channel forming: honeycomb-shaped heat dissipation channels are prepared by a photolithography-etching process, the aperture is 20 microns, the channel wall thickness is 1 micron, the air flow efficiency in the channel is improved, and the heat transfer is accelerated.

[0043] Micro-nano structure heat dissipation fin layer preparation Fin forming: aluminum-copper alloy fins are prepared by nano-imprint lithography technology, the mass fraction of aluminum is 80%, the mass fraction of copper is 20%, 0.5% of rare earth lanthanum is added, the thickness of the silicon-based template anti-sticking coating is 20nm, the imprint temperature is 250℃, the imprint pressure is 5MPa, the imprint time is 30s, a dense fin structure with a fin height of 50 microns and a fin spacing of 5 microns is formed.

[0044] Surface texturing: nano concave-convex texture with a depth of 100-150nm is formed by plasma etching, which further expands the heat dissipation area.

[0045] Post-processing Annealing treatment: vacuum annealing temperature is 600℃, holding time is 30min, and the material thermal conductivity and interlayer bonding force are maximized.

[0046] Surface passivation: PECVD deposition of SiO2 passivation layer, tetraethoxysilane volume fraction is 30%, oxygen volume fraction is 70%, deposition temperature is 400℃, deposition pressure is 10Pa, deposition time is 20min, passivation layer with a thickness of 2 microns is formed, and the chip corrosion resistance is enhanced.

[0047] After testing, the chip in this embodiment can work stably at a temperature below 85℃ under a power density of 150W / cm², which is 35℃ lower than that of the traditional heat dissipation scheme, and the performance does not decay in the temperature cycle test of-40℃ to 150℃, which meets the high reliability requirements of AI servers.

[0048] In summary, in the present application, the 3D heat dissipation channel layer adopts graphene-carbon nanotube composite thermal conductive material, and adopts interpenetrating honeycomb channels, which not only utilizes the synergistic advantages of high in-plane thermal conductivity of graphene and high axial thermal conductivity of carbon nanotube, but also builds a multi-dimensional heat transfer path through the honeycomb structure, greatly shortening the heat transfer distance from the chip body to the outside; the micro-nano structure heat dissipation fin layer cooperates with the nano concave-convex texture, greatly increases the heat dissipation surface area, and strengthens the convective heat transfer with air, and the double structure cooperates to realize rapid heat dissipation.

[0049] The above-described embodiments are only used to illustrate the technical solutions of the present application, and not to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacements for part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A chip based on a novel heat dissipation structure, characterized in that: It includes a chip body (1), a 3D heat dissipation channel layer (2) integrated on the surface of the chip body (1), and a micro-nano structure heat dissipation fin layer (3) covering the outer surface of the 3D heat dissipation channel layer (2). The 3D heat dissipation channel layer (2) is made of graphene-carbon nanotube composite thermal conductive material. The 3D heat dissipation channel layer (2) has interconnected honeycomb heat dissipation channels inside. The pore size of the honeycomb heat dissipation channels is 5-20μm and the channel wall thickness is 1-3μm. The height of the fins (4) of the micro-nano structure heat dissipation fin layer (3) is 10-50μm, the spacing between the fins (4) is 5-15μm, and the surface of the fins (4) is provided with nano-level concave-convex texture.

2. The chip based on a novel heat dissipation structure according to claim 1, characterized in that: In the graphene-carbon nanotube composite thermal conductive material, the mass percentage of graphene is 30%-60%, the mass percentage of carbon nanotubes is 40%-70%, and the carbon nanotubes are multi-walled carbon nanotubes.

3. A chip based on a novel heat dissipation structure according to claim 1, characterized in that: A transition bonding layer (5) is provided between the chip body (1) and the 3D heat dissipation channel layer (2). The transition bonding layer (5) is made of titanium-nickel alloy and has a thickness of 0.1-0.5μm.

4. A chip based on a novel heat dissipation structure according to claim 1, characterized in that: The micro / nano structure heat dissipation fin layer is made of an aluminum-copper alloy, wherein the mass percentage of aluminum is 60%-80%, the mass percentage of copper is 20%-40%, and the alloy contains 0.1%-0.5% by mass of the rare earth element lanthanum.

5. A method for fabricating the chip based on the novel heat dissipation structure as described in claim 1, characterized in that: Includes the following steps: A. Chip body pretreatment: Plasma cleaning is performed on the surface of the semiconductor chip body to remove the surface oxide layer and impurities. The cleaning power is 100-300W and the cleaning time is 5-15min. B. Preparation of 3D heat dissipation channel layer: Graphene-carbon nanotube composite thermal conductive material is deposited on the pretreated chip surface using chemical vapor deposition at a temperature of 800-1200℃ and a pressure of 5-20Pa. At the same time, honeycomb heat dissipation channels are formed in the composite thermal conductive material layer through photolithography-etching process. C. Fabrication of micro-nano structure heat dissipation fins: Micro-nano structure heat dissipation fins are fabricated on the outer surface of the 3D heat dissipation channel layer using nanoimprint lithography. The imprinting temperature is 150-250℃, the imprinting pressure is 5-15MPa, and the imprinting time is 30-120s. Subsequently, nanoscale concave-convex textures are formed on the fin surface through plasma etching. D. Post-processing: The prepared chip is annealed at a temperature of 400-600℃ for 30-60 minutes. Then, surface passivation is performed to form a SiO2 passivation layer with a thickness of 0.5-2μm.

6. The method for a chip based on a novel heat dissipation structure according to claim 5, characterized in that: In step B, the chemical vapor deposition method uses a mixture of methane and hydrogen as the reaction gas, wherein the volume percentage of methane is 5%-20%, the volume percentage of hydrogen is 80%-95%, and the gas flow rate is 50-200 sccm.

7. The method for a chip based on a novel heat dissipation structure according to claim 5, characterized in that: In step C, the nanoimprint lithography technique uses a silicon-based template. The micro-nano structure on the template surface is complementary to the structure of the micro-nano structure heat dissipation fin layer. The template surface is provided with an anti-stick coating, which is a perfluorooctyltriethoxysilane coating with a thickness of 5-20 nm.

8. The method for a chip based on a novel heat dissipation structure according to claim 5, characterized in that: In step D, the surface passivation treatment is performed using plasma-enhanced chemical vapor deposition. The reaction gas is a mixture of tetraethoxysilane and oxygen, with the volume percentage of tetraethoxysilane being 10%-30% and the volume percentage of oxygen being 70%-90%. The deposition temperature is 200-400℃ and the deposition pressure is 10-50Pa.

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