Display module and display device

Abstract

The invention discloses a display module and a display device. The display module comprises a silicon-based display panel (11) and a first driving chip (12), the first driving chip (12) at least comprises a time sequence control logic circuit (121); the first driving chip (12) is arranged to convert image data into digital signals; the silicon-based display panel (11) is electrically connected with the first driving chip (12); the silicon-based display panel (11) at least comprises a driving circuit (111) and pixel circuits (112) arranged in an array; the driving circuit (111) is arranged to drive the pixel circuit (112) according to the digital signal; the silicon-based display panel (11) and the first driving chip (12) are different in technological process; the precision of the technological process of the first driving chip (12) is higher than that of the technological process of the silicon-based display panel (11).

Description

Technical Field

[0001] This application relates to the field of display technology, such as display modules and display devices. Background Technology

[0002] Silicon-based organic light-emitting diode (OLED) microdisplays differ from conventional displays. They are primarily used in portable display devices such as augmented reality / virtual reality (AR / VR) glasses. For the same high-resolution display requirements, their pixel size is significantly smaller than that of traditional display devices. Furthermore, the smaller overall size allows for a much higher degree of integration and precision in logic modules such as driving circuits and timing control circuits compared to the logic control modules of traditional displays.

[0003] However, as people's demands for display quality and immersive near-eye displays increase, the logic functions in driver chips are becoming more complex, and the amount of data they process is also increasing. To match the row and column driving characteristics of pixel circuits, driver chips are generally designed in a flat and elongated shape. This limits the design of logic functions, leading to additional resource and area consumption. Summary of the Invention

[0004] This application provides a display module and display device to provide a highly integrated and low-cost microdisplay.

[0005] This application provides a display module, including: a silicon-based display panel and a first driver chip; the first driver chip includes timing control logic circuitry; the first driver chip is configured to convert image data into digital signals; the silicon-based display panel is electrically connected to the first driver chip; the silicon-based display panel includes a driving circuit and an array of pixel circuits; the driving circuit is configured to drive the pixel circuits according to the digital signals; the silicon-based display panel and the first driver chip have different process technologies; the process technology of the first driver chip has a higher precision than that of the silicon-based display panel.

[0006] This application also provides a display device, which includes the display module described above. Attached Figure Description

[0007] Figure 1 This is a schematic diagram of the structure of a display module in related technologies;

[0008] Figure 2 This is a schematic diagram of the structure of a display module provided in an embodiment of this application;

[0009] Figure 3This is a schematic diagram of another display module provided in an embodiment of this application;

[0010] Figure 4 This is a schematic diagram of another display module provided in an embodiment of this application;

[0011] Figure 5 This is a schematic diagram of another display module provided in an embodiment of this application;

[0012] Figure 6 for Figure 5 A schematic diagram of the surface structure of the first and second sides of the display module;

[0013] Figure 7 This is a schematic diagram of another display module provided in an embodiment of this application;

[0014] Figure 8 for Figure 7 A schematic diagram of the surface structure of the first side of the silicon-based display panel and the first driver chip;

[0015] Figure 9 This is a schematic diagram of another display module provided in an embodiment of this application;

[0016] Figure 10 This is a schematic diagram of the structure of a display device provided in an embodiment of this application. Detailed Implementation

[0017] To achieve the required high resolution and refresh rate, silicon-based OLED microdisplay products typically fabricate the display driving circuitry and pixel circuitry separately, then bond them together onto a single-crystal silicon wafer. Figure 1 As shown, Figure 1This is a schematic diagram of the structure of a display module in the related art. In the related art, the display module includes pixel circuits 12' and display driving circuits 11'. For example, the arrayed pixel circuits 12' are fabricated separately, and the display driving circuit 11' includes row driving chips 112' and column driving chips 111'. The row driving chip 112' is configured to scan the pixel circuits 12' row by row, and the column driving chip 111' is configured to provide data signals to multiple columns of pixel circuits 12' during each row scan time. Since the row driving chip 112' and the column driving chip 111' can be fabricated separately, the fabricated pixel circuits 12', row driving chips 112', and column driving chips 111' need to be bonded to a single-crystal silicon wafer 100' to form a highly integrated display module. However, as people's requirements for display effects and immersive near-eye displays increase, the logic functions in the display driving circuit 11' become increasingly complex, and the amount of data processed also increases. To match the row and column driving characteristics of the pixel circuit 12', the row driver chip 112' and column driver chip 111' are generally designed as elongated shapes, occupying a large area on the monocrystalline silicon wafer 100', resulting in additional resource and area consumption. The smaller monocrystalline silicon wafer 100' cannot accommodate the complex logic of the display driver circuit 11', which also limits the design of the logic functions and increases the cost of display performance in silicon-based OLED microdisplay products.

[0018] This application provides a display module, such as... Figure 2 As shown, Figure 2 A schematic diagram of a display module provided in this application embodiment includes: a silicon-based display panel 11 and a first driver chip 12; the first driver chip 12 includes at least a timing control logic circuit 121; the first driver chip 12 is configured to convert image data into digital signals; the silicon-based display panel 11 is electrically connected to the first driver chip 12; the silicon-based display panel 11 includes at least a driver circuit 111 and an array of pixel circuits 112; the driver circuit 111 is configured to drive the pixel circuits 112 according to the digital signals; the silicon-based display panel 11 and the first driver chip 12 have different process technologies; the process technology precision of the first driver chip 12 is higher than that of the silicon-based display panel 11.

[0019] In this embodiment, the display module includes a silicon-based display panel and a first driving chip. The first driving chip includes at least a timing control logic circuit configured to convert image data into digital signals; the silicon-based display panel includes an array of pixel circuits and a driving circuit for driving the pixel circuits, the driving circuit being able to drive the pixel circuits according to the data signals. In this embodiment, the silicon-based display panel and the first driving chip are designed and integrated separately, allowing them to use different process technologies. The silicon-based display panel can use a lower-precision process technology to save manufacturing costs, while the first driving chip can use a higher-precision process technology to accelerate data processing speed, improve performance, and effectively reduce chip area, meeting the requirements for small and lightweight design, thereby achieving a microdisplay with high integration and low cost.

[0020] refer to Figure 2The display module includes two chips: a silicon-based display panel 11 and a first driver chip 12. The first driver chip 12 is configured to convert image data acquired from external devices or a central processing unit (CPU) into digital signals recognizable by the silicon-based display panel 11. The first driver chip 12 includes at least a timing controller (TCON) circuit 121, which processes the image data to convert it into digital image data (digital signals). For example, the timing controller circuit 121 may include a logic unit 1211 and a storage unit 1212. The logic unit 1211 may consist of modules such as a timing generator, a comparator, and a fully digital correction circuit, and the timing control signals it generates will serve as the control signals for the entire digital logic of the first driver chip 12. The storage unit 1212 can record and store the aforementioned control signals. The silicon-based display panel 11 integrates a driving circuit 111 and an array of pixel circuits 112. The driving circuit 111 can sequentially drive the pixel circuits 112 according to the aforementioned digital signals, so that the pixel circuits 112 generate driving current. The silicon-based display panel 11 is also provided with light-emitting elements electrically connected to the pixel circuits 112. The light-emitting elements can be light-emitting diodes. In this embodiment, the light-emitting elements can be OLEDs, micro-LEDs, and mini-LEDs, etc. The type of light-emitting element is not limited in this embodiment. The driving current generated by the pixel circuits 112 can drive the corresponding light-emitting elements to emit light. For example, the light-emitting elements can include red light-emitting elements, green light-emitting elements, blue light-emitting elements, and white light-emitting elements, etc., so the display module can display the corresponding display screen according to the image data. The driving circuit 111 can include a row driving circuit 111a and a column driving circuit 111b. The row driving circuit 111a is configured to scan the pixel circuits 112 row by row, and the column driving circuit 111b can write the corresponding data signal to multiple pixel circuits 112 when the corresponding row of pixel circuits 112 is scanned.

[0021] In this embodiment, the silicon-based display panel 11 and the first driver chip 12 are each separately configured, allowing for flexible selection of their fabrication processes. Compared to related technologies where the driver circuit is bonded to a single-crystal silicon wafer after fabrication, this embodiment integrates the driver circuit 111 and pixel circuit 112 simultaneously on the silicon-based display panel 11 using a first process, while integrating the timing control logic circuit 121 separately on the first driver chip 12 using a second process. For the silicon-based display panel 11, the lower-precision first process can be used, significantly reducing fabrication costs. For the first driver chip 12, due to its high data processing speed and small size limitations, a higher-precision second process can be used, achieving faster data processing speeds with a smaller chip size, improving the performance of the display module, and saving the area occupied by the first driver chip 12. This meets the requirements of a small and lightweight display module, achieving a highly integrated and low-cost microdisplay. This embodiment avoids using a single high-precision chip fabrication process for the timing control logic circuit, driver circuit, and array-arranged pixel circuit, effectively reducing chip fabrication costs.

[0022] The first driver chip 12 may further include at least one of the following: an I / O interface, a data processor, a register, a row driver, and a cathode voltage generator. The data processor is electrically connected to the timing control logic circuit 121 and includes functional modules such as a color conversion circuit, a contrast adjustment circuit, and a GAMMA correction circuit. It is configured to process image data input from external devices, and the processed image data can be transmitted to the row driver, which then transmits digital switch control signals to the driving circuit 111 of the silicon-based display panel 11. The I / O interface is electrically connected to the timing control logic circuit 121 and is configured to communicate with external devices to control the display module. The cathode voltage generator generates the negative voltage required by the light-emitting elements and inputs it to the silicon-based display panel 11. The entire display module is controlled by the digital logic control signals generated by the timing control logic circuit 121 in the first driver chip 12. The register is electrically connected to the aforementioned functional modules in the first driver chip 12. In this embodiment, image data transmission and other electronic components of the peripheral circuits can be integrated into the first driver chip 12, improving the integration of the display module.

[0023] In this embodiment, the higher the precision of the process technology, the smaller the precision level value. The precision level characterizes the minimum etching range achievable by the process technology. For example, if the precision level of the chip's process technology is 3nm, then its process technology can be accurate to 3nm. The precision level of the process technology of the first driver chip 12 can be less than or equal to 40nm; the precision level of the process technology of the silicon-based display panel 11 can be greater than or equal to 90nm. Therefore, for the silicon-based display panel 11 with lower precision requirements, it adopts a first process technology with lower precision (larger precision level value), and for the first driver chip 12 with higher precision requirements, it adopts a second process technology with higher precision (smaller precision level value). Thus, the first driver chip 12 and the silicon-based display panel 11 adopt process technologies with significantly different precision levels, which can effectively reduce chip manufacturing costs while meeting the requirement of high integration of the display module. The precision level of the process technology of the first driver chip 12 can be 22nm; the precision level of the process technology of the silicon-based display panel 11 can be 90nm. Compared to traditional display devices, this embodiment integrates a separate timing control logic circuit 121, allowing for flexible selection of the process technology for the silicon-based display panel 11 and the first driver chip 12. The silicon-based display panel 11 can be fabricated using a lower process (e.g., 90nm), which can significantly reduce costs. For the first driver chip 12, due to limitations in data processing speed and size, a higher process (e.g., 22nm) can be used to improve performance and save area.

[0024] Continue to refer to Figure 2 The display module may further include: a signal interface configured to transmit digital signals output by the first driver chip 12 to the silicon-based display panel 11; a first terminal 31 of the signal interface is disposed on the silicon-based display panel 11; and a second terminal 32 of the signal interface is disposed on the first driver chip 12. The first terminal 31 and the second terminal 32 may be electrically connected through multiple signal lines.

[0025] As can be seen from the above embodiments, the silicon-based display panel 11 and the first driver chip 12 adopt different process technologies, which can realize a display module with high integration and low cost. Furthermore, this embodiment can choose a more flexible packaging method. The different packaging methods are described in detail below:

[0026] refer to Figure 2 , Figure 2A packaging method for a display module is provided. The display module may further include: a first printed circuit board 13; the silicon-based display panel 11 and the first driver chip 12 are both bonded to a first side of the first printed circuit board 13. In this embodiment, after the silicon-based display panel 11 has completed its manufacturing process and been independently packaged, and after the first driver chip 12 has completed its manufacturing process and been independently packaged, the two packaged independent chips are bonded to the first printed circuit board 13. The printed circuit board (PCB), also known as a printed circuit board, is the carrier that supports the electrical interconnection between the silicon-based display panel 11 and the first driver chip 12. The first printed circuit board 13 is a rigid support board with high strength. Figure 2 As shown, in this embodiment, the silicon-based display panel 11 and the first driving chip 12 can be disposed on the same side of the first printed circuit board 13, which is referred to as the first side in this embodiment.

[0027] The silicon-based display panel 11 and the first driver chip 12 can be electrically connected via a first internal trace 131 on the first printed circuit board 13. The first internal trace 131 is a trace parallel to the first side surface of the first printed circuit board 13. Since the silicon-based display panel 11 and the first driver chip 12 are bonded to the same side (first side) of the first printed circuit board 13, the first internal trace 131 is a trace parallel to the first side surface of the first printed circuit board 13. For example, image data output by the first driver chip 12 can be transmitted to the silicon-based display panel 11 in the form of digital signals via multiple high-speed differential lines. The silicon-based display panel 11 first processes the transmitted high-speed digital signals, and then controls the driving voltage of the pixel circuit 112 array through the driving circuit 111 (such as row driving circuit 111a and column driving circuit 111b) on the silicon-based display panel 11, thereby illuminating the light-emitting elements and displaying an image. If the display module also includes a signal interface, the first terminal 31 of the signal interface is disposed on the silicon-based display panel 11, and the second terminal 32 of the signal interface is disposed on the first driver chip 12. The first terminal 31 and the second terminal 32 can be electrically connected through multiple first internal traces 131. The signal interface can be a high-speed interface for receiving image data, such as a Low-Voltage Differential Signaling (LVDS) interface. The high-speed interface can reduce the number of signal traces (first internal traces 131) between the silicon-based display panel 11 and the first driver chip 12. The number of first internal traces 131 can be flexibly adjusted according to different data transmission rates. On the other hand, it can improve the data transmission rate and enhance the signal anti-interference capability.

[0028] Continue to refer to Figure 2The first printed circuit board 13 may also be bonded to a data receiving circuit 21 and a power supply circuit 22. The power supply circuit 22 is configured to provide power to the display module. The data receiving circuit 21 is configured to receive external image data. The data receiving circuit 21 is configured to input external image data to the first driver chip 12, so that the row driver in the first driver chip 12 transmits digital signals to the silicon-based display panel 11, so that the driver circuit 111 of the silicon-based display panel 11 performs digital-to-analog conversion or voltage conversion on the digital signals to drive the pixel circuit 112. In this embodiment, the data receiving circuit 21 and the power supply circuit 22 can be directly bonded to the first side of the first printed circuit board 13 to prevent the data receiving circuit 21 and the power supply circuit 22 from being located on the first driver chip 12, which would increase the manufacturing cost. Therefore, the data receiving circuit 21 and the power supply circuit 22 can be manufactured using a lower precision process, thereby reducing the manufacturing cost of the first driver chip 12 and even the entire display module. In this embodiment, both the bonding process between the silicon-based display panel 11 and the first printed circuit board 13, and the bonding process between the first driver chip 12 and the first printed circuit board 13, can be achieved through wire bonding. The bonded devices are then connected via the first internal trace 131 of the first printed circuit board 13. The display module in this embodiment is suitable for low-cost, high-resolution displays in VR products. The discrete fabrication of the silicon-based display panel 11 and the first driver chip 12 allows the first driver chip 12 to accept more complex image data, thereby supporting higher pixel density, image quality, and functionality.

[0029] Figure 3 This is a schematic diagram of another display module provided in an embodiment of this application. Figure 3Another packaging method for the display module is provided. The display module may further include: a first flexible circuit board 14; the silicon-based display panel 11 and the first driving chip 12 are both bonded to a first side of the first flexible circuit board 14. In this embodiment, after the silicon-based display panel 11 has completed its process and been independently packaged, and after the first driving chip 12 has completed its process and been independently packaged, the two packaged independent chips are bonded to the first flexible circuit board 14. A flexible printed circuit board (FPC) is a highly reliable and extremely flexible printed circuit board made with polyimide or polyester film as the substrate, characterized by high wiring density, light weight, thinness, and good bending properties. The silicon-based display panel 11 and the first driving chip 12 can both be disposed on the first side (same side) of the first flexible circuit board 14. In this embodiment, due to the soft and rollable characteristics of the first flexible circuit board 14, a portion of the first driving chip 12 of the first flexible circuit board 14 can be bent appropriately above / below the silicon-based display panel 11 as needed, thereby reducing the horizontal circuit area occupied by the entire display module. This meets the important indicators of miniaturization and lightweighting in portable near-eye display devices, thereby achieving a micro-display with high integration and low cost.

[0030] Continue to refer to Figure 3 The silicon-based display panel 11 and the first driving chip 12 can be electrically connected via a second internal trace 141 of the first flexible circuit board 14; the second internal trace 141 is a trace parallel to the first side surface of the first flexible circuit board 14. Since the silicon-based display panel 11 and the first driving chip 12 are bonded to the same side (first side) of the first flexible circuit board 14, the second internal trace 141 is a trace parallel to the first side surface of the first printed circuit board 13. If the display module also includes a signal interface, the first terminal 31 of the signal interface is disposed on the silicon-based display panel 11; the second terminal 32 of the signal interface is disposed on the first driving chip 12. The first terminal 31 and the second terminal 32 can be electrically connected via multiple second internal traces 141. The signal interface can be a high-speed interface for receiving image data, such as an LVDS interface. The high-speed interface reduces the number of signal traces (second internal traces 141) between the silicon-based display panel 11 and the first driver chip 12. The number of second internal traces 141 can be flexibly adjusted according to different data transmission rates. It also increases the data transmission rate and improves signal anti-interference capabilities. When the first flexible circuit board 14 needs to be bent, it can be bent at the location of the second internal traces 141 to reduce the horizontal circuit area occupied by the entire display module.

[0031] Continue to refer to Figure 3The first flexible circuit board 14 can also be bonded with a data receiving circuit 21 and a power supply circuit 22; the power supply circuit 22 is configured to provide power to the display module; the data receiving circuit 21 is configured to receive external image data. In this embodiment, the data receiving circuit 21 and the power supply circuit 22 can be directly bonded to the first side of the first flexible circuit board 14 to prevent the data receiving circuit 21 and the power supply circuit 22 from being located on the first driver chip 12, which would increase the manufacturing cost. Therefore, the data receiving circuit 21 and the power supply circuit 22 can be manufactured using a lower precision process, thereby reducing the manufacturing cost of the first driver chip 12 and even the entire display module. In this embodiment, both the bonding process between the silicon-based display panel 11 and the first flexible circuit board 14, and the bonding process between the first driver chip 12 and the first flexible circuit board 14, can be bonded by wire bonding, and the two bonded structures are connected by the second internal wiring 141 of the first flexible circuit board 14. The display module in this embodiment is suitable for low-cost, high-resolution displays for VR products. The separate fabrication of the silicon-based display panel 11 and the first driver chip 12 allows the first driver chip 12 to accept more complex image data, thereby supporting higher pixel density, image quality and functionality.

[0032] Figure 4 This is a schematic diagram of another display module provided in an embodiment of this application. Figure 4Another packaging method for the display module is provided. The display module may further include: a second printed circuit board 15 and a second flexible circuit board 16; a silicon-based display panel 11 is bonded to the second printed circuit board 15; and a first driver chip 12 is bonded to and packaged on the second flexible circuit board 16. This embodiment further improves the integration of the display module. The display module includes a second printed circuit board 15 and a second flexible circuit board 16. The silicon-based display panel 11 is integrated separately on the second printed circuit board 15, and the first driver chip 12 is integrated separately on the second flexible circuit board 16. The rigid second printed circuit board 15 can provide reliable support for the silicon-based display panel 11, improving the display stability of the silicon-based display panel 11. The flexible second flexible circuit board 16 can bend the first driver chip 12 to the side of the second printed circuit board 15 away from the silicon-based display panel 11, improving the placement flexibility of the first driver chip 12. The second flexible circuit board 16 may be provided with a bending area 162 to achieve a display module with a smaller lateral area of ​​the circuit. The silicon-based display panel 11 is packaged and then bonded to the second printed circuit board 15, for example, via wire bonding. The first driver chip 12, during its fabrication, can be directly packaged onto the second flexible circuit board 16 using the second flexible circuit board 16 as the packaging substrate, further reducing packaging costs. For example, the first driver chip 12 can be directly assembled onto the second flexible circuit board 16 using tape-automated bonding (TAB) technology. The second flexible circuit board 16 serves both as a support for the first driver chip 12 and as leads connecting the first driver chip 12 to peripheral circuits. For example, the second flexible circuit board 16 can also be bonded to a data receiving circuit 21 and a power supply circuit 22; the first driver chip 12 is electrically connected to the data receiving circuit 21 and the power supply circuit 22 respectively through internal traces of the second flexible circuit board 16.

[0033] Continue to refer to Figure 4The silicon-based display panel 11 and the first driving chip 12 can be electrically connected via a third internal trace 161 of the second flexible circuit board 16. The third internal trace 161 is a trace parallel to the first side surface of the second flexible circuit board 16. The third internal trace 161 can be disposed in the aforementioned bending area 162. Since the silicon-based display panel 11 and the first driving chip 12 are bonded to the same side (first side) of the second flexible circuit board 16, the third internal trace 161 is a trace parallel to the first side surface of the first printed circuit board 13. If the display module also includes a signal interface, the first terminal 31 of the signal interface is disposed on the silicon-based display panel 11, and the second terminal 32 of the signal interface is disposed on the first driving chip 12. The first terminal 31 and the second terminal 32 can be electrically connected via multiple third internal traces 161. The signal interface can be a high-speed interface for receiving image data, such as an LVDS interface. The high-speed interface reduces the number of signal traces (third internal traces 161) between the silicon-based display panel 11 and the first driver chip 12. The number of third internal traces 161 can be flexibly adjusted according to different data transmission rates. It also increases the data transmission rate and improves signal anti-interference capabilities. When the second flexible circuit board 16 needs to be bent, it can be bent at the location of the third internal traces 161 to reduce the horizontal circuit area occupied by the entire display module.

[0034] Figure 5 This is a schematic diagram of another display module provided in an embodiment of this application. Figure 6 for Figure 5 The diagram shows the surface structure of the first and second sides of the display module. Figure 5 This provides another packaging method for the display module. Figure 6The circuit structure on both sides after encapsulation is shown. The display module may further include: a third printed circuit board 17; a silicon-based display panel 11 bonded to a first side of the third printed circuit board 17; and a first driver chip 12 bonded to a second side of the third printed circuit board 17 opposite to the first side. To further reduce the lateral area occupied by the display module, in this embodiment, after the silicon-based display panel 11 and the first driver chip 12 are independently fabricated and packaged through different process technologies, they are both bonded to the same printed circuit board. The third printed circuit board 17 is obtained, and the silicon-based display panel 11 is bonded to the first side of the third printed circuit board 17, and the first driver chip 12 is bonded to the second side of the third printed circuit board 17. Since the first side and the second side are opposite sides, in this embodiment, the discrete first driver chip 12 and silicon-based display panel 11 reuse the lateral area of ​​the display module, further increasing the integration of the display module. Furthermore, for the silicon-based display panel 11, a first process with lower precision can be used, thereby greatly saving manufacturing costs; for the first driver chip 12, due to its high data processing speed and small size limitations, a second process with higher precision can be used, achieving faster data processing speed with a smaller chip size, improving the performance of the display module, and saving the area occupied by the first driver chip 12, meeting the requirements of a small and lightweight display module, and realizing a micro-display with high integration and low cost.

[0035] Continue to refer to Figure 5The silicon-based display panel 11 and the first driver chip 12 can be electrically connected through a fourth internal trace 171 of the third printed circuit board 17. The fourth internal trace 171 is a trace that passes through the third printed circuit board 17 in a direction perpendicular to the first side surface of the third printed circuit board 17. In this embodiment, only one rigid third printed circuit board 17 is provided, and the packaged silicon-based display panel 11 is placed on the first side of the third printed circuit board 17, and the packaged first driver chip 12 is placed on the second side of the third printed circuit board 17. Then, in the direction perpendicular to the first side surface of the third printed circuit board 17, the silicon-based display panel 11 and the first driver chip 12 overlap, that is, the silicon-based display panel 11 and the first driver chip 12 reuse the lateral area. The silicon-based display panel 11 and the first driver chip 12 are electrically connected through the fourth internal trace 171 passing through the third printed circuit board 17. If the display module also includes a signal interface, the first terminal 31 of the signal interface is provided on the silicon-based display panel 11, and the second terminal 32 of the signal interface is provided on the first driver chip 12. The first terminal 31 and the second terminal 32 can be electrically connected through multiple fourth internal traces 171. Since the lateral width of the silicon-based display panel 11 and the first driver chip 12 is much greater than their vertical height, this embodiment significantly reduces the lateral area by stacking them vertically, without increasing the additional vertical area. Simultaneously, image data transmission between the two is accomplished through the fourth internal traces 171 within the third printed circuit board 17. Compared to a horizontally tiled layout, the signal traces between the first terminal 31 and the second terminal 32 in this embodiment are shorter, effectively reducing transmission delays for high-speed image data transmission and improving performance.

[0036] Continue to refer to Figure 6 The third printed circuit board 17 can also be fitted with a data receiving circuit 21 and a power supply circuit 22; the power supply circuit 22 is configured to provide power to the display module; the data receiving circuit 21 is configured to receive external image data. The data receiving circuit 21 and the power supply circuit 22 can be fitted to the second side of the third printed circuit board 17. Since the first driving chip 12 occupies a smaller lateral area than the silicon-based display panel 11, there is sufficient space on the second side of the third printed circuit board 17 to accommodate the data receiving circuit 21 and the power supply circuit 22, thereby improving the integration of the entire display module and realizing a microdisplay with high integration and low cost.

[0037] Figure 7 This is a schematic diagram of another display module provided in an embodiment of this application. Figure 8 for Figure 7A schematic diagram of the surface structure of the silicon-based display panel and the first side of the first driving chip. The display module may further include: a first packaging substrate 18; a first driving chip 12 disposed on the first side of the first packaging substrate 18; and a silicon-based display panel 11 disposed on the side of the first driving chip 12 away from the first packaging substrate 18. Compared with the above-mentioned display module packaging design, this embodiment directly achieves the packaging of the display module through three-dimensional (3D) packaging, further reducing the lateral area occupied by the circuit of the display module. In this embodiment, the first packaging substrate 18 is obtained, and the first driving chip 12 and the silicon-based display panel 11 are sequentially stacked on the first side of the first packaging substrate 18. The side of the silicon-based display panel 11 with the light-emitting element is disposed away from the first driving chip 12, so that the packaging mode of this embodiment does not affect the normal display of the display side of the silicon-based display panel 11. In this embodiment, the silicon-based display panel 11 and the first driving chip 12 are manufactured using different process technologies. The silicon-based display panel 11 can employ a lower-precision process technology to save on manufacturing costs, while the first driving chip 12 can be manufactured using a higher-precision process technology to accelerate data processing, improve performance, and effectively reduce chip area, meeting the requirements for small and lightweight design. This results in a microdisplay with high integration and low cost. Furthermore, the separate first driving chip 12 and silicon-based display panel 11 reuse the lateral area, further reducing the lateral area occupied by the display module and enabling 3D packaging of the display module, which better meets the integration requirements of VR products.

[0038] Continue to refer to Figure 7A first metal bump 113 may be provided on the side of the silicon-based display panel 11 near the first driving chip 12; a second metal bump 121 may be provided on the side of the first driving chip 12 near the silicon-based display panel 11; the first metal bump 113 and the second metal bump 121 are electrically connected to transmit the digital signal output by the first driving chip 12 to the silicon-based display panel 11. In this embodiment, the silicon-based display panel 11 and the first driving chip 12 can be electrically connected through metal bumps provided on opposite side surfaces. The first metal bump 113 is provided on the side of the silicon-based display panel 11 opposite to the first driving chip 12, and the second metal bump 121 is provided on the side of the first driving chip 12 opposite to the silicon-based display panel 11. The digital signal output by the first driving chip 12 is transmitted to the silicon-based display panel 11 sequentially through the second metal bump 121 and the first metal bump 113. In this embodiment, the silicon-based display panel 11 and the first driver chip 12 are packaged using a flip-chip bonding process, employing a region array-distributed connection method, which greatly improves the interconnection density and shortens the signal transmission path. For example, the display module may further include: a signal interface configured to transmit the digital signal output by the first driver chip 12 to the silicon-based display panel 11; a first terminal 31 of the signal interface is disposed on the silicon-based display panel 11; and a second terminal 32 of the signal interface is disposed on the first driver chip 12. The first terminal 31 and the second terminal 32 can be electrically connected through the aforementioned first metal bump 113 and second metal bump 121. In this embodiment, compared to the signal traces, the impedance of the first metal bump 113 and the second metal bump 121 is relatively small, which can effectively reduce the transmission delay of high-speed image data transmission and improve performance.

[0039] Continue to refer to Figure 7 The first driver chip 12 is provided with a first through hole 122 penetrating the first driver chip 12 in a direction perpendicular to the first side surface of the first packaging substrate 18; a third metal bump 123 is provided on the side of the first driver chip 12 near the first packaging substrate 18; a second metal bump 121 is electrically connected to the third metal bump 123 through the first through hole 122; the first packaging substrate 18 is provided with a second through hole 181 penetrating the first packaging substrate 18 in a direction perpendicular to the first side surface of the first packaging substrate 18; a fourth metal bump 182 is provided on the first side of the first packaging substrate 18; a fifth metal bump 183 is provided on the second side opposite to the first side of the first packaging substrate 18; the third metal bump 123 is electrically connected to the fourth metal bump 182; the fourth metal bump 182 is electrically connected to the fifth metal bump 183 through the second through hole 181.

[0040] The 3D packaged display module needs to be electrically connected to external devices or a CPU through a fifth metal bump 183 provided on the second side of the first packaging substrate 18. On one hand, external image data or control signals need to be transmitted to the first driver chip 12 through the fifth metal bump 183. On the other hand, external image data or control signals also need to be transmitted to the silicon-based display panel 11 through the first driver chip 12. In this embodiment, the first packaging substrate 18 is provided with a second through-hole 181 penetrating the first packaging substrate 18. A fourth metal bump 182 is electrically connected to the side of the second through-hole 181 near the first driver chip 12, and a fifth metal bump 183 is electrically connected to the side of the second through-hole 181 away from the first driver chip 12. The first driver chip 12 is provided with a first through-hole 122 penetrating the first driver chip 12. A second metal bump 121 is electrically connected to the side of the first through-hole 122 near the silicon-based display panel 11, and a third metal bump 123 is electrically connected to the side of the first through-hole 122 near the first packaging substrate 18. The first driver chip 12 sequentially connects to external devices via the third metal bump 123, the fourth metal bump 182, the second through-hole 181, and the fifth metal bump 183 to complete signal transmission. Similarly, the silicon-based display panel 11 sequentially connects to external devices via the first metal bump 113, the second metal bump 121, the first through-hole 122, the third metal bump 123, the fourth metal bump 182, the second through-hole 181, and the fifth metal bump 183 to complete signal transmission. This embodiment achieves communication between the 3D-packaged display module and external devices through the silicon through-holes and metal bumps. Both the first through-hole 122 and the second through-hole 181 can be filled with conductive material to achieve signal transmission. The relatively large diameter of the conductive material within the through-holes helps reduce signal transmission impedance and improve signal transmission accuracy. The conductive material may include at least one of the following: copper, tungsten, and copper-tungsten alloys. In this embodiment, copper can be selected as the conductive material to improve conductivity; alternatively, tungsten can be chosen to improve thermal stability and avoid affecting the packaging effect; or, a copper-tungsten alloy can be used to balance thermal stability and conductivity. This embodiment does not impose any specific limitations on the type of conductive material; it can be selected according to user needs and module performance.

[0041] In this embodiment, the multiple chips in the 3D package, as well as the chips and the first packaging substrate 18, can be connected via... Figure 7 The metal bumps and conductive vias shown enable electrical connection, and electrical connection can also be achieved via a metal jumper 185. For example... Figure 9 As shown, Figure 9This is a schematic diagram of another display module provided in an embodiment of this application. The first packaging substrate 18 also includes a metal pad 184. The metal pad 184 can also be electrically connected to the fifth metal bump 183 through a corresponding second through hole 181. In this embodiment, either the silicon-based display panel 11 or the first driving chip 12 can be bonded to the metal pad 184 through a metal jumper 185 to achieve electrical connection between the silicon-based display panel 11 and the first packaging substrate 18, and to achieve electrical connection between the first driving chip 12 and the first packaging substrate 18. In this embodiment, both of the above-mentioned electrical connection methods can be included simultaneously to increase the signal transmission path and meet higher display and control requirements.

[0042] refer to Figure 8 The first driver chip 12 may further include a data receiving circuit 21 and a power supply circuit 22; the power supply circuit 22 is configured to provide power to the display module; the data receiving circuit 21 is configured to receive external image data. In this embodiment, to facilitate packaging, the data receiving circuit 21 and the power supply circuit 22 can be integrated onto the first driver chip 12. This allows the data receiving circuit 21 and the power supply circuit 22 to utilize a higher precision process, further increasing the integration of peripheral circuits such as the timing control logic circuit 121, the data receiving circuit 21, and the power supply circuit 22, meeting the requirements of miniaturization and micro-scale in VR devices. The first driver chip 12 in this embodiment may also include peripheral circuits such as I / O interfaces, a data processor, registers, a row driver, and a cathode voltage generator to improve the display performance of the display module and enhance the reliability of the 3D packaged display module.

[0043] This application also provides a display device. Figure 10 This is a schematic diagram of the structure of a display device provided in an embodiment of this application, such as... Figure 10 As shown, the display device provided in this application embodiment includes the display module 200 provided in any embodiment of this application. The electronic device can be as follows: Figure 10 The VR glasses shown can also be mobile phones, microcomputers, micro displays, watches, and other smart wearable devices, etc. This embodiment does not make any special limitations on them.

[0044] The display device provided in this application includes the technical features of the display module provided in any embodiment of this application and has the effects of the corresponding technical features.

Claims

1. A display module, comprising: Silicon-based display panel (11) and first driver chip (12); The first driver chip (12) includes a timing control logic circuit (121); the first driver chip (12) is configured to convert image data into digital signals; The silicon-based display panel (11) is electrically connected to the first driving chip (12); the silicon-based display panel (11) includes a driving circuit (111) and an array of pixel circuits (112); the driving circuit (111) is configured to drive the pixel circuits (112) according to the digital signal; The silicon-based display panel (11) and the first driving chip (12) have different manufacturing processes; the precision of the manufacturing process of the first driving chip (12) is higher than that of the manufacturing process of the silicon-based display panel (11).

2. The display module according to claim 1, further comprising: First printed circuit board (13); The silicon-based display panel (11) and the first driver chip (12) are both bonded to the first side of the first printed circuit board (13).

3. The display module according to claim 2, wherein, The silicon-based display panel (11) and the first driving chip (12) are electrically connected through the first internal trace (131) of the first printed circuit board (13); the first internal trace (131) is a trace parallel to the first side surface of the first printed circuit board (13).

4. The display module according to claim 1, further comprising: First flexible circuit board (14); The silicon-based display panel (11) and the first driver chip (12) are both bonded to the first side of the first flexible circuit board (14).

5. The display module according to claim 4, wherein, The silicon-based display panel (11) and the first driving chip (12) are electrically connected through the second internal trace (141) of the first flexible circuit board (14); the second internal trace (141) is a trace parallel to the first side surface of the first flexible circuit board (14).

6. The display module according to claim 1, further comprising: Second printed circuit board (15) and second flexible circuit board (16); The silicon-based display panel (11) is bonded to the second printed circuit board (15); the first driver chip (12) is bonded to and encapsulated in the second flexible circuit board (16).

7. The display module according to claim 6, wherein, The silicon-based display panel (11) and the first driving chip (12) are electrically connected through the third internal trace (161) of the second flexible circuit board (16); the third internal trace (161) is a trace parallel to the first side surface of the second flexible circuit board (16).

8. The display module according to claim 1, further comprising: Third printed circuit board (17); The silicon-based display panel (11) is bonded to the first side of the third printed circuit board (17); The first driver chip (12) is bonded to the second side of the third printed circuit board (17) opposite to the first side.

9. The display module according to claim 8, wherein, The silicon-based display panel (11) and the first driving chip (12) are electrically connected through the fourth internal trace (171) of the third printed circuit board (17); the fourth internal trace (171) is a trace that passes through the third printed circuit board (17) in a direction perpendicular to the first side surface of the third printed circuit board (17).

10. The display module according to claim 1, further comprising: First packaging substrate (18); The first driver chip (12) is disposed on the first side of the first packaging substrate (18); The silicon-based display panel (11) is disposed on the side of the first driver chip (12) away from the first packaging substrate (18).

11. The display module according to claim 10, wherein, The silicon-based display panel (11) has a first metal bump (113) on the side near the first driving chip (12); the first driving chip (12) has a second metal bump (121) on the side near the silicon-based display panel (11). The first metal bump (113) and the second metal bump (121) are electrically connected to transmit the digital signal output by the first driver chip (12) to the silicon-based display panel (11).

12. The display module according to claim 11, wherein, The first driving chip (12) is provided with a first through hole (122) penetrating the first driving chip (12) in a direction perpendicular to the first side surface of the first packaging substrate (18); a third metal bump (123) is provided on the side of the first driving chip (12) near the first packaging substrate (18); the second metal bump (121) is electrically connected to the third metal bump (123) through the first through hole (122); The first packaging substrate (18) is provided with a second through hole (181) penetrating the first packaging substrate (18) in a direction perpendicular to the first side surface of the first packaging substrate (18); a fourth metal bump (182) is provided on the first side of the first packaging substrate (18); and a fifth metal bump (183) is provided on the second side opposite to the first side of the first packaging substrate (18). The third metal bump (123) is electrically connected to the fourth metal bump (182); the fourth metal bump (182) is electrically connected to the fifth metal bump (183) through the second through hole (181).

13. The display module according to claim 12, wherein, Both the first through hole (122) and the second through hole (181) are filled with conductive material.

14. The display module according to claim 13, wherein, The conductive material includes at least one of the following: copper, tungsten, and copper-tungsten alloy.

15. The display module according to claim 10, further comprising: Data receiving circuit (21) and power supply circuit (22); The power supply circuit (22) is configured to provide power to the display module; The data receiving circuit (21) is configured to receive the external image data.

16. The display module according to claim 10, wherein, The first driver chip (12) further includes at least one of the following: an I / O interface, a data processor, a register, a row driver, and a cathode voltage generator.

17. The display module according to claim 1, wherein, The process precision level of the first driver chip (12) is less than or equal to 40nm; The precision level of the process of the silicon-based display panel (11) is greater than or equal to 90nm.

18. The display module according to claim 17, wherein, The precision level of the process technology of the first driver chip (12) is 22nm; The silicon-based display panel (11) has a process precision level of 90nm.

19. A display device comprising the display module according to any one of claims 1-18.

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