Power converter controller with frequency monitoring

Abstract

A circuit (130) includes a microcontroller (140) having a first terminal (142) and a second terminal (144). The microcontroller (140) is configured to: receive, at the first terminal (142), a signal (current / voltage) associated with operation of a power converter; adjusting a switching control signal (SWITCHCSs) at the second terminal (144) in response to the signal; measuring the frequency of the switch control signal; comparing the measured frequencies in response to at least one envelope of a set of envelopes (346, 348) to obtain a monitoring result; and executing a control operation in response to the monitoring result.

Description

BACKGROUND

[0001] Switching converters are a type of power converter used to provide a direct current (DC) output voltage (V OUT ) based on a DC input voltage (V IN ). A typical switching converter includes a power stage having energy storage devices (e.g., inductors and / or capacitors) and switches to charge and discharge the energy storage devices, and a controller for the switches of the power stage. Switching converter efficiency varies depending on the proper management of switching control in response to variations in V IN , V OUT , load, operating frequency, and inductor value. Mode transitions in response to load changes (e.g., light load to heavy load, or heavy load to light load) or input changes are common. If such mode transitions are not completed in a timely manner, the switching converter can suffer from inefficient operation and / or undesirable V OUT ripple. SUMMARY

[0002] In an example, a circuit includes a microcontroller having a first terminal and a second terminal. The microcontroller is configured to receive a signal associated with operation of a power converter at the first terminal, adjust a switching control signal at the second terminal in response to the signal, measure a frequency of the switching control signal, compare the measured frequency to obtain a monitoring result in response to at least one envelope of a set of envelopes, and perform a control operation in response to the monitoring result.

[0003] In another example, a microcontroller includes a processor and a waveform analyzer in communication with the processor. The processor is configured to receive a signal associated with operation of a power converter, and provide a switching control signal in response to the signal. The waveform analyzer is configured to measure a frequency of the switching control signal, and compare the measured frequency to obtain a monitoring result in response to a set of envelopes including an inner envelope and an outer envelope.

[0004] In yet another example, a system includes a power converter, and a microcontroller coupled to the power converter. The microcontroller is configured to receive a signal associated with operation of the power converter, adjust a switching control signal in response to the signal, measure a frequency of the switching control signal, compare the measured frequency to obtain a monitoring result in response to at least one envelope of a set of envelopes, and perform a control operation in response to the monitoring result. BRIEF DESCRIPTION OF DRAWINGS

[0005] Figure 1 is a diagram showing an example system.

[0006] Figure 2This is a graph showing how the gain of a resonant converter changes with frequency.

[0007] Figure 3 This is a block diagram illustrating an example microcontroller (MCU).

[0008] Figure 4 This is a flowchart demonstrating the MCU method.

[0009] Figure 5 It is a flowchart demonstrating an example of MCU control operation.

[0010] Figure 6 This is a flowchart illustrating the control method of an example power converter. Detailed Implementation

[0011] The same reference numerals or other reference indicators are used in the drawings to denote the same or similar features. These features may be the same or similar in function and / or structure.

[0012] Figure 1 This is a diagram showing example system 100. Figure 1 In this example, system 100 includes an integrated circuit (IC) 130, a switching network 102, a resonant tank 108, and a rectifier network 118. Figure 1 In this example, the switching network 102, the resonant tank 108, and the rectifier network 118 form a resonant converter, and IC 130 is the controller for the resonant converter. As shown, IC 130 includes a microcontroller (MCU) 140 and a driver circuitry 190. Although Figure 1 The examples described illustrate resonant converters and the related control options provided by IC 130, but it should be understood that the control options of IC 130 can be applied to other switching converters or power converters.

[0013] exist Figure 1 In one example, the switch network 102 has a first terminal 103a, a second terminal 103b, a third terminal 104, and a fourth terminal 106. In some examples, the switch network 102 includes switches S1 and S2, and an input voltage (V) in the illustrated arrangement. IN Power supply. Without limitation, switch S1 can be referred to as a high-side (HS) switch, and switch S2 can be referred to as a low-side (LS) switch. As shown, the VIN power supply has a first terminal and a second terminal. Switch S1 has a first terminal, a second terminal, and a control terminal. Switch S2 has a first terminal, a second terminal, and a control terminal. The first terminal of switch S1 is coupled to VIN. INA first (e.g., positive) terminal of the power supply. A second terminal of switch SI is coupled to the third terminal 104. A first terminal of switch S2 is also coupled to the third terminal 104. A second terminal of switch S2 is coupled to the fourth terminal 106. A control terminal of switch SI is coupled to the first terminal 103a. A control terminal of switch S2 is coupled to the second terminal 103b. In other examples, the topology of the switch network 102 can vary.

[0014] The resonant tank 108 has a first terminal 110, a second terminal 112, a third terminal 113, a fourth terminal 114, and a fifth terminal 116. In some examples, the resonant tank 108 includes an energy storage device, which in the illustrated example includes: a capacitor C r , a first inductor L r , and a second inductor L m . The capacitor C r has a first terminal and a second terminal. The first inductor L r has a first terminal and a second terminal. The second inductor L m has a first terminal and a second terminal. In Figure 1 the example, the first terminal of the capacitor C r is coupled to the first terminal 110 of the resonant tank 108. The second terminal of the capacitor C r is coupled to the first terminal of the first inductor L r . The second terminal of the first inductor L r is coupled to the fourth terminal 114 of the resonant tank 108. The first terminal of the second inductor L m is coupled to the second terminal of the first inductor L r and to the fourth terminal 114 of the resonant tank 108. The second terminal of the second inductor L m is coupled to the second terminal 112 and the fifth terminal 116 of the resonant tank 108.

[0015] The rectifier network 118 has a first terminal 120, a second terminal 122, and a third terminal 124. In some examples, the rectifier network 118 includes a transformer (Tl) that, in the arrangement shown, has a primary winding LI, a first secondary winding L2, a second secondary winding L3, a first diode Dl, a second diode D2, and an output capacitor (COUT). The primary winding LI has a first terminal and a second terminal. The first secondary winding L2 has a first terminal and a second terminal. The second secondary winding L3 has a first terminal and a second terminal. The first diode Dl has a first terminal (e.g., an anode terminal) and a second terminal (e.g., a cathode terminal). The second diode D2 has a first terminal (e.g., an anode terminal) and a second terminal (e.g., a cathode terminal). The capacitor COUT has a first terminal and a second terminal. The first terminal of the primary winding LI is coupled to the first terminal 120 of the rectifier network 118. The second terminal of the first primary winding LI is coupled to the second terminal 122 of the rectifier network 118. The first terminal of the first secondary winding L2 is coupled to the first terminal of the diode Dl. The second terminal of the first secondary winding L2 is coupled to the first terminal of the third secondary winding L3 and to the second terminal of COUT. The second terminal of the first secondary winding L2 and the first terminal of the second secondary winding L3 can be coupled to a ground terminal (not shown). The second terminal of the third secondary winding L3 is coupled to the first terminal of the diode D2. The second terminals of the diodes Dl and D2 are coupled to the first terminal of COUT and to the third terminal 124 of the rectifier network 118.

[0016] The IC 130 has a first terminal 132, a second terminal 134a, and a third terminal 134b. In some examples where the IC 130 is disposed within a single package, each of the first terminal 132, the second terminal 134a, and the third terminal 134b corresponds to a discrete pin or a set of pins of the package of the IC 130, although any of the first terminal 132, the second terminal 134a, and / or the third terminal 134b can correspond to a shared pin having more than one function. In some examples, the IC 130 includes the MCU 140 and the driver circuitry 190.

[0017] The MCU 140 has a first terminal 142 and a second terminal 144. The driver circuitry 190 has a first terminal 192, a second terminal 194a, and a third terminal 194b. In some examples where the MCU 140 is a discrete device disposed within its own package, each of the first terminal 192, the second terminal 194a, and the third terminal 194b corresponds to a discrete pin or a set of pins of the package of the MCU 140, although any of the first terminal 192, the second terminal 194a, and / or the third terminal 194b can correspond to a shared pin having more than one function. In Figure 1In one example, MCU 140 includes a central processing unit (CPU) 150, a waveform analyzer 170, and a PWM controller 180. In some examples, MCU 140 may also include sensing circuitry for processing voltage and / or current sensing signals associated with the operation of the power converter. In different examples, CPU 150 may include sensing circuitry for processing voltage and / or current sensing signals and a hardware controller for determining switch control parameters (e.g., duty cycle and period). Waveform analyzer 170 may include storage device / register circuitry, frequency measurement circuitry, and comparison circuitry. PWM controller 180 may include on-time control circuitry and off-time control circuitry for each switch in switch network 102.

[0018] As shown, CPU 150 has a first terminal 152, a second terminal 154, a third terminal 156, and a fourth terminal 158. Figure 1 In this example, CPU 150 includes adaptive control instruction 160. In other examples, adaptive control instruction 160 may be replaced by adaptive control logic. Waveform analyzer 170 has a first terminal 172, a second terminal 174, and a third terminal 176. PWM controller 180 has a first terminal 182 and a second terminal 184.

[0019] exist Figure 1 In this example, the first terminal 132 of IC 130 is coupled to the first terminal 142 of MCU 140 and provides current / voltage from resonant tank 108. The second terminal 144 of MCU 140 is coupled to the first terminal 192 of driver circuitry 190 and provides switch control signals (SWITCH_CSs). In different examples, the number of switches in switch network 102 and the number of control signals included with SWITCH_CSs can vary. For example, a half-bridge topology can include, for instance,... Figure 1 The two switches in the circuit are shown. A full-bridge topology can contain four switches. A three-phase full-bridge topology can contain six switches. Other topologies are possible and can include additional switches and switch arrangements. The second terminal 194a of the driver circuit system 190 is coupled to the second terminal 134a of the IC 130 and provides a first control signal (CS1) to switch S1. The third terminal 194b of the driver circuit system 190 is coupled to the third terminal 134b of the IC 130 and provides a second control signal (CS2) to switch S2.

[0020] The first terminal 142 of the MCU 140 is also coupled to the first terminal 152 of the CPU 150. The second terminal 144 of the MCU 140 is coupled to the second terminal 184 of the PWM controller 180. The second terminal 184 of the PWM controller 180 is also coupled to the second terminal 174 of the waveform analyzer 170. The first terminal 182 of the PWM controller 180 is coupled to the fourth terminal 158 of the CPU 150. The second terminal 154 of the CPU 150 is coupled to the third terminal 176 of the waveform analyzer 170. The third terminal 156 of the CPU 150 is coupled to the first terminal 172 of the waveform analyzer 170.

[0021] As shown, the third terminal 104 of the switch network 102 is coupled to the first terminal 110 of the resonant tank 108. The fourth terminal 106 of the switch network 102 is coupled to the second terminal 112 of the resonant tank 108. The third terminal 113 of the resonant tank 108 is coupled to the first terminal 132 of the IC 130. The fourth terminal 114 of the resonant tank 108 is coupled to the first terminal 120 of the rectifier network 118. The fifth terminal 116 of the resonant tank 108 is coupled to the second terminal 122 of the rectifier network 118. The third terminal 124 of the rectifier network 118 is coupled to a load (not shown).

[0022] In operation, the IC 130 controls the switches (e.g., S1 and S2) of the switch network 102 to regulate the V A from the rectifier network 118 to a load (not shown) in response to the current and / or voltage measurements from the resonant tank 108, the operation of the MCU 140, the operation of the PWM controller 180, and the operation of the driver circuitry 190. OUT and output current (I OUT ) regulation. Specifically, the IC 130 is configured to: receive current and / or voltage measurements from the resonant tank 108 at its first terminal 132; provide CS1 at its second terminal 134a in response to the current and / or voltage measurements from the resonant tank 108, the operation of the MCU 140, the operation of the PWM controller 180, and the operation of the driver circuitry 190; and provide CS2 at its third terminal 134b in response to the current and / or voltage measurements, the operation of the MCU 140, the operation of the PWM controller 180, and the operation of the driver circuitry 190.

[0023] MCU 140 is configured to receive current and / or voltage measurements from resonant tank 108, monitor a target frequency (e.g., the frequency of PWM_CS, SWITCH_CSs, CS1, or CS2) using waveform analyzer 170, and adjust PWM_CS and / or SWITCH_CSs in response to the current and / or voltage measurements from resonant tank 108, the target frequency monitoring results, and the operation of CPU 150. In some examples, CPU 150 is configured to adjust PWM_CS and / or SWITCH_CSs in response to the target frequency monitoring results and adaptive control instructions 160. In some examples, waveform analyzer 170 monitors the target frequency using a set of envelopes such that the boundaries of an envelope in the set of envelopes vary based on the operating mode.

[0024] Example operations of waveform analyzer 170 include receiving a target signal (e.g., PWM_CS, SWITCH_CSs, CS1, or CS2), measuring the frequency of the target signal, comparing the measured frequency of the target signal against or relative to a set of envelopes to obtain monitoring results, updating the frequency range of an inner envelope in the set of envelopes in response to the monitoring results indicating that the frequency drift or predicted frequency drift is outside the inner envelope, and providing an update / alert to CPU 150A in response to the monitoring results indicating that the frequency drift or predicted frequency drift is outside an outer envelope in the set of envelopes. In some examples, adaptive control instructions 160 cause CPU 150 to establish a frequency range for each envelope in a set of envelopes used by waveform analyzer 170, receive current and / or voltage measurements from a resonant tank, determine control loop results in response to the received current and / or voltage measurements, selectively update PWM_CS, SWITCH_CSs, and a prediction filter in response to the control loop results, perform a mode change operation as needed, and perform a safety operation in response to waveform analyzer 170 providing an envelope breach indication (e.g., when an outer envelope in the set of envelopes is breached).

[0025] In some examples, waveform analyzer 170 can include storage / register circuitry and comparison circuitry. In some examples, the storage / register circuitry can store a center frequency, an inner envelope offset relative to the center frequency, and an outer envelope offset relative to the center frequency. In other examples, the storage / register circuitry can store a center frequency count, an inner envelope offset count relative to the center frequency count, and an outer envelope offset count relative to the center frequency count. In other examples, the storage / register circuitry can store a minimum inner envelope frequency, a maximum inner envelope frequency, a minimum outer envelope frequency, and a maximum outer envelope frequency. In still other examples, the storage / register circuitry can store a minimum inner envelope frequency count, a maximum inner envelope frequency count, a minimum outer envelope frequency count, and a maximum outer envelope frequency count.

[0026] In some examples, the frequency measurement circuitry includes a time base (e.g., a clock signal) and an edge counter. In some examples, the frequency measurement circuitry can convert the count to an analog signal. In other examples, the frequency measurement circuitry can include an analog circuit having a constant current source, a capacitor, and a switch to charge the capacitor as a function of frequency. In such examples, the charge on the capacitor is an indication of the frequency. As needed, a switch and appropriate control signal can be used to reset the charge on the capacitor.

[0027] In some examples, the comparison circuitry includes a digital or analog comparator. The digital comparator can compare the count obtained by the edge counter to the count stored by the storage / register circuitry. In other examples, the comparison circuitry can include an analog comparator, e.g., a first analog comparator, a second analog comparator, a third analog comparator, and a fourth analog comparator. In such examples, the comparison circuitry can receive a first reference voltage to the first analog comparator, a second reference voltage for the second analog comparator, a third reference voltage for the third analog comparator, and a fourth reference voltage for the fourth analog comparator. The first reference voltage is indicative of a minimum inner envelope frequency. The second reference voltage is indicative of a maximum inner envelope frequency. The third reference voltage is indicative of a minimum outer envelope frequency. The fourth reference voltage is indicative of a maximum outer envelope frequency.

[0028] During operation of the switch network 102, the resonant tank 108, and the rectifier network 118: V IN , V OUT , the load, the operating frequency, and L r and / or L m inductance can affect power converter efficiency. To account for such changes, the MCU 140 uses the CPU 150, the waveform analyzer 170, and the PWM controller 180 to adjust the PWM_CS and / or the SWITCH_CSs in response to current and / or voltage measurements from the resonant tank 108, the monitored target frequency results, and the adaptive control instructions 160. In different contexts, the IC 130 is configured to adjust the PWM_CS and / or the SWITCH_CSs to account for mode changes, load changes (e.g., light load to heavy load, or heavy load to light load), target efficiency, and / or target V OUT ripple.

[0029] While system 100 describes a resonant converter context, other example systems can include a switching converter or other power converter instead of a resonant converter. Resonant converters are examples of switching converters, but switching converters are not limited to resonant converters. Other example switching converters include buck converters, boost converters, and buck-boost converters. In some examples, a system includes: a power converter; and an MCU (e.g., MCU 140 in Figure 1 ) coupled to the power converter and configured to: receive a signal (e.g., a sense signal described herein) associated with operation of the power converter; adjust a switching control signal in response to the signal; measure a frequency of the switching control signal; compare the measured frequency to obtain a monitoring result in response to at least one envelope of a set of envelopes; and perform a control operation in response to the monitoring result.

[0030] In some examples, the MCU is configured to adjust the switching control signal in response to a first control loop and a second control loop, the second control loop is in response to the monitoring result, and the first control loop is in response to the sense signal and is slower than the second control loop. In some examples, the power converter is a resonant converter, the MCU is configured to predict a resonant converter gain trajectory in response to the monitoring result, and the control operation is based on the predicted resonant converter gain trajectory.

[0031] Figure 2 is a plot 200 showing gain as a function of frequency for an example resonant converter. As shown in plot 200, the gain of the resonant converter can vary depending on the effective resistance (R e ) of the resonant converter. For different R e values, the center frequency and the frequency range of the resonant converter are different. Over time, the operating frequency of the resonant converter can shift due to changes in V IN , V OUT , load, operating frequency, and inductance of L r and / or L m . In different examples, the monitoring operation can involve monitoring the frequency of PWM_CS, SWITCH_CSs, CS1, or CS2, or related signals. In some examples, a set of envelopes is used to monitor the operating frequency of the resonant converter. In plot 200, a set of envelopes includes an inner envelope and an outer envelope. The inner envelope is formed using inner envelope thresholds W0 and W1. The outer envelope is formed using inner envelope thresholds W min and W max .

[0032] In described embodiments, adaptive control operations for a resonant converter involve using a set of envelopes to monitor a target frequency (e.g., the frequency of PWM CS, SWITCH CSs, CS1, or CS2). In response to frequency drift relative to the set of envelopes, the adaptive control operations can adjust PWM CS, SWITCH CSs, resonant converter mode, parameters of the set of envelopes, and / or other control options.

[0033] Figure 3 is a block diagram 300 showing an example MCU 140A. MCU 140A is an example of MCU 140 of Figure 1 . As shown, block diagram 300 also includes switch network 102 and driver circuitry 190, which are described in Figure 1 . In examples of Figure 3 , MCU 140A includes CPU 150A, waveform analyzer 170A, and PWM controller 180. CPU 150A is an example of CPU 150 in Figure 1 . Waveform analyzer 170A is an example of waveform analyzer 170 in Figure 1 .

[0034] As shown, MCU 140A has first terminal 142 and second terminal 144, which are described in Figure 1 . CPU 150A has first terminal 152, second terminal 154a, second terminal 154b, second terminal 154c, third terminal 156, and fourth terminal 158. In examples, second terminals 154a, 154b, and 154c are examples of second terminals 154 in Figure 1 . In examples of Figure 3 , CPU 150A includes adaptive control instructions 160, which are described in Figure 1 . In other examples, CPU 150A can include adaptive control logic instead of adaptive control instructions 160 to perform the same or similar operations.

[0035] As shown, waveform analyzer 170A has first terminal 172a, first terminal 172b, second terminal 174, third terminal 176a, third terminal 176b, and third terminal 176c. In examples, first terminals 172a and 172b are examples of first terminals 172 in Figure 3In one example, the waveform analyzer 170A includes a configuration interface / register circuit 308, an input crossbar switch circuit system 316, a frequency measurement circuit system 322, and an envelope comparison circuit system 334. The configuration interface / register circuit 308 has a first terminal 310, a second terminal 312, and a third terminal 314. The input crossbar switch circuit system 316 has a first terminal 318, a second terminal 319, and a third terminal 320. The frequency measurement circuit system 322 has a first terminal 324, a second terminal 326, a third terminal 327, and a fourth terminal 328. In some examples, the frequency measurement circuit system 322 includes a time base circuit system 330 and an edge counting circuit system 332. The envelope comparison circuit system 334 has a first terminal 335, a second terminal 336, a third terminal 338, a fourth terminal 340, a fifth terminal 342, and a sixth terminal 344. Figure 3 In this example, the configuration interface / register circuit 308 is Figure 1 Examples of the storage device / register circuitry and frequency measurement circuitry system 322 described herein.

[0036] As shown, terminal 142 of MCU 140A is coupled to terminal 152 of CPU 150A. Terminal 144 of MCU 140A is coupled to terminal 184 of PWM controller 180. Terminal 182 of PWM controller 180 is coupled to terminal 158 of CPU 150A. Terminal 154a of CPU 150A is coupled to terminal 176a of waveform analyzer 170A. Terminal 154b of CPU 150A is coupled to terminal 176b of waveform analyzer 170A. Terminal 154c of CPU 150A is coupled to terminal 176c of waveform analyzer 170A. Terminal 156 of CPU 150A is coupled to terminals 172a and 172b of waveform analyzer 170A. In some instances, terminal 174 of waveform analyzer 170A is coupled to terminal 158 of CPU 150A. In other examples, the second terminal 174 of the waveform analyzer 170A is coupled to the second terminal 194a and / or the third terminal 194b of the driver circuit system 190.

[0037] exist Figure 3In this example, the first terminal 172a of the waveform analyzer 170A is coupled to the first terminal 310 of the configuration interface / register circuit 308. The first terminal 172b of the waveform analyzer 170A is coupled to the second terminal 319 of the input crossbar switch circuit system 316. The second terminal 174 of the waveform analyzer 170A is coupled to the first terminal 318 of the input crossbar switch circuit system 316. The third terminal 176a of the waveform analyzer 170A is coupled to the fourth terminal 340 of the envelope comparator circuit system 334. The third terminal 176b of the waveform analyzer 170A is coupled to the fifth terminal 342 of the envelope comparator circuit system 334. The third terminal 176c of the waveform analyzer 170A is coupled to the sixth terminal 344 of the envelope comparator circuit system 334.

[0038] The second terminal 312 of the configuration interface / register circuit 308 is coupled to the third terminal 338 of the envelope comparator circuit system 334. The third terminal 314 of the configuration interface / register circuit 308 is coupled to the first terminal 324 of the frequency measurement circuit system 322. The third terminal 320 of the input crossbar switch circuit system 316 is coupled to the second terminal 326 of the frequency measurement circuit system 322. The third terminal 327 of the frequency measurement circuit system 322 is coupled to the first terminal 335 of the envelope comparator circuit system 334. The fourth terminal 328 of the frequency measurement circuit system 322 is coupled to the second terminal 336 of the envelope comparator circuit system 334.

[0039] In operation, the MCU 140A is configured to: receive signals from the resonant tank (e.g., Figure 1 The CPU 150A measures the current and / or voltage of the resonant tank 108; monitors the target frequency (e.g., the frequency of PWM_CS, SWITCH_CSs, CS1, or CS2) using a waveform analyzer 170A; and adjusts PWM_CS and / or SWITCH_CSs in response to the current and / or voltage measurements from the resonant tank, the target frequency monitoring results, and the operation of the CPU 150A. In some instances, the CPU 150A is configured to adjust PWM_CS and / or SWITCH_CSs in response to the target frequency monitoring results and adaptive control instructions 160. In some instances, the waveform analyzer 170 uses a set of envelopes to monitor the target frequency. The set of envelopes may include an inner envelope 346 and an outer envelope 348, wherein the frequency range of the inner envelope 346 is within the frequency range of the outer envelope 348.

[0040] Example operation of waveform analyzer 170A includes: receiving a target signal (e.g., PWM_CS, SWITCH_CSs, CS1, or CS2); using frequency measurement circuitry 322 to determine the frequency of the target signal; using envelope comparison circuitry 334 to compare the determined frequencies in response to at least one envelope in a set of envelopes to obtain a monitoring result; updating the frequency range of the inner envelope in response to the monitoring result indicating a frequency drift or a predicted frequency drift exceeding the inner envelope in the set of envelopes; and providing an update / alert to CPU 150A in response to the monitoring result indicating a frequency drift or a predicted frequency drift exceeding the outer envelope in the set of envelopes. In some instances, CPU 150A is configured to: receive current and / or voltage measurements from the resonant tank; establish an inner frequency range and an outer frequency range for a set of envelopes used by waveform analyzer 170A; determine control loop results in response to the received current and / or voltage measurements and adaptive control command 160; selectively update PWM_CS and / or SWITCH_CSs and the predictive filter in response to the control loop results; perform mode-changing operations as needed in response to the control loop results, adaptive control command 160, and monitoring results from waveform analyzer 170A; and perform safety operations in response to an outer envelope breach indication provided by waveform analyzer 170A.

[0041] In some instances, the MCU (e.g., Figure 1 MCU 140, or Figure 3 The MCU 140A includes a CPU, a waveform analyzer, and a PWM controller. The CPU is configured to: receive a sensing signal; and provide a PWM control signal in response to the sensing signal. In some instances, the waveform analyzer communicates with the CPU and is configured to: measure the frequency of the PWM control signal; and monitor the measured frequency in response to at least one of a set of envelopes having an inner envelope and an outer envelope to obtain a monitoring result.

[0042] In some instances, the CPU is configured to adjust the PWM control signal in response to a first control loop and a second control loop, the second control loop responding to a monitoring result, and the first control loop responding to a sensing signal and slower than the second control loop. In some instances, the waveform analyzer is configured to update or shift the inner envelope in response to a monitoring result without microcontroller intervention.

[0043] In some examples, the waveform analyzer is configured to: detect, in response to the monitoring result, whether a frequency drift is greater than a threshold; and generate a DMA request in response to the detected frequency drift being greater than the threshold. In some examples, the waveform analyzer is configured to generate an interrupt to a CPU in response to the monitoring result. In some examples, the CPU is configured to program a frequency range for an inner envelope and an outer envelope. In some examples, the waveform analyzer is configured to perform: a first control operation in response to the monitoring result indicating that an outer measured frequency breaches the inner envelope; and a second control operation in response to the monitoring result indicating that the measured frequency breaches the outer envelope. In some examples, the waveform analyzer is configured to: predict, in response to the monitoring result, a resonant converter gain trajectory; and perform a control operation in response to the predicted resonant converter gain trajectory.

[0044] Figure 4 is a flowchart showing example MCU method 400. MCU method 400 includes direct memory access (DMA) action 402, waveform analyzer action 408, memory action 410, and processor (e.g., CPU) action 412. In some examples, DMA action 402 includes receiving a DMA request from the waveform analyzer at block 404. A channel is dedicated to copying memory contents to the waveform analyzer at block 406. In some examples, waveform analyzer action 408 includes: receiving a target signal; determining a frequency of the target signal; monitoring the frequency of the target signal with respect to at least one envelope of a set of envelopes; adjusting a frequency range of an inner envelope of the set of envelopes in response to a monitoring result indicating that a frequency drift or a predicted frequency drift exceeds the inner envelope; providing an update / alert to a processor via DMA action 402 in response to a monitoring result indicating that a frequency drift or a predicted frequency drift exceeds an outer envelope of the set of envelopes.

[0045] In some examples, processor action 412 includes programming initial threshold and envelope values for a set of envelopes at block 414. If the sensed control parameter changes (block 416), then at block 418, PWM CS and / or SWITCH CSs are updated in response to the sensed control parameter and using common local memory. If the sensed control parameter does not change (block 416), then method 400 stays at block 416. In some examples, the sensed control parameter includes output current, output voltage, input voltage, and / or input current associated with the switch network 102, the resonant tank 108, and the rectifier network 118. At block 420, the prediction filter is updated in response to the updated PWM CS and / or SWITCH CSs and the sensed control parameter. If a new mode is needed (block 422), then at block 422, the PWM controller mode is changed. In some examples, the PWM controller mode can include moving to another resonant frequency or gain setting; or moving to a diode emulation setting at lower loads.

[0046] In some examples, waveform analyzer action 408 includes generating an interrupt in response to frequency monitoring relative to a set of envelopes. In this case, processor action 412 includes receiving the interrupt from the waveform analyzer at block 426. If the outer envelope is breached (block 428), then at block 430, a safe state operation is performed. Example safe state operations can include forcing the PWM output to a fixed value, the fixed value being a safe value for the power stage; and / or providing a fixed PWM sequence to run the power stage in a limp mode. If the outer envelope is not breached (block 428), then method 400 includes logging an inner envelope breach in the prediction module at block 432 and modifying the inner envelope settings to track the next frequency range. During method 400, memory action 410 can include copying new envelope settings to the waveform analyzer via DMA operations.

[0047] Figure 5 is an example control operation 500 that demonstrates an MCU (e.g., Figure 1 MCU 140 in FIG. 1, or Figure 3 MCU 140A in FIG. 2) in Figure 5In one example, control operation 500 includes providing a finer frequency setting and a finer frequency measurement to a prediction model 502. In some instances, the prediction model is based on Kalman filtering. Prediction model 502 outputs the measured finer frequency in response to the finer frequency setting and the finer frequency measurement. If a high dynamic response exists (block 504), the measured finer frequency determined by prediction model 502 is provided to the waveform analyzer inner loop 506. Furthermore, the processor is interrupted to update control for different modes. Otherwise, if a high dynamic response does not exist (block 504), the finer frequency setting is provided at block 506 to the waveform analyzer inner envelope setting to detect the next breakpoint.

[0048] Figure 6 This is a flowchart illustrating an example power converter control method 600. Method 600 can be, for example... Figure 1 IC130, Figure 1 MCU 140 or Figure 3 The MCU 140A in the process executes the following: As shown, method 600 includes receiving a sensing signal at block 602. At block 604, adjusting a switch control signal (e.g., one or more of SWITCH_CSs) in response to the sensing signal. At block 606, measuring the frequency of the switch control signal. At block 608, comparing the measured frequencies in response to at least one envelope in a set of envelopes to obtain a monitoring result. At block 610, performing a control operation in response to the monitoring result.

[0049] In some instances, the control operation of block 610 includes adjusting the PWM control signal in response to a first control loop and a second control loop, the second control loop responding to a monitoring result, and the first control loop responding to a sensing signal and slower than the second control loop. In some instances, the control operation of block 610 includes generating a DMA request in response to the monitoring result. In some instances, the monitoring result of block 608 includes detecting whether the frequency drift is greater than a threshold, and the control operation of block 610 includes generating a DMA request in response to the detected frequency drift being greater than the threshold. In some instances, the threshold is based on the outer envelope.

[0050] In some examples, the MCU is configured to program a frequency range for the inner envelope and an outer envelope. In some examples, the control operations of block 610 include a first control operation responsive to the monitoring result indicating that the measured frequency breaches the inner envelope, and a second control operation responsive to the monitoring result indicating that the measured frequency breaches the outer envelope. In some examples, the MCU is configured to predict a resonant converter gain trajectory responsive to the monitoring result of block 608, and the control operations of block 610 are based on the predicted resonant converter gain trajectory. In some examples, the MCU is configured to predict the resonant converter gain trajectory using a Kalman filter.

[0051] In this specification, the term "coupled" can encompass a connection, communication, or signal path that enables a functional relationship consistent with this specification. For example, if device A generates a signal to control device B to perform an action, then: (a) in a first example, device A is coupled to device B by a direct connection; or (b) in a second example, device A is coupled to device B through intermediate component C, provided that intermediate component C does not alter the functional relationship between device A and device B such that device B is controlled by device A via the control signal generated by device A.

[0052] Also, in this specification, the recitation "based on" means "based, at least in part, on." Thus, if X is based on Y, X can be a function of Y and any number of other factors.

[0053] A device "configured to" perform a task or function can be configured (e.g., programmed and / or hardwired), at a time of manufacture, to perform the function and / or can be reconfigured by a user after manufacture to perform the function and / or other additional or alternative functions. The configuring can be through firmware and / or software programming of the device, through construction and / or layout of hardware components and interconnections of the device, or a combination thereof.

[0054] As used herein, the terms "terminal," "node," "interconnect," "pin," and "lead" can be used interchangeably. Unless specifically stated to the contrary, these terms are generally used to mean an interconnection or a terminal end between a device element, a circuit element, an integrated circuit, a device, or other electronic device or semiconductor component, and / or a conductor.

[0055] Circuits or devices described herein as including certain components can actually be suitable coupled to those components to form the described circuitry or devices. For example, structures described as including one or more semiconductor elements (e.g., transistors), one or more passive elements (e.g., resistors, capacitors, and / or inductors), and / or one or more sources (e.g., voltage sources and / or current sources) can actually include only the semiconductor elements (e.g., semiconductor dies and / or integrated circuit (IC) packages) within a single physical device, and can be suitable coupled to at least some of the passive elements and / or sources to form the described structures at the time of manufacture or after manufacture, e.g., by an end user and / or a third party.

[0056] The circuits described herein are reconfigurable to include additional or different components to provide functionality at least somewhat similar to the functionality available prior to replacement of the components. Unless otherwise noted, components shown as resistors generally represent any one or more elements coupled in series and / or in parallel to provide the amount of impedance represented by the shown resistor. For example, resistors or capacitors shown and described herein as a single component can actually be multiple resistors or capacitors, respectively, coupled in parallel between the same nodes. For example, resistors or capacitors shown and described herein as a single component can actually be multiple resistors or capacitors, respectively, coupled in series between the same two nodes as the single resistor or capacitor.

[0057] While certain elements of the described examples include being in an integrated circuit, and other elements are external to the integrated circuit, in other examples additional or fewer features can be incorporated into the integrated circuit. In addition, some or all of the features shown as external to the integrated circuit can be included in the integrated circuit, and / or some features shown as internal to the integrated circuit can be incorporated external to the integrated circuit. As used herein, the term “integrated circuit” means one or more circuits that: (i) are incorporated in / on a semiconductor substrate; (ii) are incorporated in a single semiconductor package; (iii) are incorporated into the same module; and / or (iv) are incorporated in / on the same printed circuit board.

[0058] Use of the phrase “ground” in the foregoing description includes a chassis ground, an Earth ground, a floating ground, a virtual ground, a digital ground, a common ground, and / or any other form of ground connection applicable to or suitable for the teachings of the present specification. In the present specification, “about,” “approximately” or “substantially” preceding a parameter means within + / - 10% of the stated parameter, or within a reasonable range of the zero neighborhood if the parameter is zero, unless otherwise stated.

[0059] Modifications can be made to the described examples, and other examples can be possible, within the scope of the claims.

Claims

1. A circuit comprising: a microcontroller having a first terminal and a second terminal, the microcontroller configured to: receive, at the first terminal, a signal associated with operation of a power converter; adjust, at the second terminal, a switch control signal in response to the signal; measure a frequency of the switch control signal; compare the measured frequency to obtain a monitoring result in response to at least one envelope of a set of envelopes; and perform a control operation in response to the monitoring result.

2. The circuit of claim 1, wherein the control operation includes adjusting the switch control signal in response to a first control loop and a second control loop, the second control loop being responsive to the monitoring result, and the first control loop being responsive to the signal and slower than the second control loop.

3. The circuit of claim 1, wherein the control operation includes generating a direct memory access (DMA) request in response to the monitoring result.

4. The circuit of claim 3, wherein the monitoring result includes detecting whether a frequency drift is greater than a threshold, and the control operation includes generating the DMA request in response to the detected frequency drift being greater than the threshold.

5. The circuit of claim 4, wherein the threshold is based on an outer envelope of the set of envelopes.

6. The circuit of claim 1, wherein the microcontroller is configured to program a frequency range of the set of envelopes.

7. The circuit of claim 1, wherein the control operation includes: a first control operation responsive to the monitoring result indicating that the measured frequency breaches an inner envelope of the set of envelopes; and a second control operation responsive to the monitoring result indicating that the measured frequency breaches an outer envelope of the set of envelopes.

8. The circuit of claim 1, wherein the microcontroller is configured to predict a resonant converter gain trajectory in response to the monitoring result, and the control operation is based on the predicted resonant converter gain trajectory.

9. The circuit of claim 8, wherein the microcontroller is configured to predict the resonant converter gain trajectory using Kalman filtering.

10. A microcontroller comprising: a processor configured to: receive a signal associated with operation of a power converter; and provide a switch control signal in response to the signal; and a waveform analyzer in communication with the microcontroller and configured to: measure a frequency of the switch control signal; and compare the measured frequency to obtain a monitoring result in response to a set of envelopes including an inner envelope and an outer envelope.

11. The microcontroller of claim 10, wherein the processor is configured to adjust the switch control signal in response to a first control loop and a second control loop, the second control loop being responsive to the monitoring result, and the first control loop being responsive to the signal and slower than the second control loop.

12. The microcontroller of claim 10, wherein the waveform analyzer is configured to update or shift the inner envelope without intervention of the processor in response to the monitoring result. ​ 13. The microcontroller of claim 12, wherein the waveform analyzer is configured to: detect whether a frequency excursion is greater than a threshold in response to the monitoring result; and generate a direct memory access (DMA) request in response to the detected frequency excursion being greater than the threshold.

14. The microcontroller of claim 10, wherein the waveform analyzer is configured to generate an interrupt to the processor in response to the monitoring result.

15. The microcontroller of claim 10, wherein the processor is configured to program a frequency range for the inner envelope and the outer envelope.

16. The microcontroller of claim 10, wherein the waveform analyzer is configured to perform: a first control operation in response to the monitoring result indicating that the measured frequency breaches the inner envelope; and a second control operation in response to the monitoring result indicating that the measured frequency breaches the outer envelope.

17. The microcontroller of claim 10, wherein the waveform analyzer is configured to: predict a resonant converter gain trajectory in response to the monitoring result; and perform a control operation in response to the predicted resonant converter gain trajectory.

18. A system comprising: a power converter; and a microcontroller coupled to the power converter and configured to: receive a signal associated with operation of the power converter; adjust a switch control signal in response to the signal; measure a frequency of the switch control signal; compare the measured frequency against at least one envelope of a set of envelopes to obtain a monitoring result in response; and perform a control operation in response to the monitoring result.

19. The system of claim 18, wherein the microcontroller is configured to adjust the switch control signal in response to a first control loop and a second control loop, the second control loop being responsive to the monitoring result and the first control loop being responsive to a sensed signal and slower than the second control loop.

20. The system of claim 18, wherein the power converter is a resonant converter and the microcontroller is configured to predict a resonant converter gain trajectory in response to the monitoring result, and the control operation is based on the predicted resonant converter gain trajectory. ​

Images