Signal acquisition system of photoelectric detector

Abstract

The invention provides a signal acquisition system of a photoelectric detector. In the signal acquisition system, a transimpedance pre-amplification circuit is arranged at the output end of the photoelectric detector, and a passive high-pass filter circuit is connected between the transimpedance pre-amplification circuit and a post-voltage amplification circuit. And a feedback network is formed in the transimpedance pre-amplification circuit and is used for converting a current signal output by the photoelectric detector into a proportional first voltage signal and outputting the proportional first voltage signal. The filter circuit is a third-order LC high-pass filter circuit and is used for suppressing direct current, low frequency and self-beat frequency components and keeping a 10-90MHz pass band flat. The rear voltage amplification circuit adopts a voltage amplification structure of a voltage operational amplifier, the voltage gain Av is 6-10, and the super-band gain is limited through a shunt capacitor. According to the embodiment of the invention, through the structure and parameter setting, the noise gain peak value is suppressed, and the system stability is improved.

Description

Technical Field

[0001] This invention relates to the field of optical signal receiving system technology, and more particularly to a signal acquisition system for a photodetector. Background Technology

[0002] Current devices generally operate photodetectors in a current-mode manner, converting transient currents in the picoampere to nanoampere range into usable voltage signals via transimpedance amplifiers. Beat frequency signals typically reside in the mid-to-high frequency range of hundreds of kilohertz to tens of megahertz, and are superimposed with baseline DC and low-frequency components from the environment and optical path, as well as possible beat frequency components. In this application context, current devices generally employ a front-end architecture: the photodetector output is pre-amplified via transimpedance amplification followed by broadband voltage amplification, and then an analog bandpass / high-pass filter or the full-bandwidth signal is directly fed into a high-speed sampler for filtering and down-conversion in the digital domain.

[0003] In scenarios where the photodetector output contains DC background, low-frequency drift, and beat frequency components, this type of link involving transimpedance to broadband voltage amplification and subsequent bandpass / digital filtering suffers from DC and low-frequency components being amplified along with the useful beat frequency components and fed into subsequent stages or the ADC. This results in the front-end dynamic range being occupied by non-target components, leading to a decrease in the equivalent signal-to-noise ratio and effective bit depth. When background intensity or optical path disturbances increase, the transimpedance output and the first-stage voltage amplification are more prone to saturation or compression, resulting in longer recovery times, transient loss, and baseline skewing. To prevent drift, engineering practices typically involve increasing the full-scale range or decreasing the gain. However, this moves the weak signal operating point away from full scale, reducing quantization efficiency. The data end needs to increase sampling accuracy and throughput, increasing power consumption and cost. Due to the lack of early band-limiting in the analog domain, out-of-band and mirror-adjacent components rely more heavily on back-end decimation and digital filtering for suppression. If the front-end clock and sampling bandwidth are limited, out-of-band energy may aliasing occur during sampling, increasing the difficulty of digital domain suppression and amplifying numerical noise propagation. Considering the above factors, in devices with strong background, wide dynamic range, or those sensitive to power consumption and data rate, this type of link faces a dilemma in balancing dynamic range utilization, saturation robustness, and system resource consumption. Summary of the Invention

[0004] This invention provides a signal acquisition system for a photodetector, which effectively suppresses noise gain peaks and improves system stability by introducing a passive high-pass filter between the transimpedance preamplifier circuit and the voltage postamplifier circuit, and by coordinating the structure and parameters of each stage circuit.

[0005] In a first aspect, embodiments of the present invention provide a signal acquisition system for a photodetector, the signal acquisition system comprising a transimpedance preamplifier circuit, a filter circuit, and a post-voltage amplifier circuit;

[0006] The transimpedance preamplifier circuit is disposed at the output terminal of the photodetector and is used to convert the current signal output by the photodetector into a proportional first voltage signal and output it; the filter circuit is connected between the transimpedance preamplifier circuit and the post-voltage amplifier circuit and is used to filter the first voltage signal; the post-voltage amplifier circuit is used to amplify the filtered voltage signal and output it.

[0007] Optionally, the transimpedance preamplifier circuit includes a transimpedance operational amplifier, a first feedback resistor, and a first feedback capacitor;

[0008] The inverting input terminal of the transimpedance operational amplifier is connected to the output terminal of the photodetector. The first feedback resistor is connected in series between the inverting input terminal and the output terminal of the transimpedance operational amplifier. The first feedback capacitor is connected in parallel with the first feedback resistor.

[0009] The gain-bandwidth product of the transimpedance operational amplifier is GWB, the closed-loop transimpedance bandwidth of the transimpedance preamplifier circuit is FTIA, the resistance of the first feedback resistor is Rf1, and the capacitance of the first feedback capacitor is Cf1; wherein, FTIA≥90 MHz, GWB≥8GHz, 330Ω<Rf1<820Ω, and 0.2pF<Cf1<1pF.

[0010] Optionally, the filtering circuit includes a first filtering capacitor, a second filtering capacitor, a third filtering capacitor, a first filtering inductor, and a second filtering inductor;

[0011] The second filter capacitor is connected in series between the first filter capacitor and the third filter capacitor. The first terminal of the first filter capacitor is connected to the output terminal of the transimpedance operational amplifier, and the second terminal of the third filter capacitor is connected to the input terminal of the post-voltage amplifier circuit.

[0012] The first filter inductor is connected in parallel between the first filter capacitor and the second filter capacitor;

[0013] The second filter inductor is connected in parallel between the second filter capacitor and the third filter capacitor.

[0014] Optionally, the capacitance values ​​of the first filter capacitor, the second filter capacitor, and the third filter capacitor are all within a first preset range, which is (150pF, 470pF).

[0015] The inductance values ​​of the first filter inductor and the second filter inductor are both within a second preset range, which is (0.82µH, 1.8µH).

[0016] Optionally, the cutoff frequency of the filter circuit is 6MHz.

[0017] Optionally, the post-voltage amplifier circuit includes a voltage operational amplifier, a second feedback resistor, and a second feedback capacitor;

[0018] The inverting input terminal of the voltage operational amplifier is connected to the output terminal of the filter circuit. The second feedback resistor is connected in series between the inverting input terminal and the output terminal of the voltage operational amplifier. The second capacitor is connected in parallel with the second feedback resistor.

[0019] Optionally, the signal acquisition system may also include a power supply circuit;

[0020] The power supply circuit includes a first power supply unit and a second power supply unit;

[0021] The first power supply unit is used to provide voltage to the negative power supply terminal of the transimpedance operational amplifier and the negative power supply terminal of the voltage operational amplifier;

[0022] The second power supply unit is used to provide voltage to the positive power supply terminal of the transimpedance operational amplifier and the positive power supply terminal of the voltage operational amplifier.

[0023] Optionally, the first power supply unit includes a first step-down module and a first filter module;

[0024] The first step-down module includes a first switching regulator, a second switching regulator, a first inductor, and a third capacitor;

[0025] The first terminal of the first switching regulator is connected to the first power supply terminal, the second terminal of the first switching regulator is connected to the first terminal of the second switching regulator and the first terminal of the first inductor, and the second terminal of the second switching regulator is connected to the first power supply terminal and the first terminal of the third capacitor.

[0026] The second terminal of the first inductor and the second terminal of the third capacitor are connected to the ground terminal.

[0027] The first filtering module includes a fourth filtering capacitor, a fifth filtering capacitor, a sixth filtering capacitor, a third filtering inductor, a fourth filtering inductor, and a fifth filtering inductor;

[0028] The fourth filter inductor is connected in series between the third filter inductor and the fifth filter inductor, and the first end of the third filter inductor is connected to the first step-down module.

[0029] The first end of the fourth filter capacitor is connected between the third filter inductor and the fourth filter inductor, the first end of the fifth filter capacitor is connected between the fifth filter inductor and the sixth filter inductor, and the first end of the sixth filter capacitor and the second end of the fifth filter inductor are both connected to the negative power supply terminal of the transimpedance operational amplifier and the negative power supply terminal of the voltage operational amplifier.

[0030] The second terminals of the fourth, fifth, and sixth filter capacitors are all connected to the ground terminal.

[0031] Optionally, the second power supply unit includes a second step-down module and a second filter module;

[0032] The second step-down module includes a third switching regulator, a fourth switching regulator, a second inductor, and a fourth capacitor;

[0033] The first terminal of the third switching regulator is connected to the first power supply terminal, the second terminal of the third switching regulator is connected to the first terminal of the fourth switching regulator and the first terminal of the second inductor, and the second terminal of the fourth switching regulator is connected to the first power supply terminal and the first terminal of the fourth capacitor.

[0034] The second terminal of the second inductor and the second terminal of the fourth capacitor are connected to the ground terminal;

[0035] The second filtering module includes a seventh filtering capacitor, an eighth filtering capacitor, a ninth filtering capacitor, a sixth filtering inductor, a seventh filtering inductor, and an eighth filtering inductor;

[0036] The seventh filter inductor is connected in series between the sixth filter inductor and the eighth filter inductor, and the first end of the sixth filter inductor is connected to the second step-down module.

[0037] The first end of the seventh filter capacitor is connected between the sixth filter inductor and the seventh filter inductor. The first end of the eighth filter capacitor is connected between the seventh filter inductor and the eighth filter inductor. The first end of the ninth filter capacitor and the second end of the eighth filter inductor are both connected to the positive power supply terminal of the transimpedance operational amplifier and the positive power supply terminal of the voltage operational amplifier.

[0038] The second terminals of the seventh, eighth, and ninth filter capacitors are all connected to the ground terminal.

[0039] Optionally, the photodetector includes a current-type photodetector, which includes one of a photomultiplier tube, an avalanche photodiode, or a silicon photomultiplier tube.

[0040] In summary, the signal acquisition system in this embodiment of the invention includes a transimpedance preamplifier circuit, a filter circuit, and a post-voltage amplifier circuit. The transimpedance preamplifier circuit is located at the output terminal of the photodetector, and a passive high-pass filter circuit is connected between the transimpedance preamplifier circuit and the post-voltage amplifier circuit. A feedback network is formed in the transimpedance preamplifier circuit to convert the current signal output by the photodetector into a proportional first voltage signal and output it. The filter circuit is a third-order LC high-pass filter used to suppress DC, low-frequency, and Selfie components and maintain a flat 10–90MHz passband. The post-voltage amplifier circuit adopts a voltage amplification structure of a voltage operational amplifier with a voltage gain Av of 6–10, and the overband gain is limited by a parallel capacitor. This embodiment of the invention, through the above-described structure and parameter settings, suppresses noise gain peaks and improves system stability. Attached Figure Description

[0041] Figure 1 This is a circuit diagram of a signal acquisition system for a photodetector provided in an embodiment of the present invention. Detailed Implementation

[0042] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be fully described below with reference to the accompanying drawings in the embodiments of this invention, through specific implementation methods. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort fall within the protection scope of this invention.

[0043] Figure 1 This is a circuit diagram of a signal acquisition system for a photodetector provided in an embodiment of the present invention. See also: Figure 1 The signal acquisition system includes a transimpedance preamplifier circuit 10, a filter circuit 20, and a post-voltage amplifier circuit 30. The transimpedance preamplifier circuit 10 is located at the output terminal of the photodetector 01 and is used to convert the current signal output by the photodetector into a proportional first voltage signal and output it. The filter circuit 20 is connected between the transimpedance preamplifier circuit 10 and the post-voltage amplifier circuit 30.

[0044] Specifically, such as Figure 1As shown, the signal acquisition system of this embodiment includes a transimpedance preamplifier circuit 10, a filter circuit 20, and a post-voltage amplifier circuit 30. The transimpedance preamplifier circuit 10 is located at the output terminal of the photodetector 01. The current signal generated by the photodetector 01 is transmitted to the input terminal of the transimpedance preamplifier circuit 10, which converts the current signal into a proportional first voltage signal and outputs it. The input terminal of the filter circuit 20 is connected to the output terminal of the transimpedance preamplifier circuit 10 to filter the first voltage signal. The output terminal of the filter circuit 20 is connected to the input terminal of the post-voltage amplifier circuit 30, transmitting the filtered first voltage signal to the input terminal of the post-voltage amplifier circuit 30. The post-voltage amplifier circuit 30 amplifies the first voltage signal by a set factor, thereby outputting a second voltage signal. For example, in one embodiment, the transimpedance preamplifier circuit 10 converts the current signal generated by the photodetector 01 into a voltage signal multiplied by 400. After being filtered by the filter circuit 20, it enters the post-voltage amplifier circuit 30, where it is amplified 10 times, finally outputting a pure voltage signal amplified 4000 times. The transimpedance preamplifier circuit 10 forms a feedback network that converts the current signal output by the photodetector into a proportional first voltage signal and outputs it. The filter circuit 20 is a third-order LC high-pass filter with a cutoff frequency of around 6MHz, used to suppress DC, low-frequency, and self-timer components and maintain a flat 10–90MHz passband. The post-voltage amplifier circuit 30 employs a voltage operational amplifier structure with a voltage gain Av of 6–10, and limits the overband gain through a parallel capacitor. Thus, through the above structure and parameter settings, noise gain peaks can be suppressed, improving system stability.

[0045] In summary, in this embodiment of the invention, the transimpedance preamplifier circuit is located at the output terminal of the photodetector, and the filter circuit is connected between the transimpedance preamplifier circuit and the post-voltage amplifier circuit. A feedback network is formed in the transimpedance preamplifier circuit to convert the current signal output by the photodetector into a proportional first voltage signal for output. The filter circuit is a third-order LC high-pass filter used to suppress DC, low-frequency, and Selfie components while maintaining a flat 10–90MHz passband. The post-voltage amplifier circuit employs a voltage operational amplifier structure with a voltage gain Av of 6–10, and the overband gain is limited by a parallel capacitor. This embodiment of the invention, through the above structure and parameter settings, suppresses noise gain peaks and improves system stability.

[0046] Optional, see below Figure 1The transimpedance preamplifier circuit 10 includes a transimpedance operational amplifier U1, a first feedback resistor R1, and a first feedback capacitor C1. The inverting input of the transimpedance operational amplifier U1 is connected to the output of the photodetector O1. The first feedback resistor R1 is connected in series between the inverting input and the output of the transimpedance operational amplifier U1. The first feedback capacitor C1 is connected in parallel with the first feedback resistor R1. The gain-bandwidth product of the transimpedance operational amplifier U1 is GWB, the closed-loop transimpedance bandwidth of the transimpedance preamplifier circuit is FTIA, the resistance of the first feedback resistor R1 is Rf1, and the capacitance of the first feedback capacitor C1 is Cf1; wherein, FTIA ≥ 90 MHz, GWB ≥ 8 GHz, 330Ω < Rf1 < 820Ω, and 0.2pF < Cf1 < 1pF.

[0047] The transimpedance preamplifier circuit 10 includes a transimpedance operational amplifier U1, a first feedback resistor R1, and a first feedback capacitor C1. The inverting input of the transimpedance operational amplifier U1 is connected to the output of the photodetector O1. The first feedback resistor R1 is connected in series between the inverting input and the output of the transimpedance operational amplifier U1. The first feedback capacitor C1 is connected in parallel with the first feedback resistor R1. Based on the above, the phase margin of the transimpedance operational amplifier U1 can be adjusted by setting the resistance value Rf1 of the first feedback resistor R1 and the capacitance value Cf1 of the first feedback capacitor C1. Specifically, in this embodiment of the invention, by setting 330Ω < Rf1 < 820Ω and 0.2pF < Cf1 < 1pF, the phase margin of the transimpedance operational amplifier U1 is ensured to be within the range of 45-60°, thereby ensuring that there is no obvious ringing in the step response and improving system stability. In addition, by designing the phase margin to be above 45°, the peak value of the noise gain can be effectively suppressed, making the noise gain curve flat and avoiding noise amplification at the bandwidth edge. Furthermore, the closed-loop transimpedance bandwidth of the transimpedance preamplifier circuit 10 is designed as FTIA according to 1 / (2π·Rf·Ct), where Rf is the transimpedance gain of the transimpedance operational amplifier U1; the larger Rf is, the stronger the amplification capability. Ct is the total input capacitance, which may include the connection capacitance of the photodetector 01, the input capacitance of the transimpedance operational amplifier U1, and the parasitic capacitance of the circuit board. In this embodiment of the invention, it is applied to the beat frequency fluorescence signal generated by frequency shift excitation and dual-channel modulation, and its effective beat frequency band is in the range of 10-90 MHz. Therefore, the bandwidth FTIA of the transimpedance operational amplifier U1 is set to be ≥90 MHz. Furthermore, the gain-bandwidth product (GWB GBW) of the transimpedance operational amplifier U1 is set to be ≥8GHz, which provides a margin of more than 10 times relative to the 90 MHz bandwidth. As a result, the open-loop gain of the transimpedance operational amplifier U1 remains high at 90 MHz, thus making the closed-loop frequency response very flat in the 10-90 MHz range (the amplitude-frequency flatness within the operating band is preferably controlled within ±1dB), and it will not decrease due to the decrease in the open-loop gain.

[0048] Optionally, based on the above embodiments, see also... Figure 1 The filter circuit 20 includes a first filter capacitor Cft1, a second filter capacitor Cft2, a third filter capacitor Cft3, a first filter inductor Lft1, and a second filter inductor Lft2. The second filter capacitor Cft2 is connected in series between the first filter capacitor Cft1 and the third filter capacitor Cft3. The first terminal of the first filter capacitor Cft1 is connected to the output terminal of the transimpedance operational amplifier U1, and the second terminal of the third filter capacitor Cft3 is connected to the input terminal of the post-voltage amplifier circuit 30. The first filter inductor Lft1 is connected in parallel between the first filter capacitor Cft1 and the second filter capacitor Cft2, and the second filter inductor Lft2 is connected in parallel between the second filter capacitor Cft2 and the third filter capacitor Cft3.

[0049] Specifically, the first terminal of the first filter capacitor Cft1 is connected to the output terminal of the transimpedance operational amplifier U1. The second terminal of the first filter capacitor Cft1 is connected to the first terminal of the second filter capacitor Cft2 and the first terminal of the first filter inductor Lft1. The second terminal of the second filter capacitor Cft2 is connected to the first terminal of the third filter capacitor Cft3 and the first terminal of the second inductor L2. The second terminal of the third filter capacitor Cft3 is connected to the input terminal of the post-voltage amplifier circuit 30. The second terminals of the first filter inductor Lft1 and the second filter inductor Lft2 are both connected to the power supply ground. Thus, a third-order passive high-pass filter is formed by the series-connected filter capacitors and the parallel-connected filter inductors to remove low-frequency baseline and Selfie interference. Based on the above circuit, the capacitance values ​​of the first filter capacitor Cft1, the second filter capacitor Cft2, and the third filter capacitor Cft3 are all set within a first preset range, which is (150pF, 470pF). The inductance values ​​of both the first filter inductor Lft1 and the second filter inductor Lft2 are within a second preset range, which is (0.82µH, 1.8µH). This sets the high-pass cutoff frequency of the filter circuit 20 in the range of 4MHz - 10MHz, providing 40dB-50dB suppression at the Selfie frequency (typically 0.8 - 4 MHz), significantly suppressing the 0.8 - 4 MHz Selfie frequency / power frequency and its low-order components, while maintaining amplitude-frequency fluctuations within the 10MHz-90MHz passband ≤ ±1dB, i.e., not destroying the 10MHz-90MHz passband characteristics, and significantly reducing baseline drift and low-frequency amplitude modulation interference.

[0050] Preferably, in one embodiment, the cutoff frequency of the filter circuit is 6MHz, thereby further ensuring significant suppression of the 0.8-4MHz selfie frequency / power frequency and its low-order components.

[0051] Optionally, based on the above embodiments, see also... Figure 1 The post-voltage amplifier circuit 30 includes a voltage operational amplifier U2, a second feedback resistor R2, and a second capacitor C2. The inverting input terminal of the voltage operational amplifier U2 is connected to the output terminal of the filter circuit 20. The second feedback resistor R2 is connected in series between the inverting input terminal and the output terminal of the voltage operational amplifier U2. The second capacitor C2 is connected in parallel with the second feedback resistor R2.

[0052] Specifically, the voltage gain of the post-amplifier circuit is Av, where 6 ≤ Av ≤ 10, to amplify the filtered first voltage signal. Furthermore, a second capacitor C2 is connected in parallel with the feedback branch to set the zero point at 100MHz-150MHz to limit overband gain and improve step recovery. Additionally, the combined equivalent transimpedance Rt = Rf2 × Av of the transimpedance stage and voltage stage is 3-8 kΩ (preferably ≈ 5.4 kΩ), where Rf2 is the resistance of the second feedback resistor R2. While ensuring in-band fidelity, the passband integral output noise is preferably ≤30mV_rms; the equivalent current noise density referred to the input terminal can be no higher than 0.7pA / √Hz, significantly improving the output signal-to-noise ratio under the same illumination. Moreover, the equivalent transimpedance Rt, combined with the front-end high-pass filter to release low-frequency energy and reduce baseline bias, significantly improves the full-scale margin, maintaining no saturation or rapid recovery even in high-intensity transients or detector junction capacitance fluctuation scenarios.

[0053] Optionally, based on the above embodiments, see also... Figure 1 The signal acquisition system also includes a power supply circuit 40. The power supply circuit 40 includes a first power supply unit 410 and a second power supply unit 420. The first power supply unit 410 provides voltage to the negative power supply terminal of the transimpedance operational amplifier U1 and the negative power supply terminal of the voltage operational amplifier U2. The second power supply unit 420 provides voltage to the positive power supply terminal of the transimpedance operational amplifier U1 and the positive power supply terminal of the voltage operational amplifier U2.

[0054] Specifically, such as Figure 1As shown, the power supply of this system is divided into two paths: a first power supply unit 410 and a second power supply unit 420. The first power supply unit 410 includes a first step-down module 4101 and a first filter module 4102. The first step-down module 4101 includes a first switching regulator Z1, a second switching regulator Z2, a first inductor L1, and a third capacitor C3. The first terminal of the first switching regulator Z1 is connected to the first power supply terminal VCC. The second terminal of the first switching regulator Z1 is connected to the first terminal of the second switching regulator Z2 and the first terminal of the first inductor L1. The second terminal of the second switching regulator Z2 is connected to the first power supply terminal VCC and the first terminal of the third capacitor C3. The second terminals of the first inductor L1 and the third capacitor C3 are connected to the ground terminal GND. Thus, the power supplied by the first power supply terminal VCC is reduced (e.g., from 18V to -2.5V) through the first switching regulator Z1 and the second switching regulator Z2 in the first step-down module 4101. The first filtering module 4102 includes a fourth filtering capacitor Cft4, a fifth filtering capacitor Cft5, a sixth filtering capacitor Cft6, a third filtering inductor Lft3, a fourth filtering inductor Lft4, and a fifth filtering inductor Lft5. The fourth filtering inductor Lft4 is connected in series between the third filtering inductor Lft3 and the fifth filtering inductor Lft5. The first terminal of the third filtering inductor Lft3 is connected to the first step-down module 1401. The first terminal of the fourth filtering capacitor Cft4 is connected between the third filtering inductor Lft3 and the fourth filtering inductor Lft4. The first terminal of the fifth filtering capacitor Cft5 is connected between the fifth filtering inductor Lft5 and the sixth filtering inductor Lft6. The first terminal of the sixth filtering capacitor Cft6 and the second terminal of the fifth filtering inductor Lft5 are both connected to the negative power supply terminals of the transimpedance operational amplifier U1 and the voltage operational amplifier U2, respectively. The second terminals of the fourth filtering capacitor Cft4, the fifth filtering capacitor Cft5, and the sixth filtering capacitor Cft6 are all connected to the ground terminal GND. Thus, by using a three-stage "series filter inductor + ground filter capacitor array", the injection of power supply ripple and switching harmonics into the transimpedance / wideband amplifier stage is significantly reduced, and the in-band amplitude and phase stability and repeatability are improved.

[0055] It should be noted that the first switching regulator Z1 and the second switching regulator Z2 can be inverting buck switching regulators. The first power supply terminal can provide an 18V power supply voltage. The control terminals of the first switching regulator Z1 and the second switching regulator Z2 are connected to the control module. Under the control of the control module, the first switching regulator Z1 and the second switching regulator Z2 can reduce the 18V power supply voltage provided by the first power supply terminal to -2.5V.

[0056] Similarly, the second power supply unit 420 includes a second step-down module 4201 and a second filter module 4202. The second step-down module 4201 includes a third switching regulator Z3, a fourth switching regulator Z4, a second inductor L2, and a fourth capacitor C4. The first terminal of the third switching regulator Z3 is connected to the first power supply terminal VCC, the second terminal of the third switching regulator Z3 is connected to the first terminal of the fourth switching regulator Z4 and the first terminal of the second inductor L2, and the second terminal of the fourth switching regulator Z4 is connected to the first power supply terminal VCC and the first terminal of the fourth capacitor C4.

[0057] The second terminal of the second inductor L2 and the second terminal of the fourth capacitor C4 are connected to the ground terminal GND. Thus, the power supplied by the first power supply terminal VCC is reduced (e.g., from 18V to 2.5V) through the third switching regulator Z3 and the fourth switching regulator Z4 in the second step-down module 4201. The second filter module 4202 includes a seventh filter capacitor Cft7, an eighth filter capacitor Cft8, a ninth filter capacitor Cft9, a sixth filter inductor Lft6, a seventh filter inductor Lft7, and an eighth filter inductor Lft8. The seventh filter inductor Lft7 is connected in series between the sixth filter inductor Lft6 and the eighth filter inductor Lft8, and the first terminal of the sixth filter inductor Lft6 is connected to the second step-down module 4201. The first terminal of the seventh filter capacitor Cft7 is connected between the sixth filter inductor Lft6 and the seventh filter inductor Lft7. The first terminal of the eighth filter capacitor Cft8 is connected between the seventh filter inductor Lft7 and the eighth filter inductor Lft8. The first terminal of the ninth filter capacitor Cft9 and the second terminal of the eighth filter inductor Lft8 are both connected to the positive power supply terminals of the transimpedance operational amplifier U1 and the voltage operational amplifier U2, respectively. The second terminals of the seventh filter capacitor Cft7, the eighth filter capacitor Cft8, and the ninth filter capacitor Cft9 are all connected to the ground terminal GND. In this way, by using a three-stage "series filter inductor + ground filter capacitor array", the injection of power supply ripple and switching harmonics into the transimpedance / wideband amplifier stage is significantly reduced, and the in-band amplitude and phase stability and repeatability are improved.

[0058] It should be noted that the third switching regulator Z3 and the fourth switching regulator Z4 can be step-down switching regulators. The first power supply terminal can provide an 18V power supply voltage. The control terminals of the third switching regulator Z3 and the fourth switching regulator Z4 are connected to the control module. Under the control of the control module, the third switching regulator Z3 and the fourth switching regulator Z4 can reduce the 18V power supply voltage provided by the first power supply terminal to 2.5V.

[0059] It should also be noted that in the above circuit, the filter inductors of each stage in the first filter module 4102 and the second filter module 4202 are preferably in the range of 330nH (which can be selected in the range of 220nH-560nH). The filter capacitors to ground of each stage adopt a stepped distribution of a capacitor array of "µF stage and nF stage in parallel" (typically a combination of 10µF, 1nF and 100nF) to implement segmented attenuation of the switching fundamental wave and its high-frequency components in the range of hundreds of kHz to tens of MHz, and to reduce the AC impedance from rail to ground.

[0060] Based on the above, photodetector 01 includes a current-type photodetector, which includes one of a photomultiplier tube, an avalanche photodiode, or a silicon photomultiplier tube. The above-described structure and parameter limitations can be applied to any one of a photomultiplier tube, an avalanche photodiode, or a silicon photomultiplier tube, and this invention does not impose any limitation on this.

[0061] Note that the above description is merely a preferred embodiment of the present invention and the technical principles employed. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and various obvious changes, readjustments, combinations, and substitutions can be made without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments, and may include many other equivalent embodiments without departing from the concept of the present invention, the scope of which is determined by the scope of the appended claims.

Claims

1. A signal acquisition system of a photodetector, characterized in that, the signal acquisition system comprises a transimpedance preamplification circuit, a filter circuit and a post-voltage amplification circuit; the transimpedance preamplification circuit is arranged at an output end of the photodetector, and is configured to convert a current signal output by the photodetector into a proportional first voltage signal and output the first voltage signal; the filter circuit is connected between the transimpedance preamplification circuit and the post-voltage amplification circuit, and is configured to filter the first voltage signal; and the post-voltage amplification circuit is configured to amplify and output the filtered voltage signal.

2. The signal acquisition system of claim 1, wherein, the transimpedance preamplification circuit comprises a transimpedance operational amplifier, a first feedback resistor and a first feedback capacitor; the inverting input end of the transimpedance operational amplifier is connected to the output end of the photodetector, the first feedback resistor is arranged in series between the inverting input end of the transimpedance operational amplifier and the output end of the transimpedance operational amplifier, and the first feedback capacitor is arranged in parallel with the first feedback resistor; a gain-bandwidth product of the transimpedance operational amplifier is GWB, a closed-loop transimpedance bandwidth of the transimpedance preamplification circuit is FTIA, a resistance value of the first feedback resistor is Rf1, and a capacitance value of the first feedback capacitor is Cf1; wherein FTIA≥90MHz, GWB≥8GHz, 330Ω 3. The signal acquisition system according to claim 1, characterized in that, the filter circuit comprises a first filter capacitor, a second filter capacitor, a third filter capacitor, a first filter inductor and a second filter inductor; the second filter capacitor is arranged in series between the first filter capacitor and the third filter capacitor, a first end of the first filter capacitor is connected to the output end of the transimpedance operational amplifier, and a second end of the third filter capacitor is connected to an input end of the post-voltage amplification circuit; the first filter inductor is arranged in parallel between the first filter capacitor and the second filter capacitor; the second filter inductor is arranged in parallel between the second filter capacitor and the third filter capacitor.

4. The signal acquisition system according to claim 3, characterized in that, the capacitance value of the first filter capacitor, the capacitance value of the second filter capacitor and the capacitance value of the third filter capacitor are all within a first preset range, and the first preset range is (150pF, 470pF); the inductance value of the first filter inductor and the inductance value of the second filter inductor are both within a second preset range, and the second preset range is (0.82µH, 1.8µH).

5. The signal acquisition system according to claim 3, characterized in that, a cutoff frequency of the filter circuit is 6MHz.

6. The signal acquisition system according to claim 1, characterized in that, the post-voltage amplification circuit comprises a voltage operational amplifier, a second feedback resistor and a second capacitor. An inverting input terminal of the voltage operational amplifier is connected with an output terminal of the filter circuit, a second feedback resistor is arranged in series between the inverting input terminal of the voltage operational amplifier and an output terminal of the voltage operational amplifier, and the second capacitor is arranged in parallel with the second feedback resistor.

7. The signal acquisition system of claim 6, wherein, The signal acquisition system further comprises a power supply circuit; The power supply circuit comprises a first power supply unit and a second power supply unit; The first power supply unit is configured to provide voltage for a negative power supply terminal of the transimpedance operational amplifier and a negative power supply terminal of the voltage operational amplifier; The second power supply unit is configured to provide voltage for a positive power supply terminal of the transimpedance operational amplifier and a positive power supply terminal of the voltage operational amplifier.

8. The signal acquisition system of claim 7, wherein, The first power supply unit comprises a first buck module and a first filter module; The first buck module comprises a first switch voltage regulator, a second switch voltage regulator, a first inductor, and a third capacitor; A first pole of the first switch voltage regulator is connected with a first power supply terminal, a second pole of the first switch voltage regulator is connected with a first pole of the second switch voltage regulator and a first end of the first inductor respectively, and a second pole of the second switch voltage regulator is connected with the first power supply terminal and a first end of the third capacitor respectively; A second end of the first inductor and a second end of the third capacitor are connected with a ground terminal; The first filter module comprises a fourth filter capacitor, a fifth filter capacitor, a sixth filter capacitor, a third filter inductor, a fourth filter inductor, and a fifth filter inductor; The fourth filter inductor is arranged in series between the third filter inductor and the fifth filter inductor, and a first end of the third filter inductor is connected with the first buck module; A first end of the fourth filter capacitor is connected between the third filter inductor and the fourth filter inductor, a first end of the fifth filter capacitor is connected between the fifth filter inductor and the sixth filter inductor, and a first end of the sixth filter capacitor and a second end of the fifth filter inductor are connected with the negative power supply terminal of the transimpedance operational amplifier and the negative power supply terminal of the voltage operational amplifier; Second ends of the fourth filter capacitor, the fifth filter capacitor, and the sixth filter capacitor are connected with the ground terminal.

9. The signal acquisition system of claim 7, wherein, The second power supply unit comprises a second buck module and a second filter module; The second buck module comprises a third switch voltage regulator, a fourth switch voltage regulator, a second inductor, and a fourth capacitor; A first pole of the third switch voltage regulator is connected with the first power supply terminal, a second pole of the third switch voltage regulator is connected with a first pole of the fourth switch voltage regulator and a first end of the second inductor respectively, and a second pole of the fourth switch voltage regulator is connected with the first power supply terminal and a first end of the fourth capacitor respectively; A second end of the second inductor and a second end of the fourth capacitor are connected with the ground terminal; The second filter module comprises a seventh filter capacitor, an eighth filter capacitor, a ninth filter capacitor, a sixth filter inductor, a seventh filter inductor, and an eighth filter inductor; The seventh filter inductor is arranged in series between the sixth filter inductor and the eighth filter inductor, and a first end of the sixth filter inductor is connected to the second voltage reduction module; A first end of the seventh filter capacitor is connected between the sixth filter inductor and the seventh filter inductor, a first end of the eighth filter capacitor is connected between the seventh filter inductor and the eighth filter inductor, and a first end of the ninth filter capacitor and a second end of the eighth filter inductor are both connected to a positive power supply end of the trans-impedance operational amplifier and a positive power supply end of the voltage operational amplifier; Second ends of the seventh filter capacitor, the eighth filter capacitor and the ninth filter capacitor are all connected to a ground end.

10. The signal acquisition system of claim 1, wherein: The photodetector comprises a current-mode photodetector, and the current-mode photodetector comprises one of a photomultiplier tube, an avalanche photodiode, or a silicon photomultiplier.

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