Temperature detection circuit and chip
By combining a self-starting circuit, a bandgap circuit, a voltage regulator circuit, a negative temperature circuit, and an operational amplifier circuit, a positive temperature voltage that is positively correlated with temperature is generated, which solves the problem of low temperature detection accuracy in IPD, realizes high-precision and stable temperature detection, and improves the reliability and detection accuracy of the chip.
Patent Information
- Application Number
- CN202511457296.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-13
- Publication Date
- 2026-02-17
AI Technical Summary
Existing on-chip temperature detection circuits in IPDs suffer from low detection accuracy, leading to system malfunctions and reduced chip reliability. This is especially true when high-voltage power switching devices are operating, where the output value of the temperature detection module differs significantly from the actual value, resulting in an inability to respond promptly, heat buildup, and chip failure.
By employing a combination of self-starting circuit, bandgap circuit, voltage regulator circuit, negative temperature circuit, and operational amplifier circuit, a positive temperature voltage that is positively correlated with temperature is output to achieve high-precision temperature detection by generating a reference voltage, bias current, and voltage.
It achieves stable and high-precision temperature detection at different temperatures, avoids the influence of power supply voltage and temperature changes, provides easily digitized temperature readings, and improves the reliability and detection accuracy of the chip.
Smart Images

Figure CN121540307A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of integrated circuit technology, and in particular to a temperature detection circuit and a chip. Background Technology
[0002] Thermal stability is an indispensable aspect of IPD (Intelligent Power Device) circuit design, making on-chip temperature detection circuitry a crucial component. Since IPDs integrate high-voltage power switching devices such as IGBTs (Insulated Gate Bipolar Transistors), a sudden temperature rise due to an abnormal situation can lead to inaccurate temperature detection by the on-chip temperature detection module. This inaccurate readings—a significant discrepancy between the output and actual temperature values—can cause malfunctions in the microcontroller receiving the temperature signal at the system's front end. This not only reduces system efficiency but also allows heat to accumulate further without timely protection, decreasing reliability and ultimately causing chip failure. As a critical component of IPDs, the accuracy of on-chip temperature detection directly impacts the IPD's ability to function properly in complex and variable environments; therefore, research into high-precision temperature detection circuits is essential. Summary of the Invention
[0003] The purpose of this application is to provide a temperature detection circuit and a chip that can solve the problem of low accuracy in temperature detection chips.
[0004] To solve the above-mentioned technical problems, this application is implemented as follows: In a first aspect, embodiments of this application provide a temperature detection circuit disposed on a chip, the temperature detection circuit comprising: A self-starting circuit is used to output a startup current after the chip is powered on; A bandgap circuit, connected to the self-starting circuit, is used to generate a reference voltage based on the starting current output by the self-starting circuit; A voltage regulator circuit is used to output bias current and bias voltage according to the power supply voltage of the chip; A negative temperature circuit, connected to the voltage regulator circuit, is used to generate a negative temperature voltage that is negatively correlated with the temperature of the chip based on the bias current and bias voltage output by the voltage regulator circuit. An operational amplifier circuit is connected to the bandgap circuit and the negative temperature circuit respectively, and is used to output a positive temperature voltage that is positively correlated with the temperature of the chip based on the reference voltage and the negative temperature voltage; the positive temperature voltage is used to determine the temperature of the chip.
[0005] Optionally, the operational amplifier circuit includes an operational amplifier, the negative temperature circuit is connected to the positive input terminal of the operational amplifier, and the bandgap circuit is connected to the negative input terminal of the operational amplifier; the operational amplifier includes: A single-stage operational amplifier circuit is used to output a common-mode voltage based on the reference voltage and the negative temperature voltage; A common-mode feedback circuit forms a first loop with the first-stage operational amplifier circuit to stabilize the common-mode voltage output by the first-stage operational amplifier circuit. The second-stage operational amplifier circuit forms a second loop with the first-stage operational amplifier circuit, which is used for frequency compensation of the common-mode voltage; The output circuit is used to output a positive temperature voltage that is positively correlated with the temperature of the chip, based on the common-mode voltage.
[0006] Optionally, the secondary operational amplifier circuit includes a compensation capacitor; The compensation capacitors are connected to the output nodes of the first-stage operational amplifier circuit and the second-stage operational amplifier circuit, respectively, and are used to perform frequency compensation on the common-mode voltage.
[0007] Optionally, the output circuit includes: a first transistor and a second transistor; the control terminals of the first transistor and the second transistor are connected to the output terminal of the two-stage operational amplifier circuit, the input terminal of the first transistor is connected to the bias voltage, the output terminal of the first transistor is connected to the input terminal of the second transistor, and the output terminal of the second transistor is grounded; the output terminal of the positive temperature voltage is connected between the output terminal of the first transistor and the input terminal of the second transistor. When the common-mode voltage is less than or equal to a preset threshold, the conduction period of the first transistor and the second transistor is a full cycle; when the common-mode voltage is greater than the preset threshold, the conduction period of the first transistor and the second transistor is a half cycle.
[0008] Optionally, the operational amplifier circuit further includes: a first resistor connected between the positive input terminal of the operational amplifier and the negative temperature circuit; a second resistor connected between the positive input terminal of the operational amplifier and the output terminal of the operational amplifier; and a third resistor connected to the output terminal of the operational amplifier.
[0009] Optionally, the operational amplifier circuit is configured to acquire the resistance values of the first resistor, the second resistor, and the third resistor, as well as the reference voltage and the negative temperature voltage; and output a positive temperature voltage that is positively correlated with the temperature of the chip according to the following formula, based on the resistance values of the first resistor, the second resistor, and the third resistor, the reference voltage, and the negative temperature voltage:
[0010] in, Positive temperature voltage, As the reference voltage, It is a negative temperature voltage. .
[0011] Optionally, the bandgap circuit includes: a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, a first diode, a fourth resistor, a fifth resistor, and a sixth resistor; the third transistor, the fourth transistor, and the fifth transistor are connected in series; the fourth resistor, the fifth resistor, and the sixth resistor are connected in series; the control terminal of the sixth transistor is connected to the input terminal of the third transistor; the output terminal of the sixth transistor is connected to the control terminal of the seventh transistor; the input terminal of the sixth transistor is connected to the input terminal of the seventh transistor; the output terminal of the seventh transistor is connected to the sixth resistor; the anode of the first diode is connected to the fourth resistor; and the cathode of the first diode is connected to the output terminal of the fifth transistor; the output terminal of the reference voltage is connected between the fourth resistor and the fifth resistor. The bandgap circuit is used to obtain the resistance values of the fourth, fifth, and sixth resistors, the base-emitter voltages of the third, fourth, fifth, sixth, and seventh transistors, and the voltage of the first diode; and to generate a reference voltage according to the following formula, based on the resistance values of the fourth, fifth, and sixth resistors, the base-emitter voltages of the third, fourth, fifth, sixth, and seventh transistors, and the voltage of the first diode:
[0012] in, As the reference voltage, This is the resistance value of the fourth resistor. This is the resistance value of the fifth resistor. The resistance value of the sixth resistor. The voltage of the first diode is... This is the base-emitter voltage of the third transistor. This is the base-emitter voltage of the fourth transistor. This is the base-emitter voltage of the fifth transistor. This is the base-emitter voltage of the sixth transistor. This is the base-emitter voltage of the seventh transistor.
[0013] Optionally, the voltage regulator circuit includes: an eighth transistor, a ninth transistor, a seventh resistor, and an eighth resistor; one end of the seventh resistor is connected to the bias voltage, the other end of the seventh resistor is connected to the eighth resistor, the other end of the eighth resistor is connected to the input terminal and the control terminal of the ninth transistor, the control terminal of the ninth transistor is connected to the control terminal of the eighth transistor, the input terminal of the eighth transistor is connected to the bias current, and the output terminals of the eighth transistor and the ninth transistor are grounded; The voltage regulator circuit is used to obtain the width-to-length ratio of the eighth transistor and the ninth transistor, the voltage difference of the ninth transistor, and the resistance values of the seventh resistor and the eighth resistor; and outputs the bias current and the bias voltage according to the following formulas based on the width-to-length ratio of the eighth transistor and the ninth transistor, the voltage difference of the ninth transistor, and the resistance values of the seventh resistor and the eighth resistor:
[0014]
[0015] in, This is the bias voltage. For bias current, This is the resistance value of the seventh resistor. The resistance value of the eighth resistor. The voltage difference of the ninth transistor. The aspect ratio of the eighth transistor. This represents the aspect ratio of the ninth transistor.
[0016] Optionally, the negative temperature circuit includes a plurality of tenth transistors connected in series; the emitter junction of the tenth transistor is forward biased and the collector junction is reverse biased; when the temperature of the chip increases, the forward voltage drop of the tenth transistor decreases, and when the temperature of the chip decreases, the forward voltage drop of the tenth transistor increases.
[0017] Secondly, embodiments of this application provide a chip including the temperature detection circuit described above.
[0018] The embodiments of this application have the following advantages: The temperature detection circuit in this embodiment can be fully integrated inside the chip, eliminating the need for external components and saving PCB area and cost. The temperature detection circuit includes: a self-starting circuit, used to output a startup current after the chip is powered on, thereby providing a transient startup current during power-on to activate the bandgap circuit, solving the problem that the bandgap circuit may get stuck in a zero-state steady point and fail to start automatically during power-on. Furthermore, the startup circuit automatically shuts down, avoiding the consumption of additional static current in steady state; a bandgap circuit, connected to the self-starting circuit, used to generate a reference voltage based on the startup current output by the self-starting circuit. The reference voltage does not change with temperature or power supply voltage and can be used as a reference level; and a voltage regulator circuit, used to regulate the voltage based on the chip's output current. The circuit comprises a power supply voltage, an output bias current and a bias voltage. The regulated bias current and voltage improve measurement accuracy and anti-interference capability, preventing the positive temperature voltage from being affected by the power supply and causing measurement errors. A negative temperature circuit, connected to the voltage regulator circuit, generates a negative temperature voltage that is negatively correlated with the chip temperature based on the bias current and bias voltage output by the voltage regulator circuit. The negative temperature circuit exhibits good linearity over a wide temperature range and has a simple structure that is easy to integrate. An operational amplifier circuit, connected to both the bandgap circuit and the negative temperature circuit, outputs a positive temperature voltage that is positively correlated with the chip temperature based on the reference voltage and the negative temperature voltage. The positive temperature voltage is used to determine the chip temperature, enabling digital temperature reading. This embodiment of the temperature detection circuit, through a self-starting circuit, a bandgap circuit, a voltage regulator circuit, a negative temperature circuit, and an operational amplifier circuit, converts the unstable chip temperature into a stable, linear, and easily digitized voltage value, thereby providing a very accurate temperature reading that remains stable across different temperatures. Attached Figure Description
[0019] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0020] Figure 1 This is a structural block diagram of a temperature detection circuit according to an embodiment of this application; Figure 2 This is a circuit diagram of the operational amplifier circuit according to an embodiment of this application; Figure 3 This is a circuit diagram of an operational amplifier according to an embodiment of this application; Figure 4 This is a circuit diagram of the self-starting circuit and the bandgap circuit in an embodiment of this application; Figure 5 This is a circuit diagram of the voltage regulator circuit and the negative temperature circuit in an embodiment of this application; Figure 6 This is a schematic diagram of the stability simulation results of the operational amplifier in an embodiment of this application; Figure 7 This is a schematic diagram of different power supply voltage output offset curves according to an embodiment of this application; Figure 8 This is a partially enlarged schematic diagram of the output offset curves of different power supply voltages in an embodiment of this application; Figure 9 This is a schematic diagram of the output offset curves under different processes in the embodiments of this application; Figure 10 This is a partially enlarged schematic diagram of the output offset curves under different processes in the embodiments of this application.
[0021] Explanation of reference numerals in the attached figures: Self-starting circuit 11, bandgap circuit 12, voltage regulator circuit 13, negative temperature circuit 14, operational amplifier circuit 15, operational amplifier 21, first-stage operational amplifier circuit 31, common-mode feedback circuit 32, second-stage operational amplifier circuit 33, output circuit 34, bias circuit 35. Detailed Implementation
[0022] High reliability has always been a crucial performance indicator for IPDs (Intelligent Power Devices), and a highly challenging design problem in IPD research. IPDs are typically used in harsh operating environments, which causes a rapid increase in power consumption within the chip under abnormal conditions such as internal short circuits and extreme heat. However, due to packaging or system integration limitations, the generated heat cannot be quickly dissipated from the chip, causing its internal temperature to rise continuously. Even more serious is the fact that highly integrated IPDs often integrate high-voltage power switching devices such as IGBTs (Insulated Gate Bipolar Transistors) and medium-to-high voltage high-power MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors). Because these high-voltage power switching devices operate under high voltage and high current, they exhibit significant switching losses, leading to a continuous increase in internal power density and a tendency for the chip's internal temperature to rise. This temperature increase further exacerbates the problem. The on-resistance of a LIGBT (Lateral Insulated Gate Bipolar Transistor) increases due to its positive temperature characteristic, which in turn further increases the switching losses of the LIGBT, thus creating positive feedback. Without any temperature monitoring measures, the further accumulation of heat will seriously affect the normal operation of the chip, and may even cause the chip to fail directly. Obviously, the largest heat source in a monolithic integrated intelligent power drive chip that integrates high-voltage power switching devices such as IGBTs comes from the switching and conduction losses of these high-voltage power switching devices. This will inevitably lead to uneven temperature distribution inside the chip, resulting in an uneven temperature gradient on the chip surface. This causes the various circuit modules inside the chip to operate at different temperatures, thus adding great difficulty to the circuit design of the entire IPD.
[0023] In such highly integrated IPDs (Integrated Device Devices), device density and energy density continuously increase, and heat cannot be quickly dissipated to the external environment, causing the chip temperature to rise rapidly. If the chip operates at high temperatures for extended periods, it will not only deteriorate the performance parameters of the IPD's internal circuitry and the isolation effect between high-voltage and low-voltage diodes, but also cause device degradation phenomena such as hot carrier effects and high-temperature gate reverse bias effects. All of these will seriously impair the reliability of the entire motor drive system. Studies have shown that for every 1°C increase in chip temperature, the driving capability of MOSFETs decreases by approximately 4%, interconnect delay increases by 5%, and integrated circuit failure rate doubles.
[0024] Existing on-chip temperature detection uses a voltage generator to generate temperature-related voltage signals, which has the following problems: it can only output logic signals for turning off or recovering, and cannot directly obtain continuous temperature-related voltage signals, making it difficult for subsequent circuits to flexibly adjust and process them; when acquiring temperature signals through resistors, the resistors themselves consume additional power, and the introduction of resistors reduces the output swing of the circuit, thus limiting its performance in applications requiring high dynamic range.
[0025] To address the aforementioned problems, this application proposes a temperature detection circuit aimed at improving the accuracy of chip temperature detection. To achieve this goal, the temperature detection circuit in this application, through a self-starting circuit, a bandgap circuit, a voltage regulator circuit, a negative temperature circuit, and an operational amplifier circuit, converts the unstable chip temperature into a stable, linear, and easily digitized voltage value, thereby providing a very accurate temperature reading that remains stable across different temperatures.
[0026] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments.
[0027] Reference Figure 1 This diagram illustrates a structural block diagram of a temperature detection circuit according to an embodiment of this application. The temperature detection circuit is disposed on a chip and includes: The self-starting circuit 11 is used to output a startup current after the chip (not shown in the figure) is powered on; The bandgap circuit 12 is connected to the self-starting circuit 11 and is used to generate a reference voltage based on the starting current output by the self-starting circuit 11. The voltage regulator circuit 13 is used to output bias current and bias voltage according to the power supply voltage of the chip; The negative temperature circuit 14 is connected to the voltage regulator circuit 13 and is used to generate a negative temperature voltage that is negatively correlated with the temperature of the chip based on the bias current and bias voltage output by the voltage regulator circuit 13. Operational amplifier circuit 15 is connected to bandgap circuit 12 and negative temperature circuit 14 respectively, and is used to output positive temperature voltage that is positively correlated with the temperature of the chip according to the reference voltage and the negative temperature voltage; the positive temperature voltage is used to determine the temperature of the chip.
[0028] In this embodiment, the temperature detection circuit mainly includes a self-starting circuit, a bandgap circuit, a voltage regulator circuit, a negative temperature circuit, and an operational amplifier circuit. The self-starting circuit prevents the circuit from locking due to initial instability when the chip is powered on, ensuring smooth startup. The voltage regulator circuit can be an LDO (Low Dropout Regulator) circuit, providing a stable bias current (Ibias) and bias voltage (Vreg) to offer low-noise, stable power to the negative temperature circuit and operational amplifier circuit, while reducing power consumption and ensuring amplifier performance and stability. The bandgap circuit can be a bandgap circuit, outputting a temperature-independent reference voltage Vref. The negative temperature circuit utilizes the VBE (base-emitter voltage) characteristic of the transistor to output a voltage negatively correlated with temperature, providing a basis for subsequent temperature compensation and adjustment, ensuring the output voltage reflects temperature changes. The operational amplifier circuit can be a subtraction operational amplifier circuit, adjusting and calculating the voltage of the negative temperature circuit to generate an output voltage (VOT) positively correlated with temperature, i.e., a positive temperature voltage.
[0029] The temperature detection circuit in this embodiment can be fully integrated inside the chip, eliminating the need for external components and saving PCB area and cost. The temperature detection circuit includes: a self-starting circuit, used to output a startup current after the chip is powered on, thereby providing a transient startup current during power-on to activate the bandgap circuit, solving the problem that the bandgap circuit may get stuck in a zero-state steady point and fail to start automatically during power-on. Furthermore, the startup circuit automatically shuts down, avoiding the consumption of additional static current in steady state; a bandgap circuit, connected to the self-starting circuit, used to generate a reference voltage based on the startup current output by the self-starting circuit. The reference voltage does not change with temperature or power supply voltage and can be used as a reference level; and a voltage regulator circuit, used to regulate the voltage based on the chip's output current. The circuit comprises a power supply voltage, an output bias current and a bias voltage. The regulated bias current and voltage improve measurement accuracy and anti-interference capability, preventing the positive temperature voltage from being affected by the power supply and causing measurement errors. A negative temperature circuit, connected to the voltage regulator circuit, generates a negative temperature voltage that is negatively correlated with the chip temperature based on the bias current and bias voltage output by the voltage regulator circuit. The negative temperature circuit exhibits good linearity over a wide temperature range and has a simple structure that is easy to integrate. An operational amplifier circuit, connected to both the bandgap circuit and the negative temperature circuit, outputs a positive temperature voltage that is positively correlated with the chip temperature based on the reference voltage and the negative temperature voltage. The positive temperature voltage is used to determine the chip temperature, enabling digital temperature reading. This embodiment of the temperature detection circuit, through a self-starting circuit, a bandgap circuit, a voltage regulator circuit, a negative temperature circuit, and an operational amplifier circuit, converts the unstable chip temperature into a stable, linear, and easily digitized voltage value, thereby providing a very accurate temperature reading that remains stable across different temperatures.
[0030] Reference Figure 2 The diagram shows a circuit diagram of an operational amplifier circuit according to an embodiment of this application. The operational amplifier circuit 15 includes: an operational amplifier 21; a negative temperature circuit 14 connected to the positive input terminal of the operational amplifier 21; and a bandgap circuit 12 connected to the negative input terminal of the operational amplifier 21. The operational amplifier circuit 15 further includes: a first resistor R1 connected between the positive input terminal of the operational amplifier 21 and the negative temperature circuit 14; a second resistor R2 connected between the positive input terminal of the operational amplifier 21 and the output terminal of the operational amplifier 21; and a third resistor R3 connected to the output terminal of the operational amplifier 21.
[0031] The operational amplifier circuit 15 is used to acquire the resistance values of the first resistor, the second resistor, and the third resistor, as well as the reference voltage and the negative temperature voltage; and outputs a positive temperature voltage that is positively correlated with the temperature of the chip according to the following formula, based on the resistance values of the first resistor, the second resistor, and the third resistor, the reference voltage, and the negative temperature voltage:
[0032] in, Positive temperature voltage, As the reference voltage, It is a negative temperature voltage. .
[0033] In this embodiment, the operational amplifier is the core gain unit. A negative temperature coefficient (CTAT) voltage is input to the non-inverting input of the op-amp, and a reference voltage is input to the inverting input. Using the reference voltage as a reference level, a fixed voltage is established at the inverting input, thereby enabling the boosting and temperature coefficient inversion of the negative temperature voltage. Since the negative temperature voltage has a negative temperature coefficient (CTAT), while the reference voltage has a zero temperature coefficient, by carefully setting the resistor ratio R2 / R1, a positive temperature coefficient can be generated in the first term of the formula, canceling out and surpassing the negative temperature coefficient of the second term, ultimately resulting in a pure positive temperature voltage proportional to absolute temperature. Simultaneously, by adjusting the ratio of the first resistor R1 and the second resistor R2, the slope (temperature coefficient) of the CTAT voltage can be flexibly adjusted to meet the requirements of different ADC ranges and accuracy. The presence of the third resistor R3 enhances the robustness of the circuit, enabling it to safely and stably drive the subsequent sample-and-hold circuit and ADC without self-oscillation or damage.
[0034] Reference Figure 3 The diagram shows a circuit schematic of an operational amplifier according to an embodiment of this application. The operational amplifier 21 includes: The first-stage operational amplifier circuit 31 is used to output a common-mode voltage based on the reference voltage and the negative temperature voltage; The common-mode feedback circuit 32 forms a first loop with the first-stage operational amplifier circuit 31 to stabilize the common-mode voltage output by the first-stage operational amplifier circuit 31. The second-stage operational amplifier circuit 33 forms a second loop with the first-stage operational amplifier circuit 31, which is used to perform frequency compensation on the common-mode voltage; Output circuit 34 is used to output a positive temperature voltage that is positively correlated with the temperature of the chip, based on the common-mode voltage; Bias circuit 35 is used to transmit the bias current and the bias voltage.
[0035] In this embodiment, the first-stage operational amplifier circuit can receive two differential input signals—an external reference voltage and a negative temperature voltage—and amplify them initially, outputting a pre-amplified differential signal and establishing its common-mode level, which can be the average of the two output ports. In a fully differential circuit, the common-mode feedback circuit prevents the output common-mode level from drifting arbitrarily due to the lack of a DC feedback path, which could lead to malfunctions or even failures of the internal transistor operating point. Specifically, the common-mode feedback circuit can acquire the common-mode level output by the first-stage operational amplifier circuit, compare it with a stable reference voltage, generate an error signal, and feed it back to the first loop to adjust the bias of the tail current source of the first-stage operational amplifier, thereby maintaining the output common-mode level within the normal range. The second-stage operational amplifier circuit forms a second loop with the first-stage operational amplifier circuit. Frequency compensation ensures the high-gain system of the second-stage and first-stage operational amplifier circuits remains stable and does not oscillate. Miller compensation is typically used, which involves lowering the dominant pole frequency through a capacitor, sacrificing bandwidth for stability. The output circuit can adopt a Class AB output configuration. The bias circuit can provide stable bias current and voltage to the above circuit, unaffected by power supply and temperature changes, ensuring that all current mirrors and transistors operate in the preset saturation region, thus guaranteeing the consistency and predictability of amplifier performance.
[0036] The operational amplifier circuit in this application embodiment achieves high-fidelity conversion from physical temperature to standard analog voltage signal, providing a solid foundation for chip-level temperature sensing.
[0037] In one embodiment, such as Figure 3 As shown, the secondary operational amplifier circuit 33 includes compensation capacitors C1 and C2; The compensation capacitors C1 and C2 are connected in parallel and then connected to the output nodes of the first-stage operational amplifier circuit 31 and the second-stage operational amplifier circuit 33, respectively, for frequency compensation of the common-mode voltage.
[0038] In this embodiment, two compensation capacitors, C1 and C2, are connected in parallel, with one end connected to the common-mode output node of the first-stage operational amplifier and the other end connected to the common-mode output node of the second-stage operational amplifier. This connection creates an independent Miller compensation path for the common-mode signal. Capacitors C1 and C2 effectively reflect the high impedance of the second-stage common-mode output node back to the first-stage common-mode output node, thereby significantly reducing the frequency of the dominant pole in the common-mode feedback loop. In this way, the bandwidth of the common-mode feedback loop is reduced, and its phase margin is significantly increased, thus ensuring the absolute stability of the entire amplifier under all operating conditions. The introduction of this compensation method stabilizes both the differential loop and the common-mode loop, completely eliminating the potential oscillation risk caused by insufficient phase margin in the common-mode feedback loop. Dual-loop compensation improves system stability.
[0039] In one embodiment, such as Figure 3 As shown, the output circuit 34 includes: a first transistor J1 and a second transistor J2; the control terminals of the first transistor J1 and the second transistor J2 are connected to the output terminal of the two-stage operational amplifier circuit, the input terminal of the first transistor J1 is connected to the bias voltage, the output terminal of the first transistor J1 is connected to the input terminal of the second transistor J2, and the output terminal of the second transistor J2 is grounded; the output terminal of the positive temperature voltage is connected between the output terminal of the first transistor J1 and the input terminal of the second transistor J2. When the common-mode voltage is less than or equal to a preset threshold, the conduction period of the first transistor J1 and the second transistor J2 is a full cycle; when the common-mode voltage is greater than the preset threshold, the conduction period of the first transistor J1 and the second transistor J2 is a half cycle.
[0040] In this embodiment, the first transistor can be a PMOS transistor, acting as a pull-up transistor. When its gate voltage decreases, it conducts, providing current from the bias voltage to the output node, thereby pulling the output voltage up. The second transistor can be an NMOS transistor, acting as a pull-down transistor. When its gate voltage increases, it conducts, drawing current from the output node to ground, thereby pulling the output voltage down. During small-signal output (low common-mode voltage), it operates in full-cycle mode, completely avoiding crossover distortion and ensuring the extreme accuracy of the temperature detection system within its detection range. During large-signal output (high common-mode voltage), although it operates in half-cycle mode, the crossover distortion is relatively small due to the large signal amplitude, having a negligible impact on overall linearity.
[0041] The operational amplifier operates as follows: When the output node V1 of the first-stage op-amp decreases due to power supply or input disturbances, the base node V1 of the PNP transistor VP1 decreases, the base voltage V2 of transistor VN1 decreases accordingly, VBE of VN1 decreases, Id decreases, and therefore the voltage drop across resistor Rd decreases, thereby reducing the voltage at node V3. The gate voltages Vb of M1 and M2 decrease, leading to an increase in the voltage at node V1. This forms a negative feedback loop ① to stabilize the common-mode output voltage of the first-stage op-amp. Loop ② also utilizes negative feedback to stabilize the common-mode output node of the first-stage op-amp. Simultaneously, Miller compensation capacitors connect the output nodes of the first and second-stage op-amps for frequency compensation, improving the op-amp's frequency response and phase margin characteristics. This also reduces bandwidth to increase gain margin, preventing op-amp oscillation, suppressing high-frequency noise, and improving the quality of the output signal.
[0042] The output circuit of this application embodiment can adopt a Class AB configuration. When the signal is small, the first and second transistors conduct simultaneously, similar to a Class A structure, reducing crossover distortion and ensuring uniform heat distribution, preventing individual transistors from overheating, thereby improving the long-term stability and reliability of the operational amplifier. When the signal is large, the first and second transistors conduct only during the positive or negative half-cycle of the signal, similar to a Class B structure, thereby improving power utilization and reducing power consumption. The conduction period refers to the proportion of time each transistor conducts within a complete signal cycle. By appropriately setting the bias point, the Class AB structure can achieve a smooth transition between the positive and negative half-cycles of the signal, reducing crossover distortion and thus improving the linearity of the output signal. Using a Class AB output structure ensures that the output voltage range can cover a wider temperature variation range.
[0043] Reference Figure 4This diagram illustrates a self-starting circuit and a bandgap circuit according to an embodiment of this application. The bandgap circuit includes: a third transistor J3, a fourth transistor J4, a fifth transistor J5, a sixth transistor J6, a seventh transistor J7, a first diode Z1, a fourth resistor R4, a fifth resistor R5, and a sixth resistor R6. The third transistor J3, the fourth transistor J4, and the fifth transistor J5 are connected in series. The fourth resistor R4, the fifth resistor R5, and the sixth resistor R6 are also connected in series. The control terminal of the sixth transistor J6 is connected to the input terminal of the third transistor J3, and the output terminal of the sixth transistor J6 is connected to the control terminal of the seventh transistor J7. The input terminal of the sixth transistor J6 is connected to the input terminal of the seventh transistor J7, and the output terminal of the seventh transistor J7 is connected to the sixth resistor R6. The anode of the first diode Z1 is connected to the fourth resistor R4, and the cathode of the first diode Z1 is connected to the output terminal of the fifth transistor J5. The output terminal of the reference voltage is connected between the fourth resistor R4 and the fifth resistor R5. The bandgap circuit is used to obtain the resistance values of the fourth, fifth, and sixth resistors, the base-emitter voltages of the third, fourth, fifth, sixth, and seventh transistors, and the voltage of the first diode; and to generate a reference voltage according to the following formula, based on the resistance values of the fourth, fifth, and sixth resistors, the base-emitter voltages of the third, fourth, fifth, sixth, and seventh transistors, and the voltage of the first diode:
[0044] in, As the reference voltage, This is the resistance value of the fourth resistor. This is the resistance value of the fifth resistor. The resistance value of the sixth resistor. The voltage of the first diode is... This is the base-emitter voltage of the third transistor. This is the base-emitter voltage of the fourth transistor. This is the base-emitter voltage of the fifth transistor. This is the base-emitter voltage of the sixth transistor. This is the base-emitter voltage of the seventh transistor.
[0045] In this embodiment, the self-starting circuit operates as follows: When the power supply voltage VCC is applied, VP2 turns on and VN2 turns off. At this time, the base voltage of VN3 becomes high, thus turning on VN3. This pulls down the bases of VPNP transistors VP3 and VP4, causing VP3, VP4, J6, and J7 to turn on. At this point, the bandgap circuit begins its normal operation. When the current source generating circuit starts working, the diode-connected VN4 turns on, causing VN2 to turn on as well. The turning on of VN2 directly pulls the base potential of VN3 to ground, causing VN3 to turn off. This, in turn, pulls the gate of VP3 high, turning off the branch between VP3 and VN4. Finally, the self-starting circuit stops working, completing the startup process of the reference current source generating circuit.
[0046] The bandgap circuit utilizes the positive temperature coefficient of the first diode Z1 and the negative temperature coefficient of the BJT to cancel out the effects of temperature changes on the overall circuit. Specifically, the third transistor J3, fourth transistor J4, and fifth transistor J5 are configured as diodes, thus operating in the amplification region, while the sixth transistor J6 and seventh transistor J7 operate in the saturation region. In NPN transistors, VBE (base-emitter voltage) decreases with increasing temperature, but the behavior differs between the amplification and saturation regions. The VBE in the amplification region is typically around 0.7V, controlled by the base current. As temperature increases, VBE decreases, with a temperature coefficient of approximately -2mV / °C. This is due to the diode characteristics of the base-emitter junction; increased temperature leads to a decrease in forward voltage.
[0047] The VBE in the saturation region is higher than that in the amplification region due to the larger base current. The temperature coefficient of the first diode Z1 is: k1= =+1.2mV / ℃ Temperature variation coefficients of VN9-VN11 operating in the amplification region: k2= =-1.73mV / ℃ Temperature coefficients of VN2 and VN3 operating in the saturation region: k3= =-2.05mV / ℃ Let k0 = Differentiating Vref with respect to temperature yields:
[0048]
[0049] Substituting k0=0.39, k1=+1.2, k2=-1.73, k3=-2.05, we obtain the temperature coefficient of the Bandgap output Vref as: +0.04mV / ℃ Simultaneously, Vref is output as: Vref=0.39*(5.7+3*0.7-2*0.7)V=0.39*6.4V=2.5V Thus, a temperature-independent reference voltage Vref = 2.5V was obtained. From the temperature curves of the reference voltage Vref under different power supplies, it can be seen that this reference voltage exhibits extremely high stability in the range of power supply voltage VCC from 10V to 20V, and under a wide range of conditions from -40°C to 150°C.
[0050] This embodiment of the application, by selecting an integrated temperature sensor and through calibration and signal conditioning, enables the system to provide continuous analog output within a range of -40℃ to 150℃. Optimized power management ensures high accuracy and low power consumption, while maintaining stability and anti-interference capabilities in high-voltage environments (10V-20V). It achieves a 10V-20V power input voltage and provides continuous analog output.
[0051] Reference Figure 5 The diagram shows a circuit diagram of a voltage regulator circuit and a negative temperature circuit according to an embodiment of this application. The voltage regulator circuit includes an eighth transistor, a ninth transistor, a seventh resistor, and an eighth resistor. One end of the seventh resistor is connected to the bias voltage, the other end of the seventh resistor is connected to the eighth resistor, the other end of the eighth resistor is connected to the input terminal and the control terminal of the ninth transistor, the control terminal of the ninth transistor is connected to the control terminal of the eighth transistor, the input terminal of the eighth transistor is connected to the bias current, and the output terminals of the eighth transistor and the ninth transistor are grounded. The voltage regulator circuit is used to obtain the width-to-length ratio of the eighth transistor and the ninth transistor, the voltage difference of the ninth transistor, and the resistance values of the seventh resistor and the eighth resistor; and outputs the bias current and the bias voltage according to the following formulas based on the width-to-length ratio of the eighth transistor and the ninth transistor, the voltage difference of the ninth transistor, and the resistance values of the seventh resistor and the eighth resistor:
[0052]
[0053] in, This is the bias voltage. For bias current, This is the resistance value of the seventh resistor. The resistance value of the eighth resistor. The voltage difference of the ninth transistor. The aspect ratio of the eighth transistor. This represents the aspect ratio of the ninth transistor.
[0054] The negative temperature circuit 14 includes multiple tenth transistors J10 connected in series; the emitter junction of the tenth transistor J10 is forward biased and the collector junction is reverse biased; when the temperature of the chip increases, the forward voltage drop of the tenth transistor J10 decreases, and when the temperature of the chip decreases, the forward voltage drop of the tenth transistor J10 increases.
[0055] In this embodiment, the width W of the transistor is the width of the gate channel, and the length L is the length of the gate channel. The width-to-length ratio W / L reflects the efficiency of the gate control channel's conductivity. A larger W / L ratio results in lower on-resistance, which means lower signal loss and stronger driving capability. The voltage regulator circuit can output bias current and bias voltage based on the width-to-length ratio of the eighth and ninth transistors, the voltage difference of the ninth transistor, and the resistance values of the seventh and eighth resistors. The eighth and ninth transistors can be high-voltage VNPN transistors. The voltage regulator circuit can use these high-voltage VNPN transistors to isolate the power supply, ensuring a stable output voltage unaffected by input voltage fluctuations, while simultaneously preventing high-voltage transmission from the power supply and protecting the load.
[0056] The negative temperature circuit utilizes the negative temperature characteristic of the VBE of multiple series-connected tenth transistors to generate a voltage VT that is negatively correlated with temperature. The tenth transistors, connected in diode form, have their emitter junction forward-biased and their collector junction reverse-biased, operating in the forward conduction region. Their forward voltage drop varies with temperature, decreasing as temperature increases and increasing as temperature decreases. Since the temperature coefficient of VBE is -1.73mV / °C, the output voltage VT changes by the following amplitude when the temperature changes from -40°C to 150°C: Left and right. The regulated bias current and bias voltage can improve measurement accuracy and anti-interference ability, and avoid the positive temperature voltage output being affected by the power supply, which would lead to temperature measurement error; at the same time, the negative temperature circuit has good linearity over a wide temperature range, and its structure is simple and easy to integrate.
[0057] Reference Figure 6 The diagram illustrates the stability simulation results of the operational amplifier according to an embodiment of this application. Figure 6 As shown, the op-amp exhibits good loop stability when its low-frequency gain is 60dB and its phase margin is 83°.
[0058] Reference Figure 7 The diagram illustrates the output offset curves for different power supply voltages according to embodiments of this application. When the power supply voltage VCC operates between 10V and 20V, and the temperature range is -40℃ to 150℃, the simulated waveform of the output voltage VOT of the temperature detection circuit is shown below. Figure 7As shown, the output VOT range is 0.15V to 4.26V.
[0059] Reference Figure 8 This diagram shows a partially enlarged schematic of the output offset curves for different power supply voltages according to an embodiment of this application. Figure 8 As can be seen, the temperature characteristic curves of the output voltage VOT under different power supply voltages basically overlap, and the output VOT swing is relatively large. The average sensitivity remains basically unchanged under different power supply voltages, and the error of the output voltage VOT at 25℃ is about 13.4mV. It can be seen that when the power supply voltage changes from 10V to 20V, the output voltage still maintains good linearity.
[0060] Reference Figure 9 The diagram illustrates the output offset curves under different processes according to embodiments of this application. Figure 9 As shown, if the power supply voltage is 15V, the temperature range is -40℃ to 150℃, and the process angles are TT, FF, and SS respectively.
[0061] Reference Figure 10 This diagram shows a partially enlarged schematic of the output offset curves under different processes according to embodiments of this application. Figure 10 It can be seen that the output VOT ranges from 0.12V to 4.29V, and the temperature detection output voltage maintains good linearity under different process angles, with an error of only 6.5mV at 25℃. The results indicate that the temperature detection output voltage VOT exhibits good linearity and a large output swing under different process angles.
[0062] The temperature detection circuit in this embodiment converts the unstable chip temperature into a stable, linear, and easily digitized voltage value through a self-starting circuit, bandgap circuit, voltage regulator circuit, negative temperature circuit, and operational amplifier circuit. This provides a highly accurate temperature reading that remains stable across different temperatures. By selecting an integrated temperature sensor and optimizing power management, high system accuracy and low power consumption are ensured, while maintaining stability and anti-interference capabilities under high-voltage environments (10V–20V). Utilizing the positive temperature characteristic of the Zener diode's forward voltage drop and the different negative temperature characteristics of the transistor's VBE under different operating states, a low-temperature drift reference current source for high-voltage power supply operation is designed with fewer electronic components. This reference voltage exhibits extremely high stability within a power supply voltage range of 10V to 20V and under a wide temperature range from -40°C to 150°C. Furthermore, the operational amplifier circuit incorporates loop compensation, utilizing negative feedback to improve circuit stability; the Class AB output structure ensures that the output voltage range can cover a wider temperature variation range.
[0063] This application also provides a chip including the temperature detection circuit described above.
[0064] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.
[0065] Those skilled in the art will understand that embodiments of this application can be provided as methods, apparatus, or computer program products. Therefore, embodiments of this application can take the form of entirely hardware embodiments, entirely software embodiments, or embodiments combining software and hardware aspects. Furthermore, embodiments of this application can take the form of computer program products embodied on one or more machine-readable media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0066] This application describes embodiments with reference to flowchart illustrations and / or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of this application. It should be understood that each block of the flowchart illustrations and / or block diagrams, as well as combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing terminal device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal device, generate instructions for implementing the flowchart illustrations. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0067] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing terminal device to operate in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.
[0068] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal equipment, causing a series of operational steps to be performed on the computer or other programmable terminal equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable terminal equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.
[0069] Although preferred embodiments of the present application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of the embodiments of the present application.
[0070] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or terminal device. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or terminal device that includes said element.
[0071] The above provides a detailed description of a temperature detection circuit and a chip provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.
Claims
1. A temperature detection circuit, characterized by comprising: The temperature detection circuit is arranged on a chip and comprises: a self-starting circuit, configured to output a starting current after the chip is powered on; a bandgap circuit, connected with the self-starting circuit, configured to generate a reference voltage according to the starting current output by the self-starting circuit; a voltage stabilizing circuit, configured to output a bias current and a bias voltage according to a power supply voltage of the chip; a negative temperature circuit, connected with the voltage stabilizing circuit, configured to generate a negative temperature voltage negatively correlated with a temperature of the chip according to the bias current and the bias voltage output by the voltage stabilizing circuit; an operational amplifier circuit, connected with the bandgap circuit and the negative temperature circuit respectively, configured to output a positive temperature voltage positively correlated with the temperature of the chip according to the reference voltage and the negative temperature voltage; and 2. The temperature detection circuit according to claim 1, characterized by the positive temperature voltage is used to determine the temperature of the chip. The operational amplifier circuit comprises an operational amplifier, the negative temperature circuit is connected with a positive input terminal of the operational amplifier, and the bandgap circuit is connected with a negative input terminal of the operational amplifier; and the operational amplifier comprises: a first-stage operational amplifier circuit, configured to output a common-mode voltage according to the reference voltage and the negative temperature voltage; a common-mode feedback circuit, forming a first loop with the first-stage operational amplifier circuit, configured to stabilize the common-mode voltage output by the first-stage operational amplifier circuit; a second-stage operational amplifier circuit, forming a second loop with the first-stage operational amplifier circuit, configured to perform frequency compensation on the common-mode voltage; and 3. The temperature detection circuit according to claim 2, wherein an output circuit, configured to output the positive temperature voltage positively correlated with the temperature of the chip according to the common-mode voltage. The output circuit comprises a first transistor and a second transistor; control terminals of the first transistor and the second transistor are connected with an output terminal of the second-stage operational amplifier circuit; an input terminal of the first transistor is connected with the bias voltage; an output terminal of the first transistor is connected with an input terminal of the second transistor; and an output terminal of the second transistor is grounded; and an output terminal of the positive temperature voltage is connected between the output terminal of the first transistor and the input terminal of the second transistor.
4. The temperature detection circuit according to claim 2, wherein In a case where the common-mode voltage is less than or equal to a preset threshold, a conduction period of the first transistor and the second transistor is a full period; and in a case where the common-mode voltage is greater than the preset threshold, the conduction period of the first transistor and the second transistor is a half period. The second-stage operational amplifier circuit comprises a compensation capacitor.
5. The temperature detection circuit according to claim 2, wherein The compensation capacitor is connected with output nodes of the first-stage operational amplifier circuit and the second-stage operational amplifier circuit respectively, and is configured to perform frequency compensation on the common-mode voltage. The operational amplifier circuit further comprises a first resistor connected between the positive input terminal of the operational amplifier and the negative temperature circuit, a second resistor connected between the positive input terminal of the operational amplifier and an output terminal of the operational amplifier, and a third resistor connected with the output terminal of the operational amplifier.
6. The temperature detection circuit according to claim 5, characterized in that, The operational amplifier circuit is configured to obtain resistance values of the first resistor, the second resistor and the third resistor, and the reference voltage and the negative temperature voltage; and output a positive temperature voltage positively correlated with the temperature of the chip according to the resistance values of the first resistor, the second resistor and the third resistor, and the reference voltage and the negative temperature voltage, according to the following formula: wherein, is a positive temperature voltage, is a reference voltage, is a negative temperature voltage, .
7. The temperature detection circuit according to claim 1, wherein The bandgap circuit comprises a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a seventh transistor, a first diode, a fourth resistor, a fifth resistor and a sixth resistor; the third transistor, the fourth transistor and the fifth transistor are connected in series, the fourth resistor, the fifth resistor and the sixth resistor are connected in series, the control end of the sixth transistor is connected with the input end of the third transistor, the output end of the sixth transistor is connected with the control end of the seventh transistor, the input end of the sixth transistor is connected with the input end of the seventh transistor, the output end of the seventh transistor is connected with the sixth resistor, the anode of the first diode is connected with the fourth resistor, and the cathode of the first diode is connected with the output end of the fifth transistor; and the output end of the reference voltage is connected between the fourth resistor and the fifth resistor; The bandgap circuit is configured to obtain resistance values of the fourth resistor, the fifth resistor and the sixth resistor, base-emitter voltages of the third transistor, the fourth transistor, the fifth transistor, the sixth transistor and the seventh transistor, and a voltage of the first diode; and generate a reference voltage according to the resistance values of the fourth resistor, the fifth resistor and the sixth resistor, the base-emitter voltages of the third transistor, the fourth transistor, the fifth transistor, the sixth transistor and the seventh transistor, and the voltage of the first diode, according to the following formula: wherein is a reference voltage, is a resistance value of the fourth resistance, is a resistance value of the fifth resistance, is a resistance value of the sixth resistance, is a voltage of the first diode, is a base-emitter voltage of the third transistor, is a base-emitter voltage of the fourth transistor, is a base-emitter voltage of the fifth transistor, is a base-emitter voltage of the sixth transistor, is a base-emitter voltage of the seventh transistor.
8. The temperature detection circuit according to claim 7, wherein The voltage stabilizing circuit comprises an eighth transistor, a ninth transistor, a seventh resistor and an eighth resistor; one end of the seventh resistor is connected with the bias voltage, the other end of the seventh resistor is connected with the eighth resistor, the other end of the eighth resistor is connected with the input end and the control end of the ninth transistor, the control end of the ninth transistor is connected with the control end of the eighth transistor, the input end of the eighth transistor is connected with the bias current, and the output ends of the eighth transistor and the ninth transistor are grounded; The voltage stabilizing circuit is configured to obtain width-length ratios of the eighth transistor and the ninth transistor, a voltage difference of the ninth transistor, and resistance values of the seventh resistor and the eighth resistor; and output the bias current and the bias voltage according to the width-length ratios of the eighth transistor and the ninth transistor, the voltage difference of the ninth transistor, and the resistance values of the seventh resistor and the eighth resistor, according to the following formula: wherein is a bias voltage, is a bias current, is a resistance value of the seventh resistor, is a resistance value of the eighth resistor, is a voltage difference of the ninth transistor, is a width-length ratio of the eighth transistor, is a width-length ratio of the ninth transistor.
9. The temperature detection circuit according to claim 1, wherein The negative temperature circuit comprises a plurality of tenth transistors connected in series; the tenth transistor is forward biased at the emitter junction and reverse biased at the collector junction; when the temperature of the chip rises, the forward voltage drop of the tenth transistor decreases, and when the temperature of the chip decreases, the forward voltage drop of the tenth transistor increases.
10. A chip, characterized by The temperature detection circuit comprises a temperature detection circuit as claimed in any one of claims 1-9.