Micro-LED display circuit and display system

Abstract

The invention discloses a circuit for Micro-LED display and a display system, and the control circuit comprises a control module which is used for obtaining pixel data corresponding to each pixel unit according to an input frame of image signal, and generating a corresponding triggering time sequence signal; and the shifting module is connected with the control module and is used for outputting a driving signal according to the plurality of accessed pixel data and the triggering time sequence signal and driving the corresponding pixel unit to be lightened.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a circuit and display system for Micro-LED display. BACKGROUND

[0002] At present, the pixel driving circuit of MICRO LED includes two setting schemes of voltage driving and current driving. Since the voltage driving scheme usually relies on discrete driving voltage levels, in the case of low gray scale number, the gray scale transition between liquid crystal elements may not be smooth enough, and the lower driving voltage may not completely turn off the liquid crystal elements, so that the voltage driving scheme is not very ideal for the low gray scale display of MICRO LED. Although the current driving mode includes analog and digital implementations, in the existing digital driving, there will inevitably be analog voltage components involved. SUMMARY

[0003] The main purpose of the present application is to provide a circuit and display system for Micro-LED display.

[0004] To achieve the above purpose, the circuit provided by the present application, the display screen includes a plurality of pixel units; the control circuit includes:

[0005] A control module is configured to obtain pixel data corresponding to each pixel unit according to an input one-frame image signal, and generate a corresponding trigger timing signal;

[0006] A shift module is connected with the control module and configured to output a driving signal according to the plurality of pixel data and the trigger timing signal, and drive the corresponding pixel unit to light up.

[0007] The present application also provides a display system comprising the above-mentioned circuit. BRIEF DESCRIPTION OF DRAWINGS

[0008] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or prior art description. Obviously, the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained according to the structures shown in these drawings without creative labor.

[0009] Figure 1 The structural schematic diagram of an embodiment of the circuit of the present application;

[0010] Figure 2 The structural schematic diagram of another embodiment of the circuit of the present application;

[0011] Figure 3Structure diagram of another embodiment of the circuit of the present application;

[0012] Figure 4 Structure diagram of another embodiment of the circuit of the present application;

[0013] Figure 5 Working diagram of an embodiment of the correction unit in the present application;

[0014] Figure 6 Working diagram of another embodiment of the correction unit in the present application;

[0015] Figure 7 Circuit structure diagram of an embodiment of the driving unit in the present application;

[0016] Figure 8 Timing diagram of the field synchronization signal in a period;

[0017] Figure 9 Shift diagram of the circuit of the present application;

[0018] Figure 10 Output timing diagram of the second shift unit in the present application;

[0019] Figure 11 Output timing diagram of a plurality of bytes in a pixel data in the present application.

[0020] Explanation of reference numerals:

[0021] Reference Name Reference Name 100 Control module 221 Second shift unit 200 Shift module 222 Trigger unit 210 Data storage module 230 Driving unit 211 First shift unit 300 Correction module 220 Trigger module Q1-Q3 First switch tube-third switch tube

[0022] The purposes, functional features and advantages of the present application will be further described with reference to the embodiments and the accompanying drawings. DETAILED DESCRIPTION

[0023] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all the embodiments of the present application. Based on the embodiments in the present application, all the other embodiments obtained by those skilled in the art without creative work fall within the protection scope of the present application.

[0024] In addition, the descriptions such as "first", "second" and the like in the present application are only for the purpose of description, and cannot be understood as indicating or implying the relative importance of the technical features or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first", "second" can be explicitly or implicitly included at least one of the features. In addition, the technical solutions of various embodiments can be combined with each other, but it must be based on the realization of ordinary skilled in the art, when the combination of technical solutions appears contradictory or cannot be realized, it should be considered that the combination of technical solutions does not exist, nor in the protection scope required by the present application.

[0025] The present application provides a circuit.

[0026] Referring to Figure 1 In an embodiment, the circuit is connected with a display screen, and the display screen includes a plurality of pixel units; the circuit includes:

[0027] A control module is configured to obtain pixel data corresponding to each pixel unit according to an input frame image signal, and generate a corresponding trigger timing signal;

[0028] A shift module 200 is connected with the control module, and is configured to output a driving signal according to the plurality of pixel data and the trigger timing signal, and drive the corresponding pixel unit to light up.

[0029] In the present embodiment, the circuit 110 is applied to a Micro LED display system, the display system uses light emitting devices (such as LEDs) as pixel units, and the shift module 200 outputs corresponding driving signals to the pixel units one by one, so as to drive the light emitting devices by the driving signals. The pixel units can also be used in other LED display systems, such as mini LED display systems, or can be used in other self-luminous display devices, such as OLED display systems, QLED display systems, etc.

[0030] It should be noted that when the display system performs display output, the original video can be separated according to the input video to obtain a field corresponding synchronization signal, a line synchronization signal, a pixel clock, and pixel data corresponding to each frame image, wherein the field synchronization signal is used to control the image to be output by frame, and each period of field synchronization signal corresponds to output one frame of image.

[0031] At the beginning of a period of field synchronization signal, the shift module 200 accesses the pixel data of the image to be played. When the image is output, the pixel data of the image to be played is input into the input end of the shift module 200 in sequence, is shifted by the shift module 200, and is output by the shift module 200 as the driving signal corresponding to the pixel data according to the trigger timing signal accessed. It can be understood that, according to different color scales of the display system, the waveform of the trigger timing signal is also different. When the range of the color scale is large, the number of level groups in the trigger timing signal is also large, and more accurate driving signals can be output. When the range of the color scale is small, the number of level groups in the trigger timing signal is also small, and the driving signals output are also coarser.

[0032] The technical scheme of the present application sets the shift module 200, shifts the pixel data of the corresponding image one by one according to the field synchronization signal of each period, quantizes the color scale in combination with the trigger timing signal and the pixel data, and outputs the driving signal with different waveforms. Through the level combination corresponding to different waveforms, the pixel unit is driven to output the corresponding light, so that the average brightness of the pixel unit can reach the brightness represented by the corresponding pixel data, thereby realizing full-digital brightness output.

[0033] Reference Figure 1 In an embodiment, the shift module 200 includes:

[0034] The data storage module 210 is configured to access the pixel data corresponding to each pixel unit in the image signal.

[0035] The trigger module 220 is connected with the data storage module 210 and the control module. The trigger module 220 is configured to output the driving signal according to the pixel data and the trigger timing signal, so as to drive the corresponding pixel unit to light up.

[0036] In the embodiment, when the image is output, the pixel data of the image to be played is input into the input end of the data storage module 210 in sequence and is shifted. After all the pixel data of the image to be played is shifted, the data storage module 210 outputs the pixel data received simultaneously to the trigger module 220 under the control of the field synchronization clock signal.

[0037] The trigger module 220 is triggered by the accessed pixel data bit by bit. It can be understood that the pixel data is binary data, and the display system has different byte lengths with different bits according to different color scales. Therefore, the trigger module 220 outputs the corresponding level according to the binary byte of each data bit when accessing each data bit, and the values represented by the bytes of different data bits are also different. The trigger module 220 outputs the level triggered by each data bit in sequence according to the waveform of the trigger timing signal to obtain the waveform driving signal.

[0038] With reference to Figure 1 And Figure 2 In an embodiment, the data storage module 210 includes a plurality of first shift units 211 connected in sequence.

[0039] The plurality of first shift units 211 are respectively electrically connected to the control module 100, and are used to sequentially transmit a plurality of pixel data to the corresponding first shift unit 211 and then output the pixel data according to the field synchronization signal.

[0040] In this embodiment, the number of first shift units 211 is the same as the number of pixel units, and each first shift unit 211 corresponds to one pixel unit. The first shift unit 211 can be a shift register, which is arranged on the silicon backplane of the display system.

[0041] It should be noted that, as Figure 7 As shown, in a period of field synchronization signal, before entering the effective display part, there is a front field period, which represents the beginning part of a period of field synchronization signal. The length of time of the front field period depends on the refresh rate of the display system and the resolution of the output image.

[0042] In the front field period, the display system updates the pixel data of each pixel unit according to the pixel clock. That is, when the first shift unit 211 receives the field synchronization signal output by the control module 100 during the operation of the display system, the first shift unit 211 shifts the accessed pixel data according to the pixel clock in the front field period of the field synchronization signal at the beginning of a period. For the to-be-played image to be played, the total shift period of all first shift units 211 is equal to the front field period, so that all pixel data corresponding to the to-be-played image are shifted into the corresponding first shift unit 211 at the end of the front field period.

[0043] Specifically, the first shift unit 211 is arranged corresponding to the pixel unit and is connected in sequence according to the normal order of receiving data, which can be the first row and the first column of pixels, the first row and the second column of pixels, the first row and the last column of pixels, the second row and the first column of pixels, the second row and the second column of pixels, and so on, until the last row and the last column of pixels.

[0044] With reference to Figure 1 and Figure 2 In an embodiment, the trigger module 220 comprises:

[0045] a plurality of second shift units 221, the number of the second shift units 221 being the same as that of the first shift units 211, each of the second shift units 221 being connected with a corresponding first shift unit 211, and the second shift units 221 being configured to latch received pixel data and output the pixel data bit by bit according to the trigger timing signal;

[0046] a plurality of trigger units 222, each of the trigger units 222 being electrically connected with a corresponding second shift unit 221 and a corresponding pixel unit, and the trigger units 222 being configured to output a driving signal with a corresponding level combination under the trigger of the pixel data.

[0047] In the embodiment, the second shift units 221 can be shift registers, and the trigger units 222 can be trigger registers.

[0048] After each second shift unit 221 accesses corresponding pixel data, a corresponding number of data bits are set according to the different color scales of the pixel data. The second shift units 221 are configured to latch all the bytes of the data bits and then shift the bytes according to the size of the data bits, so as to output the bytes to the trigger units 222 byte by byte. It can be understood that the trigger units 222 only have two states, i.e., triggered or untriggered. That is, when each byte is output by the second shift units 221, the trigger units 222 output two different levels according to whether the byte is 1 or 0. Thus, after all the bytes in a pixel data are shifted, the trigger units 222 output a corresponding level combination as a driving signal under the trigger of the multiple bytes.

[0049] With reference to Figures 1-3 In an embodiment, the trigger module 220 further comprises:

[0050] a plurality of driving units 230, each of the driving units 230 being electrically connected with a corresponding trigger unit 222 and a corresponding pixel unit, and the driving units 230 being further configured to drive the corresponding pixel units to emit light when the waveform of the accessed driving signal is at a first level.

[0051] In the embodiment, since the driving mode adopted in the present application is constant current driving, the driving units 230 access or stop accessing the light emitting device according to the level combination in the waveform of the received driving signal, so that the average brightness of the light emitting device can reach the brightness represented by the corresponding pixel data.

[0052] Optionally, as Figure 7 The driving unit 230 includes:

[0053] A current mirror circuit is connected to the constant current source and copies the constant current output by the constant current source.

[0054] A switch circuit is connected between the output of the current mirror circuit and the light emitting device and is electrically connected to the trigger unit 222. The switch circuit is used to drive the light emitting device to output corresponding brightness under the control of the trigger unit 222.

[0055] In this embodiment, the switch circuit includes a first switch tube Q1, and the current mirror includes a second switch tube Q2 and a third switch tube Q3. The input end of the second switch tube Q2 and the input end of the third switch tube Q3 are connected to a first power supply. The output end of the third switch tube Q3 is connected to a constant current source and is connected to the controlled end of the second switch tube Q2 and the controlled end of the third switch tube Q3, respectively. The output end of the second switch is connected to the input end of the first switch tube Q1. The output end of the first switch tube Q1 is connected to a light emitting device. The controlled end of the first switch tube Q1 is connected to the trigger unit 222.

[0056] Specifically, the current mirror is used to realize accurate copying and control of current. When the display system is working, the current mirror copies the constant current output by the constant current source and outputs it to at least one light emitting device, so as to ensure the stability of the constant current when the light emitting device is working or stopping working under the control of the switch circuit.

[0057] Since the full digital driving of the pixels is realized by using the constant current mode in the present application, there is no charging and discharging problem. Therefore, the light emitting device can be driven with 100% duty cycle in the entire vertical effective period.

[0058] Referring to Figures 1-6 In an embodiment, the circuit further includes:

[0059] A correction module 300 is electrically connected to the shift module 200 and the control module, respectively. The correction module 300 is used to perform gray scale correction processing on the plurality of pixel data input, obtain a correction result, and output the plurality of corrected pixel data to the shift module 200, and

[0060] According to the correction result, a corresponding gray scale offset value is obtained and output to the control module.

[0061] In the embodiment, the gray scale represents the brightness level of a pixel unit in the color scale. For example, when the color scale of a display panel is 0-255, it means that the display panel has 256 brightness levels from the darkest to the brightest, and the gray scale is the brightness level that a pixel unit of the display panel needs to output in the 256 levels.

[0062] It should be noted that, when the panel of the display system is produced, due to the consistency of the device, there may be mura pixels in some areas. The mura pixel is a pixel with brightness deviation, and the pixel unit may have a low maximum gray scale L MURA MAX or a high minimum gray scale L MURA MIN. At this time, the demura correction of the area needs to be performed through the preset correction table.

[0063] Specifically, after the panel of the display system is produced, according to the device parameters of the panel, a plurality of correction tables corresponding to each area are preset in the display system. Each correction table is obtained by performing demura algorithm data extraction on the pixel units in the corresponding area, and adding a compensation value to the input data according to the mura situation of the pixel units. Taking a display system with a resolution of 1920*1080 as an example, if the display system is divided into an area with 8*8 pixels, there are 240*135 areas in the display system, that is, there are 240*135 tables. Of course, some correction tables can be merged due to the same mura situation. Figure 5

[0064] When the display system is working, the correction unit 500 accesses a plurality of pixel data from the outside, analyzes and processes the pixel data according to the line synchronization signal, field synchronization signal, data enable signal, etc. of the video source, determines the specific area in the screen of the input data, and then looks up the pre-stored correction table according to the address of the area, and outputs the corrected pixel data to the subsequent shift unit 211.

[0065] When correcting a plurality of areas, the corresponding gray scale deviation values are also generated synchronously. The correction module 300 compares the gray scale deviation values of the plurality of areas, and transmits the gray scale deviation value with the greatest impact to the control module 100. The control module 100 adjusts the trigger timing signal to perform subsequent overall correction compensation processing.

[0066] ​It should be noted that for the mura pixel, the general correction method is to raise the lowest gray scale brightness of other regions or to lower the highest gray scale brightness of other regions according to the region where the mura exists, to compress the gray scale, so that the output of the whole display system realizes the unity of the lowest and highest brightness. Specifically, if a display system with mura has a part of pixels that display a brightness equivalent to the brightness of a normal screen inputting 16 gray scale data when inputting 0 gray scale data (at this time, L MURA MIN = 16). Moreover, if there is another part of pixels that display a brightness equivalent to the brightness of a normal screen inputting 239 gray scale data when inputting 255 gray scale data (at this time, L MURA MAX = 239). In the general correction method, the display range of the pixels without mura problems in this display system will be compressed between 16 and 239, and this screen seems to have no mura, but the display gray scale range will lose 32 gray scales. In this way, there will be a loss of gray scale transition.

[0067] To solve the above problems, with reference to Figures 1-10 In an embodiment, the pixel data includes first correction data and a plurality of first display data, and the first correction data and each of the first display data corresponds to one data bit;

[0068] The control module is further configured to determine the output time length of each of the first display data and the first correction data according to the gray scale offset value, the display time of the one frame of image signal, and a plurality of data bit division time weights, to form the trigger timing signal.

[0069] The first correction data is located in the highest data bit and / or the lowest data bit in the pixel data.

[0070] In the embodiment, the second shift unit 221 includes two parts of data bits of the first correction data and the first display data, wherein the number of data bits of the first display data is determined by the color scale, such as 8 bits of first display data corresponding to 256-bit color scale, 10 bits of first display data corresponding to 1024-bit color scale, 12 bits of first display data corresponding to 4096-bit color scale, etc. When the display system is working, after all the pixel data are shifted to the corresponding first shift unit 211, the first shift unit 211 outputs all the bytes of the corresponding pixel data to the first display data of the second shift unit 221. At the same time, the control module 100 adjusts the first display data according to the received gray scale offset value.

[0071] Specifically, taking 256-bit color scale of 0-255 as an example, the first display data of the first shift unit 211 includes 8 data bits. At this time, the second shift unit 221 is configured to be 9 bits, which is always 1 bit wider than the data bits of the first shift unit 211. When all the pixel data of the image to be played is sequentially shifted to the bit, the vertical synchronization period ends, and the first shift unit 211 outputs the current pixel data to the second shift unit 221 for latching, and the 8-bit pixel data is correspondingly latched into the data bits BIT1-BIT8 of the first display data. At the same time, the control module 100 sets the first correction data corresponding to the second shift unit 221 to 0 or 1 according to the gray scale offset value of each pixel.

[0072] In an embodiment, the gray scale offset value includes a lowest brightness offset value.

[0073] The control module 100 is further configured to, when accessing the lowest brightness offset value, set the first correction data of the second shift unit 221 to a first byte, and control the output duration of the first byte in the second shift unit 221 by adjusting the trigger timing signal.

[0074] The output duration of the first byte is positively correlated with the size of the lowest brightness offset value.

[0075] In this embodiment, when the second byte triggers the trigger unit 222, the trigger unit 222 outputs a corresponding first level to the driving assembly to control the light emitting device to work. The first level can be a high level or a low level according to the type of the switching device of the corresponding driving assembly.

[0076] Therefore, taking the color scale of the display system as 0-255 as an example, when the display system is compressed to 15-240 due to the gray scale offset, if the control module 100 determines that the output brightness of the light emitting device is the highest brightness according to the received pixel data, the control module 100 sets the first correction data of the second shift unit 221 of the light emitting device to a second byte according to the received highest gray scale offset value, so that the second shift unit 221 can drive the light emitting device to emit light before or after driving the light emitting device to emit light according to the pixel data by triggering the second byte when outputting all the latched bytes.

[0077] Specifically, when the color scale of the display system is 0-255, the second shift unit 221 includes the first display data bit1-bit8 and the first correction data bit0. Taking the output duration of the first display data as T2 and the output duration of the first correction data as T1 as examples, T2+T1 is the display time corresponding to one frame of image. Taking the first byte as 1 for example, because bit0 is 1, bit0 is right-shifted by the second shift unit 221 and output to the trigger unit 222, which triggers the output driving level, so that the light emitting device emits light under the control of the driving assembly, which is equivalent to increasing the time of effective display of one frame, thereby realizing the overall improvement of the brightness of low gray scale. The output duration of T1 can be adjusted, and the specific output duration is determined according to the darkest pixel at the highest gray scale in mura.

[0078] In another embodiment, the gray scale offset value includes a highest brightness offset value.

[0079] The control module 100 is further configured to, when the highest brightness offset value is accessed, set the first display data of the second shift unit 221 as a second byte, and control the output duration of the second byte in the second shift unit 221 by adjusting the trigger timing signal.

[0080] The output duration of the second byte is positively correlated with the size of the highest brightness offset value.

[0081] In this embodiment, the trigger unit 222 stops outputting the driving level when triggered by the first byte, so as to control the light emitting device to stop working. Therefore, taking the color scale of the display system as 0-255 for example, when the color scale of the display system is compressed to 15-240 due to the gray scale offset, if the control module 100 determines that the output brightness of the light emitting device is the lowest brightness according to the received pixel data, the control module 100 sets the first correction data of the second shift unit 221 of the light emitting device and the surrounding light emitting devices as the first byte according to the received lowest brightness offset value, so that the second shift unit 221 can stop driving the light emitting device to emit light by triggering the first byte before or after driving the light emitting device to emit light according to the pixel data when outputting all the latched bytes, thereby reducing the average brightness.

[0082] Specifically, taking the second byte as 0 for example, because bit0 is 0, bit0 is right-shifted by the second shift unit 221 and output to the trigger unit 222, which stops triggering, so that the light emitting device stops emitting light under the control of the driving assembly, which is equivalent to reducing the time of effective display of one frame, thereby realizing the purpose of reducing the overall gray scale. The output duration of T1 can be adjusted, and the specific output duration is determined according to the brightest pixel at the lowest gray scale in mura.

[0083] Further, the first correction data includes first correction data and second first correction data, and is arranged at two ends of the first display data, wherein the first correction data is set as a first byte, and the second first correction data is set as a second byte, so that when the output of the second shift unit 221 according to the gray scale offset value is controlled, the average brightness of the output of the light emitting device can be adjusted by adjusting the output time of the first correction data and the second first correction data. It should be noted that when the brightness required to be output by the light emitting device exceeds the lowest value of the compressed color scale, the output time of the second byte segment can be 0, and vice versa, when the brightness required to be output by the light emitting device exceeds the highest value of the compressed color scale, the output time of the first byte segment can be 0.

[0084] Referring to Figures 1-10 In an embodiment, the pixel data includes a plurality of data bits.

[0085] The control module is further configured to divide time weights according to a display time of the one frame of image signals and the plurality of data bits, determine an output time corresponding to each data bit, and form the trigger timing signal.

[0086] In the embodiment, the output time of each display sub-data is negatively correlated with the corresponding data bit.

[0087] The trigger timing signal is a PWM signal as shown in Figure 10 It can be understood that, since the present application quantizes the color scale and uses a multi-bit binary byte to represent the color scale, according to the principle that the higher the data bit of the first byte is, the higher the brightness is, the output time of the first byte is longer. Therefore, in combination with the characteristics of the binary byte, a trigger timing signal of one period occupies more output time from the low data bit to the high data bit, so as to control the corresponding time-sharing shift of the second shift unit 221.

[0088] Specifically, the output time of one period of the field synchronization signal = 1 / the time corresponding to the frame rate of the display, and the output of the trigger timing signal coincides with the vertical synchronization period of the field synchronization signal. In one vertical synchronization period, the output time of the highest bit byte occupies half of the display time, the next bit occupies half of the remaining time, and so on, so as to divide the time.

[0089] As shown in Figure 10As shown, taking 8-bit data bits BIT0-BIT7 as an example, after all pixel data of the image to be output is latched from the first shift unit 211 to the second shift unit 221, each byte in the pixel data is right-shifted by one bit according to the smallest output time length in the trigger start signal, and the lowest bit BIT0 is shifted to the trigger unit 222, after a delay of T_bit0, the second shift unit 221 right-shifts the lowest bit BIT1 to the trigger unit 222, after a delay of T_bit1, the second shift unit 221 right-shifts again by one bit, after a delay of T_bit2, the second shift unit 221 right-shifts again by one bit, after a delay of T_bit3, the second shift unit 221 right-shifts again by one bit, and so on, until all 8-bit pixel data of the second shift unit 221 is moved to the trigger unit 222, and after a delay of T_bit7, the display time of one frame is just used up.

[0090] At this point, the trigger unit 222 successfully generates the driving signal corresponding to the waveform and controls the driving circuit to drive the light emitting device to output the corresponding brightness.

[0091] Further, when the second shift unit 221 includes the first display data and the first correction data, the trigger timing signal includes the first correction data timing and the first display data timing.

[0092] After T1 is determined, the gray scale of 0-255 is displayed normally according to the proportional relationship, so that there is no loss of compression of the gray scale, and the gray scale transition is improved compared with the general method.

[0093] The present application adopts a constant current driving architecture, and the brightness of each color light emitting device can be adjusted by adjusting the light emitting time of the light emitting device in proportion.

[0094] Here, the maximum brightness of the light emitting device is the brightness that can be reached when each byte in the second shift unit 221 is set as the first byte and the light emitting device is driven to emit light when the trigger timing signal is kept. The fixed maximum display time = 1 / display frame rate, and the first correction data is not output at this time. When the first correction data is output, the maximum display time = fixed maximum display time*adjustment ratio, so that the total effective working period of the light emitting device is always consistent with the vertical synchronization period (here, the value of the adjustment ratio is: 0<adjustment ratio<=1).

[0095] Therefore, by adjusting the ratio of T3 to T2, the overall brightness and chroma are adjusted to achieve the related functions.

[0096] The present application also proposes a display system including a light emitting device and the above-mentioned circuit, and the specific structure of the circuit is referred to the above-mentioned embodiments. Since the display system adopts all the technical solutions of the above-mentioned embodiments, it at least has all the beneficial effects brought by the technical solutions of the above-mentioned embodiments, which will not be repeated here.

[0097] The above merely describes optional embodiments of the present application, and does not limit the patent scope of the present application. Any equivalent structural transformation, direct / indirect application in other related technical fields, or the like, made under the inventive concept of the present application, using the content of the present application specification and drawings, are included in the patent protection scope of the present application.

Claims

1. A circuit, characterized by The circuit is connected with a display screen, the display screen includes a plurality of pixel units; the circuit includes: A control module is configured to obtain pixel data corresponding to each of the pixel units according to an input image signal and generate a corresponding trigger timing signal; A shift module is connected with the control module and configured to output a driving signal according to the pixel data and the trigger timing signal to drive the corresponding pixel units to light up.

2. The circuit of claim 1, wherein, The pixel data includes a plurality of data bits; The control module is further configured to determine an output duration of each of the data bits according to a display time of the image signal and time weights of the data bits to form the trigger timing signal.

3. The circuit of claim 1, wherein, The circuit further includes: A correction module is electrically connected with the shift module and the control module, and is configured to perform gray scale correction on the pixel data to obtain a correction result, output the corrected pixel data to the shift module, and obtain a corresponding gray scale offset value according to the correction result and output the gray scale offset value to the control module. The pixel data includes first correction data and a plurality of first display data, and each of the first correction data and the first display data corresponds to a data bit; 4. The circuit of claim 3, wherein, The control module is further configured to determine an output duration of each of the first display data and the first correction data according to the gray scale offset value, the display time of the image signal, and the time weights of the data bits to form the trigger timing signal. The first correction data is located in the highest data bit and / or the lowest data bit in the pixel data. The output duration of each of the display sub-data is negatively correlated with the corresponding data bit.

5. The circuit of claim 2 or 4, wherein, The shift module includes:

6. The circuit of claim 1, wherein, A data storage module is configured to access the pixel data corresponding to each of the pixel units in the image signal; A trigger module is connected with the data storage module and the control module, and is configured to output a driving signal according to the pixel data and the trigger timing signal to drive the corresponding pixel units to light up. The data storage module includes a plurality of first shift units connected in series; 7. The circuit of claim 6, wherein, The first shift units are electrically connected with the control module, and are configured to sequentially transmit the pixel data to the corresponding first shift units according to a field synchronization signal output by the control module. The trigger module includes:

8. The circuit of claim 7, wherein, A plurality of second shift units, the number of the second shift units is the same as that of the first shift units, and each of the second shift units is connected with a corresponding first shift unit, and is configured to latch the received pixel data and output the pixel data bit by bit according to the trigger timing signal; A plurality of trigger units, each of the trigger units is electrically connected with a corresponding second shift unit and a pixel unit, and is configured to output a driving signal with a corresponding level combination under the trigger of the pixel data. The trigger module further includes:

9. The circuit of claim 8, wherein, ​ A plurality of driving units, each of the driving units is electrically connected with one of the trigger units and one of the pixel units, and the driving unit is configured to drive the corresponding pixel unit to light up when a waveform of an accessed driving signal is at a first level.

10. A display system characterized by, An electronic device comprising the circuit according to any one of claims 1-9.

Images