Electronic device and preparation method thereof

Abstract

The invention provides an electronic device and a preparation method thereof, and the electronic device comprises a first substrate; the element layer is arranged on the first substrate, the element layer comprises an active region and a peripheral region, and the peripheral region surrounds the active region; a first bonding pad disposed on the peripheral region of the device layer; the second substrate is arranged opposite to the first substrate; the second bonding pad is arranged on the second substrate, the second bonding pad comprises a first part and a second part, and the second part surrounds the first part; and a bonding material disposed between the first portion of the second bonding pad and the first bonding pad, and disposed between the second portion of the second bonding pad and the first bonding pad.

Description

Technical Field

[0001] This invention relates to an electronic device and a method for manufacturing the same, specifically an electronic device comprising upper and lower substrates and a method for manufacturing the same. Background Technology

[0002] In the manufacturing process of electronic devices, such as during packaging, the upper and lower substrates are typically assembled, and then cut to form multiple independent electronic devices. Traditional processes often use bonding materials to achieve the assembly of the upper and lower substrates.

[0003] However, traditional processes still suffer from problems such as low sealing performance after assembly, poor vacuum level, or low packaging fault tolerance, resulting in poor reliability or high production costs for electronic devices.

[0004] Therefore, there is an urgent need to provide an electronic device and its manufacturing method in order to improve upon known defects. Summary of the Invention

[0005] The present invention provides an electronic device, characterized in that it comprises: a first substrate; a component layer disposed on the first substrate, the component layer including an active region and a peripheral region surrounding the active region; a first bonding pad disposed on the peripheral region of the component layer; a second substrate disposed relative to the first substrate; a second bonding pad disposed on the second substrate, the second bonding pad including a first portion and a second portion surrounding the first portion; and a bonding material disposed between the first portion of the second bonding pad and the first bonding pad, and disposed between the second portion of the second bonding pad and the first bonding pad.

[0006] The present invention also provides a method for fabricating an electronic device, characterized by comprising the following steps: providing a mother substrate; forming an element layer on the mother substrate, wherein the element layer includes a plurality of active regions and a plurality of peripheral regions, the peripheral regions respectively surrounding the active regions; forming a plurality of first bonding pads on the peripheral regions of the element layer; providing a plurality of second substrates; forming a plurality of second bonding pads on the second substrates, wherein each second bonding pad includes a first portion and a second portion, and the second portion surrounds the first portion; placing the second substrates on the element layer such that the second bonding pads overlap with the first bonding pads, and applying a bonding material on two adjacent first bonding pads; and heating the bonding material such that the bonding material melts and diffuses between the first portions of the second bonding pads and between the first bonding pads, and melts and diffuses between the second portions of the second bonding pads and between the first bonding pads. Attached Figure Description

[0007] Figures 1A to 1EA schematic diagram illustrating a method for manufacturing an electronic device according to an embodiment of the present invention is shown;

[0008] Figure 2 A cross-sectional schematic diagram of an electronic device according to an embodiment of the present invention is shown;

[0009] Figures 3A to 3C A schematic diagram illustrating a method for manufacturing an electronic device according to an embodiment of the present invention is shown;

[0010] Figure 3D It shows Figure 3C Enlarged view of part of the image;

[0011] Figure 4A and Figure 4B A schematic diagram illustrating a method for manufacturing an electronic device according to an embodiment of the present invention is shown;

[0012] Figures 5A to 5D A schematic diagram illustrating a method for manufacturing an electronic device according to an embodiment of the present invention is shown;

[0013] Figures 6A to 6C A schematic diagram illustrating a method for manufacturing an electronic device according to an embodiment of the present invention is shown;

[0014] Figure 7A and Figure 7B A schematic diagram illustrating a method for manufacturing an electronic device according to an embodiment of the present invention is shown;

[0015] Figures 8A to 8F A schematic diagram of a method for manufacturing an electronic device according to an embodiment of the present invention is shown.

[0016] Figure label:

[0017] 1. First substrate;

[0018] 11. Component layer;

[0019] 12 First joint pad;

[0020] 12A Part 3;

[0021] 12B Part 4;

[0022] 12C First connecting part;

[0023] 12D load-bearing component;

[0024] 2. Second substrate;

[0025] 2s1, 2s2 on one side;

[0026] 2s3 upper surface;

[0027] 21 Second joint pad;

[0028] 21A Part 1;

[0029] 21B Part Two;

[0030] 21C Second connecting part;

[0031] 21As1, 21Bs1 on one side;

[0032] Orthographic projection positions of 21As1' and 21Bs1';

[0033] 3. Bonding materials;

[0034] Positions 3a and 3b;

[0035] Orthographic projection positions of 3a' and 3b';

[0036] 41. Anti-reflective layer;

[0037] 42. Another anti-reflective layer;

[0038] 5. Connecting parts;

[0039] 5A Part 1;

[0040] 5B Part Two;

[0041] 6. Peelable adhesive;

[0042] 7. Circuit board;

[0043] 8. Protective film;

[0044] AA Active Zone;

[0045] B. Surrounding area;

[0046] H1, H2, H3, and H4 are open.

[0047] D2 distance;

[0048] e1 First edge;

[0049] e2 Second edge;

[0050] R1 Zone 1;

[0051] R2 Second Zone;

[0052] S1 mother substrate;

[0053] S2 Second Mother Substrate;

[0054] SP sealed space;

[0055] Thicknesses T1 and T2;

[0056] X and Y directions;

[0057] Z represents the top view direction and the normal direction. Detailed Implementation

[0058] The following describes the implementation of the present invention through specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified and changed for different viewpoints and applications without departing from the spirit of the invention.

[0059] It should be noted that, unless otherwise specified herein, the use of the word "a" element is not limited to having a single element, but may include one or more of the elements. Furthermore, the use of ordinal numbers such as "first" and "second" in the specification and claims to modify elements of a claim does not itself imply or represent any prior ordinal number for that claimed element, nor does it represent the order of one claimed element with another, or the order of manufacturing processes. The use of these ordinal numbers is solely for the purpose of clearly distinguishing one claimed element with a given name from another claimed element with the same name.

[0060] Throughout this specification and claims, certain terms are used to refer to specific elements. Those skilled in the art will understand that electronic device manufacturers may use different names to refer to the same element. This document is not intended to distinguish between elements that have the same function but different names. In the following specification and claims, words such as “comprising,” “containing,” and “having” are open-ended terms and should therefore be interpreted as “containing but not limited to…”. Thus, when the terms “comprising,” “containing,” and / or “having” are used in the description of this invention, they specify the presence of the corresponding feature, area, step, operation, and / or component, but do not exclude the presence of one or more of the corresponding feature, area, step, operation, and / or component.

[0061] In this text, the terms "about," "approximately," "substantially," and "roughly" typically indicate that a given value or range is within 10%, 5%, 3%, 2%, 1%, or 0.5%. The given quantity is an approximate quantity; that is, even without specific mention of "about," "approximately," "substantially," or "roughly," the meaning of these terms is implied. Furthermore, the phrases "range from the first value to the second value" or "range between the first value and the second value" indicate that the range includes the first value, the second value, and other values ​​in between.

[0062] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. It is understood that these terms, such as those defined in commonly used dictionaries, shall be interpreted as having a meaning consistent with the relevant art and the background or context of this invention, and shall not be interpreted in an idealized or overly formal manner, unless specifically defined herein.

[0063] Furthermore, relative terms such as "below" or "bottom" and "above" or "top" may be used in the embodiments to describe the relative relationship of one element to another in the figures. It is understood that if the apparatus in the figures is flipped upside down, the element described as being on the "below" side will become the element on the "above" side. When a corresponding component (e.g., a membrane or region) is referred to as "on another component," it can be directly on the other component, or there may be other components between them. On the other hand, when a component is referred to as "directly on another component," there are no components between them. Additionally, when a component is referred to as "on another component," there is a vertical relationship between them in the top view, and this component can be above or below the other component, depending on the orientation of the apparatus.

[0064] In this invention, the distance, width, length, and thickness can be measured using an optical microscope, or they can be measured from cross-sectional images in an electron microscope, but the invention is not limited to these methods. Furthermore, any two values ​​or directions used for comparison may have a certain degree of error. If the first value equals the second value, it implies an error of approximately 10% between the two values; if the first direction is perpendicular to the second direction, the angle between the first and second directions may be between 80 and 100 degrees; if the first direction is parallel to the second direction, the angle between the first and second directions may be between 0 and 10 degrees.

[0065] It should be noted that the technical solutions provided in the different embodiments below can be substituted for, combined or mixed with each other to constitute another embodiment without violating the spirit of the present invention.

[0066] The electronic device of the present invention may include, for example, a display device, a sensing device, an antenna device, a touch device, a splicing device, or other suitable electronic devices, but is not limited thereto. The display device of the present invention may be a non-self-emissive display device or a self-emissive display device, such as a liquid crystal display (LCD), a cholesterol liquid crystal display (CLC), an electrophoretic display (Electro-Phoretic Display), an organic light-emitting diode (OLED) display, or a light-emitting diode (LED) display, but is not limited thereto. The display device may include light-emitting diodes, light conversion layers, or other suitable materials, or combinations thereof, but is not limited thereto. Light-emitting diodes may include, for example, organic light-emitting diodes (OLEDs), sub-millimeter light-emitting diodes (mini LEDs), micro LEDs, or quantum dot LEDs (including QLEDs and QDLEDs), but are not limited thereto. The light conversion layer may include wavelength conversion materials and / or filter materials. The light conversion layer may include, for example, fluorescence, phosphorescence, quantum dots (QD), other suitable materials, or combinations thereof, but is not limited thereto. The sensing device may include, for example, biosensors, touch sensors, fingerprint sensors, infrared sensors, temperature sensors, other suitable sensors, or combinations of the above types of sensors. The antenna device may be, for example, a liquid crystal antenna or other types of antennas, but is not limited thereto. The splicing device may include, for example, a splicing display device or a splicing antenna device, but is not limited thereto. The electronic device may include electronic components, which may include passive components, active components, or combinations thereof, such as capacitors, resistors, inductors, varactor diodes, variable capacitors, filters, diodes, transistors, sensors, microelectromechanical systems (MEMS) components, chips, etc., but is not limited thereto. It should be noted that the electronic device of the present invention may be various combinations of the above devices, but is not limited thereto.

[0067] Figures 1A to 1E A schematic diagram illustrating a method for manufacturing an electronic device according to an embodiment of the present invention is shown. Wherein, Figures 1A to 1E The upper part of the diagram is a top view, and the lower part is a cross-sectional view. For ease of explanation, some components have been omitted from the diagram.

[0068] In one embodiment of the present invention, such as Figure 1A As shown, a method for manufacturing an electronic device may include: providing a mother substrate S1; forming a component layer 11 on the mother substrate S1, wherein the component layer 11 includes a plurality of active regions AA and a peripheral region B, the peripheral region B surrounding the active regions AA; and forming a plurality of first bonding pads 12 on the peripheral region B of the component layer 11.

[0069] More in detail, such as Figure 1A As shown, each of the plurality of first bonding pads 12 may include an opening H1. In the top view Z, the projected area of ​​the opening H1 of the first bonding pad 12 on the mother substrate S1 may be approximately equal to the projected area of ​​the active region AA of the element layer 11 on the mother substrate S1, and the opening H1 may expose the active region AA of the element layer 11 respectively. In the top view Z, the first bonding pads 12 may be arranged around the active region AA of the element layer 11.

[0070] In this invention, the material of the mother substrate S1 may include glass, quartz, sapphire, ceramic, polycarbonate (PC), polyimide (PI), polypropylene (PP), polyethylene terephthalate (PET), polymethyl methacrylate (PMMA), other suitable materials, or combinations of the above materials, but this invention is not limited thereto.

[0071] In this invention, the active region AA of element layer 11 may include circuits, wires, conductive pads, sensing elements, driving circuits, other suitable elements, or combinations thereof. Suitable elements may include passive elements, active elements, or combinations thereof, such as capacitors, resistors, inductors, diodes, transistors, etc., but this invention is not limited thereto. Diodes may include light-emitting diodes or photodiodes. Light-emitting diodes include organic light-emitting diodes (OLEDs), mini LEDs, micro LEDs, or quantum dot LEDs (QDs, such as QLEDs, QDLEDs), or other suitable materials or any arrangement and combination of the above materials, but this invention is not limited thereto. In one embodiment of this invention, element layer 11 may be made of a thin film, which may include multiple insulating layers and multiple metal layers, but this invention is not limited thereto. In this invention, the peripheral region B of element layer 11 may include a metal layer, conductive contacts, and an insulating layer, but this invention is not limited thereto. In one embodiment of the present invention, the active region AA of the element layer 11 may include multiple sensing elements, such as wavelength sensors or temperature sensors, but the present invention is not limited thereto. In the present invention, the size of the active region AA in the element layer 11 is not particularly limited, and the size of each active region AA can be adjusted as needed, but the present invention is not limited thereto. The "size of the active region" refers, for example, to the maximum width or length of the active region AA in one direction (e.g., the X direction).

[0072] In this invention, the material of the first bonding pad 12 may include tin, aluminum, nickel, gold, palladium (Pd), copper, titanium, the aforementioned alloys, or combinations thereof. In this invention, the first bonding pad 12 may have a single-layer or multi-layer structure, and the layers may be made of the same or different materials. For example, the first bonding pad 12 may have a multi-layer structure of copper / gold, titanium / gold, molybdenum / copper / tin, titanium / copper / gold, aluminum / nickel / gold, aluminum / nickel / copper, aluminum / nickel / palladium / gold, copper / nickel / gold, copper / gold / palladium / gold, copper / tin, or titanium / copper, but this invention is not limited to these. In this invention, the thickness of the first bonding pad 12 may be from 0.1 μm to 35 μm, for example, from 0.4 μm to 35 μm, or from 0.5 μm to 5 μm, but this invention is not limited to these. When the first bonding pad 12 includes a gold (Au) layer, the thickness of the gold (Au) layer may be 0.1 μm to 10 μm, 0.4 μm to 10 μm, 0.4 μm to 5 μm, 0.5 μm to 2 μm, or 0.4 μm to 0.8 μm, but the invention is not limited thereto, and the gold layer may be used to provide good bonding effect. When the first bonding pad 12 contains a palladium (Pd) layer, the thickness of the palladium (Pd) layer can be 0.1 μm to 10 μm, 0.1 μm to 5 μm, 0.2 μm to 5 μm, or 0.1 μm to 0.5 μm. However, the present invention is not limited to this. The palladium layer can be used to prevent the diffusion of metal materials between the upper and lower layers, which may lead to abnormalities in subsequent steps. In addition, when the first bonding pad 12 has a palladium layer and the palladium layer reaches the above-mentioned thickness, it can provide a good bonding effect. For example, when the palladium layer reaches the above-mentioned thickness, the probability of gas in the environment passing through the palladium layer and reacting with other metal layers in the first bonding pad 12 can be reduced, thereby reducing the possibility of deterioration of other metal layers in the first bonding pad 12. When the first bonding pad 12 comprises an aluminum (Al) layer, the thickness of the aluminum (Al) layer can be 0.4 μm to 1 μm, 0.5 μm to 0.8 μm, or 0.4 μm to 0.8 μm. However, the present invention is not limited to this. The aluminum (Al) layer can be formed on the mother substrate S1 as the base of the first bonding pad 12, and when the aluminum (Al) layer reaches the above-mentioned thickness, it can provide better reliability for the first bonding pad 12. When the first bonding pad 12 comprises a nickel (Ni) layer, the thickness of the nickel (Ni) layer can be 1.2 μm to 10 μm, 1.2 μm to 5 μm, or 1.5 μm to 5 μm. However, the present invention is not limited to this. The nickel (Ni) layer can be formed on the aluminum (Al) layer to facilitate the formation of other metal layers in the first bonding pad 12. In this invention, "thickness of the first bonding pad 12" refers, for example, the distance in the normal direction Z between the side of the first bonding pad 12 away from the mother substrate S1 and the side of the first bonding pad 12 adjacent to the mother substrate S1, and "thickness of each metal layer in the first bonding pad 12" refers to the distance in the normal direction Z between the side of the metal layer away from the mother substrate S1 and the side of the metal layer adjacent to the mother substrate S1.In this invention, a suitable method may be used to form the first bonding pad 12. Suitable methods may include electroplating, chemical plating, chemical vapor deposition, physical vapor deposition, atomic deposition (ALD), sputtering, lamination, coating, or a combination thereof, but the invention is not limited thereto. The "coating method" may, for example, be dip coating, spin coating, roller coating, blade coating, spray coating, or a combination thereof, but the invention is not limited thereto.

[0073] Next, as Figure 1B As shown, a plurality of second substrates 2 are provided; a plurality of second bonding pads 21 are formed on the second substrates 2, wherein each second bonding pad 21 includes a first portion 21A and a second portion 21B, and the second portion 21B surrounds the first portion 21A.

[0074] More in detail, such as Figure 1B As shown, the second substrate 2 includes a first region R1 and a second region R2, the second region R2 surrounding the first region R1, and at least a portion of the thickness T1 of the first region R1 of the second substrate 2 is less than the thickness T2 of the second region R2 of the second substrate 2. The term "thickness" refers, for example, in the normal direction Z of the second substrate 2, where the second substrate 2 is closer to the first substrate 1 (e.g., ...). Figure 1C (as shown) one side 2s1 to the second substrate 2 away from the first substrate 1 (as shown) Figure 1C The distance between the other side 2s2 (shown) is shown. The first portion 21A and the second portion 21B of the second bonding pad 21 are respectively disposed in the second region R2 of the second substrate 2. In the top view Z, the first portion 21A and the second portion 21B of the second bonding pad 21 respectively form a closed annular structure, wherein the first portion 21A of the second bonding pad 21 includes an opening H2, and the second portion 21B of the second bonding pad 21 includes an opening H3. In the top view Z, the projected area of ​​the opening H2 on the second substrate 2 is approximately equal to the projected area of ​​the first region R1 of the second substrate 2 on the second substrate 2, and the projected area of ​​the opening H3 on the second substrate 2 is greater than the projected area of ​​the first region R1 of the second substrate 2 on the second substrate 2.

[0075] In this invention, the material of the second substrate 2 may include silicon, germanium (Ge), zinc sulfide (ZnS), zinc selenide (ZnSe), gallium arsenide (GaAs), chalcogenides, or combinations thereof, but the invention is not limited thereto. In one embodiment of the invention, the second substrate 2 may be composed of, for example, a silicon substrate that allows light of a specific wavelength (e.g., light with a wavelength of 5 μm to 15 μm) to pass through, but the invention is not limited thereto. In this invention, the second bonding pad 21 may be fabricated using the same or different materials as the first bonding pad 12, and the material of the second bonding pad 21 may be as described for the first bonding pad 12. Furthermore, when the second bonding pad comprises a single-layer or multi-layer structure, the materials and related thicknesses of each layer are as described for the first bonding pad 12, and will not be repeated here. In this invention, the thickness of the second bonding pad 21 may be from 0.1 μm to 35 μm, for example, from 0.4 μm to 35 μm or from 0.5 μm to 5 μm, but the invention is not limited thereto. In one embodiment of the present invention, the thickness of the second bonding pad 21 may be greater than or equal to the thickness of the first bonding pad 12, but the present invention is not limited thereto. In the present invention, the "thickness of the second bonding pad 21" refers, for example, the distance in the normal direction Z between the side of the second bonding pad 21 away from the second substrate 2 and the side of the second bonding pad 21 adjacent to the second substrate 2. When the second bonding pad comprises a multilayer structure, the "thickness of each metal layer in the second bonding pad 21" refers to the distance in the normal direction Z between the side of the metal layer away from the second substrate 2 and the side of the metal layer adjacent to the second substrate 2. In the present invention, suitable methods can be used to form the second bonding pad 21; suitable methods can be referred to the method for forming the first bonding pad 12, and will not be described in detail here.

[0076] After that, as Figure 1C As shown, a second substrate 2 is placed on the element layer 11, such that the second bonding pad 21 overlaps with the first bonding pad 12, and a bonding material 3 is applied to two adjacent first bonding pads 12. In one embodiment of the invention, the second substrate 2 may be placed on the element layer 11 first, and then the bonding material 3 may be applied to two adjacent first bonding pads 12. However, the invention is not limited to this. In other embodiments, the bonding material 3 may be applied to two adjacent first bonding pads 12 first, and then the second substrate 2 may be placed on the element layer 11. Furthermore, as... Figure 1C As shown, the second substrate 2 is placed on the element layer 11 with the second bonding pad 21 facing the first bonding pad 12. Therefore, the second bonding pad 21 is adjacent to the first bonding pad 12 relative to the second substrate 2.

[0077] In one embodiment of the present invention, such as Figure 1C As shown, the bonding material 3 can directly contact the first bonding pad 12, but the present invention is not limited thereto. In one embodiment of the present invention, as... Figure 1CAs shown, when the second substrate 2 is placed on the element layer 11, in the top view Z, the first region R1 of the second substrate 2 can approximately overlap with the active region AA of the element layer 11, and the second region R2 of the second substrate 2 overlaps with a portion of the peripheral region B of the element layer 11. In one embodiment of the present invention, as... Figure 1C As shown, when the second substrate 2 is placed on the element layer 11, in the top view Z, the opening H2 of the first portion 21A of the second bonding pad 21 can substantially overlap with the active region AA of the element layer 11. In one embodiment of the present invention, as Figure 1C As shown, when the second substrate 2 is placed on the element layer 11, in the top view Z, the opening H2 of the first portion 21A of the second bonding pad 21 can approximately overlap with the opening H1 of the first bonding pad 12.

[0078] In this invention, the bonding material 3 may comprise solder, solder paste, or a combination thereof, but the invention is not limited thereto. In this invention, the bonding material 3 may comprise tin, tin alloys, or a combination thereof, but the invention is not limited thereto. Because tin has a low melting point, when the bonding material contains tin, the temperature of the subsequent melting of the bonding material can be reduced, thereby reducing damage to the substrate caused by excessive temperature.

[0079] Then, as Figure 1D As shown, the bonding material 3 is heated, causing it to melt and diffuse between the first portion 21A of the second bonding pad 21 and the first bonding pad 12, and also to melt and diffuse between the second portion 21B of the second bonding pad 21 and the first bonding pad 12. More specifically, as... Figure 1D As shown, the bonding material 3 can be heated to melt it into a liquid or semi-liquid state and flow between the first bonding pad 12 and the second bonding pad 21, thereby bonding the first bonding pad 12 and the second bonding pad 21 through the bonding material 3, achieving the purpose of assembling the mother substrate S1 and the second substrate 2. Therefore, a sealed space SP can be formed between the mother substrate S1 and the second substrate 2. Since the first portion 21A and the second portion 21B of the second bonding pad 21 are closed annular structures, the vacuum effect within the sealed space SP can be improved, thereby improving the reliability of the electronic device and reducing interference from external airflow. In one embodiment of the present invention, when assembling the substrates, if the first portion 21A or the second portion 21B of the second bonding pad 21 has a defect, it can be bonded through the other portion, thereby improving the packaging tolerance and benefiting process applications. In one embodiment of this disclosure, the sealed space SP can be a vacuum or near-vacuum state to reduce interference from other external environments (such as moisture, air, etc.) on the components within the active area AA.

[0080] In one embodiment of the present invention, the temperature of the heating bonding material 3 may be greater than or equal to the melting temperature of the bonding material 3, for example, it may be 90°C to 450°C, 150°C to 450°C, or 200°C to 400°C, but the present invention is not limited thereto. In one embodiment of the present invention, other process conditions may be selectively added according to process requirements, such as pressurization to assist the assembly effect. "Pressure" refers to the situation where a stress greater than 0.1 MPa is applied during the melting of the bonding material 3.

[0081] In this invention, because the first bonding pad 12 and / or the second bonding pad 21 have an affinity with the bonding material 3, when the bonding material 3 is heated, it flows along the positions of the first bonding pad 12 and / or the second bonding pad 21. Therefore, when the electronic device is manufactured, the possibility of the bonding material 3 overflowing into the sealed space SP can be reduced, thereby reducing the impact or interference of the overflowing bonding material 3 on the function of the active area AA. Figure 1D As shown, in the top view Z, the bonding material 3 overlaps with at least a portion of the first bonding pad 12. In one embodiment of the invention, the projected area of ​​the bonding material 3 on the mother substrate S1 is approximately equal to the projected area of ​​the first bonding pad 12 on the mother substrate S1; therefore, in the top view Z, the first bonding pad 12 is covered by the bonding material 3. In the invention, as... Figure 1D As shown, the bonding material 3 has a first edge e1 and a second edge e2. The first edge e1 is adjacent to the active region AA, and the second edge e2 is opposite to the first edge e1. In one direction (e.g., the X direction), the distance D1 between the first edge e1 and the first portion 21A of the second bonding pad 21 is smaller than the distance D2 between the second edge e2 and the second portion 21B of the second bonding pad 21. In one embodiment of the invention, as... Figure 1D As shown, the distance D1 between the first edge e1 of the bonding material 3 and the first portion 21A of the second bonding pad 21 can be, for example, 0, therefore in Figure 1D Distance D1 is not shown in the diagram, but the invention is not limited thereto. In other embodiments, distance D1 may be greater than 0 and less than distance D2. "Distance D1" refers, for example, in a cross-sectional view, the distance measured along the upper surface of the bonding material 3 from the first edge e1 of the bonding material 3 to the position where the upper surface of the bonding material 3 contacts the first portion 21A of the second bonding pad 21. "Distance D2" refers, for example, in a cross-sectional view, the distance measured along the upper surface of the bonding material 3 from the second edge e2 of the bonding material 3 to the position where the upper surface of the bonding material 3 contacts the second portion 21B of the second bonding pad 21.

[0082] In one embodiment of the present invention, before the step of heating the bonding material 3, the method may further include: placing the mother substrate S1 in a cavity (not shown) and evacuating the cavity. In the present invention, the evacuation step can be performed at any stage before heating the bonding material 3. For example, after providing the mother substrate S1, the mother substrate S1 can be placed in the cavity and the cavity evacuated, followed by subsequent steps; or after placing the second substrate 2 in the element layer 11, the element can be placed in the cavity and the cavity evacuated, followed by subsequent steps such as applying the bonding material 3 to two adjacent first bonding pads 12. However, the present invention is not limited to these methods. In the present invention, "vacuum" refers to a pressure within the cavity, for example, less than or equal to 1 torr. For example, the pressure within the cavity can be 10⁻³ torr to 1 torr or 10⁻⁷ torr to 1 torr, but the present invention is not limited to these methods. In this invention, since multiple second substrates 2 are paired with one mother substrate S1, it is less likely that the vacuum level of the center and edge of the mother substrate S1 will be inconsistent during the vacuuming step, thereby improving the vacuum effect in the sealed space SP.

[0083] Next, as Figure 1D and Figure 1E As shown, the mother substrate S1 and the component layer 11 are cut to form multiple electronic devices. More specifically, this can be achieved, for example, along... Figure 1D The dashed lines in the diagram represent cuts made from the bonding material 3, the first bonding pad 12, the component layer 11, and the mother substrate S1, thereby forming multiple electronic devices of appropriate sizes, such as... Figure 1E As shown, where, Figure 1E The first substrate 1 is formed by cutting the mother substrate S1. In this embodiment, Figure 1D The dashed lines in the diagram roughly represent cuts along the edge of a portion of element layer 11 and the dimensions of the second substrate 2. Therefore, as shown... Figure 1E As shown, the projected area of ​​the cut component layer 11 in the electronic device can be approximately equal to the projected area of ​​the first substrate 1. However, in other embodiments of the present invention, the projected area of ​​the first substrate 1 in the electronic device can be larger than the projected area of ​​the cut component layer 11. In one embodiment of the present invention, in the Z-direction of the top view, the projected area of ​​the cut electronic device (e.g., ...) is approximately equal to the projected area of ​​the first substrate 11. Figure 1E The area of ​​the first substrate 1 is larger than the area of ​​the second substrate 2, and the orthographic projection of the second substrate 2 completely falls within the first substrate 1. This means that the second substrate 2 can be cut without being cut during the dicing step, reducing the risk of breakage of the second substrate 2 or damage to the second portion 21B of the second bonding pad 21, thereby improving product yield. In this invention, the method for cutting the mother substrate S1 and the component layer 11 can be, for example, laser cutting, rotary cutting, or a combination thereof. In one embodiment of this invention, the electronic device may have the function of receiving or transmitting signals, such as sensing temperature or emitting light, but the invention is not limited thereto.

[0084] Figure 2 A cross-sectional schematic diagram of an electronic device according to an embodiment of the present invention is shown.

[0085] In one embodiment of the present invention, through the aforementioned Figures 1A to 1E The manufacturing method can form, for example... Figure 2 The electronic device shown. In this invention, as... Figure 2 As shown, the electronic device may include: a first substrate 1; a component layer 11 disposed on the first substrate 1, the component layer 11 including an active region AA and a peripheral region B, the peripheral region B surrounding the active region AA; a first bonding pad 12 disposed on the peripheral region B of the component layer 11; a second substrate 2 disposed relative to the first substrate 1; a second bonding pad 21 disposed on the second substrate 2, the second bonding pad 21 including a first portion 21A and a second portion 21B, the second portion 21B surrounding the first portion 21A; and a bonding material 3 disposed between the first portion 21A and the first bonding pad 12 of the second bonding pad 21, and disposed between the second portion 21B and the first bonding pad 12 of the second bonding pad 21.

[0086] In this invention, such as Figure 2 As shown, the bonding material 3 has a first edge e1 and a second edge e2. The first edge e1 is adjacent to the active region AA, and the second edge e2 is opposite to the first edge e1. In one direction (e.g., the X direction), the distance D1 between the first edge e1 and the first portion 21A of the second bonding pad 21 is smaller than the distance D2 between the second edge e2 and the second portion 21B of the second bonding pad 21. In one embodiment of the invention, as... Figure 2 As shown, the distance D1 between the first edge e1 and the first part 21A can be, for example, 0, therefore in Figure 2 The distance D1 is not shown, but the invention is not limited thereto.

[0087] In this invention, such as Figure 2 As shown, the first bonding pad 12 may include an opening H1. In the top view Z, the projected area of ​​the opening H1 on the first substrate 1 is approximately equal to the projected area of ​​the active region AA of the element layer 11 on the first substrate 1, and the opening H1 exposes the active region AA of the element layer 11. The first portion 21A of the second bonding pad 21 includes an opening H2. In the top view Z, the projected area of ​​the opening H2 on the first substrate 1 is approximately equal to the projected area of ​​the first region R1 of the second substrate 2 on the first substrate 1. In one embodiment of the invention, as... Figure 2 As shown, the projected area of ​​the opening H1 of the first bonding pad 12 on the first substrate 1 is approximately equal to the projected area of ​​the opening H2 of the first portion 21A of the second bonding pad 21 on the first substrate 1.

[0088] In this invention, the material of the first substrate 1 is the same as that of the mother substrate S1. The materials and other features of the element layer 11, the first bonding pad 12, the second substrate 2, the second bonding pad 21, and the bonding material 3 are as described above and will not be repeated here. In one embodiment of this invention, the active region AA of the element layer 11 may contain multiple sensing elements. Therefore, the electronic device of this invention may be, for example, a sensing device, but this invention is not limited thereto. In one embodiment of this invention, the electronic device may have the function of emitting light of a specific wavelength (e.g., light with wavelengths of 5 μm to 15 μm, 100 nm to 400 nm, 380 nm to 750 nm, 780 nm to 950 nm) or sensing light of a specific wavelength (e.g., light with wavelengths of 5 μm to 15 μm), but this invention is not limited thereto.

[0089] In one embodiment of the present invention, such as Figure 2 As shown, the electronic device may further include an anti-reflective layer 41 disposed on the second substrate 2. More specifically, the second bonding pad 21 is disposed on the side 2s1 of the second substrate 2 facing the first substrate 1, and the anti-reflective layer 41 is disposed on the side 2s2 of the second substrate 2 away from the first substrate 1. In other words, the second substrate 2 is located between the second bonding pad 21 and the anti-reflective layer 41. In one embodiment of the invention, as... Figure 2 As shown, the electronic device may further include another anti-reflective layer 42 disposed on the side 2s1 of the second substrate 2 near the first substrate 1. More specifically, the other anti-reflective layer 42 may be disposed in the first region R1 of the second substrate 2. Therefore, in the top view Z, the other anti-reflective layer 42 may overlap with the first region R1 of the second substrate 2 but not with the second region R2 of the second substrate 2, but the invention is not limited thereto. The anti-reflective layer 41 and the other anti-reflective layer 42 can be used to reduce the reflection of light within a specified wavelength range and / or block the entry of light outside the specified wavelength range, thereby improving the transmittance of light within the specified wavelength range. In one embodiment of the invention, the light within the specified wavelength range is, for example, light with a wavelength of 5 μm to 15 μm, but the invention is not limited thereto.

[0090] In this invention, the same or different materials can be used to form the antireflective layer 41 and another antireflective layer 42. Suitable materials may each include silicon, germanium (Ge), zinc sulfide (ZnS), zinc selenide (ZnSe), magnesium fluoride (MgF2), beryllium fluoride (BeF2), potassium chloride, arsenic trisulfide (As2S3), silicon oxide, silicon nitride, silicon oxynitride, indium tin oxide (ITO), aluminum zinc oxide (AZO), indium gallium zinc oxide (IGZO), antimony tin oxide (ATO), fluorine-doped tin oxide (FTO), or combinations thereof, but the invention is not limited thereto. In this invention, the antireflective layer 41 and the other antireflective layer 42 may selectively include a plurality of high refractive index layers and a plurality of low refractive index layers, wherein the high refractive index layers and low refractive index layers are stacked alternately. By using a stacked design of films with different refractive indices, the antireflective layer 41 and / or another antireflective layer 42 can achieve the effect of reducing reflected light. The "high refractive index layer" refers, for example, to a film made of a material with a refractive index greater than or equal to 1.38 and less than or equal to 1.48. The "low refractive index layer" refers, for example, to a film made of a material with a refractive index greater than or equal to 1.8 and less than or equal to 2.1.

[0091] Figures 3A to 3C A schematic diagram of a method for manufacturing an electronic device according to an embodiment of the present invention is shown. Figure 3D It shows Figure 3C A partially enlarged image. Among them, Figure 3A The upper half is a top view of the mother substrate, and the lower half is a top view of the second substrate. Figure 3B and Figure 3C The upper half is a top view, and the lower half is a cross-sectional view. Furthermore, Figures 3A to 3C The manufacturing method shown is the same as Figures 1A to 1E Similar, except for the following differences.

[0092] In one embodiment of the present invention, such as Figure 3AAs shown, a method for manufacturing an electronic device may include: providing a mother substrate S1; forming a component layer 11 on the mother substrate S1; forming a plurality of first bonding pads 12 on a peripheral region B of the component layer 11; providing a plurality of second substrates 2; and forming a plurality of second bonding pads 21 on the second substrates 2. Each first bonding pad 12 includes a third portion 12A, a fourth portion 12B, and a first connecting portion 12C. The fourth portion 12B surrounds the third portion 12A, and the first connecting portion 12C connects the third portion 12A and the fourth portion 12B. Each second bonding pad 21 includes a first portion 21A and a second portion 21B, with the second portion 21B surrounding the first portion 21A.

[0093] More in detail, such as Figure 3A As shown, in the top view Z, the third portion 12A and the fourth portion 12B of the first bonding pad 12 each form a closed annular structure, and the two annular structures are connected to each other through the first connecting portion 12C. The third portion 12A of the first bonding pad 12 includes an opening H1, and the fourth portion 12B of the first bonding pad 12 includes an opening H4. The opening H1 exposes the active region AA of the element layer 11. In the top view Z, the projected area of ​​the opening H1 on the mother substrate S1 is approximately equal to the projected area of ​​the active region AA on the mother substrate S1. Furthermore, in this embodiment, the third portion 12A of the first bonding pad 12 can be connected to the fourth portion 12B through four first connecting portions 12C, but the invention is not limited to this. In other embodiments, the number of first connecting portions 12C can be adjusted as needed.

[0094] In one embodiment of the present invention, such as Figure 3A As shown, the opening H1 of the third portion 12A of the first bonding pad 12 is approximately equal to the opening H2 of the first portion 21A of the second bonding pad 21, and the opening H4 of the fourth portion 12B of the first bonding pad 12 is approximately equal to the opening H3 of the second portion 21B of the second bonding pad 21. Therefore, during subsequent assembly steps, in the top view Z direction, the third portion 12A of the first bonding pad 12 can approximately overlap with the first portion 21A of the second bonding pad 21, and the fourth portion 12B of the first bonding pad 12 can approximately overlap with the second portion 21B of the second bonding pad 21.

[0095] Next, as Figure 3B As shown, a second substrate 2 is placed on the element layer 11, such that the second bonding pad 21 overlaps with the first bonding pad 12, and a bonding material 3 is applied to two adjacent first bonding pads 12. More specifically, as... Figure 3A and Figure 3BAs shown, the second substrate 2 is placed on the element layer 11. In the top view Z direction, the first portion 21A of the second bonding pad 21 substantially overlaps with the third portion 12A of the first bonding pad 12, and the second portion 21B of the second bonding pad 21 substantially overlaps with the fourth portion 12B of the first bonding pad 12. In one embodiment of the present invention, the order of placing the second substrate 2 on the element layer 11 and applying the bonding material 3 on two adjacent first bonding pads 12 is not particularly limited and can be adjusted as needed, which will not be elaborated here.

[0096] In one embodiment of the present invention, such as Figure 3B As shown, cross-sectional views are shown of line segment A-A' passing through the first connecting portion 12C of the first bonding pad 12 and line segment B-B' not passing through the first connecting portion 12C of the first bonding pad 12. The bonding material 3 can directly contact the fourth portion 12B of the first bonding pad 12. However, the present invention is not limited to this. In other embodiments, the bonding material 3 can directly contact the fourth portion 12B of the first bonding pad 12 and the element layer 11.

[0097] After that, as Figure 3C As shown, the bonding material 3 is heated, causing it to melt and diffuse between the first portion 21A of the second bonding pad 21 and the third portion 12A of the first bonding pad 12, and also to melt and diffuse between the second portion 21B of the second bonding pad 21 and the fourth portion 12B of the first bonding pad 12. More specifically, due to the affinity between the first bonding pad 12 and / or the second bonding pad 21 and the bonding material 3, by heating the bonding material 3, it melts into a liquid or semi-liquid state and flows between the fourth portion 12B of the first bonding pad 12 and the second portion 21B of the second bonding pad 21. Then, the bonding material 3 can pass through the first connecting portion 12C of the first bonding pad 12 (e.g., ...). Figure 3A (As shown) The material flows into the space between the third portion 12A of the first bonding pad 12 and the first portion 21A of the second bonding pad 21, thereby bonding the first bonding pad 12 and the second bonding pad 21 together through the bonding material 3, achieving the purpose of assembling the substrates. Therefore, a sealed space SP can be formed between the mother substrate S1 and the second substrate 2. Since the third portion 12A and the fourth portion 12B of the first bonding pad 12 and the first portion 21A and the second portion 21B of the second bonding pad 21 are closed annular structures, the vacuum effect in the sealed space SP can be improved after the substrates are assembled, thereby improving the reliability of the electronic device.

[0098] In one embodiment of the present invention, such as Figure 3CAs shown, cross-sectional views are shown of line segment A-A' passing through the first connecting portion 12C of the first bonding pad 12 and line segment B-B' not passing through the first connecting portion 12C of the first bonding pad 12. The bonding material 2 can be disposed between the third portion 12A of the first bonding pad 12 and the first portion 21A of the second bonding pad 21, and between the fourth portion 12B of the first bonding pad 12 and the second portion 21B of the second bonding pad 21. Furthermore, as... Figure 3C As shown, the bonding material 3 can also be disposed between the first connecting portion 12C of the first bonding pad 12 and the second substrate 2.

[0099] In one embodiment of the present invention, such as Figure 3C and Figure 3D As shown in the cross-sectional view, the bonding material 3 may include an arcuate or irregular surface. In this invention, the distance D1 between the first edge e1 of the bonding material 3 and the first portion 21A of the second bonding pad 21 is less than the distance D2 between the second edge e2 of the bonding material 3 and the second portion 21B of the second bonding pad 21. In one embodiment of the invention, as... Figure 3D As shown, when the bonding material 3 has an arcuate or irregular surface, the "second edge e2" in cross-section refers to the position 3b where the bonding material 3 contacts the first bonding pad 12 and is furthest from the sealing space SP. In one embodiment of the invention, as... Figure 3D As shown, the distance D1 between the first edge e1 of the bonding material 3 and the first portion 21A of the second bonding pad 21 can be, for example, 0, therefore in Figure 3D Distance D1 is not shown in the diagram, but the invention is not limited thereto. In other embodiments, distance D1 may be greater than 0 and less than distance D2. "Distance D1" refers, for example, in a cross-sectional view, the orthographic projection position 3a' of the position 3a of the bonding material 3 in contact with the first bonding pad 12 and closest to the sealing space SP on the mother substrate S1 (or the first substrate 1) to the orthographic projection position 21As1' of the side 21As1 of the first portion 21A of the second bonding pad 21 adjacent to the sealing space SP on the mother substrate S1 (or the first substrate 1). "Distance D2" refers, for example, in a cross-sectional view, the orthographic projection position 3b' of the position 3b of the bonding material 3 in contact with the first bonding pad 12 and furthest from the sealing space SP on the mother substrate S1 (or the first substrate 1) to the orthographic projection position 21Bs1' of the side 21Bs1 of the second portion 21B of the second bonding pad 21 furthest from the sealing space SP on the mother substrate S1 (or the first substrate 1).

[0100] Next, you can refer to Figure 1D and Figure 1E As shown, the steps of cutting the mother substrate S1 and the component layer 11 are performed to form multiple electronic devices. For details, please refer to the foregoing description, which will not be repeated here.

[0101] In this invention, the materials and other features of the mother substrate S1, the element layer 11, the first bonding pad 12, the second substrate 2, the second bonding pad 21, and the bonding material 3 are as described above and will not be repeated here. Furthermore, the methods for forming the first bonding pad 12 and the second bonding pad 21, heating the bonding material 3, and cutting the mother substrate S1 and the element layer 11 can be referred to the foregoing description and will not be repeated here.

[0102] Figure 4A and Figure 4B A schematic diagram illustrating a method for manufacturing an electronic device according to an embodiment of the present invention is shown. Wherein, Figure 4A The upper half is a top view of the mother substrate, and the lower half is a top view of the second substrate. Figure 4B The upper half is a top view, and the lower half is a cross-sectional view. Furthermore, Figure 4A and Figure 4B The manufacturing method shown is the same as Figures 1A to 1E and Figures 3A to 3C Similar, except for the following differences.

[0103] In one embodiment of the present invention, such as Figure 4A As shown, a method for manufacturing an electronic device may include: providing a mother substrate S1; forming a component layer 11 on the mother substrate S1; forming a plurality of first bonding pads 12 on a peripheral region B of the component layer 11; providing a plurality of second substrates 2; and forming a plurality of second bonding pads 21 on the second substrates 2. Each first bonding pad 12 includes a third portion 12A and a fourth portion 12B, with the fourth portion 12B surrounding the third portion 12A. Each second bonding pad 21 includes a first portion 21A, a second portion 21B, and a second connecting portion 21C, with the second portion 21B surrounding the first portion 21A and the second connecting portion 21C connecting the first portion 21A and the second portion 21B respectively.

[0104] More in detail, such as Figure 4A As shown, in the top view Z, the third portion 12A and the fourth portion 12B of the first bonding pad 12 respectively form closed annular structures. The third portion 12A of the first bonding pad 12 includes an opening H1, and the fourth portion 12B of the first bonding pad 12 includes an opening H4. The opening H1 exposes the active region AA of the element layer 11. In the top view Z, the projected area of ​​the opening H1 on the mother substrate S1 is approximately equal to the projected area of ​​the active region AA on the mother substrate S1. The first portion 21A and the second portion 21B of the second bonding pad 21 are connected by second connecting portions 21C. In this embodiment, the first portion 21A of the second bonding pad 21 can be connected to the second portion 21B by four second connecting portions 21C, but the invention is not limited to this. In other embodiments, the number of second connecting portions 21C can be adjusted as needed.

[0105] In one embodiment of the present invention, such as Figure 4A As shown, the opening H1 of the third portion 12A of the first bonding pad 12 is approximately equal to the opening H2 of the first portion 21A of the second bonding pad 21, and the opening H4 of the fourth portion 12B of the first bonding pad 12 is approximately equal to the opening H3 of the second portion 21B of the second bonding pad 21. Therefore, during subsequent assembly steps, in the top view Z direction, the third portion 12A of the first bonding pad 12 can approximately overlap with the first portion 21A of the second bonding pad 21, and the fourth portion 12B of the first bonding pad 12 can approximately overlap with the second portion 21B of the second bonding pad 21.

[0106] Next, as Figure 4B As shown, a second substrate 2 is placed on the element layer 11, such that the second bonding pad 21 overlaps with the first bonding pad 12, and a bonding material 3 is applied to two adjacent first bonding pads 12. More specifically, as... Figure 4B As shown, cross-sectional views are shown of line segment C-C' passing through the second connecting portion 21C of the second bonding pad 21 and line segment D-D' not passing through the second connecting portion 21C of the second bonding pad 21, respectively. Figure 4A and Figure 4B As shown, the second substrate 2 is placed on the element layer 11. In the top view Z direction, the first portion 21A of the second bonding pad 21 substantially overlaps with the third portion 12A of the first bonding pad 12, and the second portion 21B of the second bonding pad 21 substantially overlaps with the fourth portion 12B of the first bonding pad 12. In one embodiment of the present invention, the order of placing the second substrate 2 on the element layer 11 and applying the bonding material 3 on two adjacent first bonding pads 12 is not particularly limited and can be adjusted as needed, which will not be elaborated here.

[0107] In one embodiment of the present invention, such as Figure 4B As shown, the bonding material 3 can directly contact the fourth portion 12B of the first bonding pad 12, but the present invention is not limited thereto. In other embodiments, the bonding material 3 can directly contact the fourth portion 12B of the first bonding pad 12 and the element layer 11.

[0108] Afterwards, you can refer to Figure 3CAs shown, the method of manufacturing the electronic device further includes: heating the bonding material 3 to melt and diffuse it between the first portion 21A of the second bonding pad 21 and the third portion 12A of the first bonding pad 12, and melting and diffusing it between the second portion 21B of the second bonding pad 21 and the fourth portion 12B of the first bonding pad 12. More specifically, since the first bonding pad 12 and / or the second bonding pad 21 have an affinity with the bonding material 3, by heating the bonding material 3, the bonding material 3 is melted into a liquid or semi-liquid state and flows between the fourth portion 12B of the first bonding pad 12 and the second portion 21B of the second bonding pad 21. Then, the bonding material 3 can pass through the second connecting portion 21C of the second bonding pad 21 (e.g., Figure 4A As shown, the material flows into the space between the third portion 12A of the first bonding pad 12 and the first portion 21A of the second bonding pad 21, thereby bonding the first bonding pad 12 and the second bonding pad 21 through the bonding material 3, achieving the purpose of assembling the substrates. Therefore, a sealed space SP (such as...) can be formed between the mother substrate S1 and the second substrate 2. Figure 3C As shown), and because the third portion 12A and the fourth portion 12B of the first bonding pad 12 and the first portion 21A and the second portion 21B of the second bonding pad 21 are closed annular structures, the sealing space SP can be increased after the substrates are assembled (as shown). Figure 3C The vacuum effect within (as shown) improves the reliability of electronic devices.

[0109] In one embodiment of the invention, although not shown in the figures, the bonding material 3 may be disposed between the third portion 12A of the first bonding pad 12 and the first portion 21A of the second bonding pad 21, and between the fourth portion 12B of the first bonding pad 12 and the second portion 21B of the second bonding pad 21. Furthermore, see, for example, reference... Figure 3C As shown, the bonding material 3 can also be disposed in the second connecting portion 21C of the second bonding pad 21 (e.g., Figure 4A (as shown) and between the mother substrate S1.

[0110] Next, you can refer to Figure 1D and Figure 1E As shown, the steps of cutting the mother substrate S1 and the component layer 11 are performed to form multiple electronic devices. For details, please refer to the foregoing description, which will not be repeated here.

[0111] In this invention, the materials and other features of the mother substrate S1, the element layer 11, the first bonding pad 12, the second substrate 2, the second bonding pad 21, and the bonding material 3 are as described above and will not be repeated here. Furthermore, the methods for forming the first bonding pad 12 and the second bonding pad 21, heating the bonding material 3, and cutting the mother substrate S1 and the element layer 11 can be referred to the foregoing description and will not be repeated here.

[0112] Figures 5A to 5DA schematic diagram illustrating a method for manufacturing an electronic device according to an embodiment of the present invention is shown. Wherein, Figure 5A The upper half is a top view of the mother substrate, and the lower half is a top view of the second substrate. Furthermore, Figures 5A to 5D The manufacturing method shown is the same as Figures 1A to 1E Similar, except for the following differences.

[0113] In one embodiment of the present invention, such as Figure 5A As shown, a method for manufacturing an electronic device may include: providing a mother substrate S1; forming a component layer 11 on the mother substrate S1; forming a plurality of first bonding pads 12 on a peripheral region B of the component layer 11; providing a plurality of second substrates 2; and forming a plurality of second bonding pads 21 on the second substrates 2. Each first bonding pad 12 includes a third portion 12A, a fourth portion 12B, a first connecting portion 12C, and a carrier portion 12D. The fourth portion 12B surrounds the third portion 12A, the carrier portion 12D is disposed on one side of the fourth portion 12B, and the first connecting portion 12C connects the third portion 12A, the fourth portion 12B, and the carrier portion 12D. Each second bonding pad 21 includes a first portion 21A and a second portion 21B, with the second portion 21B surrounding the first portion 21A.

[0114] More in detail, such as Figure 5AAs shown, in the top view Z, the third portion 12A and the fourth portion 12B of the first bonding pad 12 respectively form closed annular structures. The support portion 12D of the first bonding pad 12 is disposed on one side of the fourth portion 12B, and the support portion 12D is connected to the two annular structures respectively through the first connecting portion 12C. For example, the support portion 12D is connected to both the third portion 12A and the fourth portion 12B through the first connecting portion 12C, but the present invention is not limited thereto. The third portion 12A of the first bonding pad 12 includes an opening H1, and the fourth portion 12B of the first bonding pad 12 includes an opening H4. The opening H1 exposes the active region AA of the element layer 11. In the top view Z, the projected area of ​​the opening H1 on the mother substrate S1 is approximately equal to the projected area of ​​the active region AA on the mother substrate S1. Furthermore, in this embodiment, the supporting portion 12D of the first bonding pad 12 can be connected to the fourth portion 12B, for example, through a plurality of first connecting portions 12C, and the fourth portion 12B can be connected to the third portion 12A, for example, through a plurality of first connecting portions 12C. However, the present invention is not limited thereto, and in other embodiments, the number of first connecting portions 12C can be adjusted as needed. In this embodiment, the first connecting portions 12C can connect the supporting portion 12D to the fourth portion 12B and connect the third portion 12A to the fourth portion 12B respectively. More specifically, the first connecting portions 12C can be disposed between the supporting portion 12D and the fourth portion 12B, and the supporting portion 12D and the fourth portion 12B are connected through the first connecting portions 12C. The first connecting portions 12C can also be disposed between the third portion 12A and the fourth portion 12B, and the third portion 12A and the fourth portion 12B are connected through the first connecting portions 12C. In one embodiment of the present invention, a portion of the fourth portion 12B can be disposed between a plurality of first connecting portions 12C. In one embodiment of the present invention, the first connecting portion 12C may extend along one direction (e.g., the X direction), while the fourth portion 12B connected to the first connecting portion 12C may extend along another direction (e.g., the Y direction), wherein the direction (e.g., the X direction) is different from the other direction (e.g., the Y direction).

[0115] In one embodiment of the present invention, such as Figure 5A As shown, the opening H1 of the third portion 12A of the first bonding pad 12 is approximately equal to the opening H2 of the first portion 21A of the second bonding pad 21, and the opening H4 of the fourth portion 12B of the first bonding pad 12 is approximately equal to the opening H3 of the second portion 21B of the second bonding pad 21. Therefore, during subsequent assembly steps, in the top view Z direction, the third portion 12A of the first bonding pad 12 can approximately overlap with the first portion 21A of the second bonding pad 21, and the fourth portion 12B of the first bonding pad 12 can approximately overlap with the second portion 21B of the second bonding pad 21.

[0116] Next, as Figure 5BAs shown, a second substrate 2 is placed on the element layer 11, such that the second bonding pad 21 overlaps with the first bonding pad 12, and a bonding material 3 is applied to the carrier portion 12D of the first bonding pad 12. More specifically, as... Figure 5A and Figure 5B As shown, the second substrate 2 is placed on the element layer 11. In the top view Z, the first portion 21A of the second bonding pad 21 substantially overlaps with the third portion 12A of the first bonding pad 12, and the second portion 21B of the second bonding pad 21 substantially overlaps with the fourth portion 12B of the first bonding pad 12. In one embodiment of the present invention, the order of placing the second substrate 2 on the element layer 11 and applying the bonding material 3 on the support portion 12D of the first bonding pad 12 is not particularly limited and can be adjusted as needed, and will not be described in detail here.

[0117] Then, as Figure 5A and Figure 5C As shown, the bonding material 3 is heated, causing it to melt and diffuse between the first portion 21A of the second bonding pad 21 and the third portion 12A of the first bonding pad 12, and also to melt and diffuse between the second portion 21B of the second bonding pad 21 and the fourth portion 12B of the first bonding pad 12. More specifically, as... Figure 5A and Figure 5C As shown, since the first bonding pad 12 and / or the second bonding pad 21 have an affinity with the bonding material 3, the bonding material 3 is heated to melt it into a liquid or semi-liquid state. The bonding material 3 can flow from the supporting portion 12D of the first bonding pad 12 to the first connecting portion 12C, and then flow through a portion of the first connecting portion 12C into the space between the fourth portion 12B of the first bonding pad 12 and the second portion 21B of the second bonding pad 21. Then, the bonding material 3 flows through a portion of the first connecting portion 12C into the space between the third portion 12A of the first bonding pad 12 and the first portion 21A of the second bonding pad 21, thereby bonding the first bonding pad 12 and the second bonding pad 21 through the bonding material 3, achieving the purpose of assembling the mother substrate S1 and the second substrate 2.

[0118] Next, as Figure 5C and Figure 5D As shown, the mother substrate S1 and the component layer 11 are cut to form multiple electronic devices. More specifically, this can be achieved, for example, along... Figure 5C The dashed lines in the diagram represent cuts made from the bonding material 3, the first bonding pad 12, the component layer 11, and the mother substrate S1, thereby forming multiple electronic devices of appropriate sizes, such as... Figure 5D As shown, the mother substrate S1 is cut to form the first substrate 1. In this embodiment, Figure 5C The dashed lines in the diagram roughly represent cuts along the edge of a portion of element layer 11 and the dimensions of the second substrate 2. Therefore, as shown... Figure 5DAs shown, the projected area of ​​the cut component layer 11 in the electronic device can be approximately equal to the projected area of ​​the first substrate 1. However, in other embodiments of the present invention, the projected area of ​​the first substrate 1 in the electronic device can be greater than the projected area of ​​the cut component layer 11.

[0119] In this invention, the materials and other features of the mother substrate S1, the element layer 11, the first bonding pad 12, the second substrate 2, the second bonding pad 21, and the bonding material 3 are as described above and will not be repeated here. Furthermore, the methods for forming the first bonding pad 12 and the second bonding pad 21, heating the bonding material 3, and cutting the mother substrate S1 and the element layer 11 can be referred to the foregoing description and will not be repeated here.

[0120] Figures 6A to 6C A schematic diagram illustrating a method for manufacturing an electronic device according to an embodiment of the present invention is shown. Wherein, Figure 6A The upper half is a top view of the mother substrate, and the lower half is a top view of the second substrate. Figure 6B and Figure 6C The upper half is a top view, and the lower half is a cross-sectional view. Furthermore, Figures 6A to 6C The manufacturing method shown is the same as Figures 1A to 1E Similar, except for the following differences.

[0121] In one embodiment of the present invention, such as Figure 6A As shown, a method for manufacturing an electronic device may include: providing a mother substrate S1; forming a component layer 11 on the mother substrate S1; forming a plurality of first bonding pads 12 on a peripheral region B of the component layer 11; providing a plurality of second substrates 2; and forming a plurality of second bonding pads 21 on the second substrates 2. Each first bonding pad 12 includes a third portion 12A and a fourth portion 12B, with the fourth portion 12B surrounding the third portion 12A. Each second bonding pad 21 includes a first portion 21A and a second portion 21B, with the second portion 21B surrounding the first portion 21A.

[0122] More in detail, such as Figure 6AAs shown, in the top view Z, the third portion 12A and the fourth portion 12B of the first bonding pad 12 each form a closed annular structure. The third portion 12A of the first bonding pad 12 includes an opening H1, and the fourth portion 12B of the first bonding pad 12 includes an opening H4. Opening H1 exposes the active region AA of the element layer 11. In the top view Z, the projected area of ​​opening H1 on the mother substrate S1 is approximately equal to the projected area of ​​the active region AA on the mother substrate S1. The first portion 21A and the second portion 21B of the second bonding pad 21 each form a closed annular structure. The first portion 21A of the second bonding pad 21 includes an opening H2, and the second portion 21B of the second bonding pad 21 includes an opening H3. In the top view Z, the projected area of ​​opening H2 on the second substrate 2 is approximately equal to the projected area of ​​the active region AA on the mother substrate S1.

[0123] Next, as Figure 6B As shown, the second substrate 2 is placed on the element layer 11, such that the second bonding pad 21 overlaps with the first bonding pad 12. More specifically, in the top view Z, the first portion 21A of the second bonding pad 21 substantially overlaps with the third portion 12A of the first bonding pad 12, and the second portion 21B of the second bonding pad 21 substantially overlaps with the fourth portion 12B of the first bonding pad 12. At this time, in the top view Z, the opening H1 of the third portion 21A of the first bonding pad 12 can substantially overlap with the opening H2 of the first portion 21A of the second bonding pad 21.

[0124] Then, as Figure 6B and Figure 6C As shown, the mother substrate S1 and the second substrate 2 are paired to bond the mother substrate S1 and the second substrate 2; and the mother substrate S1 and the component layer 11 are cut to form multiple electronic devices, such as... Figure 6C As shown, the mother substrate S1 is cut to form the first substrate 1. A bonding process is performed on the first bonding pad 12 and the second bonding pad 21 to form a bonding member 5 between them, thereby bonding the mother substrate S1 and the second substrate 2 to form a sealed space SP. More specifically, the third portion 12A of the first bonding pad 12 and the first portion 21A of the second bonding pad 21 form the first portion 5A of the bonding member 5, and the fourth portion 12B of the first bonding pad 12 and the second portion 21B of the second bonding pad 21 form the second portion 5B of the bonding member 5, thereby bonding the third portion 12A of the first bonding pad 12 to the first portion 21A of the second bonding pad 21, and bonding the fourth portion 12B of the first bonding pad 12 to the second portion 21B of the second bonding pad 21.

[0125] In this invention, the materials and other features of the mother substrate S1, element layer 11, first bonding pad 12, second substrate 2, and second bonding pad 21 are as described above and will not be repeated here. Furthermore, the methods for forming the first bonding pad 12 and second bonding pad 21 and cutting the mother substrate S1 and element layer 11 can be referred to the foregoing description and will not be repeated here. In this invention, the bonding element 5 may be a compound produced by a chemical reaction between a portion of the first bonding pad 12 and a portion of the second bonding pad 21. For example, the bonding element 5 may be a eutectic compound of the first bonding pad 12 and the second bonding pad 21. Therefore, the material of the bonding element 5 may be different from that of the first bonding pad 12 and the second bonding pad 21, but this invention is not limited thereto. In this invention, the assembly includes heating and applying pressure to bring the second substrate 2 and the mother substrate S1 close to each other. In this invention, the bonding process may include thermoforming, eutectic bonding, laser welding, other suitable processes, or combinations thereof. In this invention, the bonding process includes heating the first bonding pad 12 and the second bonding pad 21, applying pressure, or a combination thereof, to achieve the purpose of bonding the mother substrate S1 and the second substrate 2 to form a sealed space SP.

[0126] Figure 7A and Figure 7B A schematic diagram illustrating a method for manufacturing an electronic device according to an embodiment of the present invention is shown. Wherein, Figure 7A and Figure 7B The manufacturing method shown is the same as Figures 6A to 6C Similar, except for the following differences.

[0127] In one embodiment of the present invention, reference is made to... Figure 6A and Figure 7A As shown, a method for manufacturing an electronic device may include: providing a mother substrate S1; forming a component layer 11 on the mother substrate S1; forming a plurality of first bonding pads 12 on a peripheral region B of the component layer 11; providing a second mother substrate S2; and forming a plurality of second bonding pads 21 on the second mother substrate S2. Each first bonding pad 12 includes a third portion 12A and a fourth portion 12B, with the fourth portion 12B surrounding the third portion 12A. Each second bonding pad 21 includes a first portion 21A and a second portion 21B, with the second portion 21B surrounding the first portion 21A.

[0128] Then, as Figure 7A As shown, the second mother substrate S2 is placed on the component layer 11, such that the second bonding pad 21 overlaps with the first bonding pad 12. At this time, in the top view Z, the opening H1 of the third portion 21A of the first bonding pad 12 can approximately overlap with the opening H2 of the first portion 21A of the second bonding pad 21. Then, the mother substrate S1 and the second mother substrate S2 are assembled to bond the mother substrate S1 and the second mother substrate S2; and the mother substrate S1, the second mother substrate S2, and the component layer 11 are cut to form multiple electronic devices, such as... Figure 7BAs shown, the mother substrate S1 is cut to form the first substrate 1, and the second mother substrate S2 is cut to form the second substrate 2. By performing a bonding process on the first bonding pad 12 and the second bonding pad 21, a bonding member 5 is formed between the first bonding pad 12 and the second bonding pad 21, thereby bonding the mother substrate S1 and the second substrate 2 to form a sealed space SP.

[0129] In this invention, the materials and other features of the mother substrate S1, the element layer 11, the first bonding pad 12, the second substrate 2, the second bonding pad 21, and the bonding member 5 are as described above and will not be repeated here. Furthermore, the methods for forming the first bonding pad 12 and the second bonding pad 21, cutting the mother substrate S1, the second mother substrate S2 and the element layer 11, and the bonding process can be referred to the foregoing description and will not be repeated here.

[0130] Figures 8A to 8F A schematic diagram illustrating a method for manufacturing an electronic device according to an embodiment of the present invention is shown. Wherein, Figure 8E for Figure 8D A cross-sectional view of line segment E-E'.

[0131] In one embodiment of the present invention, such as Figures 8A to 8B As shown, the method for manufacturing the electronic device may further include: attaching a peelable adhesive 6 onto a second substrate 2. Wherein, Figure 8A Therefore Figure 1E The electronic device is used as an example, but in other embodiments of the invention, Figure 8A The electronic device can be any of the aforementioned electronic devices. Then, as... Figure 8C As shown, a circuit board 7 is disposed on the first substrate 1. More specifically, the circuit board 7 is disposed in the peripheral region B of the component layer 11 and can be electrically connected to the components in the active region AA of the component layer 11 via a circuit (not shown).

[0132] In this invention, the peelable adhesive 6 may comprise a release layer, UV peelable adhesive, thermosetting peelable adhesive, or a combination thereof, but the invention is not limited thereto. In this invention, the circuit board 7 may comprise a rigid circuit board or a flexible circuit board, such as a printed circuit board (PCB) or a flexible printed circuit (FPC), but the invention is not limited thereto.

[0133] Next, as Figure 8D and Figure 8EAs shown, a protective film 8 is formed on the electronic device and the circuit board 7. More specifically, the protective film 8 can be formed on the component layer 11, the peelable adhesive 6, and the circuit board 7, and can be formed on the sidewalls of the first substrate 1, the component layer 11, the first bonding pad 12, the second substrate 2, the second bonding pad 21, the bonding material 3, the peelable adhesive 6, and the circuit board 7. The protective film 8 can be used to prevent external air or moisture from entering the electronic device through the joints between components, thereby improving the reliability of the electronic device.

[0134] In this invention, the material of the protective film 8 may include glass glue, optical glue, silicone, hot melt adhesive, AB glue, UV-curable adhesive, polymer adhesive, resin, poly-para-xylylene (parylene), or combinations thereof, but the invention is not limited thereto. In this invention, any suitable method may be used to form the protective film 8, such as dip coating, spin coating, roller coating, blade coating, spraying, deposition, or combinations thereof, but the invention is not limited thereto.

[0135] Then, as Figure 8F As shown, remove the peelable adhesive 6 and the protective film 8 on the peelable adhesive 6. More specifically, in the top view Z, the protective film 8 may overlap with the circuit board 7, part of the first substrate 1, and part of the component layer 11, and the protective film 8 does not overlap with the upper surface 2s3 of the second substrate 2 (equivalent to...). Figure 2 The second substrate 2 shown overlaps with the side 2s2 away from the first substrate 1, so that the elements in the active region AA of the element layer 11 are not affected by the protective film 8. For example, the active region AA of the element layer 11 may contain a sensing element (not shown). Since the protective film 8 does not overlap with the active region AA of the element layer 11 in the top view Z, the interference of the sensing signal can be reduced.

[0136] In this invention, the method of removing the peelable adhesive 6 is, for example, by applying an external force to the peelable adhesive 6. The "external force" may include physical, chemical, or optical external forces such as heating, laser, ultraviolet light, mechanical force, stress, or a combination thereof, but the invention is not limited thereto.

[0137] After the above Figures 8A to 8F After the steps, the electronic device may further include: a circuit board 7 disposed on the first substrate 1, wherein the circuit board 7 is electrically connected to the component layer 11; and a protective film 8 disposed on the circuit board 7 and a portion of the first substrate 1, wherein the protective film 8 does not overlap with the second substrate 2 in the top view Z direction.

[0138] The present invention improves the vacuum effect of the sealing space SP of the electronic device by setting the first bonding pad 12 and the second bonding pad 21 for substrate pairing, thereby improving the reliability and / or packaging fault tolerance of the electronic device.

[0139] The specific embodiments described above should be interpreted as merely illustrative and not as limiting the remainder of the invention in any way.

Claims

1. An electronic device, characterized by comprising: The first bonding pad comprises a third portion and a fourth portion, the fourth portion surrounds the third portion, wherein the bonding material is disposed between the third portion of the first bonding pad and the first portion of the second bonding pad, and is disposed between the fourth portion of the first bonding pad and the second portion of the second bonding pad. The first bonding pad comprises a first connecting portion, the first connecting portion connects the third portion and the fourth portion, respectively. The second bonding pad comprises a second connecting portion, the second connecting portion connects the first portion and the second portion, respectively. The second substrate comprises a first region and a second region, the second region surrounds the first region, in the top-down direction of the first substrate, the first region overlaps the active region, and the thickness of at least part of the first region of the second substrate is less than the thickness of the second region of the second substrate. The active region comprises a plurality of sensing elements. The first bonding pad comprises a gold layer, the thickness of the gold layer is between 0.4 μm and 10 μm. The first bonding pad comprises a palladium layer, the thickness of the palladium layer is between 0.1 μm and 5 μm. The method comprises the following steps: 2.The electronic device of claim 1, wherein, providing a mother substrate; 3.The electronic device of claim 1, wherein, forming an element layer on the mother substrate, wherein the element layer comprises a plurality of active regions and a peripheral region, the peripheral region surrounds the active regions; 4.The electronic device of claim 3, wherein, forming a plurality of first bonding pads on the peripheral region of the element layer; 5.The electronic device of claim 1, wherein, providing a plurality of second substrates; 6.The electronic device of claim 1, wherein, forming a plurality of second bonding pads on the second substrates, wherein each of the second bonding pads comprises a first portion and a second portion, and the second portion surrounds the first portion; 7.The electronic device of claim 1, wherein, placing the second substrates on the element layer, so that the second bonding pads overlap the first bonding pads, and applying a bonding material on two adjacent first bonding pads; and 8.The electronic device of claim 1, wherein, heating the bonding material, so that the bonding material melts and diffuses between the first portion of the second bonding pads and the first bonding pads, and melts and diffuses between the second portion of the second bonding pads and the first bonding pads. 9.The electronic device of claim 1, wherein, Further comprising: 10.A method for manufacturing an electronic device, comprising: cutting the mother substrate and the element layer to form a plurality of electronic devices, wherein one of the electronic devices comprises: a first substrate formed after cutting the mother substrate; the element layer disposed on the first substrate; the first bonding pad disposed on the peripheral region of the element layer; ​ ​ ​ ​ 11. The production method according to claim 10, characterized by, ​ ​ ​ ​ ​ The second substrate is disposed opposite the first substrate; The second bonding pad is disposed on the second substrate, the second bonding pad includes the first portion and the second portion, and the second portion surrounds the first portion; and The bonding material is disposed between the first portion of the second bonding pad and the first bonding pad, and is disposed between the second portion of the second bonding pad and the first bonding pad. 12.The electronic device of claim 11, wherein, Also included are: attaching a peelable adhesive on the second substrate; disposing a circuit board on the first substrate; forming a protective film on the electronic device and the circuit board; and removing the peelable adhesive and the protective film on the peelable adhesive.

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