Serial port communication method and device suitable for multi-protocol conversion

Abstract

The invention belongs to the technical field of industrial communication, and particularly relates to a serial port communication method and device suitable for multi-protocol conversion. The method comprises the following steps: when a core controller synchronously monitors various protocol interfaces to judge that communication data is input into any protocol interface, acquiring the communication data and calling a corresponding protocol engine to analyze the communication data so as to acquire analyzed data; sending the analysis data to an FIFO buffer area corresponding to a target serial port interface, performing digit configuration on the analysis data based on a set digit of the target serial port interface to obtain target data, and performing configuration updating on a baud rate of the target serial port interface based on a preset data transmission index; and sending the target data to the target serial port interface through the FIFO buffer area according to the updated baud rate. According to the invention, communication requirements in complex scenes can be met.

Description

Technical Field

[0001] This invention relates to the field of industrial communication technology, and specifically to a serial communication method and apparatus suitable for multi-protocol conversion. Background Technology

[0002] In various industrial application scenarios, communication between related devices is the foundation for performing operations such as data transmission, instruction issuance, and execution feedback, thereby realizing the automation and intelligent development of industrial production.

[0003] In complex applications such as industrial control, automotive electronics, and IoT gateways, there is often a need for devices with different communication protocols to interact with the same main control system (often a microcontroller). However, existing microcontrollers typically only have serial interfaces, leading to communication barriers between devices and the main control system due to differing communication protocols. While various protocol conversion chips exist to break down communication barriers between devices with different protocols, each chip can only convert one protocol to a serial protocol, thus increasing the complexity of hardware deployment.

[0004] Meanwhile, existing microcontroller serial interfaces and protocol conversion chips mostly use fixed-bit data frames (e.g., mostly 8-bit data frames), while some important industrial bus protocols rely on data frames of other specific bit lengths for communication (e.g., the Modbus protocol relies on 9-bit data frames, where the 9th bit is the address identifier). In such cases, even using the appropriate type of protocol conversion chip is difficult to meet communication requirements. Summary of the Invention

[0005] The purpose of this invention is to provide a serial communication method and apparatus suitable for multi-protocol conversion, so as to solve the technical problem of communication obstacles caused by protocol type and data frame bit length in the prior art.

[0006] To achieve the above objectives, the present invention proposes the following technical solution: Firstly, this technical solution provides a serial communication method suitable for multi-protocol conversion, characterized by including a core controller, various protocol interfaces physically connected to one side of the core controller, and serial port interfaces physically connected to the other side of the core controller; including: The core controller synchronously monitors various protocol interfaces to determine when communication data is input at any protocol interface. It then acquires the communication data and calls the corresponding protocol engine to parse it, thereby obtaining the parsed data. The parsed data is sent to the FIFO buffer corresponding to the target serial port interface, and the number of bits of the parsed data is configured based on the set number of bits of the target serial port interface to obtain the target data. The baud rate of the target serial port interface is configured and updated based on the preset data transmission index. Specifically, when the number of bits in the parsed data is greater than the set number of bits of the target serial port interface, each data frame in the parsed data is sequentially split into several sub-data frames according to the set number of bits; if the number of bits in any sub-data frame is less than the set number of bits, invalid numbers are used to fill the empty bits; when the number of bits in the parsed data is less than the set number of bits of the target serial port interface, invalid numbers are used to fill the empty bits of each data frame. The target data is sent to the target serial port interface via a FIFO buffer at the updated baud rate.

[0007] Furthermore, including: The core controller acquires serial port data from any serial port interface and stores it in a FIFO buffer corresponding to the target protocol interface. After configuring the serial port data bit depth based on the target protocol interface's set bit depth, the data is packaged according to the target protocol format to obtain the target output data packet. The target data packet is sent via the target protocol interface.

[0008] Furthermore, before sending the parsed data to the FIFO buffer corresponding to the target serial port interface, the process includes: Obtain the data processing rate of the internal device physically connected to the target serial port interface; The depth of the corresponding FIFO buffer is dynamically set based on the data processing rate and the amount of data parsed.

[0009] Furthermore, including: When the core controller determines that a new protocol interface is connected or an old protocol interface is removed, it configures the parameters of the new protocol interface or deletes the configuration parameters corresponding to the old protocol interface based on the configuration port. If the new protocol interface is a new type of protocol interface, the engine database is called to burn the corresponding type of protocol engine; if there is no valid protocol interface that is the same as the old protocol interface, the protocol engine corresponding to the old protocol interface is deleted.

[0010] Furthermore, the step of acquiring the communication data and calling the corresponding protocol engine to parse it, thereby obtaining parsed data, includes: When the communication data is quickly verified to determine that there is missing data, a first retransmission instruction is sent through any of the protocol interfaces; wherein, the first retransmission instruction is used to reacquire the field corresponding to the missing part; After determining that the communication data is complete, the corresponding protocol engine is invoked to parse it to obtain intermediate data; if a CRC check is performed on the intermediate data to determine that there is a data error, the protocol engine is re-programmed and re-parsed, or a second retransmission instruction is sent through any of the protocol interfaces; wherein, the second retransmission instruction is used to re-acquire the communication data; If the intermediate data is determined to be accurate, it shall be used as the parsed data.

[0011] Secondly, a serial communication device suitable for multi-protocol conversion is provided, including: a multi-protocol interface module, a serial interface module, and a core controller; The multi-protocol interface module includes various protocol interfaces connected to the core controller to realize physical connection to external devices and acquisition of communication data; The serial port interface module includes several serial port interfaces connected to the core controller to realize physical connection to internal devices and forward parsed data; The core controller includes a protocol parsing unit, a switching and routing unit, a FIFO buffer, and a serial port configuration unit. The protocol parsing unit parses communication data received from the corresponding protocol interface to obtain parsed data, packages the parsed data according to a preset data format, and writes it to the switching and routing unit. The switching and routing unit routes the packaged parsed data to the corresponding FIFO buffer according to preset rules. The serial port configuration unit configures the data bit width and communication rate of the parsed data in the FIFO buffer according to the type of serial port interface.

[0012] Furthermore, this includes: configuring the interface module. The configuration interface module is communicatively connected to the core controller to enable dynamic parameter configuration of the core controller.

[0013] Furthermore, the serial port configuration unit integrates a bidirectional FIFO subunit; The depth of the transmit FIFO and receive FIFO in the bidirectional FIFO subunit can be set based on software registers.

[0014] Furthermore, the multi-protocol interface module includes: an Ethernet PHY interface, a CAN interface, a USB PHY interface, an SPI interface, and an IIC interface.

[0015] Thirdly, a computer-readable storage medium is provided, characterized in that a computer program is stored thereon, the computer program being executed by a processor to implement the method.

[0016] Beneficial effects: As can be seen from the above technical solutions, the present invention provides a serial communication method suitable for multi-protocol conversion to solve the technical problem of communication obstacles caused by protocol type and data frame bit length.

[0017] The hardware deployment corresponding to this technical solution includes: a core controller, various protocol interfaces physically connected to one side of the core controller, and various serial port interfaces physically connected to the other side of the core controller. Based on this, the method includes: First, based on the core controller synchronously monitoring various protocol interfaces to determine if any protocol interface has communication data input, acquiring the communication data and calling the corresponding protocol engine to parse it, thereby obtaining parsed data. Second, sending the parsed data to the FIFO buffer corresponding to the target serial port interface, configuring the bit width of the parsed data based on the set bit width of the target serial port interface to obtain target data, and updating the baud rate of the target serial port interface based on a preset data transmission index. Specifically, in one case, when the bit width of the parsed data is greater than the set bit width of the target serial port interface, each data frame in the parsed data is sequentially split into several sub-data frames according to the set bit width unit; wherein, if the bit width of any sub-data frame is less than the set bit width, invalid numbers are used to fill the empty bits. In another case, when the bit width of the parsed data is less than the set bit width of the target serial port interface, invalid numbers are used to fill the empty bits of each data frame. Finally, the target data is sent to the target serial port interface via a FIFO buffer at the updated baud rate.

[0018] Therefore, this technical solution integrates various protocol interfaces, dynamically monitors the status of each interface based on a listening mechanism, and can call the corresponding protocol engine according to the interface, thus realizing the parsing and processing of communication data from various protocol interfaces. Furthermore, it configures the data bit width and transmission rate of the parsed data according to the target serial port interface based on software configuration to meet transmission requirements and ultimately achieve effective transmission of communication data. From a hardware perspective, it eliminates the need for dedicated multi-protocol conversion chips, reducing the difficulty of hardware deployment. Simultaneously, it can convert the data bit width, thus meeting the transmission requirements of various communication data with different bit widths. Moreover, it allows for dynamic configuration of the transmission rate, thereby avoiding communication delays that may be introduced after bit width processing.

[0019] It should be understood that all combinations of the foregoing concepts and the additional concepts described in more detail below can be considered part of the inventive subject matter of this disclosure, provided that such concepts do not contradict each other.

[0020] The foregoing and other aspects, embodiments, and features of the teachings of the present invention will be more fully understood from the following description in conjunction with the accompanying drawings. Other additional aspects of the invention, such as features and / or beneficial effects of exemplary embodiments, will become apparent from the following description or may be learned through practice of specific embodiments according to the teachings of the present invention. Attached Figure Description

[0021] The accompanying drawings are not intended to be drawn to scale. In the drawings, each identical or nearly identical component shown in the various figures may be denoted by the same reference numeral. For clarity, not every component is labeled in each figure. Embodiments of various aspects of the invention will now be described by way of example and with reference to the accompanying drawings, wherein: Figure 1 This is a flowchart of the serial communication method applicable to multi-protocol conversion described in this embodiment; Figure 2 This is a flowchart illustrating the process of adding a new protocol interface or removing an old protocol interface in this embodiment. Figure 3 A flowchart for dynamically setting the depth of the FIFO buffer; Figure 4 A flowchart for data reliability verification. Figure 5 To and Figure 1 The corresponding flowchart for reverse data transmission; Figure 6 This is a structural block diagram of the serial communication device suitable for multi-protocol conversion described in this embodiment. Detailed Implementation

[0022] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the described embodiments of the present invention without creative effort are within the scope of protection of the present invention. Unless otherwise defined, the technical or scientific terms used herein should have the ordinary meaning understood by those skilled in the art to which this invention pertains.

[0023] The terms "first," "second," and similar words used in this application specification and claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, unless the context clearly indicates otherwise, the singular forms of "an," "a," or "the," etc., do not indicate a quantity limitation, but rather indicate the presence of at least one. Terms such as "comprising" or "including" mean that the element or object preceding "comprising" encompasses the features, integrals, steps, operations, elements, and / or components listed following "comprising" or "including," and do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or sets thereof. Terms such as "upper," "lower," "left," and "right" are used only to indicate relative positional relationships; when the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0024] In complex application scenarios such as industrial control, automotive electronics, and IoT gateways, devices with multiple different communication protocols often need to interact with a main control system. Traditional microcontrollers typically have limited serial port resources, and standard serial ports are mostly fixed 8-bit data frames, while some important industrial bus protocols (such as Modbus) rely on 9-bit data frames. In the existing technology, although there are single USB to serial port, SPI to serial port, and other protocol conversion chips or modules, they have the following limitations: (1) Single function: They can usually only realize the conversion of one protocol to the serial port, and cannot adapt to application scenarios with multiple protocols. (2) Poor flexibility: The communication parameters (such as baud rate) and FIFO depth of the serial port are usually fixed, or can only be determined during hardware design, and cannot meet the dynamic and ever-changing application requirements. (3) No support for 9-bit serial ports: Most common commercial conversion chips only support a maximum of 8 data bits, and cannot natively support industrial protocols that require 9-bit data. Software simulation is often required, which increases the burden on the main control CPU and reduces reliability. Based on this, this embodiment aims to provide a serial communication method and device suitable for multi-protocol conversion to improve the above-mentioned defects.

[0025] Example 1 The serial communication method applicable to multi-protocol conversion described in this embodiment will be specifically introduced below with reference to the accompanying drawings.

[0026] To implement the method, this embodiment employs the following basic hardware deployment: a core controller, various protocol interfaces, and serial port interfaces. The various protocol interfaces are physically connected to one side of the core controller, and the serial port interfaces are physically connected to the other side of the core controller. In specific implementation, the various protocol interfaces include an EthernetPHY interface, a CAN interface, a USB PHY interface, an SPI interface, and an IIC interface.

[0027] Based on this, combined Figure 1 As shown, the method includes: Step S202: The core controller synchronously listens to various protocol interfaces to determine if there is communication data input at any protocol interface, obtains the communication data, calls the corresponding protocol engine to parse it, and then obtains the parsed data.

[0028] In practical implementation, considering the access of new protocol interfaces and the decommissioning of old protocol interfaces, resource reorganization is taken into account to improve interface utilization, combined with... Figure 2 As shown, the procedure before step S202 also includes: Step S2002: When the core controller determines that a new protocol interface is connected or an old protocol interface is removed, it configures the parameters of the new protocol interface or deletes the configuration parameters corresponding to the old protocol interface based on the configuration port.

[0029] Specifically, the configuration port is a unified configuration interface that allows the microcontroller of the main control system to dynamically configure the various hardware components deployed above, including: selecting the working mode, setting the baud rate, data bits, stop bits, and parity bits of each UART channel, setting the FIFO depth of each channel, and setting network parameters (IP address, port number), etc.

[0030] In practice, if the new protocol interface is a new type of protocol interface, the engine database is invoked to flash the corresponding type of protocol engine. If no valid protocol interface identical to the old protocol interface exists, the protocol engine corresponding to the old protocol interface is deleted.

[0031] Step S204: Send the parsed data to the FIFO buffer corresponding to the target serial port interface, configure the bit width of the parsed data based on the set bit width of the target serial port interface to obtain the target data, and update the baud rate of the target serial port interface based on the preset data transmission index.

[0032] In specific implementation, the bit depth configuration of the parsed data is as follows: When the bit depth of the parsed data is greater than the set bit depth of the target serial port interface, each data frame in the parsed data is sequentially split into several sub-data frames according to the set bit depth. If the bit depth of any sub-data frame is less than the set bit depth, invalid numbers are used to fill the empty bits. For example, if the parsed data is 12 bits and the serial port interface is 9 bits, then the first 9 bits of each parsed data frame are taken as one sub-data frame, and the last 3 bits are incremented by 6 (an invalid number) to form another sub-data frame. In this embodiment, 0 is specifically used as the invalid number, and it is added to the high-order bits. When the bit depth of the parsed data is less than the set bit depth of the target serial port interface, invalid numbers are used to fill the empty bits of each data frame. For example, if the parsed data is 8 bits and the serial port interface is 9 bits, 0 is added to the highest bit of each parsed data frame.

[0033] As a preferred implementation method, considering the improvement of system performance, combined with Figure 3 As shown, the FIFO depth is set in the following way: Step S20302: Obtain the data processing rate of the internal device physically connected to the target serial port interface.

[0034] Step S20304: Dynamically set the depth of the corresponding FIFO buffer based on the data processing rate and the amount of parsed data.

[0035] At this point, based on steps S20302 to S20304, the depth of the FIFO buffer can be adjusted according to the actual situation. A fixed-depth FIFO buffer will not cause data overflow or memory waste, thus reducing the burden on the main control CPU and improving data throughput and the real-time response capability of the system.

[0036] As another preferred implementation, considering the need to improve the reliability of data transmission, combined with Figure 4 As shown, it includes the following steps: Step S20402: When the communication data is quickly verified to determine if there is missing data, a first retransmission command is sent through any of the protocol interfaces.

[0037] In practice, the first retransmission instruction is used to reacquire the fields corresponding to the missing parts. This avoids the reduced response rate and wasted resources that would result from reacquiring the entire communication data.

[0038] Step S20404: After determining that the communication data is complete, call the corresponding protocol engine to parse it to obtain intermediate data; perform CRC check on the intermediate data to determine that there is a data error, re-burn the protocol engine and re-parse it, or send a second retransmission command through any of the protocol interfaces.

[0039] In this embodiment, the second retransmission instruction is used to reacquire the communication data. At this time, the source of intermediate data anomalies can be identified and targeted anomaly resolution can be performed.

[0040] Step S20406: If the intermediate data is accurate, use it as the parsed data.

[0041] At this point, based on steps S20402 to S20406, the data before and after parsing can be checked simultaneously, thereby ensuring the accuracy of data transmission and data parsing; and thus ensuring the reliability of subsequent data interaction and communication.

[0042] Step S206: Send the target data to the target serial port interface via a FIFO buffer at the updated baud rate.

[0043] Furthermore, this embodiment also supports reverse transmission from the serial port interface to the protocol interface, correspondingly, in conjunction with Figure 5 As shown, it includes: Step S402: The core controller acquires serial port data from any serial port interface and stores it in a FIFO buffer corresponding to the target protocol interface.

[0044] Step S404: After configuring the number of bits of the serial port data based on the set number of bits of the target protocol interface, package it according to the target protocol format to obtain the target output data packet.

[0045] When configuring the bit depth, the corresponding operation is consistent with step S204.

[0046] Step S406: Send the target data packet via the target protocol interface.

[0047] Since steps S402 to S406 are the reverse operations of steps S202 to S206, the above specific embodiments or preferred embodiments are also applicable to the communication process of steps S402 to S406.

[0048] In summary, this embodiment provides a serial communication method that achieves multi-protocol compatibility parsing and dynamic configuration of data bit depth, and has the following technical advantages: (1) High integration: It integrates a variety of commonly used industrial interfaces, reducing the complexity of system design and PCB area. (2) Strong flexibility: The serial port bit depth mode, communication rate, and FIFO depth can all be dynamically configured by software, adapting to various application scenarios and slave devices without changing the hardware. (3) High efficiency and reliability: Hardware-level protocol conversion and configurable deep FIFO reduce the burden on the main control CPU, improve data throughput and real-time response capability of the system, and avoid data loss. (4) Wide applicability: It is very suitable as a central communication hub for industrial control motherboards, IoT gateways, and smart devices, connecting with various UART-supporting sensors, actuators, display modules, and other dedicated chips.

[0049] Example 2 Combination Figure 6 As shown, the serial communication device suitable for multi-protocol conversion described in this embodiment will be specifically introduced.

[0050] The device includes a multi-protocol interface module, a serial port interface module, and a core controller. It supports bidirectional communication centered on the core controller.

[0051] The multi-protocol interface module includes various protocol interfaces connected to the core controller to enable physical connections to external devices and the acquisition of communication data. In this embodiment, the multi-protocol interface module includes: an Ethernet PHY interface, a CAN interface, a USB PHY interface, an SPI interface, and an IIC interface.

[0052] The serial port interface module includes several serial port interfaces connected to the core controller to realize physical connection to internal devices and forward parsed data.

[0053] The core controller is an FPGA or high-performance ASIC chip used to implement all logic functions. It includes the following functional units: a protocol parsing unit, a switching and routing unit, a FIFO buffer, and a serial port configuration unit.

[0054] Specifically, the protocol parsing unit is used to parse the communication data received from the corresponding protocol interface to obtain parsed data, and after packaging the parsed data according to a preset data format, write it into the switching and routing unit.

[0055] The switching and routing unit is used to route the packaged parsed data to the corresponding FIFO buffer according to preset rules (such as preset target address, port number, etc.).

[0056] The serial port configuration unit is used to configure the number of data bits and communication rate of the parsed data according to the type of serial port interface. Specifically, the serial port configuration unit in this embodiment supports a configurable data bit length of 5-9 bits. Considering the special requirements of industrial protocols, it is specially optimized to process 9-bit data. The communication rate (i.e., baud rate) can be dynamically configured by software in the range of 1200bps to 6Mbps and above.

[0057] Meanwhile, the serial port configuration unit integrates a bidirectional FIFO subunit; the depth of the transmit FIFO and receive FIFO in the bidirectional FIFO subunit can be set based on software registers.

[0058] Preferably, the device also includes a configuration interface module, which is communicatively connected to the core controller to enable dynamic parameter configuration of the core controller. Specifically, it allows the main control microcontroller to dynamically configure various parameters of the device, including: selecting the operating mode, setting the baud rate, data bits, stop bits, and parity bits of each UART channel, setting the FIFO depth of each channel, and setting network parameters (IP address, port number).

[0059] Since the device is used to implement the above method, it also features multi-protocol interface conversion, configurable serial port bit width, and configurable FIFO depth, thus possessing advantages such as high hardware integration, strong flexibility, high reliability, and wide applicability.

[0060] Example 3 This embodiment provides a computer-readable storage medium storing a computer program thereon, the computer program being executed by a processor to implement the above-described method. Therefore, it also possesses the technical advantages of the described method, such as high hardware integration, high flexibility, high reliability, and wide applicability.

[0061] While the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the invention. Those skilled in the art can make various modifications and refinements without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention shall be determined by the claims.

Claims

1. A serial communication method suitable for multi-protocol conversion, characterized in that, It includes a core controller, various protocol interfaces physically connected to one side of the core controller, and serial port interfaces physically connected to the other side of the core controller; including: The core controller synchronously monitors various protocol interfaces to determine when communication data is input at any protocol interface. It then acquires the communication data and calls the corresponding protocol engine to parse it, thereby obtaining the parsed data. The parsed data is sent to the FIFO buffer corresponding to the target serial port interface, and the number of bits of the parsed data is configured based on the set number of bits of the target serial port interface to obtain the target data. The baud rate of the target serial port interface is configured and updated based on the preset data transmission index. Specifically, when the number of bits in the parsed data is greater than the set number of bits of the target serial port interface, each data frame in the parsed data is sequentially split into several sub-data frames according to the set number of bits; if the number of bits in any sub-data frame is less than the set number of bits, invalid numbers are used to fill the empty bits; when the number of bits in the parsed data is less than the set number of bits of the target serial port interface, invalid numbers are used to fill the empty bits of each data frame. The target data is sent to the target serial port interface via a FIFO buffer at the updated baud rate.

2. The serial communication method for multi-protocol conversion according to claim 1, characterized in that, include: The core controller acquires serial port data from any serial port interface and stores it in a FIFO buffer corresponding to the target protocol interface. After configuring the serial port data bit depth based on the target protocol interface's set bit depth, the data is packaged according to the target protocol format to obtain the target output data packet. The target data packet is sent via the target protocol interface.

3. The serial communication method for multi-protocol conversion according to claim 1, characterized in that, Before sending the parsed data to the FIFO buffer corresponding to the target serial port interface, the following is included: Obtain the data processing rate of the internal device physically connected to the target serial port interface; The depth of the corresponding FIFO buffer is dynamically set based on the data processing rate and the amount of data parsed.

4. The serial communication method suitable for multi-protocol conversion according to claim 1, characterized in that, include: When the core controller determines that a new protocol interface is connected or an old protocol interface is removed, it configures the parameters of the new protocol interface or deletes the configuration parameters corresponding to the old protocol interface based on the configuration port. If the new protocol interface is a new type of protocol interface, the engine database is called to burn the corresponding type of protocol engine; If no valid protocol interface exists that is identical to the old protocol interface, the protocol engine corresponding to the old protocol interface shall be deleted.

5. The serial communication method for multi-protocol conversion according to claim 1, characterized in that, The step of acquiring the communication data and calling the corresponding protocol engine to parse it, thereby obtaining the parsed data, includes: When the communication data is quickly verified to determine that there is missing data, a first retransmission instruction is sent through any of the protocol interfaces; wherein, the first retransmission instruction is used to reacquire the field corresponding to the missing part; After determining that the communication data is complete, the corresponding protocol engine is invoked to parse it to obtain intermediate data; if a CRC check is performed on the intermediate data to determine that there is a data error, the protocol engine is re-programmed and re-parsed, or a second retransmission instruction is sent through any of the protocol interfaces; wherein, the second retransmission instruction is used to re-acquire the communication data; If the intermediate data is determined to be accurate, it shall be used as the parsed data.

6. A serial communication device suitable for multi-protocol conversion, characterized in that, include: Multi-protocol interface module, serial port interface module and core controller; The multi-protocol interface module includes various protocol interfaces connected to the core controller to realize physical connection to external devices and acquisition of communication data; The serial port interface module includes several serial port interfaces connected to the core controller to realize physical connection to internal devices and forward parsed data; The core controller includes a protocol parsing unit, a switching and routing unit, a FIFO buffer, and a serial port configuration unit. The protocol parsing unit parses communication data received from the corresponding protocol interface to obtain parsed data, packages the parsed data according to a preset data format, and writes it to the switching and routing unit. The switching and routing unit routes the packaged parsed data to the corresponding FIFO buffer according to preset rules. The serial port configuration unit configures the data bit width and communication rate of the parsed data in the FIFO buffer according to the type of serial port interface.

7. The serial communication device suitable for multi-protocol conversion according to claim 6, characterized in that, include: Configure the interface module. The configuration interface module is communicatively connected to the core controller to enable dynamic parameter configuration of the core controller.

8. The serial communication device suitable for multi-protocol conversion according to claim 6, characterized in that, The serial port configuration unit integrates a bidirectional FIFO subunit; The depth of the transmit FIFO and receive FIFO in the bidirectional FIFO subunit can be set based on software registers.

9. The serial communication device suitable for multi-protocol conversion according to claim 6, characterized in that, The multi-protocol interface module includes: Ethernet PHY interface, CAN interface, USB PHY interface, SPI interface and IIC interface.

10. A computer-readable storage medium, characterized in that, It stores a computer program thereon, which is used to be executed by a processor to implement the method of any one of claims 1-5.

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