Driving method, display device and display equipment
By capturing the temperature in the LCD panel in real time and generating the corresponding target voltage, and by adopting a differentiated and symmetrical adjustment strategy, the problem of unstable brightness of the LCD panel at different temperatures is solved, and dynamic optimization of brightness and improvement of image stability are achieved.
Patent Information
- Application Number
- CN202511881270.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-12
- Publication Date
- 2026-02-24
AI Technical Summary
The brightness of liquid crystal display panels is unstable at different temperatures, resulting in poor display quality. Existing technologies cannot effectively solve the problem of brightness instability caused by changes in the dielectric constant and refractive index of liquid crystal materials with temperature.
The temperature of the LCD panel is captured in real time by a temperature sensor. A timing controller generates target positive and negative voltages corresponding to the temperature to ensure a positive correlation between brightness and the absolute value of the voltage. Differential adjustment strategies and symmetrical adjustment are adopted to ensure the stability and uniformity of voltage drive.
It achieves dynamic brightness optimization of the LCD panel at different temperatures, reduces the interference of ambient temperature changes on the display screen, improves screen stability and viewing comfort, and avoids screen flicker and brightness fluctuations.
Smart Images
Figure CN121565098A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of display technology, and more specifically to a driving method, a display device, and a display equipment. Background Technology
[0002] Currently, the high image quality of LCD panels is loved by many users. However, in existing LCD technology, the dielectric constant and refractive index of liquid crystal materials change with temperature, which makes it impossible for LCD panels to reach the desired brightness at different temperatures, resulting in unstable display brightness and poor image quality. Summary of the Invention
[0003] The purpose of this invention is to provide a driving method, display device, and display equipment to improve the interference of ambient temperature changes on the display screen of a liquid crystal display panel.
[0004] To achieve the objectives of this invention, the following technical solution is provided: In a first aspect, embodiments of this application provide a driving method applied to a display device. The display device includes a temperature sensor and a timing controller. The timing controller is electrically connected to the temperature sensor and is used to electrically connect to a liquid crystal display panel. The method includes: acquiring a first temperature of the liquid crystal display panel through the temperature sensor; generating a target positive voltage and a target negative voltage corresponding to the first temperature through the timing controller, wherein the timing controller pre-stores different target positive voltages and different target negative voltages corresponding to different temperatures, the brightness of the liquid crystal display panel is positively correlated with the absolute value of the target positive voltage, and the brightness of the liquid crystal display panel is positively correlated with the absolute value of the target negative voltage; and transmitting the target positive voltage and the target negative voltage to the liquid crystal display panel through the timing controller.
[0005] In this embodiment, the first temperature of the liquid crystal display panel is captured in real time by a temperature sensor. By utilizing the pre-stored temperature-voltage correspondence, the timing controller accurately generates the target positive and negative voltages, enabling rapid voltage adjustment response. Furthermore, the positive correlation between brightness and absolute voltage value is clearly defined, ensuring that the voltage adjustment direction matches the brightness requirement. This setting can dynamically optimize the display brightness based on temperature, reducing the interference of ambient temperature changes on the display screen.
[0006] In one possible example, the timing controller pre-stores different target positive voltage values and different target negative voltage values corresponding to different temperatures. The step of generating the target positive voltage and target negative voltage corresponding to the first temperature through the timing controller includes: The timing controller receives data signals, which include data for displaying images on the liquid crystal display panel. The timing controller adjusts the positive voltage of the data signal using the target positive voltage value and adjusts the negative voltage of the data signal using the target negative voltage value to generate the corresponding target positive voltage and target negative voltage, respectively.
[0007] In this embodiment, the solution synchronously receives data signals through a timing controller and directly applies the pre-stored target voltage value to the positive and negative polarity voltage regulation of the data signals, ensuring that the voltage supply for each frame meets the temperature adaptation requirements. Furthermore, the timing controller integrates data signal reception and voltage regulation functions, reducing signal transmission delays and guaranteeing the reliability and timeliness of frame refresh.
[0008] In one possible example, the step of adjusting the positive polarity voltage of the data signal using the target positive voltage value and adjusting the negative polarity voltage of the data signal using the target negative voltage value through the timing controller to generate the corresponding target positive polarity voltage and the target negative polarity voltage, respectively, includes: The timing controller compensates for the target positive voltage value by applying positive voltage to the data signal and reduces the target negative voltage value by applying negative voltage to the data signal, thereby generating the corresponding target positive voltage and target negative voltage respectively.
[0009] In this embodiment, the timing controller compensates for the positive voltage of the data signal to a target positive voltage value and reduces the negative voltage of the data signal to a target negative voltage value, thereby generating corresponding target positive and target negative voltages respectively. Differentiated adjustment strategies of compensation and reduction are adopted for the positive and negative voltages respectively, so that the target voltage can match the temperature requirements and ensure the stability of the voltage polarity, thereby ensuring the stability of the display screen.
[0010] In one possible example, the absolute value of the target positive voltage is equal to the absolute value of the target negative voltage; and / or, the target positive voltage is obtained by compensating the target positive voltage with the positive polarity voltage of the data signal, and the target negative voltage is obtained by reducing the target negative voltage with the negative polarity voltage of the data signal, wherein the absolute value of the target positive voltage is equal to the absolute value of the target negative voltage.
[0011] In this embodiment, the absolute values of the pre-stored target positive voltage value and target negative voltage value are equal to ensure the symmetry of the adjustment basis. The target positive voltage value is obtained by compensating the target positive voltage value with the positive voltage of the data signal, and the target negative voltage value is obtained by reducing the target negative voltage value with the negative voltage of the data signal. The absolute values of the target positive voltage and the target negative voltage are equal to ensure the symmetry of the adjustment result. This setting enables the liquid crystal molecules of the liquid crystal display panel to deflect uniformly under alternating voltage driving, avoiding imbalance between the absolute values of the positive and negative voltages, which would lead to asymmetrical deflection angles of the liquid crystal molecules and screen flicker. This avoids screen fluctuations caused by voltage imbalance and improves screen stability and viewing comfort.
[0012] In one possible example, the step of compensating the target positive voltage value by the positive polarity voltage of the data signal and reducing the target negative voltage value by the negative polarity voltage of the data signal, to generate the corresponding target positive voltage and target negative voltage respectively, includes: The first stage and the second stage of the effective display period of the data signal are determined based on the refresh frequency of the liquid crystal display panel. During the first stage, the target positive voltage value is compensated for by the positive polarity voltage of the data signal; In the second stage, the target negative voltage value is compensated for by the negative polarity voltage of the data signal, the first... The duration of the first phase is equal to the duration of the second phase.
[0013] In this embodiment, the first and second stages of the effective display period are determined based on the refresh rate, ensuring precise matching between the adjustment process and the refresh rhythm of the liquid crystal display panel. Furthermore, positive voltage compensation and negative voltage reduction adjustments are performed in the first and second stages respectively, ensuring that each adjustment has an independent timing space and improving adjustment accuracy. In addition, placing the positive and negative voltage adjustments within two equally long stages ensures balanced adjustment times for both voltages, guaranteeing the symmetry of the two voltage drives. This ensures that within a complete adjustment cycle, the product of the voltage and time of the positive and negative voltage pulses applied to the liquid crystal molecules—that is, the charge—is precisely symmetrical, avoiding inter-frame brightness differences introduced by the adjustment itself and preventing flickering of the liquid crystal display panel.
[0014] In one possible example, the step of compensating the target positive voltage value for the positive polarity voltage of the data signal during the first stage includes: The first start time and the first end time of the first stage are determined based on the effective display period and the refresh rate of the liquid crystal display panel. During the first start time and the first cutoff time, the target positive voltage value is increased by the maximum value of the positive polarity voltage of the data signal.
[0015] In this embodiment, the start and end times of the first stage are precisely calculated based on the effective display period and refresh rate to ensure that the adjustment process is entirely within the effective display period, avoiding interference with non-display periods such as the blanking period and ensuring the integrity of the screen display. Simultaneously, the adjustment target is clearly defined as the maximum value of the positive voltage, making the adjustment more targeted. Increasing the maximum value directly and effectively enhances the deflection driving force of the liquid crystal molecules, rapidly increasing screen brightness and resulting in high efficiency in adjusting the positive voltage.
[0016] In one possible example, the step of compensating the target negative voltage value for the negative polarity voltage of the data signal during the second stage includes: The second start time and the second end time of the second stage are determined based on the effective display period, the refresh rate of the liquid crystal display panel, and the first end time, wherein the second start time is the same as the first end time; During the second start time and the second cutoff time, the minimum value of the negative polarity voltage of the data signal is reduced to the target negative voltage value.
[0017] In this embodiment, the timing of the second stage is determined based on the effective display period, refresh rate, and first cutoff time, ensuring that the second start time completely coincides with the first cutoff time. This achieves seamless connection between positive and negative voltage adjustments, avoiding screen flicker caused by timing gaps. Simultaneously, the minimum value of the negative voltage of the data signal is reduced to a target negative voltage value. By reducing the minimum value, the absolute voltage value is increased, corresponding to the strategy of increasing the maximum value of the positive voltage in the first stage. This ensures a balance between the positive and negative voltage driving capabilities, making the deflection state of the liquid crystal molecules more stable under alternating driving.
[0018] In one possible example, before transmitting the target positive voltage and the target negative voltage to the liquid crystal display panel via the timing controller, the method further includes: The data signal further includes a preset first blanking segment, a second blanking segment, and a third blanking segment. The end time of the first blanking segment is the start time of the second blanking segment, the end time of the second blanking segment is the start time of the third blanking segment, and the end time of the third blanking segment is the start time of the effective display period. During the first blanking phase, the high level of the gate signal is input to the gate of the thin-film transistor of the liquid crystal display panel to turn on the thin-film transistor; During the second blanking phase, a high level of a preset proportion of the gate signal is input to the gate of the thin-film transistor of the liquid crystal display panel; During the third blanking phase, a low level of the gate signal is input to the gate of the thin-film transistor of the liquid crystal display panel to turn off the thin-film transistor.
[0019] In this embodiment, a high-level gate signal is used to switch the thin-film transistor to its maximum state, forming a low-impedance channel that allows for rapid charge discharge. A preset high-level input is applied to the gate of the thin-film transistor in the display panel, forming a controllable current that allows residual charge on the pixel electrode to discharge at a stable and predictable rate. After the charge is precisely discharged, a low-level gate signal is used to quickly pull the gate voltage to its minimum for a very short time, causing the thin-film transistor to quickly and completely turn off, avoiding incomplete shutdown and the presence of weak leakage current that could affect the consistency of the displayed image.
[0020] Secondly, embodiments of this application provide a display device, the display device including the driving method as described in the first aspect or any embodiment of the first aspect, the display device including a temperature sensor and a timing controller, the timing controller being electrically connected to the temperature sensor, the timing controller being electrically connected to a liquid crystal display panel, wherein: the temperature sensor is used to acquire a first temperature of the liquid crystal display panel; the timing controller is used to generate a target positive voltage and a target negative voltage corresponding to the first temperature, the timing controller pre-stores different target positive voltages and different target negative voltages corresponding to different temperatures, the brightness of the liquid crystal display panel is positively correlated with the absolute value of the target positive voltage, the brightness of the liquid crystal display panel is positively correlated with the absolute value of the target negative voltage; the timing controller is further used to transmit the target positive voltage and the target negative voltage to the liquid crystal display panel.
[0021] Thirdly, embodiments of this application provide a display device including a processor, a memory, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the processor, and the programs include instructions for executing the first aspect or any embodiment of the first aspect. Attached Figure Description
[0022] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0023] Figure 1 This is a schematic diagram illustrating an application scenario of a driving method provided in an embodiment of this application; Figure 2 This is a flowchart illustrating a driving method provided in an embodiment of this application; Figure 3 This is a schematic diagram illustrating the relationship between liquid crystal driving voltage and transmittance provided in an embodiment of this application; Figure 4 This is a schematic diagram of the gate signal and data signal before adjustment provided in an embodiment of this application; Figure 5 This is a schematic diagram of an adjusted gate signal and data signal provided in an embodiment of this application; Figure 6 This is a schematic diagram of an effective display provided in an embodiment of this application; Figure 7 This is a schematic diagram of a first adjustment circuit provided in an embodiment of this application; Figure 8 This is a schematic diagram of a second adjustment circuit provided in an embodiment of this application; Figure 9 This is a schematic diagram of an enable signal and a data signal provided in an embodiment of this application; Figure 10 This is a schematic diagram of the structure of a display device provided in an embodiment of this application.
[0024] Explanation of reference numerals in the attached figures: 101-User, 102-Display device, 103-Server, 201-Server, 202-Memory, 203-Program. Detailed Implementation
[0025] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0026] It should be noted that when a component is said to be "fixed" to another component, it can be directly on the other component or it can be in a middle component. When a component is said to be "connected" to another component, it can be directly connected to the other component or it may be in a middle component.
[0027] Unless otherwise defined, all technical and scientific terms used in this invention have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used in this invention includes any and all combinations of one or more of the associated listed items.
[0028] The following detailed description of some embodiments of the present invention is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined with each other.
[0029] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present application.
[0030] The terms “1” and “2”, etc., in this application are used to distinguish different objects, not to describe a specific order. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to such processes, methods, products, or apparatus.
[0031] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.
[0032] Please see Figure 1 , Figure 1 This is a schematic diagram illustrating an application scenario of a driving method provided in an embodiment of this application. For example... Figure 1 As shown in the diagram, this application scenario includes a user 101, a display device 102, and a server 103. Optionally, the display device 102 may be a thin-film transistor display; this application does not limit the structure of the display device 102. Optionally, a user 101 may use multiple display devices 102. Optionally, multiple display devices 102 may transmit data with a single server 103.
[0033] Optionally, server 103 can be a standalone server or a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, content delivery networks (CDN), and big data and artificial intelligence platforms. Server 103 can also be implemented through a server cluster composed of multiple sub-servers.
[0034] It should be noted that, Figure 1 The number and form of each device in the system shown, as well as the number of users 101, are for illustrative purposes only and do not constitute a limitation on the embodiments of this application.
[0035] Please refer to Figure 2 , Figure 2 This is a flowchart illustrating a driving method provided in an embodiment of this application. An example of this driving method being applied to a driving process is provided. The method includes the following steps S201-S203, wherein... S201: Obtain the first temperature of the LCD panel through a temperature sensor.
[0036] S202: The timing controller generates a target positive voltage and a target negative voltage corresponding to the first temperature. The timing controller pre-stores different target positive voltages and different target negative voltages corresponding to different temperatures. The brightness of the liquid crystal display panel is positively correlated with the absolute value of the target positive voltage and the absolute value of the target negative voltage.
[0037] Optionally, the first temperature is the temperature of the liquid crystal material in the liquid crystal display panel. Optionally, the timing controller pre-stores different target positive and negative voltages corresponding to different temperatures (each corresponding to a different image). The timing controller can directly call the target positive and negative voltages corresponding to the first temperature, transmit these target positive and negative voltages to the liquid crystal display panel, and directly cause the liquid crystal display panel to display the image. In this case, no compensation is required.
[0038] Please refer to Figure 3During the initial power-on phase of a liquid crystal display (LCD) panel, the expected grayscale-brightness characteristics are difficult to achieve because the temperature has not yet reached a steady state. Furthermore, the heat generated by the backlight module and driver chip of the display device causes the liquid crystal temperature to rise, leading to a decrease in the dielectric constant, refractive index, and viscosity coefficient of the liquid crystal material. This, in turn, causes a decrease in liquid crystal transmittance. The solid line in the figure represents the relationship between the liquid crystal driving voltage and transmittance under ideal operating conditions, while the dashed line represents the corresponding relationship when the liquid crystal temperature increases. When the timing controller applies the same target positive or negative voltage to the LCD panel, compared to the ideal state, the increased liquid crystal temperature leads to a significant decrease in transmittance. However, after compensation, the transmittance is higher than the actual situation. Please refer to... Figure 4 , Figure 4 In the prior art, when no compensation is required, the gate signal and data signal diagram are as follows: during the blanking period, the data signal is not written to the liquid crystal display panel; during the active display period, the data signal is written to the liquid crystal display panel.
[0039] Optionally, the actual brightness of the liquid crystal display panel at different temperatures is obtained, the deviation between the actual brightness and the target brightness of the liquid crystal display panel is determined, and the current positive polarity voltage is adjusted according to the deviation value until the deviation value is less than or equal to the target threshold. Then, the adjusted positive polarity voltage is determined to be the target positive polarity voltage at that temperature.
[0040] In one possible example, the timing controller pre-stores different target positive voltage values and different target negative voltage values corresponding to different temperatures. The timing controller generates the target positive voltage and target negative voltage corresponding to the first temperature, including: Data signals are received via a timing controller, and the data signals include data used to display images on the liquid crystal display panel. The timing controller adjusts the positive voltage of the data signal using a target positive voltage value and adjusts the negative voltage of the data signal using a target negative voltage value, so as to generate the corresponding target positive voltage and target negative voltage respectively.
[0041] Optionally, the timing controller pre-stores different target positive voltage values and different target negative voltage values corresponding to different temperatures. After the timing controller calls the target positive voltage values and target negative voltage values to adjust the data signal, it transmits the generated target positive voltage and target negative voltage to the LCD display panel.
[0042] In this embodiment, the solution synchronously receives data signals through a timing controller and directly applies the pre-stored target voltage value to the positive and negative polarity voltage regulation of the data signals, ensuring that the voltage supply for each frame meets the temperature adaptation requirements. Furthermore, the timing controller integrates data signal reception and voltage regulation functions, reducing signal transmission delays and guaranteeing the reliability and timeliness of frame refresh.
[0043] In one possible example, please refer to Figure 5 The timing controller adjusts the positive polarity voltage of the data signal using a target positive voltage value and adjusts the negative polarity voltage of the data signal using a target negative voltage value to generate corresponding target positive and negative polarity voltages, respectively. This includes: The timing controller compensates for the positive voltage of the data signal with the target positive voltage value and reduces the negative voltage of the data signal with the target negative voltage value, so as to generate the corresponding target positive voltage and target negative voltage respectively.
[0044] In this embodiment, the timing controller compensates for the positive voltage of the data signal to a target positive voltage value and reduces the negative voltage of the data signal to a target negative voltage value, thereby generating corresponding target positive and target negative voltages respectively. Differentiated adjustment strategies of compensation and reduction are adopted for the positive and negative voltages respectively, so that the target voltage can match the temperature requirements and ensure the stability of the voltage polarity, thereby ensuring the stability of the display screen.
[0045] In one possible example, please refer to Figure 5 The absolute value of the target positive voltage is equal to the absolute value of the target negative voltage; and / or, the target positive voltage is obtained by compensating the positive voltage of the data signal to obtain the target positive voltage, and the target negative voltage is obtained by reducing the negative voltage of the data signal to obtain the target negative voltage, wherein the absolute value of the target positive voltage is equal to the absolute value of the target negative voltage.
[0046] In this embodiment, the absolute values of the pre-stored target positive voltage value and target negative voltage value are equal to ensure the symmetry of the adjustment basis. The target positive voltage value is obtained by compensating the target positive voltage value with the positive voltage of the data signal, and the target negative voltage value is obtained by reducing the target negative voltage value with the negative voltage of the data signal. The absolute values of the target positive voltage and the target negative voltage are equal to ensure the symmetry of the adjustment result. This setting enables the liquid crystal molecules of the liquid crystal display panel to deflect uniformly under alternating voltage driving, avoiding imbalance between the absolute values of the positive and negative voltages, which would lead to asymmetrical deflection angles of the liquid crystal molecules and screen flicker. This avoids screen fluctuations caused by voltage imbalance and improves screen stability and viewing comfort.
[0047] In one possible example, please refer to Figure 5 and Figure 6 The timing controller compensates for the positive voltage of the data signal with a target positive voltage value and reduces the negative voltage of the data signal with a target negative voltage value to generate corresponding target positive and target negative voltages, respectively. This includes: The first stage and the second stage of the effective display period of the data signal are determined based on the refresh rate of the LCD panel.
[0048] In the first stage, the positive polarity voltage of the data signal is compensated for to the target positive voltage value.
[0049] In the second stage, the negative polarity voltage of the data signal is compensated for to the target negative voltage value. The duration of the first stage is equal to the duration of the second stage.
[0050] In this embodiment, the first and second stages of the effective display period are determined based on the refresh rate, ensuring precise matching between the adjustment process and the refresh rhythm of the liquid crystal display panel. Furthermore, positive voltage compensation and negative voltage reduction adjustments are performed separately in the first and second stages, ensuring each adjustment has an independent timing space and improving adjustment accuracy. In addition, placing the positive and negative voltage adjustments within two equally long stages ensures balanced adjustment times for both voltages, guaranteeing the symmetry of the two voltage drives. This ensures that within a complete adjustment cycle, the product of the voltage and time of the positive and negative voltage pulses applied to the liquid crystal molecules—that is, the charge—is precisely symmetrical, avoiding inter-frame brightness differences introduced by the adjustment itself and preventing flickering of the liquid crystal display panel.
[0051] In one possible example, please refer to Figure 5 In the first stage, the positive polarity voltage compensation target positive voltage value for the data signal includes: The first start time and the first end time of the first stage are determined based on the effective display period and the refresh rate of the LCD panel. During the first start time and the first cutoff time, the target positive voltage value is increased to the maximum value of the positive polarity voltage of the data signal.
[0052] In this embodiment, the start and end times of the first stage are precisely calculated based on the effective display period and refresh rate to ensure that the adjustment process is entirely within the effective display period, avoiding interference with non-display periods such as the blanking period and ensuring the integrity of the screen display. Simultaneously, the adjustment target is clearly defined as the maximum value of the positive voltage, making the adjustment more targeted. Increasing the maximum value directly and effectively enhances the deflection driving force of the liquid crystal molecules, rapidly increasing screen brightness and resulting in high efficiency in adjusting the positive voltage.
[0053] In one possible example, during the second stage, compensating the data signal for a negative polarity voltage of a target negative voltage value includes: The second start time and the second end time of the second stage are determined based on the effective display period, the refresh rate of the liquid crystal display panel, and the first end time. The second start time is the same as the first end time. During the second start time and the second cutoff time, the minimum value of the negative polarity voltage of the data signal is reduced to the target negative voltage value.
[0054] In this embodiment, the timing of the second stage is determined based on the effective display period, refresh rate, and first cutoff time, ensuring that the second start time completely coincides with the first cutoff time. This achieves seamless connection between positive and negative voltage adjustments, avoiding screen flicker caused by timing gaps. Simultaneously, the minimum value of the negative voltage of the data signal is reduced to a target negative voltage value. By reducing the minimum value, the absolute voltage value is increased, corresponding to the strategy of increasing the maximum value of the positive voltage in the first stage. This ensures a balance between the positive and negative voltage driving capabilities, making the deflection state of the liquid crystal molecules more stable under alternating driving.
[0055] In one possible example, the method further includes, before transmitting the target positive voltage and the target negative voltage to the liquid crystal display panel via a timing controller: The data signal also includes a preset first blanking segment, a second blanking segment, and a third blanking segment. The end time of the first blanking segment is the start time of the second blanking segment, the end time of the second blanking segment is the start time of the third blanking segment, and the end time of the third blanking segment is the start time of the effective display period. During the first blanking phase, a high-level gate signal is input to the gate of the thin-film transistor in the liquid crystal display panel to turn on the thin-film transistor. During the second blanking phase, a high level of the gate signal with a preset ratio is input to the gate of the thin-film transistor in the liquid crystal display panel. During the third blanking phase, a low level of the gate signal is input to the gate of the thin-film transistor in the liquid crystal display panel to turn off the thin-film transistor.
[0056] In this embodiment, a high-level gate signal is used to switch the thin-film transistor to its maximum state, forming a low-impedance channel that allows for rapid charge discharge. A preset high-level input is applied to the gate of the thin-film transistor in the display panel, forming a controllable current that allows residual charge on the pixel electrode to discharge at a stable and predictable rate. After the charge is precisely discharged, a low-level gate signal is used to quickly pull the gate voltage to its minimum for a very short time, causing the thin-film transistor to quickly and completely turn off, avoiding incomplete shutdown and the presence of weak leakage current that could affect the consistency of the displayed image.
[0057] S203: The target positive voltage and target negative voltage are transmitted to the liquid crystal display panel through the timing controller.
[0058] Please refer to Figure 7 , Figure 8 and Figure 9 In this embodiment, the first temperature of the liquid crystal display panel is captured in real time by a temperature sensor. By utilizing the pre-stored temperature-voltage correspondence, the timing controller accurately generates the target positive and negative voltages, enabling rapid voltage adjustment response and clearly defining the positive correlation between brightness and the absolute value of voltage. This ensures that the voltage adjustment direction matches the brightness requirement, and the target positive and negative voltages are transmitted to the liquid crystal display panel through the output terminal. This setting can dynamically optimize the display brightness according to the temperature and improve the interference of ambient temperature changes on the display screen.
[0059] like Figure 7 As shown, the first interface is used for transmission of various signal lines, including a serial clock line, a serial data line, an enable signal line, and a data select line. The first interface is electrically connected to a timing controller, which is electrically connected to a memory. The memory is electrically connected to a memory selection controller, which is also electrically connected to at least one first digital-to-analog converter (DAC). The first DAC is electrically connected to its output terminal, and at least one first DAC is grounded. The timing controller outputs a common electrode voltage to a second DAC. The second DAC is also electrically connected to a first comparator and a second comparator. The second DAC also transmits an analog power supply voltage. The second comparator is also electrically connected to a first transistor and a setting terminal. The first input terminal of the second comparator receives a common electrode voltage feedback signal, the second input terminal receives a common electrode voltage adjustment signal, and the output terminal of the second comparator outputs a common electrode voltage output signal. Optionally, Figure 7 It includes multiple output terminal groups, each consisting of two output terminals used to output positive and negative voltages corresponding to the same grayscale level. For example, the first and fourteenth output terminals form one group, the second and thirteenth output terminals form another group, and the seventh and eighth output terminals form yet another group. The channel allocation logic is as follows: low grayscale levels (e.g., 0-63) are allocated to the fifth to tenth output terminals, medium grayscale levels (e.g., 64-191) are allocated to the third, fourth, eleventh, and twelfth output terminals, and high grayscale levels (e.g., 192-255) are allocated to the first, second, thirteenth, and fourteenth output terminals.
[0060] Optional, such as Figure 8As shown, a selector and a linear transition voltage circuit are set between the adjustment module (gamma chip) and the data driver chip. The outputs of the linear transition voltage circuit and the data driver chip are controlled by an enable signal. The third input terminal of the third comparator is connected to an external power supply through a first resistor to input voltage. The third input terminal of the third comparator is connected to the first terminal of the second transistor and one end of the first capacitor. The fourth input terminal of the third comparator is grounded. The second output terminal of the third comparator is connected to the other end of the first capacitor and the second terminal of the second transistor. The selector is electrically connected to the control terminal of the second transistor and inputs an enable signal to the control terminal of the second transistor. The selector is also electrically connected to the data driver chip and the adjustment module. When the enable signal is high, the linear transition voltage circuit outputs a linear voltage Vx, and the selector simultaneously outputs Vx voltage to the data driver chip. When the enable signal is low, the linear transition voltage circuit outputs 0 voltage, and the selector simultaneously outputs Vy voltage to the data driver chip. The durations of the different stages of the linear transition voltage are t1=T1 / 8, t2=3 / 4×T1, and t3=1 / 8×T, respectively. t1, t2, and t3 are measured experimentally and preset before the display device leaves the factory. If t1 / t3 is too small, the voltage change rate will be extremely large, which will generate high-frequency harmonics and interfere with the normal operation of the display panel. If t1 / t3 is too large, the compensation voltage will not be stable for long enough at time t2, resulting in the failure of the compensation brightness.
[0061] Please see Figure 4 , Figure 4 This is a schematic diagram of a display device provided in an embodiment of this application. Based on the above system architecture, the display device can be a server or installation equipment, or a module within a server. The display device includes at least a temperature sensor and a timing controller, wherein: The temperature sensor is used to obtain the initial temperature of the LCD panel.
[0062] The timing controller is used to generate a target positive voltage and a target negative voltage corresponding to a first temperature. The timing controller pre-stores different target positive voltages and different target negative voltages corresponding to different temperatures. The brightness of the liquid crystal display panel is positively correlated with the absolute value of the target positive voltage and the absolute value of the target negative voltage. The timing controller is also used to transmit the target positive voltage and the target negative voltage to the liquid crystal display panel.
[0063] In one possible example, the timing controller pre-stores different target positive voltage values and different target negative voltage values corresponding to different temperatures. The timing controller is used to receive data signals, including data for displaying images on the liquid crystal display panel. The timing controller is used to adjust the positive polarity voltage of the data signal using the target positive voltage value and adjust the negative polarity voltage of the data signal using the target negative voltage value, so as to generate the corresponding target positive polarity voltage and target negative polarity voltage respectively.
[0064] In one possible example, the timing controller is used to compensate for the target positive voltage value by applying the positive polarity voltage of the data signal and reduce the target negative voltage value by applying the negative polarity voltage of the data signal, so as to generate the corresponding target positive voltage and target negative voltage respectively.
[0065] In one possible example, the timing controller is used to make the absolute value of the target positive voltage equal to the absolute value of the target negative voltage; and / or, the timing controller is used to compensate the target positive voltage value for the positive polarity voltage of the data signal to obtain the target positive voltage, and to reduce the target negative voltage value for the negative polarity voltage of the data signal to obtain the target negative voltage, wherein the absolute value of the target positive voltage is equal to the absolute value of the target negative voltage.
[0066] In one possible example, the timing controller is used to determine a first stage and a second stage of the effective display period of the data signal based on the refresh frequency of the liquid crystal display panel; in the first stage, a target positive voltage value is compensated for the positive polarity voltage of the data signal; in the second stage, a target negative voltage value is compensated for the negative polarity voltage of the data signal, and the duration of the first stage is equal to the duration of the second stage.
[0067] In one possible example, the timing controller is used to determine the first start time and the first end time of the first stage based on the effective display period and the refresh rate of the liquid crystal display panel; during the first start time and the first end time, a target positive voltage value is added to the maximum value of the positive polarity voltage of the data signal.
[0068] In one possible example, the timing controller is used to determine a second start time and a second cutoff time for the second stage based on the effective display period, the refresh rate of the liquid crystal display panel, and a first cutoff time, wherein the second start time is the same as the first cutoff time; during the second start time and the second cutoff time, the minimum value of the negative polarity voltage of the data signal is reduced to a target negative voltage value.
[0069] In one possible example, the timing controller for the data signal further includes preset first blanking, second blanking, and third blanking segments. The cutoff time of the first blanking segment is the start time of the second blanking segment, the cutoff time of the second blanking segment is the start time of the third blanking segment, and the cutoff time of the third blanking segment is the start time of the effective display period. During the first blanking segment, a high level of the gate signal is input to the gate of the thin-film transistor of the liquid crystal display panel to turn on the thin-film transistor. During the second blanking segment, a high level of the gate signal with a preset ratio is input to the gate of the thin-film transistor of the liquid crystal display panel. During the third blanking segment, a low level of the gate signal is input to the gate of the thin-film transistor of the liquid crystal display panel to turn off the thin-film transistor.
[0070] Please see Figure 10 , Figure 10 This is a schematic diagram of the structure of a display device provided in an embodiment of this application. Figure 10 As shown, the display device includes a processor, a memory, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the processor, the programs including instructions for performing the following steps: The initial temperature of the LCD panel is obtained using a temperature sensor; The timing controller generates a target positive voltage and a target negative voltage corresponding to the first temperature. The timing controller pre-stores different target positive voltages and different target negative voltages corresponding to different temperatures. The brightness of the liquid crystal display panel is positively correlated with the absolute value of the target positive voltage and the absolute value of the target negative voltage. The target positive voltage and target negative voltage are transmitted to the LCD panel through the timing controller.
[0071] In one possible example, the program specifically executes the following instructions: The timing controller receives data signals, including data for displaying images on the liquid crystal display panel; the timing controller adjusts the positive polarity voltage of the data signals using a target positive voltage value and adjusts the negative polarity voltage of the data signals using a target negative voltage value, so as to generate corresponding target positive and target negative polarity voltages respectively.
[0072] In one possible example, the job information includes the preset installation actions and preset installation quantity of the photovoltaic panels, and program 403 specifically provides instructions for performing the following steps: The timing controller compensates for the positive voltage of the data signal with the target positive voltage value and reduces the negative voltage of the data signal with the target negative voltage value, so as to generate the corresponding target positive voltage and target negative voltage respectively.
[0073] In one possible example, the program specifically executes the following instructions: The absolute value of the target positive voltage is equal to the absolute value of the target negative voltage; and / or, the target positive voltage is obtained by compensating the positive voltage of the data signal with the target positive voltage, and the target negative voltage is obtained by reducing the negative voltage of the data signal with the target negative voltage, and the absolute value of the target positive voltage is equal to the absolute value of the target negative voltage.
[0074] In one possible example, the job information includes the construction worker's preset specifications, and the program specifically provides instructions for performing the following steps: The effective display period of the data signal is determined based on the refresh rate of the LCD panel, specifically in the first and second phases. During the first phase, the positive voltage of the data signal is compensated for with a target positive voltage value. During the second phase, the negative voltage of the data signal is compensated for with a target negative voltage value. The duration of the first and second phases are equal.
[0075] In one possible example, the program specifically executes the following instructions: The first start time and the first end time of the first stage are determined based on the effective display period and the refresh rate of the liquid crystal display panel; during the first start time and the first end time, the maximum value of the positive polarity voltage of the data signal is increased by a target positive voltage value.
[0076] In one possible example, the program specifically executes the following instructions: The second start time and the second end time of the second stage are determined based on the effective display period, the refresh rate of the liquid crystal display panel, and the first end time. The second start time is the same as the first end time. During the second start time and the second end time, the minimum value of the negative polarity voltage of the data signal is reduced to the target negative voltage value.
[0077] In one possible example, the program specifically executes the following instructions: The data signal also includes preset first blanking segment, second blanking segment, and third blanking segment. The cutoff time of the first blanking segment is the start time of the second blanking segment, the cutoff time of the second blanking segment is the start time of the third blanking segment, and the cutoff time of the third blanking segment is the start time of the effective display period. During the first blanking segment, a high level of the gate signal is input to the gate of the thin-film transistor of the liquid crystal display panel to turn on the thin-film transistor. During the second blanking segment, a high level of the gate signal with a preset ratio is input to the gate of the thin-film transistor of the liquid crystal display panel. During the third blanking segment, a low level of the gate signal is input to the gate of the thin-film transistor of the liquid crystal display panel to turn off the thin-film transistor.
[0078] Those skilled in the art will understand that, for ease of explanation, Figure 5 Only one memory and processor are shown in the illustration. In a real terminal or server, multiple processors and memories may exist. Memory can also be called storage medium or storage device, etc., and this application does not limit this.
[0079] It should be understood that in this application, the processor can be a central processing unit, or it can be other general-purpose processors, digital signal processors, application-specific integrated circuits, off-the-shelf programmable gate arrays or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The processor can also be a general-purpose microprocessor, graphics processor or one or more integrated circuits, used to execute relevant programs to achieve the functions required by the embodiments of this application.
[0080] The processor can also be an integrated circuit chip with signal processing capabilities. In implementation, each step of this application can be completed through integrated logic circuits in the processor hardware or instructions in software form. The aforementioned processor can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The steps of the methods disclosed in the embodiments of this application can be directly manifested as execution by a hardware decoding processor, or execution by a combination of hardware and software modules in the decoding processor. The software modules can reside in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory; the processor reads information from the memory and, in conjunction with its hardware, completes the functions required by the units included in the methods, apparatus, and storage media of the embodiments of this application.
[0081] It should also be understood that the memory mentioned in the embodiments of this application can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. Non-volatile memory can be read-only memory, programmable read-only memory, erasable programmable read-only memory, electrically erasable programmable read-only memory, or flash memory. Volatile memory can be random access memory used as an external cache. By way of example, but not limitation, many forms of RA second angles are available, such as static random access memory, dynamic random access memory, synchronous dynamic random access memory, double data rate synchronous dynamic random access memory, enhanced synchronous dynamic random access memory, synchronous linked dynamic random access memory, and direct memory bus random access memory. The memory can also be read-only optical disc or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital universal optical discs, Blu-ray discs, etc.), disk storage media, or other magnetic storage devices, or any other medium capable of carrying or storing desired program code having an instruction or data structure form and accessible by a computer, but is not limited thereto. The memory can exist independently and be connected to the processor via a bus. Alternatively, the memory can be integrated with the processor. The memory can store programs, and when the program stored in the memory is executed by the processor, the processor performs the various steps of the method determined in the above embodiments of this application.
[0082] It should be noted that when the processor is a general-purpose processor or other programmable logic device, discrete gate or transistor logic device, or discrete hardware component, the memory (storage module) is integrated into the processor. It should be noted that the memory described herein is intended to include, but is not limited to, these and any other suitable types of memory.
[0083] It should be understood that the term "and / or" in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.
[0084] In implementation, each step of the above method can be completed by integrated logic circuits in the processor's hardware or by instructions in software. The steps of the method disclosed in the embodiments of this application can be directly implemented by a hardware processor, or by a combination of hardware and software modules within the processor. The software modules can reside in mature storage media in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, or registers. Since this storage medium is located in memory, the processor reads information from the memory and, in conjunction with its hardware, completes the steps of the above method; to avoid repetition, these will not be described in detail here.
[0085] Those skilled in the art will recognize that the various illustrative logic blocks and steps described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0086] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented, in whole or in part, as a computer-programmed program product. A computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a processor, all or part of the flow or function according to the embodiments of this application is generated. The computer can be a general-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic) or wireless (e.g., infrared, wireless, microwave, etc.) means, or from one website, computer, server, or data center to a mobile phone processor via a wired means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk), an optical medium, or a semiconductor medium (e.g., a solid-state drive), etc.
[0087] The above are merely specific embodiments of this application, but the scope of protection of this application is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application.
Claims
1. A driving method, characterized in that, The driving method is applied to a display device, the display device including a temperature sensor and a timing controller, the timing controller being electrically connected to the temperature sensor and configured to be electrically connected to a liquid crystal display panel, the method comprising: The first temperature of the liquid crystal display panel is obtained through the temperature sensor; The timing controller generates a target positive voltage and a target negative voltage corresponding to the first temperature. The timing controller pre-stores different target positive voltages and different target negative voltages corresponding to different temperatures. The brightness of the liquid crystal display panel is positively correlated with the absolute value of the target positive voltage and the absolute value of the target negative voltage. The timing controller transmits the target positive voltage and the target negative voltage to the liquid crystal display panel.
2. The driving method according to claim 1, characterized in that, The timing controller pre-stores different target positive voltage values and different target negative voltage values corresponding to different temperatures. The step of generating the target positive voltage and target negative voltage corresponding to the first temperature through the timing controller includes: The timing controller receives data signals, which include data for displaying images on the liquid crystal display panel. The timing controller adjusts the positive voltage of the data signal using the target positive voltage value and adjusts the negative voltage of the data signal using the target negative voltage value to generate the corresponding target positive voltage and target negative voltage, respectively.
3. The driving method according to claim 2, characterized in that, The step of adjusting the positive polarity voltage of the data signal using the target positive voltage value and adjusting the negative polarity voltage of the data signal using the target negative voltage value through the timing controller to generate the corresponding target positive polarity voltage and the target negative polarity voltage, respectively, includes: The timing controller compensates for the target positive voltage value by applying positive voltage to the data signal and reduces the target negative voltage value by applying negative voltage to the data signal, thereby generating the corresponding target positive voltage and target negative voltage respectively.
4. The driving method according to claim 3, characterized in that, The absolute value of the target positive voltage is equal to the absolute value of the target negative voltage; and / or, the target positive voltage is obtained by compensating the target positive voltage with the positive voltage of the data signal, and the target negative voltage is obtained by reducing the target negative voltage with the negative voltage of the data signal, wherein the absolute value of the target positive voltage is equal to the absolute value of the target negative voltage.
5. The driving method according to claim 3, characterized in that, The step of compensating the target positive voltage value by the positive polarity voltage of the data signal and reducing the target negative voltage value by the negative polarity voltage of the data signal through the timing controller to generate the corresponding target positive voltage and target negative voltage respectively includes: The first stage and the second stage of the effective display period of the data signal are determined based on the refresh frequency of the liquid crystal display panel. During the first stage, the target positive voltage value is compensated for by the positive polarity voltage of the data signal; In the second stage, the target negative voltage value is compensated for by the negative polarity voltage of the data signal, the first... The duration of the first phase is equal to the duration of the second phase.
6. The driving method according to claim 5, characterized in that, The step of compensating the target positive voltage value for the positive polarity voltage of the data signal during the first stage includes: The first start time and the first end time of the first stage are determined based on the effective display period and the refresh rate of the liquid crystal display panel. During the first start time and the first end time, the maximum positive voltage of the data signal The value increases the target positive voltage value.
7. The driving method according to claim 6, characterized in that, The step of compensating the target negative voltage value for the negative polarity voltage of the data signal during the second stage includes: The second start time and the second end time of the second stage are determined based on the effective display period, the refresh rate of the liquid crystal display panel, and the first end time, wherein the second start time is the same as the first end time; During the second start time and the second cutoff time, the negative polarity voltage of the data signal is minimized. The value is reduced to the target negative voltage value.
8. The driving method according to claim 5, characterized in that, Before transmitting the target positive voltage and the target negative voltage to the liquid crystal display panel via the timing controller, the method further includes: The data signal further includes a preset first blanking segment, a second blanking segment, and a third blanking segment. The end time of the first blanking segment is the start time of the second blanking segment, the end time of the second blanking segment is the start time of the third blanking segment, and the end time of the third blanking segment is the start time of the effective display period. During the first blanking phase, the high level of the gate signal is input to the gate of the thin-film transistor of the liquid crystal display panel to turn on the thin-film transistor; During the second blanking phase, a high level of a preset proportion of the gate signal is input to the gate of the thin-film transistor of the liquid crystal display panel; During the third blanking phase, a low level of the gate signal is input to the gate of the thin-film transistor of the liquid crystal display panel to turn off the thin-film transistor.
9. A display device, characterized in that, The display device includes the driving method as described in any one of claims 1 to 7, the display device includes a temperature sensor and a timing controller, the timing controller is electrically connected to the temperature sensor, and the timing controller is configured to be electrically connected to a liquid crystal display panel, wherein: The temperature sensor is used to obtain the first temperature of the liquid crystal display panel; The timing controller is used to generate a target positive voltage and a target negative voltage corresponding to the first temperature. The timing controller pre-stores different target positive voltages and different target negative voltages corresponding to different temperatures. The brightness of the liquid crystal display panel is positively correlated with the absolute value of the target positive voltage and the absolute value of the target negative voltage. The timing controller is also used to transmit the target positive voltage and the target negative voltage to the liquid crystal display panel.
10. A display device, characterized in that, It includes a processor, a memory, and one or more programs, wherein the one or more programs are stored in the memory and configured to be executed by the processor, the programs including instructions for performing the method of any one of claims 1 to 7.