Power supply control system and chip

Abstract

The embodiment of the invention provides a power supply control system and a chip. Belongs to the technical field of power supply or distribution circuit devices or systems. The system is characterized in that a first input end of a first switch is a battery power supply input end of the power supply control system, and a second input end of the first switch is connected with a first input end of a second switch and an input end of a third switch; the first input end of the second switch is a universal serial bus power supply input end of the power supply control system, and the second input end of the second switch is connected with the input end of the third switch; the input end of the third switch is a direct current input end; the output end of the first switch, the output end of the second switch and the output end of the third switch jointly serve as the output end of the power supply control system. The method solves the problems that the output voltage is lower than the input voltage due to a diode circuit, and power supply paths cannot be selected according to a preset sequence.

Description

Technical Field

[0001] This application relates to the field of circuit devices or systems for power supply or distribution, and in particular to a power control system and chip. Background Technology

[0002] In modern electronic devices, multiple power inputs have become a common requirement. For example, smartphones, tablets, laptops, wearable devices, and industrial control systems typically need to support multiple power input methods simultaneously, including built-in batteries, external Universal Serial Bus (USB) chargers, and DC adapters. In complex application scenarios, devices may be powered by different power sources at any given time; for instance, a user might connect both a USB charger and a DC adapter while charging, or rely on battery power when the power source is disconnected.

[0003] Currently, in related technologies, switching between different power supplies can be achieved by using diodes, MOS (Metal Oxide Semiconductor Field Effect Transistor), or other methods to select the power supply.

[0004] However, the inventors discovered that the related technology has at least the following technical problems: if a diode circuit is used to select the power supply, the output voltage will be lower than the input voltage due to the forward voltage drop of the diode, and the power supply path cannot be selected in a preset order. Summary of the Invention

[0005] This application provides a power control system and chip to solve the problem that diode circuits cause the output voltage to be lower than the input voltage and the power supply path cannot be selected in a preset order.

[0006] In a first aspect, embodiments of this application provide a power control system, including: a first switch, a second switch, and a third switch.

[0007] The first input terminal of the first switch is the battery power input terminal of the power control system. The second input terminal of the first switch is connected to the first input terminal of the second switch and the input terminal of the third switch. The first input terminal of the second switch is the universal serial bus power input terminal of the power control system. The second input terminal of the second switch is connected to the input terminal of the third switch. The input terminal of the third switch is the DC power input terminal. The output terminals of the first switch, the second switch, and the third switch together serve as the output terminals of the power control system.

[0008] Specifically, if there is a voltage input at the second or third input terminal of the first switch, the first switch is open. If there is a voltage input at the second input terminal of the second switch, the second switch is open.

[0009] In one possible implementation, the first switch includes: a first MOSFET.

[0010] The source of the first MOSFET is the first input terminal of the first MOSFET, the gate of the first MOSFET is the second input terminal of the first MOSFET, and the drain of the first MOSFET is the output terminal of the first MOSFET.

[0011] In one possible implementation, the first MOSFET also includes a first resistor.

[0012] One end of the first resistor is connected to the gate of the first MOSFET, and the other end is grounded.

[0013] In one possible implementation, the second switch includes a second MOSFET and a first transistor.

[0014] The source of the second MOSFET is its first input terminal, its gate is connected to the collector of the first transistor, and its drain is the output terminal of the second switch. The base of the first transistor is connected to the input terminal of the third switch, and its emitter is grounded.

[0015] In one possible implementation, the second switch further includes: a first diode, a second diode, a second resistor, and a third resistor.

[0016] The input terminal of the first diode is connected to the source of the second MOSFET, and the output terminal of the first diode is connected to the gate of the first MOSFET. The first terminal of the second resistor is connected to the base of the first transistor, and the second terminal of the second resistor is grounded. The input terminal of the second diode is connected to the source of the second MOSFET, and the output terminal of the second diode is connected to one end of the third resistor. The other end of the third resistor is connected to the base of the first transistor and the first terminal of the second resistor.

[0017] In one possible implementation, the second switch also includes a second transistor.

[0018] The collector of the second transistor is connected to the base of the first transistor, the emitter of the second transistor is grounded, and the base of the second transistor is connected to the input terminal of the third switch as the second input terminal of the second switch.

[0019] In one possible implementation, the second switch also includes a fourth resistor.

[0020] One end of the fourth resistor is connected to the base of the second transistor, and the other end is connected to the second input terminal of the second switch.

[0021] In one possible implementation, the third switch includes: a third MOSFET and a third transistor.

[0022] The source and base of the third MOSFET are the input terminals of the third MOSFET, the gate of the third MOSFET is connected to the collector of the third MOSFET, and the drain of the third MOSFET is the output terminal of the third switch.

[0023] In one possible implementation, the third switch also includes: a fifth resistor, a sixth resistor, and a third diode.

[0024] One end of the fifth resistor is connected to the source of the third MOSFET, and the other end of the fifth resistor is connected to the first end of the sixth resistor and the base of the third transistor. The second end of the sixth resistor is grounded. The input of the third diode is connected to the source of the third MOSFET, and the output of the third diode is connected to the second input of the first switch.

[0025] In a second aspect, a power control chip includes: a processor and a power control system as described in the first aspect.

[0026] The power control system and chip provided in this application embodiment, by setting three different switches, connects the input terminal of the second switch to the second input terminal of the first switch, and connects the input terminal of the third switch to the input terminals of the first and second switches. Thus, when there is voltage input at the input terminal of the third switch, the first and second switches are disconnected, and when there is voltage input at the first input terminal of the second switch and no voltage input at the input terminal of the third switch, the first switch is disconnected. This allows the voltage input to prioritize DC power input, followed by Universal Serial Bus power input, and finally battery power input. Since pure diode circuits are not used, voltage drop problems are avoided, and power can be supplied according to priority. Attached Figure Description

[0027] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0028] Figure 1 Schematic diagram of the power control system provided in this application Figure 1 ;

[0029] Figure 2 Schematic diagram of the power control system provided in this application Figure 2 .

[0030] Figure Labels

[0031] 100-Power Control System;

[0032] 101 - First Switch;

[0033] 102 - Second switch;

[0034] 103 - Third switch;

[0035] 1011 - First MOSFET;

[0036] 1012 - First resistor;

[0037] 1021 - Second MOSFET;

[0038] 1022 - First transistor;

[0039] 1023 - First diode;

[0040] 1024 - Second diode;

[0041] 1025 - Second resistor;

[0042] 1026 - Third resistor;

[0043] 1027 - Second transistor;

[0044] 1028 - Fourth resistor;

[0045] 1029 - First capacitor;

[0046] 1030 - Seventh Resistor;

[0047] 1031 - Third MOSFET;

[0048] 1032 - Third transistor;

[0049] 1033 - Fifth resistor;

[0050] 1034 - Sixth Resistor;

[0051] 1035 - Third Diode;

[0052] 1036 - Second capacitor;

[0053] 1037 - Eighth Resistor;

[0054] 104 - Third capacitor;

[0055] 105 - Ninth resistor.

[0056] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0057] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0058] Modern electronic devices increasingly require multiple power inputs, such as smartphones, tablets, laptops, wearable devices, and industrial control systems. These devices typically need to be compatible with various power input methods, including built-in batteries, external USB chargers, and DC adapters. In complex application scenarios, devices may switch to different power sources at any time—for example, while charging, they may be connected to both a USB port and a DC adapter simultaneously, or they may rely on battery power after the external power source is disconnected.

[0059] Currently, related technologies often use devices such as diodes and MOSFETs to achieve switching between different power supplies. However, the inventors have discovered that these technologies have significant drawbacks: when using diode circuits, their inherent forward voltage drop will cause the output voltage to be lower than the input voltage; if MOSFETs are used instead of diodes, it is difficult to select the power supply path according to the preset priority. When the voltages of multiple power supplies are close, it may also cause reverse current between power supplies (such as the battery discharging in reverse to the external interface), which not only wastes energy but may also damage the power interface or internal circuit due to overcurrent, significantly reducing the reliability of the equipment.

[0060] To address the aforementioned technical problems, the inventors propose the following technical concept: By setting different switches for power supplies with different priorities, the switch of the lower priority power supply is connected to the higher priority power supply. When a signal from the higher priority power supply is received, the lower priority switch is disconnected, thereby allowing the higher priority power supply to provide priority power.

[0061] The technical solution of this application and how the technical solution of this application solves the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will now be described with reference to the accompanying drawings.

[0062] Figure 1 Schematic diagram of the power control system provided in this application Figure 1 .like Figure 1 The power control system 100 includes:

[0063] First switch 101, second switch 102, third switch 103.

[0064] The first input terminal of the first switch 101 is the battery power input terminal of the power control system. The second input terminal of the first switch 101 is connected to the first input terminal of the second switch 102 and the input terminal of the third switch 103. The first input terminal of the second switch 102 is the universal serial bus power input terminal of the power control system. The second input terminal of the second switch 102 is connected to the input terminal of the third switch 103. The input terminal of the third switch 103 is the DC power input terminal. The output terminals of the first switch 101, the second switch 102, and the third switch 103 together serve as the output terminals of the power control system.

[0065] Specifically, if there is a voltage input at the second or third input terminal of the first switch 101, the first switch 101 is disconnected; if there is a voltage input at the second input terminal of the second switch 102, the second switch 102 is disconnected.

[0066] The second and third input terminals of the first switch can be the control terminals of the first switch, and the second input terminal of the second switch can be the control terminal of the second switch.

[0067] In one possible implementation, the first switch and the second switch can be relay switches. When the relay input voltage is applied to the first switch and the second switch, the first switch is open and the second switch is closed.

[0068] In one possible implementation, the output terminals of the first switch, the second switch, and the third switch are also connected to an RC parallel circuit.

[0069] As can be seen from the description of the above embodiments, the embodiments of this disclosure set up three different switches, and connected the input terminal of the second switch to the second input terminal of the first switch, and connected the input terminal of the third switch to the input terminals of the first switch and the second switch. Thus, when there is voltage input at the input terminal of the third switch, the first switch and the second switch are disconnected, and when there is voltage input at the first input terminal of the second switch and no voltage input at the input terminal of the third switch, the first switch is disconnected. This allows the voltage input to prioritize DC power input, followed by Universal Serial Bus power supply, and finally battery power input. Since pure diode circuits are not used, the problem of voltage drop is avoided, and power can be supplied according to priority.

[0070] Figure 2 Schematic diagram of the power control system provided in this application Figure 2 .like Figure 2 As shown, the first switch 101 includes: a first MOSFET 1011.

[0071] The source of the first MOSFET 1011 is the first input terminal of the first MOSFET 1011, the gate of the first MOSFET 1011 is the second input terminal of the first MOSFET 1011, and the drain of the first MOSFET 1011 is the output terminal of the first MOSFET 1011.

[0072] The first switch utilizes a MOSFET as its main component, avoiding the voltage drop caused by diodes and significantly reducing voltage drop and energy loss in the power supply path. Simultaneously, by controlling the on / off state through gate voltage, it can quickly respond to priority logic (such as cutting off battery power when an external power source is connected), balancing efficiency and control flexibility. When only battery power is input, the body diode of the first MOSFET conducts, the drain becomes high, there is no voltage input at the second input terminal (gate), and the first MOSFET conducts, thus outputting the battery voltage.

[0073] In one possible implementation, the first MOSFET also includes a first resistor 1012.

[0074] One end of the first resistor is connected to the gate of the first MOSFET, and the other end is grounded.

[0075] The first resistor can be used as a pull-down resistor for the gate of the first MOSFET to ensure the stability of the first MOSFET when there is no signal input. When the external power supply is not connected, there is no high-level signal at the gate, and the pull-down resistor pulls the gate voltage to ground potential, so that the first MOSFET meets the conduction condition and ensures that the battery power can output stably.

[0076] In one possible implementation, the second switch 102 includes a second MOSFET 1021 and a first transistor 1022.

[0077] The source of the second MOSFET is its first input terminal, its gate is connected to the collector of the first transistor, and its drain is the output terminal of the second switch. The base of the first transistor is connected to the input terminal of the third switch, and its emitter is grounded.

[0078] The second switch uses a combination of a transistor and a MOSFET to control the USB power supply, with the transistor acting as the driver for the MOSFET. When the DC power supply on the third switch side is not connected, the base of the first transistor has no voltage and is in the off state, while its collector is at a high level, giving the gate of the second MOSFET a conduction voltage. The USB power supply then supplies power to the load through the second MOSFET. When the DC power supply is connected, the base of the first transistor is energized and conducts, and its collector is pulled to ground. The gate voltage of the second MOSFET is insufficient, causing the second MOSFET to turn off, thus implementing the priority logic that prioritizes the DC power supply over the USB power supply.

[0079] In one possible implementation, the second switch further includes: a first diode 1023, a second diode 1024, a second resistor 1025, and a third resistor 1026.

[0080] The first diode and the second diode can be Schottky diodes.

[0081] The input terminal of the first diode is connected to the source of the second MOSFET, and the output terminal of the first diode is connected to the gate of the first MOSFET. The first terminal of the second resistor is connected to the base of the first transistor, and the second terminal of the second resistor is grounded. The input terminal of the second diode is connected to the source of the second MOSFET, and the output terminal of the second diode is connected to one end of the third resistor. The other end of the third resistor is connected to the base of the first transistor and the first terminal of the second resistor.

[0082] The first diode, second diode, second resistor, and third resistor are used to optimize the stability of the second switch. The second resistor acts as a pull-down resistor for the base of the first transistor, ensuring the transistor is in the off state when there is no control signal. The first diode prevents the first switch from inputting current to the second MOSFET, avoiding interference with the control logic of the second switch, and also prevents the first switch from outputting current to the USB power supply. This prevents reverse current from the USB power supply to the control circuit, thus avoiding interference with the control logic. The third resistor limits the current flowing into the base of the transistor, preventing overcurrent damage to the transistor.

[0083] In one possible implementation, the second switch also includes a second transistor 1027.

[0084] The collector of the second transistor is connected to the base of the first transistor, the emitter of the second transistor is grounded, and the base of the second transistor is connected to the input terminal of the third switch as the second input terminal of the second switch.

[0085] The second transistor is used to enhance the control effect of DC input to shut down the USB power. When the DC power is connected, the base of the second transistor is energized, causing the second transistor to conduct. Its collector is pulled to ground potential, which pulls down the base voltage of the first transistor, causing the first transistor to turn off, and thus causing the second MOSFET to turn off.

[0086] As can be seen from the description of the above embodiments, the present disclosure embodiments can amplify the control signal of DC input through this transistor cascade design. Even if the DC input voltage is low, it can ensure that the first transistor is cut off, avoid the USB power supply being in the conducting state when DC is connected, and improve the reliability of priority control.

[0087] In one possible implementation, the second switch also includes a fourth resistor 1028.

[0088] One end of the fourth resistor is connected to the base of the second transistor, and the other end is connected to the second input terminal of the second switch.

[0089] The fourth resistor can be the base current limiting resistor of the second transistor. When a DC power supply is connected, the voltage is applied to the base of the second transistor through the fourth resistor. The fourth resistor can limit the base current, ensuring that the current is within the safe operating range of the transistor. At the same time, the resistor can filter high-frequency noise in the DC current input, preventing noise from causing the second transistor to conduct incorrectly, and ensuring the stability of the control logic.

[0090] When both battery power and USB power are input simultaneously, the USB power supply pulls the gate level of the first MOSFET high through the diode, causing the first MOSFET to turn off. The USB power supply then pulls the base level of the first transistor high, turning the first transistor on. At this time, the gate of the third transistor is grounded, turning the third transistor on. The second switch outputs the voltage of the USB power supply.

[0091] In one possible implementation, the third switch includes: a third MOSFET 1031 and a third transistor 1032.

[0092] The source and base of the third MOSFET are the input terminals of the third MOSFET. The gate and collector of the third MOSFET are connected. The drain of the third MOSFET is the output terminal of the third switch. The input terminal of the third diode is connected to the source of the third MOSFET. The output terminal of the third diode is connected to the second input terminal of the first switch.

[0093] The third switch employs a transistor-driven MOSFET structure to control the on / off state of the DC power supply. When DC is applied, the base of the third transistor is energized and conducts, while the collector is pulled to ground potential, giving the gate of the third MOSFET a conduction voltage. The DC power supply then supplies power to the load through the third MOSFET.

[0094] As described in the above embodiments, this embodiment directly controls the shutdown of the preceding switch through the input terminal of the third switch, thereby ensuring that the DC power supply, as the highest priority, can quickly cut off other power paths upon connection, avoiding conflicts. The function of the second transistor is similar to that of the first diode, and will not be repeated here.

[0095] In one possible implementation, the third switch also includes: a fifth resistor 1033, a sixth resistor 1034, and a third diode 1035.

[0096] One end of the fifth resistor is connected to the source of the third MOSFET, and the other end of the fifth resistor is connected to the first end of the sixth resistor and the base of the third transistor. The second end of the sixth resistor is grounded. The input of the third diode is connected to the source of the third MOSFET, and the output of the third diode is connected to the second input of the first switch.

[0097] The DC input voltage is divided by two resistors and then applied to the base of the third transistor. This ensures that the third transistor turns on when the voltage reaches the transistor's turn-on threshold, while preventing excessively high voltage from being applied directly to the base and causing damage. The fifth resistor also filters out DC input voltage fluctuations, making the third transistor's state more stable, thereby ensuring reliable switching of the third MOSFET and improving the stability of the DC power supply.

[0098] When three power supplies are connected simultaneously, the DC power supply pulls the base level of the third transistor high, turning it on. The gate of the third MOSFET is grounded, turning it on as well. At the same time, the DC power supply turns off the first and second MOSFETs by pulling their gate levels high.

[0099] All three MOSFETs are PMOS transistors, with their sources connected to the power supply and their drains connected to the load. Therefore, the residual voltage at the load end will not flow back to the power supply through the body diode of the MOSFET.

[0100] In one possible implementation, the second switch 102 further includes a first capacitor 1029 and a seventh resistor 1030. The first terminal of the first capacitor is connected to the gate of the second MOSFET, and the second terminal of the first capacitor is connected to the drain of the second MOSFET. The first terminal of the seventh resistor is connected to the gate of the second MOSFET, and the second terminal of the seventh resistor is connected to the drain of the second MOSFET.

[0101] In one possible implementation, the third switch 103 further includes a second capacitor 1036 and an eighth resistor 1037. The first terminal of the second capacitor is connected to the gate of the second MOSFET, and the second terminal of the second capacitor is connected to the drain of the second MOSFET. The first terminal of the eighth resistor is connected to the gate of the second MOSFET, and the second terminal of the eighth resistor is connected to the drain of the second MOSFET.

[0102] The first and second capacitors can prevent voltage drops during power switching.

[0103] In one possible implementation, the power control system 100 further includes a third capacitor 104 and a ninth resistor 105.

[0104] One end of the third capacitor is connected to the output terminal of the first switch, and the other end is grounded. The first end of the ninth resistor is also connected to the output terminal of the first switch, and the other end is grounded. By adding the third capacitor and the ninth resistor, filtering and voltage regulation are achieved. The capacitor can smooth the voltage through rapid charging and discharging when the power supply's output voltage fluctuates, ensuring a stable DC voltage at the load end and preventing voltage fluctuations from affecting the load's operational stability.

[0105] In the above embodiments, the resistance values ​​of the first resistor 1012, the third resistor 1026, the fourth resistor 1028, and the fifth resistor 1033 are, for example, 1100Ω, 1000Ω, and 900Ω, respectively; the resistance values ​​of the second resistor 1025, the sixth resistor, the seventh resistor, the eighth resistor, and the ninth resistor are, for example, 10000Ω, 11000Ω, and 9000Ω, respectively. The capacitance values ​​of the first capacitor 1029 and the second capacitor 1036 are, for example, 19 nanofarads, 20 nanofarads, and 25 nanofarads, respectively; and the capacitance of the third capacitor is, for example, 5 microfarads, 10 microfarads, and 12 microfarads, respectively.

[0106] This application also provides a power control chip. The power control chip may include a processor and a power control system as described in any of the above embodiments.

[0107] The above description is merely a preferred embodiment of this application and an explanation of the technical principles employed. Those skilled in the art should understand that the scope of disclosure in this application is not limited to technical solutions formed by specific combinations of the above-described technical features, but should also cover other technical solutions formed by arbitrary combinations of the above-described technical features or their equivalents without departing from the above-described concept. For example, technical solutions formed by substituting the above features with (but not limited to) technical features with similar functions disclosed in this application.

[0108] Those skilled in the art will understand that all or part of the steps of the above-described method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When executed, the program performs the steps of the above-described method embodiments; and the aforementioned storage medium includes various media capable of storing program code, such as ROM, RAM, magnetic disks, or optical disks.

[0109] Finally, it should be noted that other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This invention is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein, and is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of the invention is limited only by the appended claims.

Claims

1. A power supply control system, characterized in that, include: First switch, second switch, third switch; The first input terminal of the first switch is the battery power input terminal of the power control system; the second input terminal of the first switch is connected to the first input terminal of the second switch and the input terminal of the third switch; the first input terminal of the second switch is the universal serial bus power input terminal of the power control system; the second input terminal of the second switch is connected to the input terminal of the third switch; the input terminal of the third switch is a DC power input terminal; the output terminals of the first switch, the second switch, and the third switch together serve as the output terminal of the power control system. Specifically, if there is a voltage input at the second or third input terminal of the first switch, the first switch is disconnected; if there is a voltage input at the second input terminal of the second switch, the second switch is disconnected.

2. The system according to claim 1, characterized in that, The first switch includes: a first MOSFET; The source of the first MOSFET is the first input terminal of the first MOSFET, the gate of the first MOSFET is the second input terminal of the first MOSFET, and the drain of the first MOSFET is the output terminal of the first MOSFET.

3. The system according to claim 2, characterized in that, The first MOSFET also includes a first resistor; One end of the first resistor is connected to the gate of the first MOS transistor, and the other end is grounded.

4. The system according to claim 2, characterized in that, The second switch includes a second MOSFET and a first transistor; The source of the second MOSFET is the first input terminal of the second MOSFET, the gate of the second MOSFET is connected to the collector of the first transistor, and the drain of the second MOSFET is the output terminal of the second switch; the base of the first transistor is connected to the input terminal of the third switch, and the emitter of the first transistor is grounded.

5. The system according to claim 4, characterized in that, The second switch also includes: a first diode, a second diode, a second resistor, and a third resistor; The input terminal of the first diode is connected to the source of the second MOSFET, and the output terminal of the first diode is connected to the gate of the first MOSFET; the first terminal of the second resistor is connected to the base of the first transistor, the second terminal of the second resistor is grounded, the input terminal of the second diode is connected to the source of the second MOSFET, the output terminal of the second diode is connected to one end of the third resistor, and the other end of the third resistor is connected to the base of the first transistor and the first terminal of the second resistor.

6. The system according to claim 4, characterized in that, The second switch further includes: a second transistor; The collector of the second transistor is connected to the base of the first transistor, the emitter of the second transistor is grounded, and the base of the second transistor is connected to the input terminal of the third switch as the second input terminal of the second switch.

7. The system according to claim 6, characterized in that, The second switch further includes: a fourth resistor; One end of the fourth resistor is connected to the base of the second transistor, and the other end is connected to the second input terminal of the second switch.

8. The system according to claim 1, characterized in that, The third switch includes: a third MOSFET and a third transistor; The source and base of the third MOS transistor are the input terminals of the third MOS transistor, the gate of the third MOS transistor is connected to the collector of the third transistor, and the drain of the third MOS transistor is the output terminal of the third switch.

9. The system according to claim 8, characterized in that, The third switch further includes: a fifth resistor, a sixth resistor, and a third diode; One end of the fifth resistor is connected to the source of the third MOS transistor, the other end of the fifth resistor is connected to the first end of the sixth resistor and the base of the third transistor, the second end of the sixth resistor is grounded, the input end of the third diode is connected to the source of the third MOS transistor, and the output end of the third diode is connected to the second input end of the first switch.

10. A power control chip, characterized in that, include: The processor and the power control system as described in any one of claims 1 to 9.

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