Energy storage battery alternating current output topology circuit and control method

Abstract

The invention relates to an energy storage battery alternating current output topology circuit which comprises a positive polarity series battery pack, a negative polarity series battery pack and a load R. The positive polarity series battery pack and the negative polarity series battery pack provide positive and negative half-cycle alternating current voltage for the load R. The positive polarity series battery pack is formed by connecting a plurality of positive voltage output units in series. The negative polarity series battery pack is formed by connecting a plurality of negative voltage output units in series. Through the unique circuit design, each battery unit can realize equalization while outputting the step voltage, and each battery unit can automatically adjust the charging and discharging process according to the own state when outputting the step voltage, so that the discharging depth of each battery tends to be consistent, and the charging and discharging efficiency is improved. The overall performance reduction caused by excessive discharge of part of batteries is avoided, the service life of the battery pack is greatly prolonged, the battery replacement frequency and cost are reduced, the economical efficiency of the energy storage system is improved, and the available capacity of the battery pack is effectively improved.

Description

Technical Field

[0001] This invention relates to the field of energy storage battery technology, and in particular to an AC output topology circuit and control method for an energy storage battery. Background Technology

[0002] Energy storage batteries can facilitate the absorption of new energy sources and participate in grid regulation, thus finding widespread application in new energy power generation and energy storage. Since energy storage batteries output direct current (DC), they require an AC / DC converter to connect to AC loads. Current technologies use dynamic switching of series-connected battery packs to output stepped voltages to simulate AC. However, even with highly consistent individual cells, the stepped output after assembly results in varying depths of discharge, leading to imbalances. Traditional balancing techniques are no longer applicable.

[0003] In existing AC output technologies for energy storage batteries, even if individual cells are highly consistent in their initial state, their depths of discharge differ during stepped output. This inconsistency in depth of discharge accelerates battery aging and shortens overall battery life. Secondly, traditional equalization technologies primarily target voltage equalization among individual cells within a battery pack, using energy transfer or dissipation to bring their voltages closer together. However, in scenarios involving dynamic switching and stepped voltage output of series-connected battery packs, traditional equalization technologies struggle to effectively address the issue of varying depths of discharge. This is because traditional equalization techniques often operate in a relatively static state, while voltage and current changes rapidly during dynamic switching. Traditional equalization technologies cannot respond to these changes promptly and accurately, thus failing to achieve effective equalization. When some cells in a series-connected battery pack reach their cutoff voltage prematurely due to excessive depth of discharge, the overall output capacity of the battery pack is severely affected. To protect these prematurely cutoff cells, the system must reduce its output voltage or stop output altogether. This not only reduces system reliability and stability but also limits the application scope of energy storage batteries in new energy power generation and energy storage. Summary of the Invention

[0004] To address the issue of varying depths of discharge due to stepped output when batteries are connected in series, the primary objective of this invention is to provide an AC output topology circuit for energy storage batteries that balances the output voltage of each battery cell while ensuring a consistent depth of discharge for each battery.

[0005] To achieve the above objectives, the present invention adopts the following technical solution: an AC output topology circuit for an energy storage battery, comprising a positive polarity series battery pack, a negative polarity series battery pack, and a load R. The positive polarity series battery pack and the negative polarity series battery pack respectively provide positive and negative half-cycle AC voltages to the load R. The positive polarity series battery pack is composed of multiple positive voltage output units connected in series, and the negative polarity series battery pack is composed of multiple negative voltage output units connected in series.

[0006] The positive voltage output unit includes a first positive voltage output unit, a second positive voltage output unit to an Nth positive voltage output unit, and the first positive voltage output unit includes a first positive voltage battery pack u. 1p The first positive voltage battery pack u 1p The positive terminals are connected to the load R and the high-power diode D, respectively. 1pA The cathode is connected, and the power transistor S 1pA With high power diode D 1pA Parallel connection, high-power diode D 1pA The anodes are respectively connected to the inductor L 1p High-power diode D 1pE The cathode is connected, and the power transistor S 1pE With high power diode D 1pE Parallel connection, high-power diode D 1pE The anode and high-power diode D 1pD The anode is connected, and the power transistor S 1pD With high power diode D 1pD Parallel connection, high-power diode D 1pD The cathodes are respectively connected to the inductor L 1p The other end, high-power diode D 1pC The cathode is connected, and the power transistor S 1pC With high power diode D 1pC Parallel connection, high-power diode D 1pC The anode and high-power diode D 1pB The anode is connected, and the power transistor S 1pB With high power diode D 1pB Parallel connection, high-power diode D 1pB The cathode and the first positive voltage battery pack u 1p The negative terminal is connected.

[0007] The negative voltage output unit includes a first negative voltage output unit, a second negative voltage output unit to an Nth negative voltage output unit, and the first negative voltage output unit includes a first negative voltage battery pack u. 1n The first negative voltage battery pack u 1n The positive terminals are connected to the load R and the high-power diode D, respectively. 1nA The cathode is connected, and the power transistor S 1nA With high power diode D1nA Parallel connection, high-power diode D 1nA The anodes are respectively connected to the inductor L 1n High-power diode D 1nE The cathode is connected, and the power transistor S 1nE With high power diode D 1nE Parallel connection, high-power diode D 1nE The anode and high-power diode D 1nD The anode is connected, and the power transistor S 1nD With high power diode D 1nD Parallel connection, high-power diode D 1nD The cathodes are respectively connected to the inductor L 1n The other end, high-power diode D 1nC The cathode is connected, and the power transistor S 1nC With high power diode D 1nC Parallel connection, high-power diode D 1nC The anode and high-power diode D 1nB The anode is connected, and the power transistor S 1nB With high power diode D 1nB Parallel connection, high-power diode D 1nB The cathode and the first negative voltage battery pack u 1n The negative terminal is connected.

[0008] The second positive voltage output unit includes a second positive voltage battery pack u 2p The second positive voltage battery pack u 2p The positive terminals are respectively connected to the high-power diode D. 1pC Cathode, Inductor L 1p High-power diode D 1pD The cathode is connected, and the power transistor S 1pD With high power diode D 1pD Parallel connection, high-power diode D 1pD The anode and high-power diode D 1pE The anode is connected, and the power transistor S 1pE With high power diode D 1pE Parallel connection, high-power diode D 1pE The cathodes are respectively connected to the inductor L 1p The other end, high-power diode D 2pA The cathode is connected, and the power transistor S 2pA With high power diode D 2pA Parallel connection, high-power diode D 2pA The anodes are respectively connected to the inductor L 2p High-power diode D 2pE The cathode is connected, and the power transistor S 2pE With high power diode D 2pE Parallel connection, high-power diode D2pE The anode and high-power diode D 2pD The anode is connected, and the power transistor S 2pD With high power diode D 2pD Parallel connection, high-power diode D 2pD The cathodes are respectively connected to the inductor L 2p The other end, high-power diode D 2pC The cathode is connected, and the power transistor S 2pC With high power diode D 2pC Parallel connection, high-power diode D 2pC The anode and high-power diode D 2pB The anode is connected, and the power transistor S 2pB With high power diode D 2pB Parallel connection, high-power diode D 2pB The cathode and the second positive voltage battery pack u 2p The negative terminal is connected.

[0009] The Nth positive voltage output unit includes the Nth positive voltage battery pack u Np The Nth positive voltage battery pack u Np The positive terminals are respectively connected to the high-power diode D. （N-1）pC Cathode, Inductor L （N-1）p High-power diode D （N-1）pD The cathode is connected, and the power transistor S （N-1）pD With high power diode D （N-1）pD Parallel connection, high-power diode D （N-1）pD The anode and high-power diode D （N-1）pE The anode is connected, and the power transistor S （N-1）pE With high power diode D （N-1）pE Parallel connection, high-power diode D （N-1）pE The cathodes are respectively connected to the inductor L （N-1）p The other end, high-power diode D NpA The cathode is connected, and the power transistor S NpA With high power diode D NpA Parallel connection, high-power diode D NpA The anode and high-power diode D NpC The cathode is connected, and the power transistor S NpC With high power diode D NpC Parallel connection, high-power diode D NpC The anode and high-power diode D NpB The anode is connected, and the power transistor S NpB With high power diode D NpB Parallel connection, high-power diode D NpB The cathode and the Nth positive voltage battery pack u Np The negative terminal is connected.

[0010] The second negative voltage output unit includes a second negative voltage battery pack u 2n The second negative voltage battery pack u 2n The positive terminals are respectively connected to the high-power diode D. 1nC Cathode, Inductor L 1n High-power diode D 1nD The cathode is connected, and the power transistor S 1nD With high power diode D 1nD Parallel connection, high-power diode D 1nD The anode and high-power diode D 1nE The anode is connected, and the power transistor S 1nE With high power diode D 1nE Parallel connection, high-power diode D 1nE The cathodes are respectively connected to the inductor L 1n The other end, high-power diode D 2nA The cathode is connected, and the power transistor S 2nA With high power diode D 2nA Parallel connection, high-power diode D 2nA The anodes are respectively connected to the inductor L 2n High-power diode D 2nE The cathode is connected, and the power transistor S 2nE With high power diode D 2nE Parallel connection, high-power diode D 2nE The anode and high-power diode D 2nD The anode is connected, and the power transistor S 2nD With high power diode D 2nD Parallel connection, high-power diode D 2nD The cathodes are respectively connected to the inductor L 2n The other end, high-power diode D 2nC The cathode is connected, and the power transistor S 2nC With high power diode D 2nC Parallel connection, high-power diode D 2nC The anode and high-power diode D 2nB The anode is connected, and the power transistor S 2nB With high power diode D 2nB Parallel connection, high-power diode D 2nB The cathode and the second negative voltage battery pack u 2n The negative terminal is connected; the circuit of the Nth negative voltage output unit is the same as that of the second negative voltage output unit.

[0011] The Nth negative voltage output unit includes the Nth negative voltage battery pack u Nn The Nth negative voltage battery pack u Nn The positive terminals are respectively connected to the high-power diode D. （N-1）nC Cathode, Inductor L （N-1）n High-power diode D（N-1）nD The cathode is connected, and the power transistor S （N-1）nD With high power diode D （N-1）nD Parallel connection, high-power diode D （N-1）nD The anode and high-power diode D （N-1）nE The anode is connected, and the power transistor S （N-1）nE With high power diode D （N-1）nE Parallel connection, high-power diode D （N-1）nE The cathodes are respectively connected to the inductor L （N-1）n The other end, high-power diode D NnA The cathode is connected, and the power transistor S NnA With high power diode D NnA Parallel connection, high-power diode D NnA The anode and high-power diode D NnC The cathode is connected, and the power transistor S NnC With high power diode D NnC Parallel connection, high-power diode D NnC The anode and high-power diode D NnB The anode is connected, and the power transistor S NnB With high power diode D NnB Parallel connection, high-power diode D NnB The cathode and the Nth negative voltage battery pack u Nn The negative terminal is connected.

[0012] Another object of the present invention is to provide a control method for an AC output topology circuit of an energy storage battery, the method comprising the following sequential steps:

[0013] (1) The positive half-cycle power supply specifically includes the following steps:

[0014] (1a) For u 1p ~u Np Simultaneous series connection for voltage supply:

[0015] At times t4~t5, u 1p Discharging to other batteries, wherein the other batteries refer to those in u 1p ~u Np In addition to u 1p Other batteries; to avoid inductance L 1p If bypassed, S needs to be turned off. 1pD , that is, d 1pD When it is low, S 1pA By pulse width modulation, high-frequency switching is achieved when d 1pA When it is high, u 1p Give L 1p Charging, when d 1pA When L is low 1p give u 2p ~uNp Charging is required at this time, and S needs to be controlled. 2pB ~S NpB The circuit is turned on to form a charging loop, therefore the signal d during the time period t3~t5 2pB ~d NpB With d 1pA Complementary;

[0016] (1b) For u 2p ~u Np Simultaneous series connection for voltage supply:

[0017] At times t3~t4 and t5~t6, by u 2p to u 3p ~u Np Discharge, at this time u 1p Discharge is not allowed, otherwise the series output voltage will be superimposed. 1p Stepped output cannot be achieved; during the time intervals t3~t4 and t5~t6, d 3pB ~d NpB With d 2pA Complementary, d 2pA When it is high, u 2p Give L 2p Charging, when d 2pA When L is low 2p give u 3p ~u Np Charge;

[0018] (1c) For u 3p ~u Np Simultaneous series connection for voltage supply:

[0019] At times t2~t3 and t6~t7, by u 3p to u 4p ~u Np Discharge, at this time u 1p and u 2p Discharge is not allowed, otherwise the series output voltage will be superimposed. 1p and u 2p Stepped output cannot be achieved; during the time intervals t2~t3 and t6~t7, d 4pB ~d NpB With d 3pA Complementary, d 3pA When it is high, u 3p Give L 3p Charging, when d 3pA When L is low 3p give u 4p ~u Np Charge;

[0020] (1d)u 4p~u Np Simultaneously connected in series all the way to u Np A separate power supply provides the voltage;

[0021] (2) The negative half-cycle power supply specifically includes the following steps:

[0022] (2a)u 1n ~u Nn Simultaneous series connection for voltage supply:

[0023] To avoid inductance L 1n Bypassing, S needs to be turned off 1nD , that is, d 1nD When it is low, S 1nA By pulse width modulation, high-frequency switching is achieved when d 1nA When it is high, u 1n Give L 1n Charging, when d 1nA When L is low 1n give u 2n ~u Nn Charging requires controlling S. 2nB ~S NnB The circuit is turned on to form a charging loop, therefore the signal d during the time period t3~t5 2nB ~d NnB With d 1nA Complementary;

[0024] (2b)u 2n ~u Nn Simultaneous series connection for voltage supply:

[0025] At times t3~t4 and t5~t6, by u 2n to u 3n ~u Nn Discharge, at this time u 1n Discharge is not allowed, otherwise the series output voltage will be superimposed. 1n Stepped output cannot be achieved; during the time intervals t3~t4 and t5~t6, d 3nB ~d NnB With d 2nA Complementary, d 2nA When it is high, u 2n Give L 2n Charging, when d 2nA When L is low 2n give u 3n ~u Nn Charge;

[0026] (2c) For u 3n ~u Nn Simultaneous series connection for voltage supply:

[0027] At times t2~t3 and t6~t7, by u 3n to u 4n ~u Nn Discharge, at this time u 1n and u 2n Discharge is not allowed, otherwise the series output voltage will be superimposed. 1n and u 2n Stepped output cannot be achieved; during the time intervals t2~t3 and t6~t7, d 4nB ~d NnB With d 3nA Complementary, d 3nA When it is high, u 3n Give L 3n Charging, when d 3nA When L is low 3n give u 4n ~u Nn Charge;

[0028] (2d)u 4n ~u Nn Simultaneously connected in series all the way to u Nn A separate power supply provides the voltage.

[0029] As can be seen from the above technical solution, the beneficial effects of the present invention are as follows: First, the battery directly provides AC multi-level voltage, eliminating the need for an AC / DC converter to achieve AC-DC conversion, reducing energy loss during the conversion process, saving the volume and cost of the energy storage system, and providing high output voltage accuracy and stability. Due to the adoption of precise control strategies and reasonable circuit layout, the fluctuation and distortion of output voltage can be effectively reduced, providing high-quality power to AC loads and meeting the application scenarios with high power quality requirements. Second, through unique circuit design, each battery cell can achieve balance while outputting stepped voltage. When outputting stepped voltage, each battery cell can automatically adjust the charging and discharging process according to its own state, making the depth of discharge of each battery tend to be consistent, avoiding the overall performance degradation caused by over-discharging of some batteries, greatly extending the service life of the battery pack, reducing the frequency and cost of battery replacement, improving the economy of the energy storage system, and effectively increasing the usable capacity of the battery pack. Attached Figure Description

[0030] Figure 1 This is a topology circuit diagram of the present invention;

[0031] Figure 2 This is a schematic diagram of the synchronous control logic for the power transistor. Detailed Implementation

[0032] like Figure 1As shown, an AC output topology circuit for an energy storage battery includes a positive series battery pack, a negative series battery pack, and a load R. The positive series battery pack and the negative series battery pack provide positive and negative half-cycle AC voltages to the load R, respectively. The positive series battery pack is composed of multiple positive voltage output units connected in series, and the negative series battery pack is composed of multiple negative voltage output units connected in series.

[0033] The positive voltage output unit includes a first positive voltage output unit, a second positive voltage output unit to an Nth positive voltage output unit, and the first positive voltage output unit includes a first positive voltage battery pack u. 1p The first positive voltage battery pack u 1p The positive terminals are connected to the load R and the high-power diode D, respectively. 1pA The cathode is connected, and the power transistor S 1pA With high power diode D 1pA Parallel connection, high-power diode D 1pA The anodes are respectively connected to the inductor L 1p High-power diode D 1pE The cathode is connected, and the power transistor S 1pE With high power diode D 1pE Parallel connection, high-power diode D 1pE The anode and high-power diode D 1pD The anode is connected, and the power transistor S 1pD With high power diode D 1pD Parallel connection, high-power diode D 1pD The cathodes are respectively connected to the inductor L 1p The other end, high-power diode D 1pC The cathode is connected, and the power transistor S 1pC With high power diode D 1pC Parallel connection, high-power diode D 1pC The anode and high-power diode D 1pB The anode is connected, and the power transistor S 1pB With high power diode D 1pB Parallel connection, high-power diode D 1pB The cathode and the first positive voltage battery pack u 1p The negative terminal is connected.

[0034] The negative voltage output unit includes a first negative voltage output unit, a second negative voltage output unit to an Nth negative voltage output unit, and the first negative voltage output unit includes a first negative voltage battery pack u. 1n The first negative voltage battery pack u 1n The positive terminals are connected to the load R and the high-power diode D, respectively. 1nA The cathode is connected, and the power transistor S 1nA With high power diode D 1nA Parallel connection, high-power diode D1nA The anodes are respectively connected to the inductor L 1n High-power diode D 1nE The cathode is connected, and the power transistor S 1nE With high power diode D 1nE Parallel connection, high-power diode D 1nE The anode and high-power diode D 1nD The anode is connected, and the power transistor S 1nD With high power diode D 1nD Parallel connection, high-power diode D 1nD The cathodes are respectively connected to the inductor L 1n The other end, high-power diode D 1nC The cathode is connected, and the power transistor S 1nC With high power diode D 1nC Parallel connection, high-power diode D 1nC The anode and high-power diode D 1nB The anode is connected, and the power transistor S 1nB With high power diode D 1nB Parallel connection, high-power diode D 1nB The cathode and the first negative voltage battery pack u 1n The negative terminal is connected.

[0035] The power transistor in this invention can be any one of a MOSFET, an IGBT, or a BJT.

[0036] The second positive voltage output unit includes a second positive voltage battery pack u 2p The second positive voltage battery pack u 2p The positive terminals are respectively connected to the high-power diode D. 1pC Cathode, Inductor L 1p High-power diode D 1pD The cathode is connected, and the power transistor S 1pD With high power diode D 1pD Parallel connection, high-power diode D 1pD The anode and high-power diode D 1pE The anode is connected, and the power transistor S 1pE With high power diode D 1pE Parallel connection, high-power diode D 1pE The cathodes are respectively connected to the inductor L 1p The other end, high-power diode D 2pA The cathode is connected, and the power transistor S 2pA With high power diode D 2pA Parallel connection, high-power diode D 2pA The anodes are respectively connected to the inductor L 2p High-power diode D 2pE The cathode is connected, and the power transistor S 2pEWith high power diode D 2pE Parallel connection, high-power diode D 2pE The anode and high-power diode D 2pD The anode is connected, and the power transistor S 2pD With high power diode D 2pD Parallel connection, high-power diode D 2pD The cathodes are respectively connected to the inductor L 2p The other end, high-power diode D 2pC The cathode is connected, and the power transistor S 2pC With high power diode D 2pC Parallel connection, high-power diode D 2pC The anode and high-power diode D 2pB The anode is connected, and the power transistor S 2pB With high power diode D 2pB Parallel connection, high-power diode D 2pB The cathode and the second positive voltage battery pack u 2p The negative terminal is connected.

[0037] The Nth positive voltage output unit includes the Nth positive voltage battery pack u Np The Nth positive voltage battery pack u Np The positive terminals are respectively connected to the high-power diode D. （N-1）pC Cathode, Inductor L （N-1）p High-power diode D （N-1）pD The cathode is connected, and the power transistor S （N-1）pD With high power diode D （N-1）pD Parallel connection, high-power diode D （N-1）pD The anode and high-power diode D （N-1）pE The anode is connected, and the power transistor S （N-1）pE With high power diode D （N-1）pE Parallel connection, high-power diode D （N-1）pE The cathodes are respectively connected to the inductor L （N-1）p The other end, high-power diode D NpA The cathode is connected, and the power transistor S NpA With high power diode D NpA Parallel connection, high-power diode D NpA The anode and high-power diode D NpC The cathode is connected, and the power transistor S NpC With high power diode D NpC Parallel connection, high-power diode D NpC The anode and high-power diode D NpB The anode is connected, and the power transistor S NpB With high power diode D NpB Parallel connection, high-power diode D NpB The cathode and the Nth positive voltage battery pack u NpThe negative terminal is connected.

[0038] The second negative voltage output unit includes a second negative voltage battery pack u 2n The second negative voltage battery pack u 2n The positive terminals are respectively connected to the high-power diode D. 1nC Cathode, Inductor L 1n High-power diode D 1nD The cathode is connected, and the power transistor S 1nD With high power diode D 1nD Parallel connection, high-power diode D 1nD The anode and high-power diode D 1nE The anode is connected, and the power transistor S 1nE With high power diode D 1nE Parallel connection, high-power diode D 1nE The cathodes are respectively connected to the inductor L 1n The other end, high-power diode D 2nA The cathode is connected, and the power transistor S 2nA With high power diode D 2nA Parallel connection, high-power diode D 2nA The anodes are respectively connected to the inductor L 2n High-power diode D 2nE The cathode is connected, and the power transistor S 2nE With high power diode D 2nE Parallel connection, high-power diode D 2nE The anode and high-power diode D 2nD The anode is connected, and the power transistor S 2nD With high power diode D 2nD Parallel connection, high-power diode D 2nD The cathodes are respectively connected to the inductor L 2n The other end, high-power diode D 2nC The cathode is connected, and the power transistor S 2nC With high power diode D 2nC Parallel connection, high-power diode D 2nC The anode and high-power diode D 2nB The anode is connected, and the power transistor S 2nB With high power diode D 2nB Parallel connection, high-power diode D 2nB The cathode and the second negative voltage battery pack u 2n The negative terminal is connected; the circuit of the Nth negative voltage output unit is the same as that of the second negative voltage output unit.

[0039] The Nth negative voltage output unit includes the Nth negative voltage battery pack u Nn The Nth negative voltage battery pack u Nn The positive terminals are respectively connected to the high-power diode D.（N-1）nC Cathode, Inductor L （N-1）n High-power diode D （N-1）nD The cathode is connected, and the power transistor S （N-1）nD With high power diode D （N-1）nD Parallel connection, high-power diode D （N-1）nD The anode and high-power diode D （N-1）nE The anode is connected, and the power transistor S （N-1）nE With high power diode D （N-1）nE Parallel connection, high-power diode D （N-1）nE The cathodes are respectively connected to the inductor L （N-1）n The other end, high-power diode D NnA The cathode is connected, and the power transistor S NnA With high power diode D NnA Parallel connection, high-power diode D NnA The anode and high-power diode D NnC The cathode is connected, and the power transistor S NnC With high power diode D NnC Parallel connection, high-power diode D NnC The anode and high-power diode D NnB The anode is connected, and the power transistor S NnB With high power diode D NnB Parallel connection, high-power diode D NnB The cathode and the Nth negative voltage battery pack u Nn The negative terminal is connected.

[0040] This control method includes the following steps in sequence:

[0041] (1) The positive half-cycle power supply specifically includes the following steps:

[0042] (1a) For u 1p ~u Np Simultaneous series connection for voltage supply:

[0043] At times t4~t5, u 1p Discharging to other batteries, wherein the other batteries refer to those in u 1p ~u Np In addition to u 1p Other batteries; to avoid inductance L 1p If bypassed, S needs to be turned off. 1pD , that is, d 1pD For low level, d 1pD For S 1pD The control signal, and so on; at this time S 1pA By pulse width modulation, high-frequency switching is achieved when d 1pA When it is high, u 1p Give L 1p Charging, when d1pA When L is low 1p give u 2p ~u Np Charging is required at this time, and S needs to be controlled. 2pB ~S NpB The circuit is turned on to form a charging loop, therefore the signal d during the time period t3~t5 2pB ~d NpB With d 1pA Complementary; d 1pA For S 1pA Control signals;

[0044] Since the time intervals t0~t1 and t7~t8 are completely symmetrical, as are t1~t2 and t6~t7, t2~t3 and t5~t6, and t3~t4 and t4~t5, we only need to analyze the time interval t0~t4. Let the duration of t3~t4 be Δt1, the duration of t2~t3 be Δt2, and the duration of t0~t1 be Δt. N Then Δti (i=1~N) can be calculated by the following formula:

[0045] ;

[0046] Among them, U ac θ is the amplitude of the equivalent AC voltage; θ is the phase of the output voltage; N is the number of series connections; u jP Let j be the j-th positive voltage battery pack.

[0047] (1b) For u 2p ~u Np Simultaneous series connection for voltage supply:

[0048] At times t3~t4 and t5~t6, by u 2p to u 3p ~u Np Discharge, at this time u 1p Discharge is not allowed, otherwise the series output voltage will be superimposed. 1p Stepped output cannot be achieved; during the time intervals t3~t4 and t5~t6, d 3pB ~d NpB With d 2pA Complementary, d 2pA When it is high, u 2p Give L 2p Charging, when d 2pA When L is low 2p give u 3p ~u Np Charge;

[0049] (1c) For u 3p ~u NpSimultaneous series connection for voltage supply:

[0050] At times t2~t3 and t6~t7, by u 3p to u 4p ~u Np Discharge, at this time u 1p and u 2p Discharge is not allowed, otherwise the series output voltage will be superimposed. 1p and u 2p Stepped output cannot be achieved; during the time intervals t2~t3 and t6~t7, d 4pB ~d NpB With d 3pA Complementary, d 3pA When it is high, u 3p Give L 3p Charging, when d 3pA When L is low 3p give u 4p ~u Np Charge;

[0051] (1d)u 4p ~u Np Simultaneously connected in series all the way to u Np A separate power supply provides the voltage;

[0052] (2) The negative half-cycle power supply specifically includes the following steps:

[0053] (2a)u 1n ~u Nn Simultaneous series connection for voltage supply:

[0054] To avoid inductance L 1n Bypassing, S needs to be turned off 1nD , that is, d 1nD When it is low, S 1nA By pulse width modulation, high-frequency switching is achieved when d 1nA When it is high, u 1n Give L 1n Charging, when d 1nA When L is low 1n give u 2n ~u Nn Charging requires controlling S. 2nB ~S NnB The circuit is turned on to form a charging loop, therefore the signal d during the time period t3~t5 2nB ~d NnB With d 1nA Complementary;

[0055] (2b)u 2n ~u Nn Simultaneous series connection for voltage supply:

[0056] At times t3~t4 and t5~t6, by u 2n to u 3n ~u Nn Discharge, at this time u 1n Discharge is not allowed, otherwise the series output voltage will be superimposed. 1n Stepped output cannot be achieved; during the time intervals t3~t4 and t5~t6, d 3nB ~d NnB With d 2nA Complementary, d 2nA When it is high, u 2n Give L 2n Charging, when d 2nA When L is low 2n give u 3n ~u Nn Charge;

[0057] (2c) For u 3n ~u Nn Simultaneous series connection for voltage supply:

[0058] At times t2~t3 and t6~t7, by u 3n to u 4n ~u Nn Discharge, at this time u 1n and u 2n Discharge is not allowed, otherwise the series output voltage will be superimposed. 1n and u 2n Stepped output cannot be achieved; during the time intervals t2~t3 and t6~t7, d 4nB ~d NnB With d 3nA Complementary, d 3nA When it is high, u 3n Give L 3n Charging, when d 3nA When L is low 3n give u 4n ~u Nn Charge;

[0059] (2d)u 4n ~u Nn Simultaneously connected in series all the way to u Nn A separate power supply provides the voltage.

[0060] Figure 1 A battery pack assembly scheme capable of outputting a 2N level is presented. 1p ~u Np For a series battery pack that provides a positive output voltage, u 1n ~u NnFor a series battery pack that provides a negative output voltage, when the positive series battery pack is powered, the negative series battery pack is powered by the power transistor S. 1nA ~S NnA When bypassed, the output voltage is 0. Similarly, when powered by a negative series battery pack, the output voltage of the negative series battery pack is 0. The topology of the positive and negative battery packs is completely symmetrical.

[0061] Figure 2 The synchronous control logic of the power transistor is given. The analysis still takes the discharge mode of a series battery pack with a positive output as an example. During times t3~t5, S... 1pC ~S NpC When the transistor is turned on, the corresponding power transistor drive signal d 1pC ~d NpC All are high level.

[0062] In summary, this invention directly provides AC multi-level voltage from the battery, eliminating the need for an AC / DC converter to achieve AC-DC conversion. This reduces energy loss during the conversion process, saves on the size and cost of the energy storage system, and offers high output voltage accuracy and stability. Due to the precise control strategy and reasonable circuit layout, it effectively reduces output voltage fluctuations and distortion, providing high-quality power to AC loads and meeting the needs of applications with high power quality requirements. Through a unique circuit design, each battery cell can achieve balanced output voltage while simultaneously outputting stepped voltage. During stepped voltage output, each battery cell can automatically adjust its charging and discharging process according to its own state, ensuring a consistent depth of discharge for each battery. This avoids overall performance degradation caused by over-discharging of some batteries, significantly extending the battery pack's lifespan, reducing battery replacement frequency and cost, improving the economics of the energy storage system, and effectively increasing the usable capacity of the battery pack.

[0063] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the claimed invention. The scope of protection claimed by the appended claims and their equivalents is defined.

Claims

1. An AC output topology circuit for an energy storage battery, characterized in that: It includes a positive-polarity series-connected battery pack, a negative-polarity series-connected battery pack, and a load R. The positive-polarity series-connected battery pack and the negative-polarity series-connected battery pack respectively provide positive and negative half-cycle AC voltages to the load R. The positive-polarity series-connected battery pack is composed of multiple positive voltage output units connected in series, and the negative-polarity series-connected battery pack is composed of multiple negative voltage output units connected in series.

2. The AC output topology circuit of the energy storage battery according to claim 1, characterized in that: The positive voltage output unit includes a first positive voltage output unit, a second positive voltage output unit to an Nth positive voltage output unit, and the first positive voltage output unit includes a first positive voltage battery pack u. 1p The first positive voltage battery pack u 1p The positive terminals are connected to the load R and the high-power diode D, respectively. 1pA The cathode is connected, and the power transistor S 1pA With high power diode D 1pA Parallel connection, high-power diode D 1pA The anodes are respectively connected to the inductor L 1p High-power diode D 1pE The cathode is connected, and the power transistor S 1pE With high power diode D 1pE Parallel connection, high-power diode D 1pE The anode and high-power diode D 1pD The anode is connected, and the power transistor S 1pD With high power diode D 1pD Parallel connection, high-power diode D 1pD The cathodes are respectively connected to the inductor L 1p The other end, high-power diode D 1pC The cathode is connected, and the power transistor S 1pC With high power diode D 1pC Parallel connection, high-power diode D 1pC The anode and high-power diode D 1pB The anode is connected, and the power transistor S 1pB With high power diode D 1pB Parallel connection, high-power diode D 1pB The cathode and the first positive voltage battery pack u 1p The negative terminal is connected.

3. The AC output topology circuit of the energy storage battery according to claim 1, characterized in that: The negative voltage output unit includes a first negative voltage output unit, a second negative voltage output unit to an Nth negative voltage output unit, and the first negative voltage output unit includes a first negative voltage battery pack u. 1n The first negative voltage battery pack u 1n The positive terminals are connected to the load R and the high-power diode D, respectively. 1nA The cathode is connected, and the power transistor S 1nA With high power diode D 1nA Parallel connection, high-power diode D 1nA The anodes are respectively connected to the inductor L 1n High-power diode D 1nE The cathode is connected, and the power transistor S 1nE With high power diode D 1nE Parallel connection, high-power diode D 1nE The anode and high-power diode D 1nD The anode is connected, and the power transistor S 1nD With high power diode D 1nD Parallel connection, high-power diode D 1nD The cathodes are respectively connected to the inductor L 1n The other end, high-power diode D 1nC The cathode is connected, and the power transistor S 1nC With high power diode D 1nC Parallel connection, high-power diode D 1nC The anode and high-power diode D 1nB The anode is connected, and the power transistor S 1nB With high power diode D 1nB Parallel connection, high-power diode D 1nB The cathode and the first negative voltage battery pack u 1n The negative terminal is connected.

4. The AC output topology circuit of the energy storage battery according to claim 2, characterized in that: The second positive voltage output unit includes a second positive voltage battery pack u 2p The second positive voltage battery pack u 2p The positive terminals are respectively connected to the high-power diode D. 1pC Cathode, Inductor L 1p High-power diode D 1pD The cathode is connected, and the power transistor S 1pD With high power diode D 1pD Parallel connection, high-power diode D 1pD The anode and high-power diode D 1pE The anode is connected, and the power transistor S 1pE With high power diode D 1pE Parallel connection, high-power diode D 1pE The cathodes are respectively connected to the inductor L 1p The other end, high-power diode D 2pA The cathode is connected, and the power transistor S 2pA With high power diode D 2pA Parallel connection, high-power diode D 2pA The anodes are respectively connected to the inductor L 2p High-power diode D 2pE The cathode is connected, and the power transistor S 2pE With high power diode D 2pE Parallel connection, high-power diode D 2pE The anode and high-power diode D 2pD The anode is connected, and the power transistor S 2pD With high power diode D 2pD Parallel connection, high-power diode D 2pD The cathodes are respectively connected to the inductor L 2p The other end, high-power diode D 2pC The cathode is connected, and the power transistor S 2pC With high power diode D 2pC Parallel connection, high-power diode D 2pC The anode and high-power diode D 2pB The anode is connected, and the power transistor S 2pB With high power diode D 2pB Parallel connection, high-power diode D 2pB The cathode and the second positive voltage battery pack u 2p The negative terminal is connected.

5. The AC output topology circuit for an energy storage battery according to claim 2, characterized in that: The Nth positive voltage output unit includes the Nth positive voltage battery pack u Np The Nth positive voltage battery pack u Np The positive terminals are respectively connected to the high-power diode D. （N-1）pC Cathode, Inductor L （N-1）p High-power diode D （N-1）pD The cathode is connected, and the power transistor S （N-1）pD With high power diode D （N-1）pD Parallel connection, high-power diode D （N-1）pD The anode and high-power diode D （N-1）pE The anode is connected, and the power transistor S （N-1）pE With high power diode D （N-1）pE Parallel connection, high-power diode D （N-1）pE The cathodes are respectively connected to the inductor L （N-1）p The other end, high-power diode D NpA The cathode is connected, and the power transistor S NpA With high power diode D NpA Parallel connection, high-power diode D NpA The anode and high-power diode D NpC The cathode is connected, and the power transistor S NpC With high power diode D NpC Parallel connection, high-power diode D NpC The anode and high-power diode D NpB The anode is connected, and the power transistor S NpB With high power diode D NpB Parallel connection, high-power diode D NpB The cathode and the Nth positive voltage battery pack u Np The negative terminal is connected.

6. The AC output topology circuit of the energy storage battery according to claim 3, characterized in that: The second negative voltage output unit includes a second negative voltage battery pack u 2n The second negative voltage battery pack u 2n The positive terminals are respectively connected to the high-power diode D. 1nC Cathode, Inductor L 1n High-power diode D 1nD The cathode is connected, and the power transistor S 1nD With high power diode D 1nD Parallel connection, high-power diode D 1nD The anode and high-power diode D 1nE The anode is connected, and the power transistor S 1nE With high power diode D 1nE Parallel connection, high-power diode D 1nE The cathodes are respectively connected to the inductor L 1n The other end, high-power diode D 2nA The cathode is connected, and the power transistor S 2nA With high power diode D 2nA Parallel connection, high-power diode D 2nA The anodes are respectively connected to the inductor L 2n High-power diode D 2nE The cathode is connected, and the power transistor S 2nE With high power diode D 2nE Parallel connection, high-power diode D 2nE The anode and high-power diode D 2nD The anode is connected, and the power transistor S 2nD With high power diode D 2nD Parallel connection, high-power diode D 2nD The cathodes are respectively connected to the inductor L 2n The other end, high-power diode D 2nC The cathode is connected, and the power transistor S 2nC With high power diode D 2nC Parallel connection, high-power diode D 2nC The anode and high-power diode D 2nB The anode is connected, and the power transistor S 2nB With high power diode D 2nB Parallel connection, high-power diode D 2nB The cathode and the second negative voltage battery pack u 2n The negative terminal is connected; the circuit of the Nth negative voltage output unit is the same as that of the second negative voltage output unit.

7. The AC output topology circuit for an energy storage battery according to claim 3, characterized in that: The Nth negative voltage output unit includes the Nth negative voltage battery pack u Nn The Nth negative voltage battery pack u Nn The positive terminals are respectively connected to the high-power diode D. （N-1）nC Cathode, Inductor L （N-1）n High-power diode D （N-1）nD The cathode is connected, and the power transistor S （N-1）nD With high power diode D （N-1）nD Parallel connection, high-power diode D （N-1）nD The anode and high-power diode D （N-1）nE The anode is connected, and the power transistor S （N-1）nE With high power diode D （N-1）nE Parallel connection, high-power diode D （N-1）nE The cathodes are respectively connected to the inductor L （N-1）n The other end, high-power diode D NnA The cathode is connected, and the power transistor S NnA With high power diode D NnA Parallel connection, high-power diode D NnA The anode and high-power diode D NnC The cathode is connected, and the power transistor S NnC With high power diode D NnC Parallel connection, high-power diode D NnC The anode and high-power diode D NnB The anode is connected, and the power transistor S NnB With high power diode D NnB Parallel connection, high-power diode D NnB The cathode and the Nth negative voltage battery pack u Nn The negative terminal is connected.

8. The control method for the AC output topology circuit of the energy storage battery according to any one of claims 1 to 7, characterized in that: The method includes the following steps in sequence: (1) The positive half-cycle power supply specifically includes the following steps: (1a) For u 1p ~u Np Simultaneous series connection for voltage supply: At times t4~t5, u 1p Discharging to other batteries, wherein the other batteries refer to those in u 1p ~u Np In addition to u 1p Other batteries; to avoid inductance L 1p If bypassed, S needs to be turned off. 1pD , that is, d 1pD When it is low, S 1pA By pulse width modulation, high-frequency switching is achieved when d 1pA When it is high, u 1p Give L 1p Charging, when d 1pA When L is low 1p give u 2p ~u Np Charging is required at this time, and S needs to be controlled. 2pB ~S NpB The circuit is turned on to form a charging loop, therefore the signal d during the time period t3~t5 2pB ~d NpB With d 1pA Complementary; (1b) For u 2p ~u Np Simultaneous series connection for voltage supply: At times t3~t4 and t5~t6, by u 2p to u 3p ~u Np Discharge, at this time u 1p Discharge is not allowed, otherwise the series output voltage will be superimposed. 1p Stepped output cannot be achieved; during the time intervals t3~t4 and t5~t6, d 3pB ~d NpB With d 2pA Complementary, d 2pA When it is high, u 2p Give L 2p Charging, when d 2pA When L is low 2p give u 3p ~u Np Charge; (1c) For u 3p ~u Np Simultaneous series connection for voltage supply: At times t2~t3 and t6~t7, by u 3p to u 4p ~u Np Discharge, at this time u 1p and u 2p Discharge is not allowed, otherwise the series output voltage will be superimposed. 1p and u 2p Stepped output cannot be achieved; during the time intervals t2~t3 and t6~t7, d 4pB ~d NpB With d 3pA Complementary, d 3pA When it is high, u 3p Give L 3p Charging, when d 3pA When L is low 3p give u 4p ~u Np Charge; (1d)u 4p ~u Np Simultaneously connected in series all the way to u Np A separate power supply provides the voltage; (2) The negative half-cycle power supply specifically includes the following steps: (2a)u 1n ~u Nn Simultaneous series connection for voltage supply: To avoid inductance L 1n Bypassing, S needs to be turned off 1nD , that is, d 1nD When it is low, S 1nA By pulse width modulation, high-frequency switching is achieved when d 1nA When it is high, u 1n Give L 1n Charging, when d 1nA When L is low 1n give u 2n ~u Nn Charging requires controlling S. 2nB ~S NnB The circuit is turned on to form a charging loop, therefore the signal d during the time period t3~t5 2nB ~d NnB With d 1nA Complementary; (2b)u 2n ~u Nn Simultaneous series connection for voltage supply: At times t3~t4 and t5~t6, by u 2n to u 3n ~u Nn Discharge, at this time u 1n Discharge is not allowed, otherwise the series output voltage will be superimposed. 1n Stepped output cannot be achieved; during the time intervals t3~t4 and t5~t6, d 3nB ~d NnB With d 2nA Complementary, d 2nA When it is high, u 2n Give L 2n Charging, when d 2nA When L is low 2n give u 3n ~u Nn Charge; (2c) For u 3n ~u Nn Simultaneous series connection for voltage supply: At times t2~t3 and t6~t7, by u 3n to u 4n ~u Nn Discharge, at this time u 1n and u 2n Discharge is not allowed, otherwise the series output voltage will be superimposed. 1n and u 2n Stepped output cannot be achieved; during the time intervals t2~t3 and t6~t7, d 4nB ~d NnB With d 3nA Complementary, d 3nA When it is high, u 3n Give L 3n Charging, when d 3nA When L is low 3n give u 4n ~u Nn Charge; (2d)u 4n ~u Nn Simultaneously connected in series all the way to u Nn A separate power supply provides the voltage.

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