Three-frequency reconfigurable power amplifier

Abstract

The invention discloses a three-frequency reconfigurable power amplifier which is provided with two working branches, namely an f2-f3GHz power amplification circuit and an f1-f2GHz / f3-f4GHz dual-frequency multiplexing power amplification circuit, and the two working branches are selected through an active switching device; wherein the f1-f2GHz / f3-f4GHz dual-frequency multiplexing power amplification circuit comprises two sub-circuits, and the last stages of the two sub-circuits are matched and mutually modulated, so that the reconfigurable frequency is realized, the traditional high-order duplex structure is simplified, the passive matching loss is reduced, and the amplifier efficiency is improved. Meanwhile, compared with a traditional switch switching dual-mode amplification circuit, an active device in a switch serves as a multiplexing element to be integrated into matching of two working branches, optimization of a power amplifier output matching circuit is achieved, insertion loss of output matching is reduced, and high-efficiency three-frequency reconfiguration is achieved.

Description

Technical Field

[0001] This invention relates to the field of microwave monolithic integrated circuit technology, and in particular to a three-frequency reconfigurable power amplifier. Background Technology

[0002] With the development of electronic technology, multifunctional integrated electronic systems can simultaneously achieve multiple functions by sharing a single set of hardware. Compared with traditional single-function systems, the core advantage of multifunctional integrated electronic systems lies in their multi-spectral fusion capabilities, making the overall system more comprehensive, enhancing its adaptability to complex environments, and saving more load platform resources. Currently, most mature ultra-wideband power amplifier circuits used in engineering applications adopt distributed topologies. However, ultra-wideband power amplifiers using this topology not only have a limited power limit but also have efficiency constrained by bandwidth. In addition, switching-type ultra-wideband power amplifiers are not only large in circuit size and complex in control, but also suffer from high losses due to ultra-wideband multi-throw switches, resulting in limited chip efficiency and making them unable to meet the high integration and low power consumption requirements of multifunctional integrated electronic systems. Summary of the Invention

[0003] Purpose of the invention: The purpose of this invention is to provide a three-frequency reconfigurable power amplifier circuit. This circuit adopts a multi-frequency power amplifier circuit reconfigurable fusion topology, deeply reuses active components, and realizes the output of the amplifier circuit in different frequency bands. Compared with reconfigurable circuits based on traditional switching topologies or high-order duplexer topologies, this circuit structure reduces the area size, reduces matching losses, and improves the additional efficiency of the amplifier circuit.

[0004] Technical solution: A three-frequency reconfigurable power amplifier, including a dual-frequency multiplexed power amplifier circuit of f1~f2GHz / f3~f4GHz, a power amplifier circuit of f2~f3GHz, a single-pole double-throw switch, and a switch reconfigurable matching network; When operating in the f2~f3GHz frequency band, the single-pole double-throw switch and the switch reconfigurable matching network select the f2~f3GHz power amplifier circuit to be turned on, and the constant voltage continuous wave power supply is applied to the drain bias of the f2~f3GHz power amplifier circuit. At this time, all transistors in the f2~f3GHz power amplifier circuit branch are in saturation, and all transistors in the f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit are in cutoff. When operating in the f1~f2GHz / f3~f4GHz dual-frequency mode, the single-pole double-throw switch and the switch reconfigurable matching network select the f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit to be turned on, while all transistors in the f2~f3GHz power amplifier circuit are in the off state. All transistors in the f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit are in two different states depending on the operating frequency.

[0005] Furthermore, the f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit includes a first drain bias circuit, a second drain bias circuit, a first gate bias circuit, a second gate bias circuit, an f1~f2GHz power amplifier circuit, an f3~f4GHz power amplifier circuit, an input duplex circuit, and a low insertion loss duplex matching network. When operating in the low frequency band of f1~f2GHz, the first drain bias circuit provides drain voltage to the f1~f2GHz power amplifier circuit, and the first gate bias circuit provides gate voltage to the f1~f2GHz power amplifier circuit. All transistors in the f1~f2GHz power amplifier circuit are in saturation state, and all transistors in the f3~f4GHz power amplifier circuit are in cutoff state. When operating in the high frequency band of f3~f4GHz, the second drain bias circuit provides drain voltage to the f3~f4GHz power amplifier circuit, and the second gate bias circuit provides gate voltage to the f3~f4GHz power amplifier circuit. All transistors in the f3~f4GHz power amplifier circuit are in saturation state, and all transistors in the f1~f2GHz power amplifier circuit are in cutoff state. The low-pass network is the final stage matching network of the f1~f2GHz power amplifier circuit, and the high-pass network is the final stage matching network of the f3~f4GHz power amplifier circuit.

[0006] Furthermore, the f2~f3GHz power amplifier circuit is a three-stage amplifier circuit composed of three-stage power transistors and matching circuits cascaded together. The output impedance of the final stage transistor is conjugate matched by a switch-reconfigurable matching network. At the same time, the final stage switch-reconfigurable matching network also serves as the output stage selection circuit of the f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit.

[0007] Furthermore, the first switching transistor, the second switching transistor, and the third switching transistor (123) in the switch reconfigurable matching network are integrated as multiplexing elements into the matching circuits of the two branches, which are f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuits and f2~f3GHz power amplifier circuits, respectively. When the f2~f3GHz power amplifier circuit is turned on, the first switching transistor is turned off, which is equivalent to a capacitor stub connected to ground. The second switching transistor is turned on, which is equivalent to a small resistor. The third switching transistor is turned on, which is equivalent to a small resistor and forms an inductor stub connected to ground in parallel with the first microstrip line. The first switching transistor, the second switching transistor, and the inductor stub connected to ground together constitute the output matching of the final stage transistor in the f2~f3GHz power amplifier circuit. When the f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit is turned on, the first switching transistor is equivalent to a small resistor, and the second switching transistor is equivalent to a capacitor. The first switching transistor, the second switching transistor, and the second microstrip line constitute a series resonant circuit of capacitor and inductor to ground. The third switching transistor is equivalent to a capacitor stub connected to ground when turned off. The series resonant circuit of capacitor and inductor to ground and the third switching transistor together constitute the output matching of the low insertion loss duplex matching network in the f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit.

[0008] Furthermore, when operating in the f1~f2GHz / f3~f4GHz frequency bands, the two-channel frequency response of the low insertion loss duplex matching network must meet the isolation requirement of more than 30dB, and the frequency spacing must meet: f3-f2≥20%·(f4-f1).

[0009] Compared with the prior art, the significant advantages of this invention are as follows: 1. This invention achieves a switch reconfigurable matching network by deeply reusing the active devices of the switch HEMT, so that the selection circuit is integrated into the final matching network of the f2~f3GHz branch and the f1~f2GHz / f3~f4GHz branch. By applying a constant voltage continuous wave power supply to the branch drain bias, the f1~f4GHz ultra-wideband continuous wave signal output is achieved, which effectively optimizes the efficiency of the entire frequency band. 2. This invention achieves a low insertion loss duplex matching network by accurately locating and deeply multiplexing the output impedance of the HEMT active device in the amplifier, and multiplexes it with the switch reconfigurable matching network, which greatly reduces the loss caused by the frequency selection of the f1~f2GHz / f3~f4GHz branches and effectively optimizes the in-band efficiency of the reconfigurable power amplifier circuit in f1~f2GHz and f3~f4GHz. 3. This invention simplifies the topology of the switch-reconfigurable matching network by using a low insertion loss duplex matching network. Compared with the traditional three-frequency composite amplifier circuit structure, the final stage reconfigurable network is simplified from a single-pole three-throw switch to a single-pole double-throw switch. This not only simplifies the control method of the circuit, but also reduces the loss across the entire frequency band and improves the power and efficiency of the three-frequency reconfigurable power amplifier circuit. Attached Figure Description

[0010] Figure 1 This is a schematic diagram of the present invention; Figure 2 The schematic diagram of the dual-frequency multiplexed power amplifier circuit is shown below; Figure 3 Schematic diagram of a low insertion loss duplex matching network circuit; Figure 4 Schematic diagram of a switch-reconfigurable matching network circuit; Figure 5 This is a schematic diagram showing the output power of over 40dBm achieved by the present invention in the 2~18GHz frequency band; Figure 6 This is a schematic diagram showing the efficiency results of the present invention in the 2~18GHz frequency band, which is more than 30%. Detailed Implementation

[0011] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0012] like Figure 1 As shown, a three-frequency reconfigurable power amplifier is applied to microwave and millimeter-wave ultra-wideband monolithic integrated power amplifier circuits. It includes an f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit (PA) 101, an f2~f3GHz power amplifier circuit 102, a single-pole double-throw switch (SPDT) 103, and a switch reconfigurable matching network 104. The two operating branches, the f2~f3GHz power amplifier circuit and the f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit, are selected by active switching devices. The values ​​of f1, f2, f3, and f4 satisfy f3-f2≥20%·(f4-f1). The active switching devices select either the f2~f3GHz power amplifier circuit or the f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit based on the operating frequency. A constant voltage continuous wave power supply is applied to the branch with leakage bias to achieve the f1~f4GHz ultra-wideband continuous wave signal output. The f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit includes two sub-circuits. The final stages of the two sub-circuits are mutually modulated to achieve frequency reconfiguration, simplifying the traditional high-order duplex structure, reducing passive matching losses, and improving amplifier efficiency. Furthermore, compared to traditional switch-switched dual-mode amplifier circuits, this invention integrates the active components in the switch as multiplexed elements into the matching of the two working branches, optimizing the power amplifier output matching circuit, reducing insertion loss in output matching, and achieving high-efficiency three-frequency reconfigurability.

[0013] When the tri-band reconfigurable power amplifier operates in the f2~f3GHz frequency band, the single-pole double-throw switch 103 and the switch reconfigurable matching network 104 select the f2~f3GHz power amplifier circuit 102 to be turned on, and a constant voltage continuous wave power supply is applied to the drain bias of the f2~f3GHz power amplifier circuit 102. At this time, all transistors in the f2~f3GHz power amplifier circuit 102 are in saturation, and all transistors in the f1~f2GHz / f3~f4GHz dual-band multiplexed power amplifier circuit 101 are in the off state.

[0014] When the tri-frequency reconfigurable power amplifier operates in the f1~f2GHz / f3~f4GHz continuous wave dual-frequency mode, the single-pole double-throw switch 103 and the switch reconfigurable matching network 104 select the f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit 101 to be turned on, and all transistors in the f2~f3GHz power amplifier circuit 102 are in the off state. All transistors in the f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit 101 are in two different states according to the operating frequency.

[0015] like Figure 5 , Figure 6 As shown, this invention can achieve an output power greater than 10W and an efficiency greater than 30% in the f1~f4GHz frequency band, which is 10~20 percentage points higher than the efficiency of traditional power amplifiers with the same bandwidth. When operating in the f1~f2GHz / f3~f4GHz frequency band, the frequency response of the two channels of the input duplex circuit must meet the isolation requirement of more than 30dB, and the frequency spacing must reach more than 20% of the total bandwidth, that is, f3-f2≥20%·(f4-f1).

[0016] like Figure 2 As shown, the f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit 101 includes a first drain bias circuit 111, a second drain bias circuit 112, a first gate bias circuit 110, a second gate bias circuit 113, an f1~f2GHz power amplifier circuit 116, an f3~f4GHz power amplifier circuit 117, an input duplex circuit 118, and a low insertion loss duplex matching network 115.

[0017] like Figure 3 As shown, the low insertion loss duplex matching network 115 consists of a low-pass network 141 and a high-pass network 142. The low-pass network 141 is the final stage matching network of the f1~f2GHz power amplifier circuit 116, and the high-pass network 142 is the final stage matching network of the f3~f4GHz power amplifier circuit 117. The low insertion loss duplex matching network 115 can not only perform impedance matching, but also form isolation between the low-frequency f1~f2GHz and high-frequency f3~f4GHz branches, realizing the function of the circuit operating at different frequencies.

[0018] When the f1~f2GHz / f3~f4GHz dual-band multiplexed power amplifier circuit 101 operates in the f1~f2GHz low-frequency band, the first drain bias circuit 111 provides a drain voltage V to the f1~f2GHz power amplifier circuit 116. d The first gate bias circuit 113 provides the gate voltage V to the f1~f2GHz power amplifier circuit 116. gIn the f1~f2GHz power amplifier circuit 116, all transistors are in saturation, while in the f3~f4GHz power amplifier circuit 117, all transistors are in cutoff. Similarly, when the dual-frequency power amplifier circuit operates in the f3~f4GHz high-frequency band, the second drain bias circuit 112 supplies drain voltage V to the f3~f4GHz power amplifier circuit 117. d The second gate bias circuit 113 supplies the gate voltage V to the f3~f4GHz power amplifier circuit 117. g All transistors in the f3~f4GHz power amplifier circuit 117 are in saturation, while all transistors in the f1~f2GHz power amplifier circuit 116 are in cutoff.

[0019] The low insertion loss duplex matching network 115 is composed of the final stage matching of two frequency band sub-circuits, f1~f2GHz and f3~f4GHz. It not only completes impedance matching but also forms inter-branch isolation, realizes frequency reconfigurability, simplifies the traditional high-order duplex structure, reduces passive losses, and improves circuit efficiency.

[0020] The f2~f3GHz power amplifier circuit 102 is a three-stage amplifier circuit composed of three-stage power transistors and matching circuits cascaded together. The output impedance of the final stage transistor is conjugate matched by the switch reconfigurable matching network 104. At the same time, the switch reconfigurable matching network 104 also serves as the output stage selection circuit of the f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit 101.

[0021] like Figure 4As shown, the first switching transistor 121, the second switching transistor 122, and the third switching transistor 123 in the switch-reconfigurable matching network 104 are integrated as multiplexed elements into the matching of the f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit 101. When the switch-reconfigurable matching network 104 selects the f2~f3GHz power amplifier circuit 102 to be turned on, the first switching transistor 121 is turned off, which is equivalent to a capacitor stub connected to ground; the second switching transistor 122 is turned on, which is equivalent to a small resistor; and the third switching transistor 123 is turned on, which is equivalent to a small resistor and forms an inductor stub connected to ground in parallel with the first microstrip line 131. The above three (i.e., the capacitor stub connected to ground, the small resistor, and the inductor stub connected to ground) together constitute the output matching of the final stage transistor in the f2~f3GHz power amplifier circuit 102. When the switch-reconfigurable matching network 104 selects the f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit 101 to be turned on, the first switching transistor 121 is turned on as a small resistor, and the second switching transistor 122 is turned on as a capacitor. The first switching transistor 121, the second switching transistor 122, and the second microstrip line 132 constitute a series resonant circuit with a capacitor and inductor to ground. The third switching transistor 123 is turned off as a capacitor stub connected to ground. The above two (i.e., the series resonant circuit with a capacitor and inductor to ground and the capacitor stub connected to ground) together constitute the output matching of the low insertion loss duplex matching network 115 in the f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit 101.

[0022] The tri-frequency reconfigurable power amplifier of the present invention takes into account the operating mode, frequency, bandwidth, power and efficiency, and is manufactured with appropriate semiconductor technology. Its wafer uses GaN material as the substrate, but is not limited to this.

[0023] Preferably, the tri-frequency reconfigurable amplifier of the present invention can realize output in different frequency bands, and it is composed of a 2~7GHz / 13~18GHz dual-frequency multiplexed power amplifier circuit, a 7~13GHz power amplifier circuit, a single-pole double-throw switch, a dual-mode final stage reconfigurable matching network, and other structures.

[0024] The 2~7GHz / 13~18GHz dual-frequency multiplexed power amplifier circuit consists of a two-stage three-stage amplifier reactive circuit structure and a shared final-stage reconfigurable matching network. The amplifier's gate and drain are both connected in parallel to ground via a series resonant circuit of resistors and capacitors, forming a stable structure and maintaining transistor stability.

[0025] When the power amplifier is operating, the drain bias of the operating branch (i.e., the branch in operation) is supplied with a constant voltage continuous wave 28V power supply, and the gate bias circuit supplies a -2V gate voltage. The drain bias of other branches is supplied with a 0V power supply, and the gate bias circuit supplies a -5V gate voltage. At this time, the amplifying transistors in the operating branch are all in saturation, while the amplifying transistors in other branches are all in cutoff. The single-pole double-throw switch and the switching devices in the switch-reconfigurable matching network select the corresponding branch to conduct according to the operating frequency. The power amplifier achieves an output power of 40dBm in the 2~18GHz frequency band as follows: Figure 5 As shown, power-added efficiency (PAE) of over 30% is as follows: Figure 6 .

[0026] The above embodiments are merely illustrative of the technical approach of the present invention and are not intended to limit the scope of protection of the present invention. Any modifications made based on the technical approach proposed in this invention shall fall within the scope of protection of the present invention.

Claims

1. A three-frequency reconfigurable power amplifier, characterized in that, It includes a dual-frequency multiplexed power amplifier circuit (101) for f1~f2GHz / f3~f4GHz, a power amplifier circuit (102) for f2~f3GHz, a single-pole double-throw switch (103) and a switch reconfigurable matching network (104). When operating in the f2~f3GHz frequency band, the single-pole double-throw switch (103) and the switch reconfigurable matching network (104) select the f2~f3GHz power amplifier circuit (102) to be turned on, and the f2~f3GHz power amplifier circuit (102) is applied with constant voltage continuous wave power supply through the drain bias; at this time, all transistors in the f2~f3GHz power amplifier circuit branch (102) are in saturation state, and all transistors in the f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit (101) are in cutoff state; When operating in the f1~f2GHz / f3~f4GHz dual-frequency mode, the single-pole double-throw switch (103) and the switch reconfigurable matching network (104) select the f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit (101) to be turned on, and all transistors in the f2~f3GHz power amplifier circuit (102) are in the off state. All transistors in the f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit (101) are in two different states according to the operating frequency.

2. The three-frequency reconfigurable power amplifier according to claim 1, characterized in that, The f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit (101) includes a first drain bias circuit (111), a second drain bias circuit (112), a first gate bias circuit (110), a second gate bias circuit (113), an f1~f2GHz power amplifier circuit (116), an f3~f4GHz power amplifier circuit (117), an input duplex circuit (118), and a low insertion loss duplex matching network (115). When operating in the low frequency band of f1~f2GHz, the first drain bias circuit (111) provides drain voltage to the f1~f2GHz power amplifier circuit (116), and the first gate bias circuit (113) provides gate voltage to the f1~f2GHz power amplifier circuit (116). All transistors in the f1~f2GHz power amplifier circuit (116) are in saturation, and all transistors in the f3~f4GHz power amplifier circuit (117) are in cutoff. When operating in the f3~f4GHz high frequency band, the second drain bias circuit (112) provides drain voltage to the f3~f4GHz power amplifier circuit (117), and the second gate bias circuit (113) provides gate voltage to the f3~f4GHz power amplifier circuit (117). All transistors in the f3~f4GHz power amplifier circuit (117) are in saturation, and all transistors in the f1~f2GHz power amplifier circuit (116) are in cutoff. The low insertion loss duplex matching network (115) is composed of a low-pass network (141) and a high-pass network (142). The low-pass network (141) is the final stage matching network of the f1~f2GHz power amplifier circuit (116), and the high-pass network (142) is the final stage matching network of the f3~f4GHz power amplifier circuit (117).

3. The three-frequency reconfigurable power amplifier according to claim 1, characterized in that, The f2~f3GHz power amplifier circuit (102) is a three-stage amplifier circuit composed of three-stage power transistors and matching circuits cascaded together. The output impedance of the final stage transistor is conjugate matched by the switch reconfigurable matching network (104). At the same time, the final stage switch reconfigurable matching network (104) also serves as the output stage selection circuit of the f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit (101).

4. The three-frequency reconfigurable power amplifier according to claim 2, characterized in that, The first switching transistor (121), the second switching transistor (122), and the third switching transistor (123) in the switch reconfigurable matching network (104) are integrated as multiplexing elements into the matching circuits of two branches, namely the f1~f2GHz / f3~f4GHz dual-frequency multiplexed power amplifier circuit (101) and the f2~f3GHz power amplifier circuit (102). When the f2~f3GHz power amplifier circuit (102) is turned on, the first switching transistor (121) is turned off, which is equivalent to a capacitor stub connected to ground. The second switching transistor (122) is turned on, which is equivalent to a small resistor. The third switching transistor (123) is turned on, which is equivalent to a small resistor and forms an inductor stub connected to ground in parallel with the first microstrip line (131). The first switching transistor (121), the second switching transistor (122) and the inductor stub connected to ground together constitute the output matching of the final stage transistor in the f2~f3GHz power amplifier circuit (102). When the f1~f2 GHz / f3~f4 GHz dual-frequency multiplexed power amplifier circuit (101) is turned on, the first switching transistor (121) is turned on as a small resistor, and the second switching transistor (122) is turned on as a capacitor. The first switching transistor (121), the second switching transistor (122), and the second microstrip line (132) form a series resonant circuit with a capacitor and inductor to ground. The third switching transistor (123) is turned off as a capacitor stub connected to ground. The series resonant circuit with a capacitor and inductor to ground and the third switching transistor (123) together form the output matching of the low insertion loss duplex matching network (115) in the f1~f2 GHz / f3~f4 GHz dual-frequency multiplexed power amplifier circuit (101).

5. The three-frequency reconfigurable power amplifier according to any one of claims 1-4, characterized in that, When operating in the f1~f2GHz / f3~f4GHz frequency band, the two-channel frequency response of the low insertion loss duplex matching network (115) needs to meet the isolation requirement of more than 30dB, and the frequency interval needs to meet: f3-f2≥20%·(f4-f1).

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