Electrostatic chuck, process chamber, semiconductor process equipment and self-cleaning method

Abstract

The invention discloses an electrostatic chuck, a process chamber, semiconductor process equipment and a self-cleaning method, and the top surface of the electrostatic chuck is provided with a plurality of air holes which are used for introducing inert gas between the electrostatic chuck and a wafer carried by the electrostatic chuck; the top surface of the electrostatic chuck has target roughness, so that when the wafer is carried on the electrostatic chuck, the contact area between the electrostatic chuck and the wafer is increased, and inert gas introduced between the electrostatic chuck and the wafer is sealed. The surface of the electrostatic chuck is low in roughness (can seal gas), the thickness of an air gap is reduced equivalently, the thermal resistance of the air gap is reduced, the roughness of the whole surface is consistent, and the temperature uniformity of a wafer can be improved.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, specifically to an electrostatic chuck, a process chamber, semiconductor process equipment, and a self-cleaning method. Background Technology

[0002] Etching is one of the key steps in the manufacturing of microelectronic devices. For high aspect ratio etching (such as deep trenches and vias in 3D NAND devices) and hard mask etching, high radio frequency (RF) power is often required. High RF power generates a lot of heat on the wafer surface, causing the wafer temperature to exceed the allowable range and causing abnormalities such as caking. Therefore, the electrostatic chuck used to support the wafer is crucial for the wafer's cooling capacity.

[0003] An electrostatic chuck is provided, its surface divided into two regions: a first bearing surface for supporting the central region of the wafer and a second bearing surface for supporting the edge region of the wafer. The first bearing surface has a first roughness, and the second bearing surface has a second roughness. The first roughness is greater than the second roughness. The first roughness increases the contact area between the wafer and the first bearing surface while ensuring uniform gas distribution between the first bearing surface and the wafer. The second roughness enables edge gas sealing on the second bearing surface. Furthermore, the electrostatic chuck surface body is provided with at least two gas channels for introducing gas between the first bearing surface and the wafer.

[0004] This electrostatic chuck can improve the cooling effect of the wafer to some extent, but the temperature uniformity of the wafer surface is poor. Especially in high-RF power applications, the problem of uneven temperature on the wafer surface will be further amplified. Summary of the Invention

[0005] To address the aforementioned technical problems, this application provides an electrostatic chuck, a process chamber, semiconductor process equipment, and a self-cleaning method, which can improve the problem of uneven wafer surface temperature that easily occurs when existing electrostatic chucks cool wafers.

[0006] To solve the above-mentioned technical problems, in a first aspect, embodiments of this application provide an electrostatic chuck, wherein the top surface of the electrostatic chuck is provided with a plurality of air holes for introducing an inert gas between the electrostatic chuck and the wafer carried by the electrostatic chuck. The top surface of the electrostatic chuck has a target roughness, which is used to increase the contact area between the electrostatic chuck and the wafer when the wafer is carried on the electrostatic chuck, and to form a seal for the inert gas introduced between the electrostatic chuck and the wafer.

[0007] Optionally, the target roughness is Ra 0.05~0.2μm; and / or, The diameter of the pores is 0.2~0.6mm.

[0008] Optionally, the plurality of air holes are evenly distributed on the top surface of the electrostatic chuck.

[0009] Optionally, the plurality of pores are evenly distributed on a plurality of circles with different radii centered on the center of the electrostatic chuck; The distance between the centers of two adjacent pores on the outermost circumference is less than the distance between the centers of two adjacent pores on any circumference within the outermost circumference.

[0010] Optionally, the distance between the centers of two adjacent pores on the outermost circumference is 5-10 mm; and / or, The distance between the center of the vent on the outermost circumference and the edge of the electrostatic chuck is 3~10mm; and / or, The distance between the centers of two adjacent pores on any circle within the outermost ring is 7.5~15mm; and / or, The difference in radius between the outermost circle containing the pores and the next outermost circle containing the pores is 7.5~15mm.

[0011] Optionally, the air holes and the top surface of the electrostatic chuck are chamfered to form grooves on the top surface of the electrostatic chuck that correspond one-to-one with the plurality of air holes.

[0012] Optionally, the plurality of air holes are uniformly distributed on multiple circles with different radii centered on the center of the electrostatic chuck, and the relationship between the distance L between the centers of two adjacent air holes on the same circle and the diameter d of the top of the groove satisfies: d ≤ L - 5 mm; and / or, The depth of the groove is greater than or equal to 10 μm.

[0013] Optionally, the electrostatic chuck includes a first flow equalizer, a second flow equalizer, and a third flow equalizer stacked sequentially from bottom to top; The plurality of air holes are disposed on the third flow equalizer plate; An annular flow equalization channel corresponding to each of the plurality of circumferences is provided between the second flow equalization plate and the third flow equalization plate, and each annular flow equalization channel is connected to the air hole on the corresponding circumference; An air intake channel is provided between the first flow equalizer and the second flow equalizer, and the air intake channel is connected to the annular flow equalizer channel. The bottom surface of the first flow equalizer is provided with an air inlet hole that communicates with the air inlet channel.

[0014] Optionally, the plurality of annular flow equalization channels include: an edge annular flow equalization groove, a plurality of central annular flow equalization grooves nested sequentially within the inner circle of the edge annular flow equalization groove, and a connecting groove connecting the plurality of central annular flow equalization channels. The air intake channel includes an edge air intake slot for supplying air to the edge annular uniform flow slot, and a central air intake slot for supplying air to any of the central annular uniform flow slots. The air inlet includes a first through hole communicating with the edge air inlet groove and a second through hole communicating with the center air inlet groove.

[0015] Optionally, the connecting groove has at least two grooves, and is rotationally symmetrical with respect to the center of the central annular flow equalization groove; The central air intake slot includes a central main slot and central branch slots that correspond one-to-one with the connecting slots; one end of the central branch slot is connected to one end of the central main slot at the center of the central annular flow equalization slot, and the other end is connected to the corresponding connecting slot. The other end of the central main channel is connected to the second through hole.

[0016] Optionally, the edge air intake groove includes two edge main grooves; One end of each of the two edge main grooves is connected to the first through hole, and the other end is connected to the edge annular flow equalization groove. Furthermore, the two edge main grooves are rotationally symmetrical with respect to the center of the central annular flow equalization groove.

[0017] Optionally, the edge air intake groove further includes two edge branch grooves that correspond one-to-one with the two edge main grooves, and the two edge branch grooves are axially symmetrical about the line connecting the center of the first through hole and the center of the edge annular flow equalization groove. Both ends of the edge branch groove are connected to the edge annular flow equalization groove, and the edge main groove is connected to the middle of the edge branch groove and is connected to the edge annular flow equalization groove through the edge branch groove.

[0018] Secondly, embodiments of this application also provide a process chamber, including an edge ring and an electrostatic chuck as described in the above embodiments, wherein the edge ring is disposed around the outside of the electrostatic chuck for supporting the wafer when raised. Optionally, the electrostatic chuck has a first annular protrusion on its side, which surrounds the electrostatic chuck; the top surface of the first annular protrusion is lower than the top surface of the electrostatic chuck, and the top surface of the first annular protrusion has an annular groove surrounding the electrostatic chuck. The edge ring rests on the first annular protrusion, and the inner side of the edge ring is provided with a support platform for supporting the wafer. The top surface of the support platform is lower than the top surface of the electrostatic chuck. The inner diameter of the edge ring is larger than the inner diameter of the annular groove, but smaller than the outer diameter of the annular groove.

[0019] Optionally, the inner wall of the support platform is provided with a second annular protrusion, which is spaced apart from the side wall of the electrostatic chuck.

[0020] Optionally, the edge of the electrostatic chuck is provided with a third through hole; The process chamber also includes a lifting device, the drive unit of which passes through the third through hole to control the lifting and lowering of the edge ring.

[0021] Thirdly, embodiments of this application also provide a semiconductor process apparatus, including a gas pipeline and a process chamber as described in the above embodiments, wherein the gas pipeline is used to introduce the inert gas into the gas port.

[0022] Fourthly, embodiments of this application also provide a method for purging an electrostatic chuck, applied to the process chambers described in the above embodiments, the purging method comprising: Control the edge ring to rise so that the edge ring lifts the wafer located on the top surface of the electrostatic chuck to the target height; Control the multiple air holes to blow air between the electrostatic chuck and the wafer.

[0023] Optionally, the target height is such that the bottom surface of the second annular protrusion is 0.5~2mm higher than the top surface of the electrostatic chuck.

[0024] As described above, the electrostatic chuck of this application, by uniformly distributing multiple air holes on its top surface and by utilizing the target roughness of the top surface to increase the contact area between the electrostatic chuck and the wafer, and by sealing the inert gas introduced between the electrostatic chuck and the wafer (the inert gas acting as a heat transfer medium), improves the cooling efficiency of the wafer carried by the electrostatic chuck. Furthermore, since the roughness of the top surface of the electrostatic chuck is uniform and meets the target roughness, the temperature uniformity of the wafer is improved. Attached Figure Description

[0025] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application. To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, those skilled in the art can obtain other drawings based on these drawings without any creative effort.

[0026] Figure 1 This is a schematic diagram of the structure of a semiconductor process equipment related to this technology; Figure 2 This is a schematic diagram of the structure of a transmission chamber in a related technology; Figure 3This is a top view of an electrostatic chuck provided in an embodiment of this application; Figure 4 This is a cross-sectional view of a pore structure provided in an embodiment of this application; Figure 5 This is a cross-sectional view of an electrostatic chuck provided in an embodiment of this application; Figure 6A This is a schematic diagram of the top surface structure of a second flow uniform plate provided in an embodiment of this application; Figure 6B This is a schematic diagram of the bottom structure of a second flow uniform plate provided in an embodiment of this application; Figure 7A This is a schematic diagram of the top surface structure of a first flow uniform plate provided in an embodiment of this application; Figure 7B This is a schematic diagram of the bottom structure of a first flow uniform plate provided in an embodiment of this application; Figure 8A This is a schematic diagram of a process chamber in a first state according to an embodiment of this application; Figure 8B This is a schematic diagram of a process chamber in a second state according to an embodiment of this application; Figure 9 This is a schematic diagram of an assembly structure of an electrostatic chuck and an edge ring provided in an embodiment of this application; Figure 10 This is a schematic diagram illustrating the mating relationship between an electrostatic chuck and an edge ring, provided in an embodiment of this application. Figure 11 This is a schematic flowchart of a purging method provided in an embodiment of this application.

[0027] The realization of the objectives, functional features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. The accompanying drawings have illustrated specific embodiments of this application, which will be described in more detail below. These drawings and textual descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concepts of this application to those skilled in the art through reference to specific embodiments. Detailed Implementation

[0028] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0029] For ease of description, the following embodiments are all illustrated using an orthogonal space defined by a horizontal plane and a vertical direction. This premise should not be construed as a limitation of this application.

[0030] For high-power (e.g., 5kV) applications of semiconductor etching equipment, one of the core aspects of process control is temperature control of the wafer surface. The most crucial aspect is minimizing the thermal resistance of the electrostatic chuck (ESC) to improve cooling capacity. Without backblowing, the process environment is vacuum, and the gap between the ESC and the wafer (formed by the roughness of two surfaces) is also a vacuum, resulting in very low thermal conductivity and poor cooling performance. Therefore, backblowing by introducing gas can improve the cooling capacity of the ESC. Since the thermal conductivity of the gas gap layer between the ESC and the wafer (0.004~0.04 W / (m·K)) is much lower than that of other solid dielectric layers (2~200 W / (m·K)), reducing the thermal resistance of the gas gap layer is the most effective measure to improve the cooling capacity of the ESC.

[0031] Please see Figure 1 , Figure 1 This is an electrostatic chuck of related technology. Its surface is divided into two regions: a first bearing surface 11a for supporting the central region of the wafer, and a second bearing surface 12a for supporting the edge region of the wafer. The first bearing surface 11a has a first roughness, and the second bearing surface 12a has a second roughness. The first roughness is greater than the second roughness. The first roughness increases the contact area between the wafer and the first bearing surface 11a while ensuring uniform gas distribution between them. The second roughness enables edge gas sealing on the second bearing surface 12a. Furthermore, the electrostatic chuck surface body is provided with at least two sequentially nested annular gas channels 13a for introducing gas between the first bearing surface and the wafer. Figure 1 As shown, two annular gas channels 13a divide the first bearing surface 11a into a central region 111a and an intermediate region 112a.

[0032] This electrostatic chuck can improve the cooling effect of the wafer to a certain extent, but the temperature uniformity of the wafer surface is poor. The applicant's research found that the uneven temperature of the wafer surface is mainly due to the difference in roughness between the first bearing surface 11a and the second bearing surface 12a, and the uneven and sparse arrangement of the annular gas channels 13a on the surface, which affects the pressure uniformity of the back-blown gas between the electrostatic chuck and the wafer. Therefore, it is impossible to guarantee the temperature uniformity of the wafer surface, especially in high-RF power applications, where the problem of uneven wafer surface temperature will be further amplified.

[0033] As an improvement to the above solution, please refer to Figure 2 , Figure 2Another type of electrostatic chuck in this technology has an annular boss 11b and multiple bumps 12b (or high-roughness treatment) on its upper surface, with a height of approximately 5-20 μm. The annular boss 11b surrounds the edge of the chuck to seal the wafer edge. The multiple bumps 12b are located inside the annular boss 11b and are evenly distributed. The upper surfaces of the bumps 12b and the annular boss 11b are in contact with the wafer, jointly supporting it. The bumps 12b (or high roughness) on the surface of this electrostatic chuck provide uniform back-blown gas pressure. However, the cooling effect on the wafer often fails to meet requirements.

[0034] The applicant further analyzed the issue. Gas thermal resistance can generally be divided into gas conduction thermal resistance and convection thermal resistance. For heat transfer in the gas gap layer between the electrostatic chuck and the wafer, since the gas leakage is close to zero and the gas pressure is stable, the convection thermal resistance can be ignored, and the gas conduction thermal resistance is the main consideration. For a flat-walled gas layer, the gas conduction thermal resistance R... cond The calculation formula is: R cond = L / kA, Where: L is the thickness of the gas layer in meters (m), k is the thermal conductivity of the gas in watts per meter per Kelvin (W / (m·K)), and A is the heat transfer area in square meters (m²). Because the height of bump 12b is relatively large, it is equivalent to a large gas layer thickness L, which significantly increases the thermal resistance of the gas layer. Furthermore, the contact area between bump 12b and the wafer is small, typically 0.5%~10%, which further reduces the direct heat conduction capability of the electrostatic chuck to the wafer. In summary, while surface bump 12b can improve the temperature uniformity of the wafer surface, it cannot meet the requirements for rapid wafer cooling.

[0035] In summary, neither the first approach, which combines low roughness with an annular inlet groove, nor the second approach, which combines protrusions (or high roughness) with an annular boss seal, can simultaneously meet both cooling requirements and temperature uniformity needs. Therefore, this application provides an electrostatic chuck, a process chamber, semiconductor process equipment, and a self-cleaning method.

[0036] Please see Figure 3 , Figure 3 This is a top view schematic diagram of an electrostatic chuck provided in an embodiment of this application. The top surface of the electrostatic chuck 100 is provided with multiple vent holes 31 for introducing inert gas between the electrostatic chuck 100 and the wafer it supports. The top surface of the electrostatic chuck 100 has a target roughness to increase the contact area between the electrostatic chuck 100 and the wafer when the wafer is supported on the electrostatic chuck 100, and to seal the inert gas introduced between the electrostatic chuck 100 and the wafer.

[0037] For example, the electrostatic chuck 100 may include an aluminum substrate and an insulating layer forming the top surface of the aluminum substrate. The insulating layer may be an insulating coating or an insulating plate. Electrodes are disposed inside the insulating layer to connect to an external adsorption voltage for electrostatic adsorption of the wafer.

[0038] In this embodiment, by providing multiple vents 31 on the top surface of the electrostatic chuck 100, and because the top surface of the electrostatic chuck 100 has a target roughness, the contact area between the electrostatic chuck 100 and the wafer can be increased, and an inert gas (which can be helium) introduced between the electrostatic chuck 100 and the wafer can be sealed. The inert gas acts as a heat transfer medium, thereby improving the cooling efficiency of the wafer carried by the electrostatic chuck 100. Since the roughness of the top surface of the electrostatic chuck 100 is uniform and is the target roughness, the temperature uniformity of the wafer can be improved.

[0039] Preferably, multiple vents 31 are evenly arranged on the top surface of the electrostatic chuck 100, thereby forming multiple uniform cooling points on the top surface of the electrostatic chuck 100, which can further improve the temperature uniformity of the wafer.

[0040] It should be noted that the greater the target roughness, the larger the diffusion range of gas on the top surface of the electrostatic chuck 100 after flowing in from the vent 31. In this case, the gas diffusion range of two adjacent vents 31 can overlap, meaning that the gas in two adjacent vents 31 can be connected, as long as the vents 31 near the edge are sufficiently far from the edge of the electrostatic chuck 100 to form a gas seal. Conversely, the smaller the target roughness, the smaller the diffusion range of gas on the top surface of the electrostatic chuck 100 after flowing out from each vent 31. In this case, a vacuum isolation zone may exist between two adjacent vents 31, which will reduce the cooling efficiency to some extent. Therefore, by setting appropriate vent spacing and roughness, and coordinating with the uniform distribution of the vents 31, the cooling efficiency and temperature uniformity can be improved.

[0041] It is understandable that when the electrostatic chuck surface structure is rough, the gas layer thickness can be defined as the roughness of the electrostatic chuck surface plus the roughness of the wafer back side; when the electrostatic chuck surface structure is bump-type, the gas layer thickness can be defined as the bump height of the electrostatic chuck surface plus the roughness of the electrostatic chuck surface plus the roughness of the wafer back side. In this embodiment, the electrostatic chuck surface is rough. Compared to the first scheme described above, it not only has lower roughness (which can form a gas seal), which is beneficial for reducing gas gap thermal resistance, but the uniformly distributed pores 31 can also improve wafer temperature uniformity. Compared to the second scheme, the gas gap layer thickness is significantly reduced, thus greatly reducing gas gap thermal resistance.

[0042] As an example, the target roughness of the top surface of the electrostatic chuck 100 can be Ra 0.05~0.2μm. The target roughness is sufficient to ensure that the leakage of inert gas between the electrostatic chuck 100 and the wafer is almost zero. Therefore, the target roughness cannot be too large; a target roughness not exceeding Ra 0.2μm can create a sealing effect and improve the cooling effect of the electrostatic chuck 100. The target roughness also aims to increase the contact area between the electrostatic chuck 100 and the wafer. Therefore, the target roughness cannot be too small; if it is too small, the inert gas cannot effectively diffuse around the vent 31, resulting in a large area of ​​vacuum between the electrostatic chuck 100 and the wafer, reducing the cooling effect of the electrostatic chuck 100. A target roughness not less than Ra 0.05 can form a good seal and allow the inert gas to diffuse within a certain range between the electrostatic chuck 100 and the wafer. The wafer can then seal the vent 31 and the area around the vent 31. This embodiment uses uniformly distributed pores 31 and low surface roughness, which can not only improve the problem of uneven temperature on the wafer surface, but also improve the cooling effect of the electrostatic chuck 100 on the wafer.

[0043] As an example, the diameter of the vent 31 can be 0.2~0.6mm. If the diameter of the vent 31 is too large, it will significantly reduce the direct contact area between the electrostatic chuck 100 and the wafer, thus reducing the cooling effect of the electrostatic chuck 100. If the diameter of the vent 31 is too small, it will increase the diffusion resistance of the inert gas between the electrostatic chuck 100 and the wafer, resulting in a larger vacuum between the electrostatic chuck 100 and the wafer, which also reduces the cooling effect of the electrostatic chuck 100.

[0044] It should be noted that the uniform arrangement of the pores 31 can be either evenly spaced or arranged in a specific manner. For example, all pores 31 can be arranged concentrically on circumferences of different diameters, with pores 31 on the same circumference arranged at equal intervals, resulting in a uniform circumferential distribution of the pores 31. The diameters of the different circumferences can be different, and the spacing between the pores on different circumferences can also be different. The ultimate goal is to improve the uniformity of temperature distribution on the wafer, and the specific arrangement of the pores 31 is not particularly limited. In one embodiment, all pores 31 are evenly distributed on multiple circumferences with different radii centered on the center of the electrostatic chuck 100, and the distance between the centers of two adjacent pores 31 on the outermost circumference is less than the distance between the centers of two adjacent pores 31 on any circumference within the outermost circumference.

[0045] In this embodiment, all the vents 31 are arranged in concentric circles. The inner region 301 is defined by a circle 303 (whose radius can be half the sum of the radii of the circles containing the outermost and second-outermost vents 31) between the outermost and second-outermost vents 31. The region outside the circle 303 is the outer region 302. The vents 31 in the inner region 301 increase the contact area between the electrostatic chuck 100 and the wafer W, improving the temperature uniformity of the wafer and sealing the inert gas introduced between the electrostatic chuck 100 and the wafer W. The vents 31 in the outer region 302 are arranged more densely. This is because, to prevent the electrostatic chuck 100 from being etched, the diameter of the electrostatic chuck 100 is typically 1-3 mm smaller than the wafer diameter. Therefore, the distance between the edge vents cannot be too large to prevent insufficient cooling capacity at the wafer edge, which would lead to poor temperature uniformity on the wafer surface.

[0046] As examples, the distance (as a straight line distance) between the centers of two adjacent vents 31 on the outermost circumference can be 5~10mm, the distance between the centers of two adjacent vents 31 on any circumference within the outermost circumference is 7.5~15mm, and the difference in radius between the circumference where the outermost vents 31 are located and the circumference where the next outermost vents 31 are located can be 7.5~15mm.

[0047] According to the test, when the diameter is 0.2~0.6mm and the target roughness is Ra0.05~0.2μm, the cooling range after the gas enters the outer ring pores is between 5~10mm in radius, and the cooling range after the gas enters the secondary outer ring and the inner pores is between 7.5~15mm in radius.

[0048] By limiting the spacing of the vents 31, a good balance can be achieved in terms of improving the cooling capacity of the wafer and improving the temperature uniformity of the wafer surface. In addition, the distance between the center of the vents 31 on the outermost circumference and the edge of the electrostatic chuck 100 can be 3~10mm, which can ensure that the vents 31 on the outermost circumference can improve the cooling effect on the wafer edge.

[0049] In one embodiment, see Figure 4 , Figure 4 This is a cross-sectional view of an embodiment of the present application, showing that the vents 31 and the top surface of the electrostatic chuck 100 are connected by a chamfer to form grooves 32 on the top surface of the electrostatic chuck 100 corresponding to the vents 31 one-to-one. The chamfer can be a rounded corner, a beveled edge, or a combination of both. The chamfer transition enhances the local diffusion effect of the inert gas, thereby increasing the influence range of the vents 31. Furthermore, compared to directly using large-diameter vents without a chamfer, this embodiment can easily maintain high pressure in the vents 31.

[0050] Optional, please continue reading Figure 4The relationship between the distance L between the centers of two adjacent vents 31 on the same circumference and the diameter d of the top of the groove 32 satisfies: d ≤ L - 5 mm. That is, the closest distance between the edges of two adjacent vents 31 must be greater than or equal to 5 mm. This ensures improved temperature uniformity of the wafer while avoiding the problem of high processing difficulty and cost caused by two adjacent vents 31 being too close. The depth H of the groove 32 is greater than or equal to 10 μm, which ensures that the inert gas flows stably between the electrostatic chuck 100 and the wafer, improving the cooling effect.

[0051] In one embodiment, see Figure 5 , Figure 5 This is a cross-sectional view of an electrostatic chuck provided in an embodiment of this application. The electrostatic chuck 100 includes a first flow equalizer 10, a second flow equalizer 20, and a third flow equalizer 30 stacked sequentially from bottom to top. Air holes 31 are disposed on the third flow equalizer 30. Between the second flow equalizer 20 and the third flow equalizer 30, there are annular flow equalizer channels 21 corresponding to a plurality of circumferences, each annular flow equalizer channel 21 communicating with the corresponding air hole 31 on the circumference. An air inlet channel 11 is provided between the first flow equalizer 10 and the second flow equalizer 20, communicating with the annular flow equalizer channel 21. The bottom surface of the first flow equalizer 10 has an air inlet hole 12 communicating with the air inlet channel 11.

[0052] In this embodiment, the back-blown inert gas enters the inlet channel 11 from the inlet hole 12 on the bottom surface of the first flow equalizer 10, and then flows into each annular flow equalizer channel 21. The inert gas in each annular flow equalizer channel 21 finally enters the space between the third flow equalizer 30 and the wafer through the corresponding pore 31 on the circumference. By setting the annular flow equalizer channels 21 that correspond one-to-one with the plurality of circumferences, the gas uniformity of the pores 31 can be improved.

[0053] In one embodiment, see Figure 6A , Figure 6A This is a schematic diagram of the top surface structure of a second flow equalization plate according to an embodiment of this application. All annular flow equalization channels 21 include: an edge annular flow equalization groove 211, a plurality of central annular flow equalization grooves 212 nested sequentially within the inner circle of the edge annular flow equalization groove 211, and a connecting groove 213 connecting the plurality of central annular flow equalization channels 21. In this embodiment, all annular flow equalization channels 21 are arranged on the top surface of the second flow equalization plate 20, and the third flow equalization plate 30 covers the top surface of the second flow equalization plate 20, so that all grooves can form corresponding annular flow equalization channels. It can be understood that all annular flow equalization channels 21 can also be arranged on the bottom surface of the third flow equalization plate 30.

[0054] Please see Figure 7A , Figure 7AThis is a schematic diagram of the top surface structure of a first flow equalizer provided in an embodiment of this application. The air intake channel 11 includes an edge air intake groove 111 for supplying air to the edge annular flow equalizer groove 211, and a central air intake groove 112 for supplying air to any central annular flow equalizer groove 212. In this embodiment, the air intake channel 11 is set on the top surface of the first flow equalizer 10 as an example. The second flow equalizer 20 covers the top surface of the first flow equalizer 10, so that each air intake groove on the first flow equalizer 10 forms a corresponding air intake channel 11. It can be understood that the edge air intake groove 111 and all the central air intake grooves 112 can also be set on the bottom surface of the second flow equalizer 20.

[0055] Since all the central annular flow equalization grooves 212 are interconnected through the connecting grooves 213, supplying air to any one of the central annular flow equalization grooves 212 via the air inlet channel 11 will ensure that inert gas flows into all the central annular flow equalization grooves 212. Please refer to Figure 7B , Figure 7B This is a schematic diagram of the bottom structure of a first flow equalizer provided in an embodiment of this application. The air inlet 12 includes a first through hole 121 communicating with the edge air inlet groove 111 and a second through hole 122 communicating with the center air inlet groove 112.

[0056] In this embodiment, the first inert gas enters through the first through-hole 121, flows into the edge inlet groove 111, and finally enters the edge annular uniform flow groove 211, supplying gas to the vents 31 in the outer ring region 302; the second inert gas enters through the second through-hole 122, flows into the center inlet groove 112, and finally enters each center annular uniform flow groove 212, supplying gas to the vents 31 in the inner ring region 301. Since the vents 31 in the outer ring region 302 need to control the temperature of the wafer edge, this embodiment, by supplying gas to the vents 31 in the outer ring region 302 and the vents 31 in the inner ring region 301 separately, can better control the temperature of the wafer surface and improve temperature uniformity.

[0057] For example, please refer to Figure 8A The vent 31 in the outer ring region 302 can be connected to the edge air inlet pipe T1, and the vent 31 in the inner ring region 301 can be connected to the center air inlet pipe T2. The edge air inlet pipe T1 and the center air inlet pipe T2 are respectively equipped with a first pressure sensor S1 and a second pressure sensor S2 to control the air pressure between the wafer edge and the center region, so as to regulate the temperature uniformity of the wafer.

[0058] Optional, please continue reading Figure 6A and 8AThe annular flow equalization channel 21 has at least two connecting grooves 213, which are rotationally symmetrical with respect to the center of the central annular flow equalization channel 212. The central air intake channel 111 includes a central main channel 1121 and a central branch channel 1122 corresponding to the connecting grooves 213. One end of the central branch channel 1122 is connected to one end of the central main channel 1121 at the center of the central annular flow equalization channel 212, and the other end of the central branch channel 1122 is connected to the corresponding connecting groove 213. The other end of the central main channel 1121 is connected to the second through hole 122.

[0059] Figure 6A , Figure 6B Taking the example of three connecting slots 213, accordingly, Figure 7A Taking the central branch slot 1122 as an example with three slots, a first connecting through hole 2131 can be provided on each connecting slot 213 to communicate with the central branch slot 1122. Please also refer to Figure 7A For example, the first connecting through hole 2131 may be disposed at the intersection of the connecting groove 213 and one of the central annular flow equalization grooves 212. Figure 6A In this embodiment, the connecting groove 213 is a straight line. In other embodiments, the connecting groove 213 may also be curved. This application does not impose any particular limitation on the embodiments. In addition, the central branch groove 1122 may be a straight line or a curve. When all the central branch grooves 1122 are rotationally symmetrical with respect to the center of the central annular uniform flow groove 212, the length of the inert gas diffusion path can be the same, which is beneficial to improving the gas uniformity.

[0060] In one embodiment, please refer to... Figure 7A The edge inlet groove 111 includes two edge main grooves 1111. One end of each edge main groove 1111 is connected to the first through hole 121, and the other end is connected to the edge annular flow equalization groove 211. The line connecting the two edge main grooves 1111 with the center of the first through hole 121 and the center of the edge annular flow equalization groove 211 is axially symmetrical, which can make the gas diffusion path length the same and improve the gas uniformity.

[0061] For example, please refer to Figure 7A The edge air inlet slot 111 may further include two edge branch slots 1112 corresponding one-to-one with the two edge main slots 1111, and the two edge branch slots 1112 are rotationally symmetrical with respect to the center of the central annular flow equalization slot 212. Both ends of the edge branch slots 1112 are connected to the edge annular flow equalization slot 211. For example, please refer to... Figure 6A and Figure 6BA second connecting through hole 2111 can be provided on the second flow equalizing plate 20 at a position corresponding to both ends of the edge branch groove 1112 of the first flow equalizing plate 10. The second connecting through hole 2111 is also connected to the edge annular flow equalizing groove 211. The edge main groove 1111 is connected to the middle of the edge branch groove 1112 and is connected to the edge annular 200-shaped flow equalizing groove 211 through the edge branch groove 1112.

[0062] For example, corresponding pinholes 130, 230, and 310 can be provided on the first flow equalizer 10, the second flow equalizer, and the third flow equalizer 30, respectively, for the ejector pin to pass through, so that the ejector pin can support the lifting and lowering of the wafer during the wafer transfer process.

[0063] This application embodiment also provides a process chamber, which may include an electrostatic chuck 100 and an edge ring 200 as described in any of the above embodiments. The edge ring 200 is disposed around the outside of the electrostatic chuck 100 for supporting the wafer when it is raised.

[0064] In one embodiment, see Figure 5 , Figure 8A and Figure 8B , Figure 8A This is a schematic diagram of a process chamber in a first state (corresponding to the edge ring 200 not being raised) according to an embodiment of this application. Figure 8B This is a schematic diagram of a process chamber in a second state (corresponding to the edge ring 200 being raised) according to an embodiment of this application. The electrostatic chuck 100 has a first annular protrusion 110 on its side, which surrounds the electrostatic chuck 100. The top surface of the first annular protrusion 110 (the surface facing the top surface of the electrostatic chuck 100) is lower than the top surface of the electrostatic chuck 100, forming a "convex" structure. The top surface of the first annular protrusion 110 also has an annular groove 120 surrounding the electrostatic chuck 100. The edge ring 200 surrounds the outer side of the electrostatic chuck 100 and is supported on the first annular protrusion 110. The inner side of the edge ring 200 has a support platform 240 for supporting the wafer W, and the top surface of the support platform 240 is lower than the top surface of the electrostatic chuck 100. The inner diameter of the edge ring 200 is larger than the inner diameter of the annular groove 120 but smaller than the outer diameter of the annular groove 120. That is, the edge ring 200 covers a part of the annular groove 120, exposing the part of the annular groove 120 near the inner ring to form an opening 210. The opening 210 can serve as an inlet for foreign objects (particulate byproducts, etc.) to enter the annular groove 120 during the process.

[0065] In one embodiment, the edge of the electrostatic chuck 100 is provided with a third through hole 105, and the process chamber also includes a lifting device. The drive rod of the lifting device passes through the third through hole to control the lifting and lowering of the edge ring 200. Exemplarily, the third through hole 105 can be provided on the first annular protrusion 110, and the drive rod 250 of the lifting device can be connected to the edge ring 200 through the third through hole 105 to drive the edge ring 200 to lift and lower.

[0066] During pre-process or process maintenance, the lifting device controls the edge ring 200 to lift the wafer, such as... Figure 8B As shown, a certain gap is maintained between the electrostatic chuck 100 and the wafer. Then, back-blowing gas is activated to blow away the top surface of the electrostatic chuck 100. Foreign objects can enter the gap between the edge ring 200 and the side of the electrostatic chuck 100 and fall into the annular groove 120, thereby collecting the foreign objects and avoiding the need for frequent opening of the cavity for cleaning and maintenance of the electrostatic chuck 100. For example, the depth of the annular groove 120 can be 1 mm, and the surface roughness can be greater than or equal to Ra3.2.

[0067] For example, please refer to Figure 8A and Figure 9 , Figure 9 This is a schematic diagram of an assembly structure of an electrostatic chuck and an edge ring provided in an embodiment of this application. The edge ring 200 is provided with a positive electrode 101 and a negative electrode 102. The two are respectively connected to an external power supply through a first adsorption electrode 103 and a second adsorption electrode 104 to form an adsorption voltage on the surface of the edge ring 200 to electrostatically adsorb the wafer W. This can prevent the wafer W from being misaligned when the edge ring 200 lifts the wafer W and then blows it up.

[0068] In one embodiment, the inner sidewall of the support platform 240 is provided with a second annular protrusion 220, which is spaced apart from the sidewall of the electrostatic chuck 100. The second annular protrusion 220 can reduce the gap between the support platform 240 and the electrostatic chuck 100, preventing the purge gas pressure from dropping too quickly. Exemplarily, the top surface of the second annular protrusion 220 can be flush with (or not flush with) the support platform 240, and after the edge ring 200 rises, the top surface of the second annular protrusion 220 can support the wafer W. Exemplarily, after the edge ring 200 lifts the wafer, the height of the lower surface of the second annular protrusion 220 is 0.5~2mm greater than the height of the top surface of the electrostatic chuck 100. If this height is too small, the gas flow resistance will be too large, making it difficult for the gas to diffuse and greatly weakening the purge effect; if the distance is too large, the gas pressure will drop too quickly, failing to guarantee the purge effect.

[0069] For example, please refer to Figure 10 , Figure 10This is a schematic diagram of the fit between an electrostatic chuck and an edge ring provided in an embodiment of this application. The diameter of the portion of the electrostatic chuck 100 surrounded by the edge ring 200 is D, the diameter of the inner ring of the second annular protrusion 220 is d1, and the diameter of the inner sidewall of the edge ring 200 is d2. The relationship between the three diameters can satisfy the following: d1=D+(0.3~1mm), d2=D+(1~3mm). The above diameter relationship can make a reasonable gap between the electrostatic chuck 100 and the edge ring 200, so that the gas pressure will not drop too much while ensuring that the airflow can diffuse effectively.

[0070] This application also provides a semiconductor process apparatus, which includes a gas pipeline and a process chamber as described in any of the above embodiments. The gas pipeline is used to introduce inert gas into a gas inlet 31. Exemplarily, the gas pipeline may include the edge inlet pipeline T1 and the center inlet pipeline T2 described in the foregoing embodiments.

[0071] This application also provides a purging method for an electrostatic chuck, applied in a process chamber where an annular groove 120 is provided on the electrostatic chuck 100. Please refer to [link to relevant documentation]. Figure 11 The purging method may include: S110, control the edge ring to rise so that the edge ring raises the wafer located on the top surface of the electrostatic chuck to the target height.

[0072] For example, the process chamber may include a lifting device 250. Specifically, a through hole may be provided on the first annular protrusion 110 to allow the lifting device 250 to pass through, and the lifting device 250 controls the lifting of the edge ring 200 through the through hole.

[0073] Before the process, after the wafer W is transferred, an adsorption determination can be performed first. Specifically, an adsorption voltage is applied to the electrostatic chuck 100 to adsorb the wafer W. If the back-blown gas leakage exceeds the permissible value (usually >2 sccm) after adsorption, the surface of the electrostatic chuck 100 needs to be self-cleaned; otherwise, the process can proceed directly.

[0074] During self-cleaning, the edge ring 200 can be driven to rise by the lifting device 250, and the support platform 240 of the edge ring 200 will lift the wafer to the target height, thereby creating a gap between the electrostatic chuck 100 and the wafer W.

[0075] S120, Control the multiple air holes to blow air between the electrostatic chuck and the wafer.

[0076] It can control all vents 31 to blow air between the electrostatic chuck 100 and the wafer W, or it can control only the vents 31 in the inner ring region 301 to blow air, as long as the target height is sufficient for gas flow. Optionally, the blowing gas pressure range can be 1~20 Torr, and the duration can be 10~60 seconds. Figure 8B As shown, the back-blowing gas flows from the center to the edge of the electrostatic chuck 100, sweeping away byproducts, particles, and other foreign matter from the surface of the electrostatic chuck. The foreign matter can fall into the annular groove 120. Optionally, the target height can be such that the bottom surface of the second annular protrusion 220 is 0.5~2mm higher than the top surface of the electrostatic chuck 100. If the distance is too small, the airflow will be too low, affecting the purging effect; if the distance is too large, the required air pressure will increase significantly.

[0077] After the above purging action is completed, the adsorption electrode voltage on the edge ring 200 can be removed, the lifting device 250 of the edge ring 200 is lowered to the lowest position, the edge ring 200 is supported on the first annular protrusion 110 of the electrostatic chuck 100, and at this time the wafer W is supported on the top surface of the electrostatic chuck 100.

[0078] After the electrostatic chuck 100 completes its self-cleaning action, it can perform adsorption judgment again. If the back-blowing gas leakage after adsorption is less than the permissible value (usually >2 sccm), the process is carried out. Otherwise, steps S110 and S120 are repeated. If the back-blowing gas leakage still exceeds the permissible value after three adsorptions (which can be set according to actual needs), the cavity needs to be opened to confirm the surface condition of the electrostatic chuck 100.

[0079] For other working principles and processes of the process chamber, semiconductor process equipment and self-cleaning method in this embodiment, please refer to the description of the electrostatic chuck in the foregoing embodiments of the present invention, which will not be repeated here.

[0080] The electrostatic chuck, process chamber, semiconductor process equipment, and self-cleaning method provided in this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. It should be noted that the descriptions of each embodiment in this application have different emphases, and parts not described in detail or in a certain embodiment can be referred to the relevant descriptions of other embodiments.

[0081] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, components, features, and elements with the same names in different embodiments of this application may have the same meaning or different meanings, the specific meaning of which must be determined by its interpretation in that specific embodiment or further in conjunction with the context of that specific embodiment.

[0082] It should be further understood that the terms "comprising" or "including" indicate the presence of the stated features, steps, operations, elements, components, items, types, and / or groups, but do not exclude the presence, occurrence, or addition of one or more other features, steps, operations, elements, components, items, types, and / or groups. The terms "or," "and / or," and "comprising at least one of the following," as used in this application, can be interpreted as inclusive, or mean any one or any combination thereof. For example, "comprising at least one of the following: A, B, C" means "any one of the following: A; B; C; A and B; A and C; B and C; A and B and C," and similarly, "A, B, or C" or "A, B, and / or C" means "any one of the following: A; B; C; A and B; A and C; B and C; A and B and C." Exceptions to this definition only occur when the combination of elements, functions, steps, or operations is inherently mutually exclusive in some way.

[0083] It should be understood that although the terms first, second, third, etc., may be used in this document to describe various types of information, this information should not be limited to these terms. These terms are only used to distinguish information of the same type from one another. For example, without departing from the scope of this document, first information may also be referred to as second information, and similarly, second information may also be referred to as first information. Depending on the context, the singular forms “a,” “an,” and “the” used in this document are intended to also include the plural forms, unless the context indicates otherwise.

[0084] It should be understood that the terms "top", "bottom", "upper", "lower", "vertical", "horizontal", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation on this application.

[0085] The above are merely preferred embodiments of this application and do not limit the patent scope of this application. The technical features of the technical solution of this application can be combined arbitrarily. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are also included within the patent protection scope of this application, as long as the combination of these technical features does not contradict each other.

Claims

1. An electrostatic chuck, characterized in that, The top surface of the electrostatic chuck is provided with multiple air holes for introducing inert gas between the electrostatic chuck and the wafer carried by the electrostatic chuck. The top surface of the electrostatic chuck has a target roughness, which is used to increase the contact area between the electrostatic chuck and the wafer when the wafer is carried on the electrostatic chuck, and to form a seal for the inert gas introduced between the electrostatic chuck and the wafer.

2. The electrostatic chuck according to claim 1, characterized in that, The target roughness is Ra 0.05~0.2μm; and / or, The diameter of the pores is 0.2~0.6mm.

3. The electrostatic chuck according to claim 1, characterized in that, The plurality of air holes are evenly arranged on the top surface of the electrostatic chuck.

4. The electrostatic chuck according to claim 3, characterized in that, The plurality of air holes are evenly distributed on a plurality of circles with different radii centered on the center of the electrostatic chuck. The distance between the centers of two adjacent pores on the outermost circumference is less than the distance between the centers of two adjacent pores on any circumference within the outermost circumference.

5. The electrostatic chuck according to claim 4, characterized in that, The distance between the centers of two adjacent pores on the outermost circumference is 5-10 mm; and / or, The distance between the center of the vent on the outermost circumference and the edge of the electrostatic chuck is 3~10mm; and / or, The distance between the centers of two adjacent pores on any circle within the outermost ring is 7.5~15mm; and / or, The difference in radius between the outermost circle containing the pores and the next outermost circle containing the pores is 7.5~15mm.

6. The electrostatic chuck according to claim 1, characterized in that, The air holes transition to the top surface of the electrostatic chuck through a chamfer, forming a groove on the top surface of the electrostatic chuck that corresponds one-to-one with the plurality of air holes.

7. The electrostatic chuck according to claim 6, characterized in that, The plurality of air holes are uniformly distributed on multiple circles with different radii centered on the center of the electrostatic chuck. The relationship between the distance L between the centers of two adjacent air holes on the same circle and the diameter d of the top of the groove satisfies: d ≤ L - 5 mm; and / or, The depth of the groove is greater than or equal to 10 μm.

8. The electrostatic chuck according to claim 4, characterized in that, The electrostatic chuck includes a first flow equalizer, a second flow equalizer, and a third flow equalizer, which are stacked sequentially from bottom to top. The plurality of air holes are disposed on the third flow equalizer plate; An annular flow equalization channel corresponding to each of the plurality of circumferences is provided between the second flow equalization plate and the third flow equalization plate, and each annular flow equalization channel is connected to the air hole on the corresponding circumference; An air intake channel is provided between the first flow equalizer and the second flow equalizer, and the air intake channel is connected to the annular flow equalizer channel. The bottom surface of the first flow equalizer is provided with an air inlet hole that communicates with the air inlet channel.

9. The electrostatic chuck according to claim 8, characterized in that, The plurality of annular flow equalization channels include: an edge annular flow equalization groove, a plurality of central annular flow equalization grooves nested sequentially within the inner circle of the edge annular flow equalization groove, and a connecting groove connecting the plurality of central annular flow equalization channels. The air intake channel includes an edge air intake slot for supplying air to the edge annular uniform flow slot, and a central air intake slot for supplying air to any of the central annular uniform flow slots. The air inlet includes a first through hole communicating with the edge air inlet groove and a second through hole communicating with the center air inlet groove.

10. The electrostatic chuck according to claim 9, characterized in that, The connecting groove has at least two grooves and is rotationally symmetrical with respect to the center of the central annular flow equalization groove; The central air intake slot includes a central main slot and central branch slots that correspond one-to-one with the connecting slots; one end of the central branch slot is connected to one end of the central main slot at the center of the central annular flow equalization slot, and the other end is connected to the corresponding connecting slot. The other end of the central main channel is connected to the second through hole.

11. The electrostatic chuck according to claim 9, characterized in that, The edge air intake groove includes two edge main grooves; One end of each of the two edge main grooves is connected to the first through hole, and the other end is connected to the edge annular flow equalization groove. Furthermore, the two edge main grooves are rotationally symmetrical with respect to the center of the central annular flow equalization groove.

12. The electrostatic chuck according to claim 11, characterized in that, The edge air intake groove also includes two edge branch grooves that correspond one-to-one with the two edge main grooves, and the two edge branch grooves are axially symmetrical about the line connecting the center of the first through hole and the center of the edge annular flow equalization groove. Both ends of the edge branch groove are connected to the edge annular flow equalization groove, and the edge main groove is connected to the middle of the edge branch groove and is connected to the edge annular flow equalization groove through the edge branch groove.

13. A process chamber, characterized in that, Includes an edge ring, and an electrostatic chuck as described in any one of claims 1-12; The edge ring is disposed around the outside of the electrostatic chuck to support the wafer when it is raised.

14. The process chamber according to claim 13, characterized in that, The electrostatic chuck has a first annular protrusion on its side, which surrounds the electrostatic chuck. The top surface of the first annular protrusion is lower than the top surface of the electrostatic chuck, and the top surface of the first annular protrusion has an annular groove surrounding the electrostatic chuck. The edge ring is supported on the first annular protrusion, and the inner side of the edge ring is provided with a support platform for supporting the wafer. The top surface of the support platform is lower than the top surface of the electrostatic chuck. The inner diameter of the edge ring is larger than the inner diameter of the annular groove, but smaller than the outer diameter of the annular groove.

15. The process chamber according to claim 14, characterized in that, The inner wall of the support platform is provided with a second annular protrusion, which is spaced apart from the side wall of the electrostatic chuck.

16. The process chamber according to claim 13, characterized in that, The edge of the electrostatic chuck is provided with a third through hole; The process chamber also includes a lifting device, the drive rod of which passes through the third through hole to control the lifting and lowering of the edge ring.

17. A semiconductor process apparatus, characterized in that, Includes gas pipelines and the process chamber as described in any one of claims 13-16; The gas pipeline is used to introduce the inert gas into the gas vent.

18. A method for purging an electrostatic chuck, characterized in that, Applied to the process chamber according to any one of claims 13-16, the purging method comprises: Control the edge ring to rise so that the edge ring lifts the wafer located on the top surface of the electrostatic chuck to the target height; Control the multiple air holes to blow air between the electrostatic chuck and the wafer.

19. The purging method according to claim 18, characterized in that, The target height is defined as the bottom surface of the second annular protrusion being 0.5~2mm higher than the top surface of the electrostatic chuck.

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