Virtual memory management method and system, graphics processor and electronic device

Abstract

The method comprises the following steps: receiving an allocation request sent by a target thread of a graphics processor; wherein the allocation request comprises a first memory requirement of the target thread; determining an allocation result of the target thread based on the first memory requirement of the target thread and tracking information of a virtual memory; wherein the virtual memory is managed by a corresponding binary tree; the binary tree comprises n layers, a root node of the binary tree is located at an n-th layer of the binary tree, a j-th layer of the binary tree comprises two nodes, j is a positive integer not greater than n; the virtual memory comprises two memory blocks; and the tracking information comprises a state of a memory block corresponding to each node of the binary tree. n‑j n‑1 ​​

Description

Technical Field

[0001] This disclosure relates to, but is not limited to, the field of computer technology, and in particular to a virtual memory management method and system, a graphics processor, and an electronic device. Background Technology

[0002] A graphics processing unit (GPU), also known as a display core, visual processor, or display chip, is a microprocessor specifically designed for performing image and graphics-related computations on personal computers, workstations, game consoles, and some mobile devices (such as tablets and smartphones).

[0003] In related technologies, the various programs inside the GPU (also known as engines, such as rendering engines, video engines, computing engines, etc.) work independently and require different memory spaces to run different programs, which leads to problems such as high hardware costs and low memory allocation efficiency. Summary of the Invention

[0004] This disclosure provides a virtual memory management method and system, a graphics processor, and an electronic device.

[0005] The technical solution of this disclosure embodiment is implemented as follows: This disclosure provides a method for managing virtual memory, the method comprising: Receive an allocation request sent by the target thread of the graphics processor; wherein the allocation request includes the target thread's first memory requirement; Based on the target thread's initial memory requirement and virtual memory tracking information, the allocation result for the target thread is determined. Virtual memory is managed through a corresponding binary tree. The binary tree has n levels, with the root node located at level n. Level j of the binary tree includes 2... n-j There are 2 nodes, where j is a positive integer not greater than n; the virtual memory includes 2 n-1 Each memory block; the tracking information includes the status of the memory block corresponding to each node of the binary tree.

[0006] This disclosure provides a method for managing virtual memory, the method comprising: Generate an allocation request; wherein the allocation request includes the first memory requirement of the target thread of the image processor; The allocation request is sent to the graphics processor's management module, which then determines the allocation result for the target thread based on the target thread's initial memory requirement and virtual memory tracking information. Virtual memory is managed through a corresponding binary tree. The binary tree has n levels, with the root node located at level n. Level j of the binary tree includes 2... n-jThere are 2 nodes, where j is a positive integer not greater than n; the virtual memory includes 2 n-1 Each memory block; the tracking information includes the status of the memory block corresponding to each node of the binary tree; Based on the target thread allocation result sent by the management module, switch the state of the target program.

[0007] This disclosure provides a virtual memory management system applied in a graphics processor. The system includes a management module and a target thread, wherein: The target thread is used to generate an allocation request and send it to the management module; the allocation request includes the target thread's initial memory requirement. The management module determines the memory allocation result for the target thread based on its initial memory requirement and virtual memory tracking information, and sends the allocation result to the target thread. Virtual memory is managed through a corresponding binary tree. The binary tree has n levels, with the root node located at level n, and level j containing 2... n-j There are 2 nodes, where j is a positive integer not greater than n; the virtual memory includes 2 n-1 Each memory block; the tracking information includes the status of the memory block corresponding to each node of the binary tree; The target thread is also used to switch the state of the target program based on the allocation result.

[0008] This disclosure provides a graphics processor that includes the aforementioned virtual memory management system.

[0009] This disclosure provides an electronic device including the graphics processor described above.

[0010] In this embodiment, firstly, each program can request the allocation of the same virtual memory block, realizing memory sharing and reuse; secondly, the tracking information includes the status of each memory block, but does not need to record information such as the address and size of each memory block, reducing the amount of tracking information and thus reducing hardware costs; finally, based on the status of each memory block, it can be quickly determined whether there is an available memory block for allocation, which improves the accuracy of the allocation result and also improves the memory allocation efficiency.

[0011] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0012] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the specification, serve to illustrate the technical solutions of this disclosure.

[0013] Figure 1AA schematic diagram illustrating the implementation process of a virtual memory management method provided in this embodiment of the disclosure; Figure 1B A schematic diagram of a binary tree corresponding to virtual memory provided in an embodiment of this disclosure; Figure 2A A schematic diagram of the implementation process of a virtual memory management method provided in this embodiment of the present disclosure is shown in Figure 2. Figure 2B A second schematic diagram of a binary tree corresponding to virtual memory provided in an embodiment of this disclosure; Figure 2C A schematic diagram of a binary tree corresponding to virtual memory provided in this embodiment of the disclosure. Figure 3 ; Figure 2D Schematic diagram four of a binary tree corresponding to virtual memory provided in this embodiment of the disclosure; Figure 2E A schematic diagram of a binary tree corresponding to virtual memory provided in this embodiment of the disclosure. Figure 5 ; Figure 3 A schematic diagram of the implementation process of a virtual memory management method provided in this embodiment of the disclosure. Figure 3 ; Figure 4A A schematic diagram illustrating the composition structure of a virtual memory management system provided in this embodiment of the disclosure; Figure 4B A schematic diagram of the implementation process of a virtual memory management method provided in this embodiment of the present disclosure is shown in Figure 4. Figure 5 This is a schematic diagram of a hardware entity of an electronic device according to an embodiment of this disclosure. Detailed Implementation

[0014] To make the objectives, technical solutions, and advantages of this disclosure clearer, the disclosure will be further described in detail below with reference to the accompanying drawings. The described embodiments should not be regarded as limitations on this disclosure. All other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0015] In the following description, references are made to “some embodiments,” which describe a subset of all possible embodiments. However, it is understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0016] In the following description, the terms “first, second, third” are used merely to distinguish similar objects and do not represent a specific ordering of objects. It is understood that “first, second, third” may be interchanged in a specific order or sequence where permitted, so that the embodiments of this disclosure described herein can be implemented in an order other than that illustrated or described herein.

[0017] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terminology used herein is for the purpose of describing embodiments of this disclosure only and is not intended to be limiting of this disclosure.

[0018] The method provided in this disclosure can be executed by an electronic device, which can be a laptop, tablet, desktop computer, set-top box, mobile device (e.g., mobile phone, portable music player, personal digital assistant, dedicated messaging device, portable gaming device), or a server. The server can be a standalone physical server, a server cluster or distributed system composed of multiple physical servers, or a cloud server providing basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, content delivery networks (CDNs), and big data and artificial intelligence platforms.

[0019] The technical solutions in the embodiments of this disclosure will now be clearly and completely described with reference to the accompanying drawings.

[0020] Figure 1A This is a schematic diagram illustrating the implementation process of a virtual memory management method provided in this embodiment of the disclosure, applied in the management module of a graphics processor, such as... Figure 1A As shown, the method includes steps S11 and S12, wherein: Step S11: Receive an allocation request sent by the target thread of the graphics processor; wherein the allocation request includes the first memory requirement of the target thread.

[0021] Here, the management module can be any suitable module capable of managing the virtual memory. For example, a hardware module. The virtual memory can correspond to a segment of storage space in memory (e.g., video memory).

[0022] A GPU includes at least one thread (hardware thread). A thread refers to a physical thread within the processor; it is the smallest unit of execution or processing within the GPU and can execute multiple instructions simultaneously. It is the foundation of parallel computing on a GPU and enhances its processing power. In practice, the number of threads in a GPU is hardware-dependent. It can be understood that the target thread can be any thread within the GPU.

[0023] The initial memory requirement can be any suitable size, such as 2MB (megabytes), 4MB, or 128MB. During implementation, if the target thread needs to run a program, a memory allocation request for the corresponding size must first be generated based on the program's memory requirements. Different programs may require the same or different amounts of memory. The program's components or functions perform specific tasks, such as computation, rendering, or data transfer.

[0024] In a GPU, the same program may need to be called multiple times. In practice, different threads can execute the same program concurrently. Therefore, the initial memory requirement for multiple threads executing the same program is the same, while the initial memory requirement for multiple threads executing different programs can be the same or different. For example, for the first target thread t1 and the second target thread t2 executing program A, and for the third target thread t3 executing program b, the initial memory requirement for the first target thread t1 and the second target thread t2 is the same, for example, 4MB, while the initial memory requirement for the third target thread t3 can be 4MB or another size.

[0025] Step S12: Based on the target thread's initial memory requirement and virtual memory tracking information, determine the allocation result for the target thread; wherein, virtual memory is managed through a corresponding binary tree; the binary tree has n levels, the root node of the binary tree is located at the nth level, and the jth level of the binary tree includes 2 n-j There are 2 nodes, where j is a positive integer not greater than n; the virtual memory includes 2 n-1 Each memory block; the tracking information includes the status of the memory block corresponding to each node of the binary tree.

[0026] Here, virtual memory is a segment of virtual memory in the graphics processing unit (GPU) used to store data required for thread execution. The GPU logically divides virtual memory into multiple memory blocks and manages them uniformly using specific data structures (such as binary trees).

[0027] The size of the memory block corresponding to a node at different levels is different, while the size of the memory block corresponding to a node at the same level is the same. In some implementations, in a binary tree, for two adjacent nodes, the upper-level node includes both lower-level nodes, and the size of the memory block corresponding to the upper-level node is twice the size of the memory block corresponding to the lower-level node. In some implementations, the root node of the tree corresponds to the largest memory block, and the leaf nodes of the tree correspond to the smallest memory blocks.

[0028] like Figure 1B As shown, the binary tree corresponding to this virtual memory has 4 levels. Level 4 includes the root node 41, level 3 includes nodes 31 and 32, level 2 includes nodes 21 to 24, and level 1 includes nodes 11 to 18. This virtual memory includes 8 memory blocks, namely memory block 1 to memory block 8. For node 41, which includes nodes 31 and 32, if the size of the memory block corresponding to node 41 is 8MB (i.e., each memory block is 1MB), then the size of the memory blocks corresponding to nodes 31 and 32 is 4MB, the size of the memory blocks corresponding to nodes 21 to 24 is 2MB, and the size of the memory blocks corresponding to nodes 11 to 18 is 1MB.

[0029] In implementation, the level of the binary tree corresponding to the virtual memory can be determined based on the granularity of the memory block corresponding to the leaf node (i.e., the size of the memory block) and the size of the virtual memory. In implementation, the memory block size corresponding to the root node level is 2. N-1 The size of the binary tree should not exceed the size of the virtual memory, where N is the total number of levels. For example, if the virtual memory is 100M and the granularity of the memory block corresponding to the leaf node is 1M, then the number of levels of the binary tree should be 7, that is: the memory block size corresponding to the 7th level node is 64M (2^N). 6 <100M. In this way, by representing virtual memory as the nearest power of 2, that is, the actual virtual memory used is no greater than the total virtual memory, not only is the possibility of allocation errors reduced, but the number of layers is also reduced, which reduces both complexity and data volume.

[0030] The tracking information may include, but is not limited to, the state of memory blocks corresponding to each node in all layers, the state of memory blocks corresponding to some nodes in all layers, the state of memory blocks corresponding to each node in some layers, and the state of memory blocks corresponding to some nodes in some layers. The state of a memory block may include, but is not limited to, occupied or unoccupied. In implementation, the state of the memory block can be represented in any suitable way. For example, 0 represents an unoccupied state, and 1 represents an occupied state. In some implementations, the tracking information may be represented by a tracking table, array, etc.

[0031] The allocation result may include, but is not limited to, a first allocation result and a second allocation result. The first allocation result indicates successful allocation. In implementation, the first allocation result may include, but is not limited to, the number of allocated memory blocks, the identifier of the starting memory block, the level number + number of bits, etc. For example, the first allocation result may include the 2nd bit of the 3rd level. Another example is that the first allocation result includes two memory blocks with a starting identifier of 3. The second allocation result indicates allocation failure. In implementation, the second allocation result may contain any suitable content, such as an error code indicating allocation failure, a preset value (e.g., -1), or an indication of allocation failure.

[0032] In some implementations, the allocation result is obtained by traversing at least one node of the adaptation layer (or target layer) in the tracking information, wherein the adaptation layer is determined based on a first memory requirement. In practice, if the memory block corresponding to a node in the traversed adaptation layer is in an unoccupied state, then the memory block corresponding to that node is used as the allocation result; conversely, if the memory blocks corresponding to each node in the adaptation layer are all in an occupied state, then a second allocation result is used as the allocation result. The size of the memory blocks corresponding to each node in the adaptation layer should not be less than the first memory requirement. For example, in... Figure 1B If the first memory requirement is 2M, then the second layer is used as the adaptation layer; if the first memory requirement is 6M, then the fourth layer is used as the adaptation layer.

[0033] In some implementations, the allocation result is obtained by traversing the tracking information.

[0034] In implementation, the use of a binary tree data structure enables efficient organization and querying of available memory blocks, avoiding the traversal overhead of the traditional linked list approach and reducing the consumption of hardware resources.

[0035] In some implementations, after determining the allocation result of the target thread, the allocation result can be sent to the target thread so that the target thread can switch the state of the target program based on the allocation result. The target program can be any of the aforementioned programs. The state of the target program can include, but is not limited to, a suspended state or a running state. In practice, if the allocation result indicates successful allocation, the target program can be run using the target thread; conversely, if the allocation result indicates allocation failure, the target program needs to be suspended until successful allocation before running it.

[0036] In this embodiment, firstly, each program can request the allocation of the same virtual memory block, realizing memory sharing and reuse; secondly, the tracking information includes the status of each memory block, but does not need to record information such as the address and size of each memory block, reducing the amount of tracking information and thus reducing hardware costs; finally, based on the status of each memory block, it can be quickly determined whether there is an available memory block for allocation, which improves the accuracy of the allocation result and also improves the memory allocation efficiency.

[0037] Figure 2A The second schematic diagram illustrates the implementation flow of a virtual memory management method provided in this embodiment of the present disclosure, applied in the management module of a graphics processor, such as... Figure 2A As shown, the method includes steps S21 to S24, wherein: Step S21: Receive an allocation request sent by the target thread of the graphics processor; wherein the allocation request includes the first memory requirement of the target thread.

[0038] Here, step S21 corresponds to step S11 mentioned above. In implementation, the specific implementation method of step S11 mentioned above can be referred to.

[0039] Step S22: Based on the first memory requirement of the target thread, determine the target layer from the nth level of the binary tree corresponding to the virtual memory; wherein, the binary tree includes n levels, the root node of the binary tree is located at the nth level of the binary tree, the jth level of the binary tree includes 2n-j nodes, and j is a positive integer not greater than n; the virtual memory includes 2n-1 memory blocks.

[0040] Here, the initial memory requirement can be any suitable size of memory space, such as 1MB, 4MB, etc. The size of the memory block varies depending on the node level, while the size of the memory block is the same for all nodes within the same level.

[0041] A target layer is a level in a binary tree structure used to represent memory blocks of a specific size. The size of the memory block corresponding to each node in the target layer is adapted to the initial memory requirement. In implementation, the size of the memory block corresponding to each node in the target layer is not less than the initial memory requirement, and there is only one target layer. For example, if the initial memory requirement is 4MB, and the size of the memory block corresponding to a node in a certain layer is exactly 4MB, then that layer is considered a target layer. As another example, if the initial memory requirement is 6MB, and the size of the memory block corresponding to the nearest node is 8MB, then that nearest layer is considered a target layer.

[0042] In some embodiments, step S22 includes steps S221 to S222, wherein: Step S221: Determine the second memory requirement based on the first memory requirement of the target thread.

[0043] Here, the second memory requirement is no less than the first memory requirement, and the second memory requirement is 2^i memory blocks, where i is a positive integer. In implementation, if the first memory requirement is a power of 2, then the first memory requirement is used as the second memory requirement; conversely, if the first memory requirement is not a power of 2, then the first memory requirement is scaled up to the nearest power of 2 (which must be greater than the first memory requirement), and this nearest power of 2 is used as the second memory requirement.

[0044] In some embodiments, step S221 includes step S2211 and / or step S2212, wherein: Step S2211: The first memory requirement of the target thread is 2 k In the case of multiple memory blocks, the first memory requirement is taken as the second memory requirement; where k is an integer not less than 0.

[0045] Here, when the initial memory requirement is 2 k If the first memory requirement is 1MB, 2MB, or 4MB, then that first memory requirement can be used as the second memory requirement.

[0046] Step S2212: The first memory requirement of the target thread is less than 2 k+1 There are 1 memory block and the target thread's first memory requirement is greater than 2. k In the case of two memory blocks, k+1 One memory block is used as the second memory requirement.

[0047] Here, when the first memory requirement is not a power of 2, it needs to be scaled up to the nearest power of 2, and this nearest power of 2 is used as the second memory requirement. For example, if the first memory requirement is 3MB, then 4MB can be used as the second memory requirement.

[0048] In this embodiment, by using a reasonable memory block number fetching logic, the number of selected memory blocks is ensured to meet the actual needs while also conforming to the binary tree structure allocation mechanism, thereby improving the flexibility and accuracy of memory allocation.

[0049] Step S222: Take the (i+1)th layer as the target layer.

[0050] Here, the size of the memory block corresponding to each node in the (i+1)th layer is not less than the first memory requirement. Since the second memory requirement is 2... i If there are 1 memory block, then the (i+1)th layer will be used as the target layer.

[0051] In this embodiment of the disclosure, a second memory requirement is determined based on a first memory requirement of the target thread; the second memory requirement is then converted into 2. i We define a memory block and use the (i+1)th layer as the target layer. By appropriately increasing the initial memory requirement, we can reduce the likelihood of program deadlock caused by memory fragmentation preventing dependent programs from running properly.

[0052] Step S23: Determine the state of the memory block corresponding to each node of the target layer from the virtual memory trace information; wherein, the trace information includes the state of the memory block corresponding to each node of the binary tree.

[0053] Here, the tracking information may include, but is not limited to, the status of memory blocks corresponding to all nodes in all layers, the status of memory blocks corresponding to some nodes in all layers, the status of memory blocks corresponding to each node in some layers, and the status of memory blocks corresponding to some nodes in some layers.

[0054] In some implementations, the tracking information for the target layer can be obtained from the tracking information. This tracking information for the target layer may include the state of the memory blocks corresponding to each node in the target layer. For example, if the tracking information includes the state of the memory blocks corresponding to each node in all layers, then the tracking information for the target layer includes the state of the memory blocks corresponding to each node in the target layer. For instance, in... Figure 1B In the process, the tracking information includes the state of the memory blocks corresponding to each node in these four layers, and the tracking information of the target layer includes the state of the memory blocks corresponding to each node in the second layer (i.e., the target layer).

[0055] Step S24: Determine the allocation result of the target thread based on the state of the memory block corresponding to each node of the target layer.

[0056] Here, according to a preset traversal strategy, at least one node in the target layer is traversed sequentially to obtain the allocation result. The traversal strategy includes the traversal direction, traversal start position, and traversal method. The traversal direction can include, but is not limited to, forward and backward, and backward and forward. The traversal start position can be any suitable position, such as the first node, the last node, or the node corresponding to the previously allocated memory block. The traversal method can include, but is not limited to, continuous traversal and non-continuous traversal (e.g., traversing by one node, traversing by two nodes, etc.). For example, starting from the first node, continuous traversal is performed from front to back.

[0057] The allocation result may include, but is not limited to, a first allocation result and a second allocation result. The first allocation result indicates successful allocation, while the second allocation result indicates allocation failure. In implementation, if the memory block corresponding to a node in the target layer is in an unoccupied state, the first allocation result is used as the allocation result for the target thread; conversely, if the memory blocks corresponding to all nodes in the target layer are in an occupied state, the second allocation result is used as the allocation result for the target thread.

[0058] In this embodiment of the disclosure, the thread allocation result is determined by the tracking information of the target layer. On the one hand, compared with determining the allocation result based on the tracking information of all layers, the traversal space is reduced, the determination time is shortened, and the allocation efficiency is improved. On the other hand, compared with information including the address and size of each memory block, the tracking information only includes the state of each memory block, which reduces the amount and complexity of the tracking information, thereby reducing the hardware cost.

[0059] In some embodiments, step S24 includes steps S241 and S242, wherein: Step S241: For any node in the target layer, traverse the state of the memory block corresponding to the node, determine the traversal result of the node, and if the traversal result of the node is the first traversal result, determine the node as the target node.

[0060] Here, the traversal results may include, but are not limited to, the first traversal result, the second traversal result, etc. The first traversal result indicates that the memory block corresponding to a node is in an unoccupied state. The second traversal result indicates that the memory block corresponding to each node in the target layer is in an occupied state. During implementation, when the memory block corresponding to a traversed node is in an unoccupied state, the first traversal result is used as the traversal result, and traversal stops.

[0061] Step S242: Use the first allocation result as the allocation result for the target thread.

[0062] Here, the allocation result may include, but is not limited to, the first allocation result, the second allocation result, etc. In implementation, if the traversal result is the first traversal result, then the first allocation result is used as the allocation result for the target thread; otherwise, if the traversal result is the second traversal result, then the second allocation result is used as the allocation result for the target thread.

[0063] In some implementations, the first allocation result includes information about the memory block corresponding to the target node. This information may include, but is not limited to, the quantity and identifier of the starting memory block. For example, in... Figure 1BIn the process, when the memory block corresponding to the third node in the second layer is in an unoccupied state, the first allocation result is used as the allocation result of the target thread. That is, the first allocation result includes two memory blocks with a starting identifier of 5; or, the first allocation result includes the third node in the second layer.

[0064] In this embodiment of the disclosure, by detecting the status of the corresponding memory blocks node by node within the target layer, the allocated memory blocks are ensured to be in an available state, thereby improving the reliability of memory allocation.

[0065] In some embodiments, the method further includes step S243, wherein: Step S243: If the traversal result of each node in the target layer is the second traversal result, use the second allocation result as the allocation result of the target thread.

[0066] Here, the second traversal result indicates that each memory block corresponding to the node is in an occupied state, and the second allocation result indicates that the allocation failed. In implementation, the second allocation result can contain any suitable content, such as an error code indicating allocation failure, a preset value (e.g., -1), or an indication of allocation failure. For example, in... Figure 1B In the second layer, when the memory blocks corresponding to nodes 21 to 24 are all occupied, the second allocation result is used as the allocation result of the target thread.

[0067] In this embodiment, when the memory blocks corresponding to all nodes cannot meet the allocation conditions, timely feedback of the allocation results helps to avoid performance degradation or deadlock problems caused by invalid allocation, thereby improving stability and operating efficiency.

[0068] In some implementations, the method further includes step S25, wherein: Step S25: If the allocation result of the target thread is the first allocation result, determine the first node from multiple nodes in the binary tree based on the first allocation result, and update the state of the memory block corresponding to the first node in the tracking information.

[0069] Here, assuming the allocation result indicates successful allocation, it is also necessary to update the state of the memory block corresponding to the first allocated node. There must be at least one first node. For example, in... Figure 1B If the target thread's initial memory requirement is 1M, then the number of the first nodes is 4, namely: node 11, node 21, node 31, and node 41; if the target thread's initial memory requirement is 8M, then the number of the first nodes is 15, namely: node 11~node 18, node 21~node 24, node 31~node 32, and node 41.

[0070] Updating the state of the memory block corresponding to the first node can include, but is not limited to, switching the state of the memory block corresponding to the first node from unoccupied to occupied, or maintaining the occupied state. For example, if a memory block is in an unoccupied state, and this memory block is the memory block corresponding to the first node, it is necessary to switch the state of the memory block to occupied and update the state of the memory block in the tracking information, for example, from 0 (unoccupied) to 1 (occupied).

[0071] In this embodiment of the disclosure, by updating the status of each memory block in the tracking information in a timely manner, the possibility of allocating the next thread to the same memory block is reduced, thereby improving both the accuracy of the allocation result and the allocation efficiency.

[0072] In some implementations, the step S25, "determining the first node from multiple nodes in the binary tree based on the first allocation result," includes steps S251 and S252, wherein: Step S251: Set the target node as a first node.

[0073] Here, the binary tree has n levels, where the root node is located at the nth level, and the jth level of the binary tree has 2... N-j There are n nodes, where j is a positive integer not greater than N.

[0074] The first allocation result includes information about the memory blocks corresponding to the target node. This information may include, but is not limited to, the number of memory blocks, the identifier of the starting memory block, the level number, and the number of bits. For example, in... Figure 1B In the example, the information of the memory block corresponding to node 22 can include the two memory blocks identified as 3 from the starting memory block, namely: memory block 3 and memory block 4. For example, in... Figure 1B In the above, the information of the memory block corresponding to node 22 can include the memory block corresponding to the second node of the second level, namely: memory block 3 and memory block 4.

[0075] The number of first nodes can be at least one. For example... Figure 2B As shown, the binary tree has 4 levels. The root node 41 includes nodes 31 and 32, node 31 includes nodes 21 and 22, node 32 includes nodes 23 and 24, node 21 includes nodes 11 and 12, node 22 includes nodes 13 and 14, node 23 includes nodes 15 and 16, and node 24 includes nodes 17 and 18. The memory block corresponding to each node is in an unoccupied state. Therefore, we can... Figure 2B Nodes 13 and 14 in the table are each considered as a first node; or... Figure 2B Node 22 in the table is used as the first node.

[0076] Step S252: Using the target node as the starting node, traverse the binary tree to obtain the associated nodes of the starting node, and take each associated node of the starting node as a first node; wherein, the associated nodes of the starting node include the nodes traversed when traversing upward to the root node and / or the nodes traversed when traversing downward to the leaf node.

[0077] Here, the traversal method includes at least one of upward traversal, downward traversal, etc. In implementation, if the target node is the root node, downward traversal is required; if the target node is a leaf node, upward traversal is required; if the target node is another node (not a leaf node and not a root node), both upward and downward traversal are required. The number of associated nodes includes at least one. For example, in... Figure 2B In the example, if the target node is node 11, then starting from node 11, traversing upwards to the root node involves nodes 21, 31, and 41. In this case, nodes 11, 21, 31, and 41 are each considered as a first node. For example, in... Figure 2B If the target node is node 22, then starting from node 22, the nodes traversed upwards to the root node include node 31 and node 41, and the nodes traversed downwards to the leaf node include node 13 and node 14. At this time, node 22, node 13, node 14, node 31 and node 41 are each taken as a first node.

[0078] like Figure 2C As shown, when the target node is node 11, the associated nodes of node 11 include node 21, node 31 and node 41. Since the memory blocks corresponding to each node of the binary tree are all in the unoccupied state 0, the state of the memory blocks corresponding to node 11, node 21, node 31 and node 41 can be updated to the occupied state 1.

[0079] like Figure 2D As shown, when the target node is node 22, the associated nodes of node 22 include node 31, node 41, node 13 and node 14. Since the memory blocks corresponding to nodes 22, 13 and 14 are in the unoccupied state 0, the state of the memory blocks corresponding to nodes 22, 13 and 14 can be switched to the occupied state 1. Since the memory blocks corresponding to nodes 31 and 41 are in the occupied state 1, the state of the memory blocks corresponding to nodes 31 and 41 is kept in state 1.

[0080] In this embodiment of the disclosure, by traversing the target node and its associated nodes, it is ensured that the state of the memory blocks corresponding to all affected nodes can be correctly updated, thereby maintaining the consistency and integrity of the tracking information.

[0081] In some embodiments, the method further includes steps S261 and S262, wherein: Step S26: Receive a release request sent by the target thread; wherein the release request includes memory release information.

[0082] Here, memory release information may include, but is not limited to, the number of memory blocks, the identifier of the starting memory block, the level number plus the number of bits, etc. In implementation, a release request can be generated after the target program in the target thread has finished executing.

[0083] Step S262: Based on the memory release information, determine the second node from multiple nodes in the binary tree, and update the state of the memory block corresponding to the second node in the tracking information.

[0084] Here, the number of second nodes is at least one. In implementation, the first target node can be determined first based on memory release information, and this first target node can be used as a second node. Then, using the first target node as the starting node, the binary tree is traversed to obtain the associated nodes of the starting node, and each associated node of the starting node is used as a second node. The associated nodes of the starting node include the nodes traversed upwards to the root node and / or downwards to the leaf nodes. The process of determining the second node is similar to the process of determining the first node in step S25 above; in implementation, the specific implementation method of step S25 above can be referred to.

[0085] Updating the state of the memory block corresponding to the second node can include, but is not limited to, switching the state of the memory block from occupied to unoccupied, or maintaining the occupied state. In implementation, after updating the state of the memory block corresponding to the second node, the contents of the storage space corresponding to each memory block can be cleared to release the corresponding storage space.

[0086] like Figure 2E As shown, the memory blocks corresponding to the root node 41, node 31, node 21, node 22, node 11, node 13, and node 14 in the binary tree are all in occupied state 1, while the remaining nodes are in unoccupied state 0. If the release information includes the memory block with identifier 1 as the starting memory block, i.e., the memory block corresponding to node 11, then node 11 can be used as the first target node. Therefore, the resulting second nodes include nodes 11, 21, 31, and 41. At this point: Switch the state of the memory block corresponding to node 11 to an unoccupied state; Since the memory blocks corresponding to the two child nodes (node ​​11 and node 12) of node 21 are both in an unoccupied state, the state of the memory block corresponding to node 21 can be switched to an unoccupied state. Since the memory block corresponding to one of the child nodes (node ​​22) of node 31 is in an occupied state, the memory block corresponding to node 31 can be kept in an occupied state. Since the memory block corresponding to one of the child nodes (node ​​31) of node 41 is in an occupied state, the memory block corresponding to node 41 can be kept in an occupied state.

[0087] In this embodiment of the disclosure, by releasing the request to update the status of each memory block in the tracking information in a timely manner, not only is the release logic of memory release reduced, but the memory blocks can also be released in a timely manner so that other threads can apply for memory blocks. This improves both the accuracy of the allocation result and the allocation efficiency.

[0088] Figure 3 A schematic diagram of the implementation process of a virtual memory management method provided in this embodiment of the disclosure. Figure 3 It is applied in the target thread of the graphics processor, such as Figure 3 As shown, the method includes steps S31 to S33, wherein: Step S31: Generate an allocation request; wherein the allocation request includes the first memory requirement of the target thread.

[0089] Here, the target thread generates this allocation request when the target program needs to run. The initial memory requirement can be any suitable size of memory space. In implementation, this initial memory requirement is related to the target program being run; different target programs may require the same or different amounts of memory space.

[0090] Step S32: The allocation request is sent to the management module of the graphics processor, so that the management module determines the allocation result of the target thread based on the first memory requirement of the target thread and the virtual memory tracking information; wherein, the virtual memory is managed through a corresponding binary tree; the binary tree has n levels, the root node of the binary tree is located at the nth level of the binary tree, and the jth level of the binary tree includes 2 n-j There are 2 nodes, where j is a positive integer not greater than n; the virtual memory includes 2 n-1 Each memory block; the tracking information includes the status of the memory block corresponding to each node of the binary tree.

[0091] Here, when the target thread needs to run the target program, it sends the allocation request to the management module so that the management module can allocate memory blocks. In implementation, the management module determines the allocation result for the target thread, as detailed in the specific implementation of step S12 above.

[0092] Step S33: Based on the target thread allocation result sent by the management module, switch the state of the target program.

[0093] Here, the allocation result of the target thread may include, but is not limited to, a first allocation result and a second allocation result. The first allocation result indicates successful allocation, and in implementation, it may include, but is not limited to, the number of allocated memory blocks, the identifier of the starting memory block, the level number plus the number of bits, etc. The second allocation result indicates allocation failure, and in implementation, it may contain any suitable content, such as an error code indicating allocation failure, a preset value (e.g., -1), or simply "allocation failed."

[0094] The target program's state can include, but is not limited to, suspended state and running state. During implementation, if the target thread's allocation result is the first allocation result, the target program's state can be switched to the running state; if the target thread's allocation result is the second allocation result, the target program's state can be switched to the non-running state, such as the suspended state.

[0095] In this embodiment, firstly, each thread can request the allocation of the same virtual memory block, realizing memory sharing and reuse; secondly, the tracking information includes the status of each memory block, but does not need to record the address, size, or other information of each memory block, reducing the amount of tracking information and thus reducing hardware costs; finally, the management module can quickly determine the thread allocation result based on the status of each memory block, improving the accuracy of the allocation result and the efficiency of memory allocation.

[0096] In some embodiments, step S33 includes step S331 and / or step S332, wherein: Step S331: If the allocation result of the target thread indicates that the allocation was successful, run the target program based on the information of the memory block in the allocation result of the target thread.

[0097] Here, the information about the memory blocks may include, but is not limited to, the number, the identifier of the starting memory block, the level and the number of bits. During implementation, the target program is run according to the allocated memory blocks.

[0098] Step S332: If the allocation result of the target thread indicates that the allocation has failed, switch the state of the target program to the preset state.

[0099] Here, the preset state can be any suitable non-running state, such as a suspended state or a ready state. During implementation, since no memory space has been allocated, the target program cannot run at this time. Therefore, the state of the target program can be switched to the preset state.

[0100] In this embodiment, the target program is run based on the memory block information in the allocation result of the target thread, or the state of the target program is switched to a preset state in the event of memory allocation failure, so as to make reasonable use of system resources, avoid resource waste and invalid waiting, thereby improving the reliability and concurrency performance of the target program.

[0101] In some embodiments, the method further includes steps S34 to S35, wherein: Step S34: Generate a release request.

[0102] Here, the release request is used to release the memory space occupied by the target program running in the target thread. In implementation, this release request includes memory release information, which may include, but is not limited to, the number of memory blocks, the identifier of the starting memory block, the level number plus the number of bits, etc. In implementation, this release request can be generated after the target program in the target thread has finished running.

[0103] Step S35: Send the release request to the management module so that the management module can determine the second node from multiple nodes of the binary tree based on the memory release information in the release request, and update the status of the memory block corresponding to the second node in the tracking information.

[0104] Here, the number of second nodes is at least one. The process by which the management module determines the second node is similar to the process by which the first node is determined in step S25 above. In implementation, the specific implementation method of step S25 above can be referred to.

[0105] Updating the state of the memory block corresponding to the second node can include, but is not limited to, switching the state of the memory block from occupied to unoccupied, or maintaining the occupied state. In implementation, after updating the state of the memory block corresponding to the second node, the contents of the storage space corresponding to each memory block can be cleared to release the corresponding storage space.

[0106] For example, in Figure 2E If the released information includes the memory block corresponding to the second node of the second level, i.e., the memory block corresponding to node 22, then the second node includes the memory blocks corresponding to nodes 31, 41, 13, and 14. In this case: Switch the memory blocks corresponding to nodes 22, 13, and 14 to an unoccupied state; Since the memory block corresponding to one of the child nodes (node ​​21) of node 31 is in an occupied state, the memory block corresponding to node 31 can be kept in an occupied state. Since the memory block corresponding to one of the child nodes (node ​​31) of node 41 is in an occupied state, the memory block corresponding to node 41 can be kept in an occupied state.

[0107] In this embodiment of the disclosure, by releasing the request to update the status of each memory block in the tracking information in a timely manner, not only is the release logic of memory release reduced, but the memory blocks can also be released in a timely manner so that other threads can apply for memory blocks. This improves both the accuracy of the allocation result and the allocation efficiency.

[0108] Based on the above embodiments, this disclosure also provides a virtual memory management system applied in a graphics processor. Figure 4A This is a schematic diagram of the composition structure of a virtual memory management system provided in an embodiment of the present disclosure, as shown below. Figure 4A As shown, the virtual memory management system 40 includes a management module 41 and a target thread 42, wherein: Target thread 42 is used to generate an allocation request and send the allocation request to the management module; the allocation request includes the target thread's first memory requirement; Management module 41 is used to determine the allocation result of the target thread based on the target thread's initial memory requirement and virtual memory tracking information, and send the allocation result to the target thread; wherein, virtual memory is managed through a corresponding binary tree; the binary tree has n levels, the root node of the binary tree is located at the nth level of the binary tree, and the jth level of the binary tree includes 2 n-j There are 2 nodes, where j is a positive integer not greater than n; the virtual memory includes 2 n-1 Each memory block; the tracking information includes the status of the memory block corresponding to each node of the binary tree; Target thread 42 is also used to switch the state of the target program based on the allocation result.

[0109] Here, management module 41 is any suitable module capable of managing virtual memory. The target thread is any one of the multiple threads in the graphics processor. The target program is the part, function, etc., that implements a certain function.

[0110] The initial memory requirement can be any suitable size. In practice, the initial memory requirement is related to the target program; different target programs may require the same or different amounts of memory.

[0111] In implementation, the allocation result of the target thread determined by the management module 41 can be referred to in the specific implementation of the aforementioned step S12, and the state of the target program switched by the target thread 42 can be referred to in the specific implementation of the aforementioned step S33.

[0112] In some implementations, the system also includes on-chip memory for the graphics processor, with virtual memory corresponding to a segment of storage space in the on-chip memory.

[0113] Here, the memory can be any suitable memory capable of storage. This memory can be the GPU's on-chip memory (On-Chip Memory), which has a small capacity and is generally used for data storage required within the high-speed processing chip. In implementation, this memory includes at least one memory address. This on-chip memory is the GPU's video memory, and virtual memory corresponds to a segment of that video memory.

[0114] In some implementations, the target thread is also used to send a release request to the management module 41; wherein the release request includes memory release information; the management module 41 is also used to determine a second node from multiple nodes of the binary tree based on the memory release information, and update the status of the memory block corresponding to the second node in the tracking information.

[0115] Here, after the target program in the target thread finishes execution, the target thread can generate a release request and send the release request to the management module.

[0116] The management module 41 updates the state of the memory block corresponding to the second node, as described in the specific implementation of step S35 above. In practice, after updating the state of the memory block corresponding to the second node, the contents of the video memory space corresponding to each memory block of the second node can be cleared to release the corresponding video memory space.

[0117] Figure 4B A schematic diagram of the implementation process of a virtual memory management method provided in this disclosure embodiment is shown in Figure 4. Figure 4B As shown, the method includes steps S410 to S417, wherein: Step S410: The management module establishes a binary tree corresponding to the virtual memory based on the size of the virtual memory, and initializes the trace table of the virtual memory (corresponding to the aforementioned trace information). Step S411: The target thread generates an allocation request (corresponding to the aforementioned allocation request) including the memory requirement (corresponding to the aforementioned first memory requirement) and sends the allocation request to the management module; Step S412: The management module determines the target memory requirement (corresponding to the second memory requirement mentioned above) based on the memory requirement. Here, scaling up the memory requirements can reduce the likelihood of program deadlocks caused by memory fragmentation. For example, if virtual memory includes 18 memory blocks (1-18), and if thread 1 running program A requires 6 memory blocks, thread 2 running program A requires 6 memory blocks, and thread 3 running program B requires 8 memory blocks, then: In related technologies, memory blocks 1-6 are allocated to thread 1, and memory blocks 7-12 are allocated to thread 2. Thread 3 must wait for program A in thread 1 or program A in thread 2 to finish running. If program A in thread 1 finishes running, it will release memory blocks 1-6. Since 12 memory blocks are unoccupied, 8 of these blocks (e.g., memory blocks 1-6 and 9-10) will be allocated to thread 3. However, because these 8 memory blocks are not contiguous, program B in thread 3 cannot run normally, causing other programs that depend on program B to enter a deadlock state.

[0118] By adopting the technical solution disclosed herein, the memory blocks required by thread 1 and thread 2 will be increased to 8 memory blocks. Then, memory blocks 1 to 8 will be allocated to thread 1 and memory blocks 9 to 16 will be allocated to thread 2. If program A in thread 1 finishes running, it will release memory blocks 1 to 8. At this time, memory blocks 1 to 8 can be allocated to thread 3, so that program B in thread 3 can run normally, and other programs that depend on program B will not enter a deadlock state.

[0119] Step S413: Based on the target memory requirement, the management module determines the target layer and determines the trace table of the target layer (corresponding to the trace information of the aforementioned target layer) from the trace table of virtual memory. Step S414: Based on the tracking table of the target layer, the management module determines the allocation result of the target thread, and if the allocation result of the target thread is the first allocation result, determines the first node and updates the status of the memory block corresponding to the first node in the tracking table of the virtual memory. Step S415: The target thread switches the state of the target program according to the allocation result; Step S416: In response to detecting that the target program in the target thread has finished executing, the target thread generates a release request including memory release information and sends the release request to the management module; Step S417: The management module determines the second node based on the memory release information and updates the status of the memory block corresponding to the second node in the virtual memory tracking table.

[0120] In this embodiment, firstly, each program can request the allocation of the same virtual memory block, realizing memory sharing and reuse; secondly, the trace information includes the status of each memory block, but does not need to record information such as the address and size of each memory block, reducing the amount of trace information and thus reducing hardware costs; thirdly, by appropriately amplifying the memory demand, the possibility of program deadlock due to memory fragmentation preventing dependent programs from running normally can be reduced; finally, determining the thread allocation result through the trace information of the target layer reduces the traversal space, shortens the determination time, and improves allocation efficiency compared to determining the allocation result based on the trace information of all layers.

[0121] In some implementations, the management module 41 is further configured to: determine the target layer from the nth level of the binary tree based on the first memory requirement of the target thread; determine the state of the memory block corresponding to each node of the target layer from the tracking information; and determine the allocation result of the target thread based on the state of the memory block corresponding to each node of the target layer.

[0122] In some implementations, the management module 41 is further configured to: determine a second memory requirement based on a first memory requirement of the target thread; wherein the second memory requirement is not less than the first memory requirement, and the second memory requirement is 2. i There are 1 memory blocks, where i is an integer not less than 0; the (i+1)th layer is taken as the target layer.

[0123] In some implementations, management module 41 is further configured to: when the first memory requirement of the target thread is 2 k In the case of multiple memory blocks, the first memory requirement is taken as the second memory requirement; where k is an integer not less than 0; when the first memory requirement of the target thread is less than 2 k+1 There are 1 memory block and the target thread's first memory requirement is greater than 2. k In the case of two memory blocks, k+1 One memory block is used as the second memory requirement.

[0124] In some implementations, the management module 41 is further configured to: for any node in the target layer, traverse the state of the memory block corresponding to the node, determine the traversal result of the node, and if the traversal result of the node is the first traversal result, determine the node as the target node; wherein the first traversal result indicates that the state of the memory block corresponding to the target node is unoccupied; and use the first allocation result as the allocation result of the target thread; wherein the first allocation result includes information about the memory block corresponding to the target node.

[0125] In some implementations, the management module 41 is further configured to: take the second allocation result as the allocation result of the target thread when the traversal result of each node in the target layer is the second traversal result; wherein the second traversal result indicates that each memory block corresponding to the node is in an occupied state, and the second allocation result indicates that the allocation failed.

[0126] In some implementations, the management module 41 is further configured to: if the allocation result of the target thread is a first allocation result, determine the first node from multiple nodes in the binary tree based on the first allocation result, and update the state of the memory block corresponding to the first node in the tracking information.

[0127] In some implementations, the management module 41 is further configured to: use the target node as a first node; traverse the binary tree with the target node as the starting node to obtain the associated nodes of the starting node, and use each associated node of the starting node as a first node; wherein the associated nodes of the starting node include the nodes traversed when traversing upward to the root node and / or the nodes traversed when traversing downward to the leaf node.

[0128] The description of the system embodiments above is similar to that of the method embodiments above, and has similar beneficial effects. For technical details not disclosed in the system embodiments of this disclosure, please refer to the description of the method embodiments of this disclosure for understanding.

[0129] It should be noted that, in the embodiments of this disclosure, if the above methods are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the embodiments of this disclosure, or the parts that contribute to related technologies, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause an electronic device (which may be a personal computer, server, or network device, etc.) to execute all or part of the methods described in the various embodiments of this disclosure. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), magnetic disks, or optical disks. Thus, the embodiments of this disclosure are not limited to any specific hardware and software combination.

[0130] This disclosure provides a graphics processor that includes a management system for any of the virtual memory described above.

[0131] This disclosure provides an electronic device including any of the above-described graphics processors.

[0132] It should be noted that, Figure 5 This is a schematic diagram of a hardware entity of an electronic device in an embodiment of this disclosure, such as... Figure 5 As shown, the hardware entity of the electronic device 500 includes: a processor 501, a communication interface 502, and a memory 503, wherein: Processor 501 typically controls the overall operation of electronic device 500.

[0133] Communication interface 502 enables electronic devices to communicate with other terminals or servers via a network.

[0134] The memory 503 is configured to store instructions and applications executable by the processor 501, and can also cache data to be processed or already processed (e.g., image data, audio data, voice communication data, and video communication data) in the processor 501 and various modules in the electronic device 700. It can be implemented using flash memory or random access memory (RAM). Data transfer between the processor 501, the communication interface 502, and the memory 503 can be performed via bus 504.

[0135] It should be noted that the descriptions of the above device embodiments are similar to those of the above method embodiments, and have similar beneficial effects. For technical details not disclosed in the device embodiments of this disclosure, please refer to the descriptions of the method embodiments of this disclosure for understanding.

[0136] It should be understood that the phrase "an embodiment" or "one embodiment" throughout the specification means that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of this disclosure. Therefore, "in one embodiment" or "one embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It should be understood that in the various embodiments of this disclosure, the sequence numbers of the above-described processes do not imply a sequential order of execution; the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this disclosure. The sequence numbers of the above-described embodiments are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0137] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0138] In the several embodiments provided in this disclosure, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components may be combined, or integrated into another system, or some features may be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the various components shown or discussed may be through some interfaces, and the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0139] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units. They may be located in one place or distributed across multiple network units. Some or all of the units may be selected to achieve the purpose of this embodiment according to actual needs.

[0140] In addition, each functional unit in the embodiments of this disclosure can be integrated into one processing unit, or each unit can be a separate unit, or two or more units can be integrated into one unit; the integrated unit can be implemented in hardware or in the form of hardware plus software functional units.

[0141] Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media that can store program code, such as mobile storage devices, read-only memory (ROM), magnetic disks, or optical disks.

[0142] Alternatively, if the integrated units described above are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this disclosure, in essence or the part that contributes to related technologies, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause an electronic device (which may be a personal computer, server, or network device, etc.) to execute all or part of the methods described in the various embodiments of this disclosure. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, ROM, magnetic disks, or optical disks.

[0143] The above description is merely an embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A method for managing virtual memory, characterized in that, A management module applied to a graphics processor, the method comprising: Receive an allocation request sent by the target thread of the graphics processor; wherein the allocation request includes a first memory requirement of the target thread, the target thread is used to run the target program, and the first memory requirement is related to the running memory requirement of the target program; Based on the target thread's initial memory requirement and the virtual memory tracking information, the allocation result for the target thread is determined; wherein, the virtual memory is managed through a corresponding binary tree, and the virtual memory corresponds to a segment of storage space in the on-chip memory of the graphics processor; the binary tree has n levels, the root node of the binary tree is located at the nth level of the binary tree, and the jth level of the binary tree includes 2 n-j There are 2 nodes, where j is a positive integer not greater than n; the virtual memory includes 2 n-1 Each memory block; the tracking information includes the state of the memory block corresponding to each node of the binary tree, and the state of the memory block includes one of the following: unoccupied state, occupied state; the allocation result of the target thread is used to switch the state of the target program.

2. The method according to claim 1, characterized in that, The determination of the allocation result for the target thread based on the target thread's first memory requirement and the virtual memory tracking information includes: Based on the first memory requirement of the target thread, the target layer is determined from the nth level of the binary tree; The state of the memory block corresponding to each node of the target layer is determined from the tracking information; The allocation result of the target thread is determined based on the state of the memory block corresponding to each node of the target layer.

3. The method according to claim 2, characterized in that, The step of determining the target layer from the nth level of the binary tree based on the first memory requirement of the target thread includes: Based on the first memory requirement of the target thread, a second memory requirement is determined; wherein the second memory requirement is not less than the first memory requirement, and the second memory requirement is 2. i There are 3 memory blocks, where i is an integer not less than 0; The (i+1)th layer is taken as the target layer.

4. The method according to claim 3, characterized in that, Determining the second memory requirement based on the first memory requirement of the target thread includes: The first memory requirement of the target thread is 2 k In the case of multiple memory blocks, the first memory requirement is taken as the second memory requirement; where k is an integer not less than 0. The first memory requirement of the target thread is less than 2 k+1 The target thread has a first memory requirement greater than 2 memory blocks. k In the case of one memory block, the 2 k+1 One memory block is used as the second memory requirement.

5. The method according to claim 2, characterized in that, Determining the allocation result of the target thread based on the state of the memory blocks corresponding to each node of the target layer includes: For any node in the target layer, the state of the memory block corresponding to the node is traversed to determine the traversal result of the node. If the traversal result of the node is the first traversal result, the node is determined as the target node. The first traversal result indicates that the state of the memory block corresponding to the target node is unoccupied. The first allocation result is used as the allocation result of the target thread; wherein, the first allocation result includes information about the memory block corresponding to the target node.

6. The method according to claim 5, characterized in that, The method further includes: If the traversal result of each node in the target layer is the second traversal result, the second allocation result is taken as the allocation result of the target thread; wherein, the second traversal result indicates that each memory block corresponding to the node is occupied, and the second allocation result indicates that the allocation failed.

7. The method according to claim 5, characterized in that, The method further includes: If the allocation result of the target thread is the first allocation result, based on the first allocation result, a first node is determined from multiple nodes in the binary tree, and the state of the memory block corresponding to the first node in the tracking information is updated.

8. The method according to claim 7, characterized in that, The step of determining the first node from multiple nodes of the binary tree based on the first allocation result includes: The target node is taken as a first node; Using the target node as the starting node, the binary tree is traversed to obtain the associated nodes of the starting node, and each associated node of the starting node is taken as a first node; wherein, the associated nodes of the starting node include the nodes traversed when traversing upward to the root node and / or the nodes traversed when traversing downward to the leaf node.

9. The method according to any one of claims 1 to 8, characterized in that, The method further includes: Receive a release request sent by the target thread; wherein the release request includes memory release information; Based on the memory release information, a second node is determined from multiple nodes of the binary tree, and the state of the memory block corresponding to the second node in the tracking information is updated.

10. A method for managing virtual memory, characterized in that, The method, applied to a target thread of a graphics processor, includes: Generate an allocation request; wherein the allocation request includes a first memory requirement of the target thread, the target thread being used to run the target program, and the first memory requirement being related to the running memory requirement of the target program; The allocation request is sent to the management module of the graphics processor, so that the management module determines the allocation result of the target thread based on the first memory requirement of the target thread and the virtual memory tracking information; wherein, the virtual memory is managed through a corresponding binary tree, and the virtual memory corresponds to a storage space of the on-chip memory of the graphics processor; the binary tree has n levels, the root node of the binary tree is located at the nth level of the binary tree, and the jth level of the binary tree includes 2 n-j There are 2 nodes, where j is a positive integer not greater than n; the virtual memory includes 2 n-1 Each memory block; the tracking information includes the state of the memory block corresponding to each node of the binary tree, and the state of the memory block includes one of the following: unoccupied state, occupied state; Based on the allocation result of the target thread sent by the management module, the state of the target program is switched.

11. The method according to claim 10, characterized in that, Switching the state of the target program based on the allocation result of the target thread sent by the management module includes at least one of the following: If the allocation result of the target thread indicates that the allocation was successful, the target program is run based on the information of the memory block in the allocation result of the target thread. If the allocation result of the target thread indicates that the allocation has failed, the state of the target program will be switched to a preset state.

12. The method according to claim 10 or 11, characterized in that, The method further includes: Generate a release request for the target thread; The release request is sent to the management module, so that the management module determines the second node from multiple nodes of the binary tree based on the memory release information in the release request, and updates the status of the memory block corresponding to the second node in the tracking information.

13. A virtual memory management system, characterized in that, Applied to a graphics processor, the system includes a management module and a target thread, wherein: The target thread is used to generate an allocation request and send the allocation request to the management module; wherein, the allocation request includes a first memory requirement of the target thread, the target thread is used to run the target program, and the first memory requirement is related to the running memory requirement of the target program; The management module is used to determine the allocation result of the target thread based on the first memory requirement of the target thread and the tracking information of the virtual memory, and send the allocation result to the target thread; wherein, the virtual memory is managed through a corresponding binary tree, and the virtual memory corresponds to a storage space of the on-chip memory of the graphics processor; the binary tree has n levels, the root node of the binary tree is located at the nth level of the binary tree, and the jth level of the binary tree includes 2 n-j There are 2 nodes, where j is a positive integer not greater than n; the virtual memory includes 2 n-1 Each memory block; the tracking information includes the state of the memory block corresponding to each node of the binary tree, and the state of the memory block includes one of the following: unoccupied state, occupied state; The target thread is also used to switch the state of the target program based on the allocation result.

14. A graphics processor, characterized in that, Includes the system described in claim 13.

15. An electronic device, characterized in that, Includes the graphics processor of claim 14.

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