Ultrathin low-dielectric FPC structure based on functional layer modification and preparation method thereof

Abstract

The invention belongs to the technical field of electronic materials, and particularly provides an ultra-thin low-dielectric FPC structure based on functional layer modification and a preparation method of the ultra-thin low-dielectric FPC structure. The FPC structure sequentially comprises a carrier supporting unit, a middle function core unit and a circuit forming unit from bottom to top, and all the units are tightly connected through an integrated sintering and interface modification process. The carrier supporting unit comprises a mixed heat-resistant resin base layer, a lubricating transition layer and an interface activation layer; the middle functional core unit is of a symmetrical sandwich structure of a two-dimensional topological functional layer-M9-level low dielectric resin layer-a two-dimensional topological functional layer; the circuit forming unit comprises an electroplating metal layer and a packaging protection layer. Through collaborative design of the functional layers, the contradiction between ultra-thinness and performance improvement of a traditional ultra-thin FPC is solved, high-frequency and high-speed scene requirements of 5G, AI and the like are met, and the problems existing in an existing electronic material technology are effectively solved.

Description

Technical Field

[0001] This invention belongs to the field of electronic materials technology, specifically referring to an ultrathin low-dielectric FPC structure based on functional layer modification and its preparation method. Background Technology

[0002] With the rapid iteration of artificial intelligence and 5G communication technologies, electronic devices are evolving towards miniaturization, high performance, and high frequency and speed, placing stringent demands on the performance of flexible printed circuit boards (FPCs). Traditional FPCs and copper clad laminates (CCLs) are no longer adequate. In high-frequency scenarios, the dielectric requirements for the dielectric layer have been upgraded to M9 grade, but traditional M9 grade dielectric resins (such as PTFE and LCP) suffer from weak mechanical properties and insufficient thermal conductivity and stability. While using fiberglass cloth reinforcement and silica fillers to adjust the dielectric can improve mechanical properties, it leads to thicker dielectric layers, larger volume after multilayer stacking, and the coexistence of multiple dielectrics easily triggers the Maxwell-Wagner polarization effect, producing a textured effect that significantly increases signal transmission loss. The copper foil used in traditional FPCs (such as HVLP3 grade) has excessively high surface roughness, which, according to the skin effect, increases conductor resistance and exacerbates insertion loss; however, simply reducing roughness leads to insufficient peel strength between the metal layer and the dielectric layer, affecting structural stability and service life. Traditional developing and etching processes are highly polluting and costly, while die-cutting or laser-cutting processes face challenges such as insufficient modulus, difficulty in micron-level precision machining, and the high cost of graphene materials. With the widespread adoption of 30+ layer multilayer FPCs, the ultra-thinning of single-layer dielectric and conductive layers has become inevitable, but the contradiction between ultra-thinning and mechanical properties and dielectric stability is becoming increasingly prominent.

[0003] There is a lack of novel FPC structures and their fabrication methods based on functional layer modification that can resolve the contradiction between ultrathinness and performance improvement (low dielectric loss, high mechanical strength, high thermal conductivity and low signal loss) in existing technologies, while optimizing the fabrication process and reducing costs. Summary of the Invention

[0004] This invention overcomes the shortcomings of existing technologies and provides an ultrathin low-dielectric FPC structure based on functional layer modification and its fabrication method. Through the synergistic design and modification optimization of functional layers, it achieves a synergistic improvement in dielectric properties, mechanical properties, thermal conductivity, and signal transmission performance. While maintaining the ultrathin shape of the FPC, it solves the problems of excessively thick dielectric layers, high signal loss, insufficient mechanical properties, and complex fabrication processes in traditional technologies, meeting the application requirements of high-frequency and high-speed scenarios such as AI and 5G. It effectively solves the problems existing in the prior art.

[0005] The technical solution adopted in this invention is as follows: This solution provides an ultra-thin low-dielectric FPC structure based on functional layer modification, which includes, from bottom to top, a carrier support unit, an intermediate functional core unit, and a circuit forming unit. Each unit is tightly connected through integrated sintering and interface modification processes. The carrier support unit includes a mixed heat-resistant resin base layer, a lubricating transition layer, and an interface activation layer connected in sequence. The intermediate functional core unit includes an M9-grade low-dielectric resin layer, a two-dimensional topological functional layer, and a filler material. The two-dimensional topological functional layer is symmetrically arranged on both sides of the M9-grade low-dielectric resin layer. The circuit forming unit serves as the signal transmission layer of the FPC and includes an electroplated metal layer and an encapsulation protection layer. The interface activation layer of the carrier support unit and the lower two-dimensional topological functional layer of the intermediate functional core unit are tightly bonded through chemical bonding. The upper two-dimensional topological functional layer of the intermediate functional core unit and the electroplated metal layer of the circuit forming unit are metallurgically bonded through electroplating growth, with no obvious pores at the bonding interface. The encapsulation protection layer of the circuit forming unit forms a seamless encapsulation with the electroplated metal layer and the edge area of ​​the intermediate functional core unit.

[0006] The carrier support unit serves as the basic support layer of the FPC structure, ensuring structural stability and process compatibility during the fabrication process. It includes a mixed heat-resistant resin base layer, a lubricating transition layer, and an interface activation layer connected in sequence.

[0007] The raw materials for preparing the mixed heat-resistant resin base layer include topological material powder and thermosetting resin. The topological material powder accounts for 5wt% to 15wt% of the total mass of the mixed heat-resistant resin base layer. The topological material powder is in flake form with a mesh size of 500 to 2000 mesh. The thickness of the mixed heat-resistant resin base layer is 10μm to 20μm. Temporary load-bearing auxiliary materials are used in the preparation process of the mixed heat-resistant resin base layer.

[0008] The lubricating transition layer covers the upper surface of the mixed heat-resistant resin base layer, with a thickness of 1μm~3μm. Its surface is treated with plasma to form a micron-level uneven structure, which is used to reduce interfacial friction in the subsequent electroplating process and at the same time improve the interfacial bonding force with the intermediate functional core unit.

[0009] The interface activation layer is a coupling agent coating with a thickness of 50nm~100nm. It is coated on the uneven surface of the lubrication transition layer to achieve chemical bonding between the carrier support unit and the intermediate functional core unit.

[0010] The intermediate functional core unit serves as the performance core layer of the FPC structure, used to achieve low dielectric transport, mechanical enhancement, and thermal conductivity optimization. It includes two-dimensional topological functional layers symmetrically arranged on both sides of the M9-grade low dielectric resin layer.

[0011] The raw materials for preparing the M9-grade low-dielectric resin layer include resin and nano-silica filler. The thickness of the M9-grade low-dielectric resin layer is 5μm~10μm. The nano-silica filler in the M9-grade low-dielectric resin layer is uniformly dispersed, and the particle size of the nano-silica filler is 50nm~200nm. The nano-silica filler accounts for 3wt%~8wt% of the total mass of the M9-grade low-dielectric resin layer, which is used to control the dielectric constant without affecting the ultra-thin characteristics of the M9-grade low-dielectric resin layer.

[0012] The raw materials for preparing the two-dimensional topological functional layer include a single-layer topological material and a polar solvent. The two-dimensional topological functional layer is a specific topological structure formed by modifying a single-layer polarized topological material with laser shock wave, with a thickness of 100nm~300nm, and is tightly bonded to an M9-grade low-dielectric resin layer. The topological structure of the two-dimensional topological functional layer is a periodic honeycomb protrusion with a protrusion height of 50nm~100nm and a period of 200nm~500nm. The gaps formed by laser shock are filled with a filler material with a filling rate of 80%~95%, which is used to directionally strengthen the mechanical properties and electrical and thermal conductivity of the structure.

[0013] The circuit forming unit serves as the signal transmission layer of the FPC, including an electroplated metal layer and an encapsulation protection layer. The electroplated metal layer forms a conductive path with the two-dimensional topological functional layer of the intermediate functional core unit, and the encapsulation protection layer provides insulation protection.

[0014] The electroplated metal layer has a thickness of 1μm to 3μm. Based on the conductivity of the two-dimensional topological functional layer, it is formed by electroplating between the two-dimensional topological functional layer and the lubrication transition layer of the carrier support unit through energization. The uniformity of its thickness is controlled by the spacing between the lubrication transition layer and the two-dimensional topological functional layer. The surface of the electroplated metal layer is smoothed by laser shock wave to reduce skin effect loss during signal transmission.

[0015] The encapsulation protective layer is a composite system of M9 grade resin and nano-silica filler, with a thickness of 3μm~5μm. It covers the surface of the electroplated metal layer and forms a homogeneous and compatible structure with the M9 grade low dielectric resin layer of the intermediate functional core unit, ensuring the consistency of the overall dielectric performance.

[0016] The hybrid heat-resistant resin base layer enhances the thermal stability of the carrier support unit through the thermally conductive network of the topological material, ensuring temperature uniformity for the sintering of the intermediate functional core unit. The lubricating transition layer works in conjunction with the two-dimensional topological functional layer to precisely control the growth thickness and uniformity of the electroplated metal layer. The two-dimensional topological functional layer strengthens the mechanical properties of the M9-grade low-dielectric resin layer through its topological structure and reduces the resistance of the electroplated metal layer through its high conductivity, while dispersing heat during operation through thermal channels. The nano-silica filler of the M9-grade low-dielectric resin layer and the filler material of the two-dimensional topological functional layer work synergistically to jointly regulate the overall dielectric constant and avoid the Maxwell-Wagner effect. The ultra-thin design and surface smoothing treatment of the electroplated metal layer, combined with the conductivity enhancement effect of the two-dimensional topological functional layer, achieves low signal loss transmission. The encapsulation protective layer is homogeneous with the M9-grade low-dielectric resin layer, ensuring the dielectric stability and environmental resistance of the overall structure.

[0017] This method provides a fabrication method for ultrathin low-dielectric FPC structures based on functional layer modification, specifically including the following steps: S1. Fabrication of the carrier support unit S1.1: Mix 500-2000 mesh sheet-like topological material powder with thermosetting resin precursor at a mass ratio of 5:95-15:85, add N-methylpyrrolidone solvent, and disperse at a speed of 2000-3000 r / min for 30-60 min to form a uniform mixed heat-resistant resin base slurry. S1.2: The mixed heat-resistant resin base slurry is coated on the temporary supporting auxiliary material and baked at a low temperature of 80℃~100℃ for 10min~20min to remove the N-methylpyrrolidone solvent, forming a mixed heat-resistant resin base with a thickness of 10μm~20μm. S1.3: A lubricating coating is applied to the surface of the mixed heat-resistant resin base layer with a thickness controlled at 1μm~3μm. The surface of the lubricating coating is then activated with a power of 100W~200W for 5min~10min to form a micron-level uneven structure and obtain a lubricating transition layer. S1.4: Dilute the coupling agent with ethanol to a mass concentration of 1%~3%, coat it on the surface of the lubricating transition layer, and bake it at 120℃~150℃ for 5min~10min to form an interface activation layer and obtain a complete carrier support unit. S2. Preparation of intermediate functional core units S2.1: Add 3% to 8% of the total mass of M9 grade low dielectric resin to the resin, and stir at a speed of 500 r / min to 800 r / min for 60 min to 90 min to ensure that the nano silica filler is uniformly dispersed, to prepare M9 grade low dielectric resin precursor slurry, and obtain M9 grade low dielectric resin layer. S2.2: Mix the monolayer topological material with a polar solvent at a mass ratio of 1:1000~1:5000 and disperse at a power of 100W~200W for 20min~30min to form a stable monolayer polarized topological material dispersion; S2.3: The single-layer polarized topological material dispersion is uniformly coated on both sides of the M9 grade low dielectric resin precursor slurry with a coating thickness of 100nm~300nm to form a coated composite structure. Then, the coated composite structure is pre-sintered at 200℃~250℃ for 30min~60min. S2.4: Topological modification is performed on the topological material dispersion coating on both sides. The laser power is 50W~100W, the impact frequency is 10Hz~20Hz, and the scanning speed is 50mm / s~100mm / s to form a periodic honeycomb topological structure and obtain a two-dimensional topological functional layer. S2.5: Fill the gaps in the topology with filler material, and then sinter it again at 250℃~300℃ for 20min~30min to obtain the intermediate functional core unit; S3. The carrier support unit and the intermediate functional core unit are combined to form a composite blank. S3.1: Align and bond the lower two-dimensional topological functional layer of the intermediate functional core unit with the interface activation layer of the carrier support unit. The bonding pressure is 0.5MPa~1MPa, the bonding temperature is 150℃~180℃, and the holding time is 10min~20min. The two are tightly connected through the chemical bonding of the interface activation layer to obtain the composite structure. S3.2: The composite structure is sintered in an integrated manner at 300℃~360℃ for 30min~60min to allow diffusion bonding to form at the interfaces of each layer, thereby improving the mechanical stability of the overall structure and obtaining a composite green body. S4. Fabricate circuit forming units to obtain the finished FPC; Two optional circuit molding schemes are available, which can be selected based on the accuracy requirements of the actual application scenario: Option 1 (High-precision circuit scheme): S4.1.1: Using the upper two-dimensional topological functional layer of the intermediate functional core unit as the conductive substrate, an electroplating power supply is connected to perform electroplating on the upper surface of the composite blank. The electroplating solution is a mixture of copper sulfate and zinc sulfate, with a copper sulfate concentration of 100g / L~150g / L and a zinc sulfate concentration of 20g / L~50g / L. The electroplating temperature is 25℃~35℃, and the current density is 1A / dm³. 2 ~3A / dm 2 The electroplating time is 10 min to 30 min, forming an electroplated metal layer with a thickness of 1 μm to 3 μm; S4.1.2: The electroplated metal layer is smoothed using a laser with a power of 30W~50W and a scanning speed of 100mm / s~200mm / s; S4.1.3: A preset circuit pattern is printed by bombarding the electroplated metal layer and the two-dimensional topology functional layer with laser shock waves. The laser power is 80W~120W. S4.1.4: Prepare the encapsulation protective layer slurry. Select the same type of resin as the M9 grade low dielectric resin layer, add 5% to 10% of nano silica filler according to the total mass of the M9 grade low dielectric resin layer, mix evenly and cover the circuit surface with a coating thickness of 3μm to 5μm. S4.1.5: Encapsulation sintering is carried out at 250℃~300℃ for 20min~30min to achieve the integrated combination of the encapsulation protective layer with the circuit and intermediate functional core unit, resulting in the finished FPC; Option 2 (High-capacity line option): S4.2.1: The upper two-dimensional topology functional layer of the intermediate functional core unit is first bombarded with laser shock waves to print a preset circuit pattern. The laser power is 80W~120W. S4.2.2: Using the two-dimensional topological functional layer after the pattern is printed as a conductive substrate, electroplating is performed. The electroplating parameters are consistent with S4.1.1 of Scheme 1 to form an electroplated metal layer with a thickness of 1μm~3μm. S4.2.3: Remove excess electroplated metal layer outside the circuit pattern to ensure circuit accuracy. The etching solution is ferric chloride solution with a concentration of 300g / L~400g / L. The etching temperature is 40℃~50℃ and the etching time is 5min~10min. S4.2.4: Prepare the encapsulation protective layer according to steps S4.1.4~S4.1.5 of Scheme 1 and sinter it to obtain the finished FPC; S5. Post-processing and performance testing S5.1: Cut and deburr the finished FPC, and remove excess material from the edges; S5.2: Test the dielectric constant, dielectric loss, peel strength, tensile strength, surface roughness and signal transmission loss of the FPC to ensure that the product meets the design requirements.

[0018] Compared with the prior art, the beneficial effects of the present invention are: (1) An integrated structure is formed through the synergistic design of each functional layer. The two-dimensional topological functional layer not only enhances the mechanical properties of the M9-grade low-dielectric resin layer, but also improves the electrical and thermal conductivity of the electroplated metal layer; the lubrication transition layer works in conjunction with the two-dimensional topological functional layer to achieve uniform control of the thickness of the electroplated metal layer; the nano-silica filler of the M9-grade low-dielectric resin layer works in conjunction with the filling material of the two-dimensional topological functional layer to avoid the Maxwell-Wagner effect, stabilize the dielectric constant at the M9 level, and reduce the dielectric loss to below 0.001. (2) Through the ultra-thin design and integrated process of each functional layer, the total thickness of the finished FPC can be controlled between 20μm and 40μm to meet the requirements of multi-layer stacking; at the same time, the topological structure design of the two-dimensional topological functional layer solves the problem of insufficient mechanical properties of the ultra-thin resin layer, which far exceeds the performance level of traditional ultra-thin FPC. (3) The ultra-thin electroplated metal layer and surface smoothing treatment, combined with the conductivity enhancement effect of the two-dimensional topological functional layer, significantly reduce the skin effect loss and insertion loss in the signal transmission process. The signal loss is ≤0.1dB / cm at 10GHz, which meets the high-frequency and high-speed signal transmission requirements of 5G, AI and other technologies. (4) The integrated sintering process is used to replace the traditional development and etching process, which reduces pollutant emissions. At the same time, the cost of using high-purity topology materials is reduced by the composite design of topology material powder and resin. The two circuit forming schemes can be flexibly adapted to different precision and production capacity requirements. The introduction of laser shock wave modification process improves production efficiency and product consistency, and is suitable for mass industrial production. (5) Each functional layer is tightly connected through various connection methods such as chemical bonding, diffusion bonding and metallurgical bonding, with an interface gap of ≤50nm and no obvious defects; the homogeneous design of the encapsulation protection layer and the M9 grade low dielectric resin layer enables the FPC to maintain stable performance in a wide temperature range of -40℃ to 125℃. Attached Figure Description

[0019] Figure 1 This is a schematic cross-sectional view of an ultrathin low-dielectric FPC structure based on functional layer modification. Figure 2 This is an enlarged structural diagram of the intermediate functional core unit; Figure 3 This is a process flow diagram of the preparation method; Figure 4 This is a schematic diagram of the process for circuit forming scheme one; Figure 5 This is a schematic diagram of the process for circuit forming scheme two; Among them, 1. Carrier support unit, 11. Mixed heat-resistant resin base layer, 12. Lubricating transition layer, 13. Interface activation layer, 2. Intermediate functional core unit, 21. Two-dimensional topology functional layer, 22. M9 grade low dielectric resin layer, 23. Filling material, 3. Circuit forming unit, 31. Electroplated metal layer, 32. Encapsulation protection layer.

[0020] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used together with the embodiments of the invention to explain the invention and do not constitute a limitation thereof. Detailed Implementation

[0021] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0022] Example 1: Please see Figures 1-5 This embodiment presents an ultrathin low-dielectric FPC structure based on functional layer modification, comprising, from bottom to top, a carrier support unit 1, an intermediate functional core unit 2, and a circuit forming unit 3. Each unit is tightly connected through integrated sintering and interface modification processes. The carrier support unit 1 includes a mixed heat-resistant resin base layer 11, a lubrication transition layer 12, and an interface activation layer 13 connected in sequence. The mixed heat-resistant resin base layer 11 is a mixed graphene heat-resistant resin base layer, and the lubrication transition layer 12 is a molybdenum disulfide lubrication transition layer. The intermediate functional core unit 2 includes an M9-grade low-dielectric resin layer 22, a two-dimensional topological functional layer 21, and a filler material 23. The two-dimensional topological functional layer 21 is a graphene two-dimensional topological functional layer, symmetrically arranged on both sides of the M9-grade low-dielectric resin layer 22. The circuit forming unit 3 serves as the signal transmission layer of the FPC, including an electroplated metal layer 31 and an encapsulation protection layer 32. The interface activation layer 13 of the carrier support unit 1 and the lower two-dimensional topological functional layer 21 of the intermediate functional core unit 2 are tightly bonded by chemical bonding, with a bonding gap of ≤50nm; the upper two-dimensional topological functional layer 21 of the intermediate functional core unit 2 and the electroplated metal layer 31 of the circuit forming unit 3 are metallurgically bonded by electroplating growth, with no obvious pores at the bonding interface; the encapsulation protection layer 32 of the circuit forming unit 3 forms a seamless encapsulation with the electroplated metal layer 31 and the edge area of ​​the intermediate functional core unit 2, with an encapsulation coverage of 100%.

[0023] The carrier support unit 1 serves as the basic support layer of the FPC structure, ensuring structural stability and process compatibility during fabrication. It comprises a mixed heat-resistant resin base layer 11, a lubrication transition layer 12, and an interface activation layer 13 connected sequentially. The mixed heat-resistant resin base layer 11 is prepared from topological material powder and thermosetting resin. The topological material powder is graphene powder in sheet form, and the thermosetting resin is a modified polyimide resin. The lubrication transition layer 12 is coated onto the surface of the mixed heat-resistant resin base layer 11, and its surface is plasma-activated to form a micron-level uneven structure, reducing interfacial friction during subsequent electroplating and enhancing interfacial bonding with the intermediate functional core unit 2. The interface activation layer 13 is a titanate coupling agent coating applied to the uneven surface of the lubrication transition layer 12, enabling chemical bonding between the carrier support unit 1 and the intermediate functional core unit 2.

[0024] The intermediate functional core unit 2 serves as the performance core layer of the FPC structure, used to achieve low dielectric transport, mechanical enhancement, and thermal conductivity optimization. It includes an M9-grade low dielectric resin layer 22, a two-dimensional topological functional layer 21, and a filler material 23. The two-dimensional topological functional layer 21 is symmetrically arranged on both sides of the M9-grade low dielectric resin layer 22. The raw materials for preparing the M9-grade low-dielectric resin layer 22 include resin and nano-silica filler. The nano-silica filler in the M9-grade low-dielectric resin layer 22 is uniformly dispersed through an in-situ polymerization process to control the dielectric constant without affecting the ultra-thin characteristics of the M9-grade low-dielectric resin layer. The two-dimensional topological functional layer 21 is a specific topological structure formed by modifying a single-layer polarized topological material with laser shock wave. It is tightly bonded to the M9-grade low-dielectric resin layer 22 through an integral sintering process. The single-layer polarized topological material is a single-layer polarized graphene. The topological structure of the two-dimensional topological functional layer 21 is a periodic honeycomb protrusion. The voids formed by the impact are filled with filler material 23. The filler material 23 is selected from conductive silver nanoparticles to directionally strengthen the structural mechanical properties and electrical and thermal conductivity.

[0025] The circuit forming unit 3 serves as the signal transmission layer of the FPC, comprising an electroplated metal layer 31 and an encapsulation protection layer 32. The electroplated metal layer 31 forms a conductive path with the two-dimensional topological functional layer 21 of the intermediate functional core unit 2, while the encapsulation protection layer 32 provides insulation protection. The electroplated metal layer 31 is a copper-zinc alloy layer, formed by electroplating between the two-dimensional topological functional layer 21 and the lubrication transition layer 12 of the carrier support unit 1, based on the conductivity of the two-dimensional topological functional layer 21. Its thickness uniformity is controlled by the spacing between the lubrication transition layer 12 and the two-dimensional topological functional layer 21. The surface of the electroplated metal layer 31 is smoothed by laser shock wave treatment to reduce skin effect loss during signal transmission. The encapsulation protection layer 32 is a composite system of M9 grade resin and nano-silica filler, which is covered on the surface of the electroplated metal layer 31 through an integrated encapsulation process, forming a homogeneous and compatible structure with the M9 grade low-dielectric resin layer 22 of the intermediate functional core unit 2, ensuring the consistency of overall dielectric performance.

[0026] The mixed heat-resistant resin base layer 11 enhances the thermal stability of the carrier support unit 1 through the thermally conductive network of graphene, providing temperature uniformity assurance for the sintering of the intermediate functional core unit 2; the lubricating transition layer 12 works in conjunction with the two-dimensional topological functional layer 21 to precisely control the growth thickness and uniformity of the electroplated metal layer 31; the two-dimensional topological functional layer 21 strengthens the mechanical properties of the M9-grade low-dielectric resin layer 22 through its topological structure, and reduces the resistance of the electroplated metal layer 31 by utilizing its high conductivity, while dispersing heat during operation through thermal channels; the nano-silica filler of the M9-grade low-dielectric resin layer 22 and the filler material 23 of the two-dimensional topological functional layer 21 work synergistically to jointly regulate the overall dielectric constant and avoid the Maxwell-Wagner effect; the ultra-thin design and surface smoothing treatment of the electroplated metal layer 31, combined with the conductivity enhancement effect of the two-dimensional topological functional layer 21, achieves low signal loss transmission; the encapsulation protection layer 32 is homogeneous with the M9-grade low-dielectric resin layer 22, ensuring the dielectric stability and environmental resistance of the overall structure.

[0027] The thickness of the heat-resistant resin base layer 11 in the carrier support unit 1 is 15 μm, the graphene powder accounts for 10 wt% (1000 mesh sheet graphene), and the modified polyimide resin is the matrix; the thickness of the lubricating transition layer 12 is 2 μm; and the thickness of the interface activation layer 13 is 80 nm (titanium coupling agent).

[0028] In the intermediate functional core unit 2, the M9-grade low dielectric resin layer 22 is made of LCP resin with a thickness of 8μm and a nano-silica filler content of 5wt% (100nm particle size); the two-dimensional topological functional layer 21 has a thickness of 200nm, a topological structure protrusion height of 80nm, a period of 300nm, and the filling material 23 is made of conductive silver nanoparticles with a filling rate of 90%.

[0029] The electroplated metal layer 31 in the circuit forming unit 3 is a copper-zinc alloy (copper-zinc mass ratio 9:1) with a thickness of 2μm; the encapsulation protective layer 32 has a thickness of 4μm (LCP resin + 8wt% nano silica filler).

[0030] The final FPC has a total thickness of 33μm.

[0031] This embodiment describes a method for fabricating an ultrathin low-dielectric FPC structure based on functional layer modification, comprising the following steps: S1. Fabrication of carrier support unit 1 S1.1: Prepare mixed heat-resistant resin base layer 11 slurry by mixing 1000 mesh flake graphene powder and modified polyimide resin precursor at a mass ratio of 10:90, adding N-methylpyrrolidone solvent, and dispersing in a high-speed disperser at a speed of 3000 r / min for 40 min to form a uniform mixed heat-resistant resin base layer 11 slurry. S1.2: The temporary supporting material is PET release film. The mixed heat-resistant resin base layer 11 slurry is coated on the PET release film by casting method. It is then baked at 90℃ for 15 minutes to remove N-methylpyrrolidone solvent and form a 15μm thick mixed heat-resistant resin base layer 11. S1.3: A molybdenum disulfide coating is applied to the surface of the mixed heat-resistant resin base layer 11 by a micro-gravure coating process, with a thickness controlled at 2μm. Subsequently, the surface of the molybdenum disulfide coating is activated by a plasma treatment device with a treatment power of 150W and a treatment time of 8min, forming a micron-level concave-convex structure to obtain a lubricating transition layer 12. S1.4: Dilute the titanate coupling agent with ethanol to a mass concentration of 2%, apply it to the surface of the lubricating transition layer 12 by spraying, and bake it at 130°C for 8 minutes to form the interface activation layer 13, thus obtaining the complete carrier support unit 1. S2. Preparation of intermediate functional core unit 2 S2.1: Prepare M9 grade low dielectric resin precursor slurry. Select PTFE resin precursor and add 5% of 100nm nano silica filler by mass. Stir in a planetary mixer at 600r / min for 70min to ensure uniform dispersion of nano silica filler. S2.2: Prepare a polarized monolayer graphene dispersion by mixing monolayer graphene with a polar solvent at a mass ratio of 1:3000 and dispersing the mixture for 25 minutes at 150W using an ultrasonic dispersion device to form a stable monolayer polarized graphene dispersion. S2.3: A single-layer polarized graphene dispersion was uniformly coated on both sides of the M9 grade low dielectric resin precursor slurry using a slit coating process. The coating thickness was 200 nm, forming a coated composite structure. The coated composite structure was then placed in a sintering furnace and pre-sintered at 220°C for 40 min. S2.4: The graphene coatings on both sides are topologically modified using a laser shockwave device with a laser power of 80W, a shock frequency of 15Hz, and a scanning speed of 80mm / s to form a periodic honeycomb topological structure. S2.5: Fill the gaps in the topological structure with conductive silver nanoparticles, and then sinter them at 280℃ for 25 min to obtain intermediate functional core unit 2. S3. The carrier support unit 1 and the intermediate functional core unit 2 are combined to form a composite blank. S3.1: Align and bond the lower two-dimensional topological functional layer 21 of the intermediate functional core unit 2 with the interface activation layer 13 of the carrier support unit 1. The bonding pressure is 1.0 MPa, the bonding temperature is 160℃, and the holding time is 15 min. The two are tightly connected through the chemical bonding of the interface activation layer 13. S3.2: The composite structure is placed in an IR furnace and sintered at 330°C for 40 minutes to allow diffusion bonding at the interfaces of each layer, thereby improving the mechanical stability of the overall structure and obtaining a composite green body. S4. Fabricate circuit forming unit 3 to obtain the finished FPC, using scheme one: S4.1.1: Using the upper two-dimensional topological functional layer 21 of the intermediate functional core unit 2 as a conductive substrate, an electroplating power supply is turned on to perform copper-zinc alloy electroplating on the upper surface of the composite blank. The electroplating solution is a mixture of copper sulfate and zinc sulfate, with a copper sulfate concentration of 120 g / L and a zinc sulfate concentration of 30 g / L. The electroplating temperature is 30℃, and the current density is 2 A / dm³. 2 The electroplating time is 20 min, forming an electroplated metal layer 31 with a thickness of 2 μm; S4.1.2: The electroplated metal layer 31 is smoothed using a laser shock wave device with a laser power of 40W and a scanning speed of 150mm / s, so that the surface roughness Ra of the electroplated metal layer 31 is ≤0.1μm; S4.1.3: Using laser direct imaging technology, a preset circuit pattern is printed by bombarding the electroplated metal layer 31 and the two-dimensional topological functional layer 21 with laser shock waves. The laser power is 100W and the positioning accuracy is ±5μm. S4.1.4: Prepare the encapsulation protective layer 32 slurry. Select the same type of PTFE resin precursor as the M9 grade low dielectric resin layer 22, add 8% of nano silica filler by total mass, mix evenly, and then cover the printed circuit surface by coating process with a coating thickness of 4μm. S4.1.5: Encapsulation sintering is performed at 280℃ for 25 minutes to achieve the integrated combination of the encapsulation protective layer 32 and the circuit and intermediate functional core unit 2, resulting in the finished FPC; S5. Post-processing and performance test results The finished FPC was trimmed and deburred, and then its performance was tested. The performance test results were as follows: dielectric constant (10GHz): 2.3, dielectric loss: 0.0008, peel strength: 1.8 N / mm, tensile strength: 220 MPa, thermal conductivity: 0.9 W / (m·K), signal loss at 10GHz: 0.08 dB / cm, and total thickness: 33 μm, which meets the design requirements.

[0032] Example 2: The difference between this embodiment and Embodiment 1 is that the M9-grade low-dielectric resin layer 22 of the intermediate functional core unit 2 is made of PTFE resin, and the circuit molding adopts Scheme 2, as detailed below: The M9 grade low dielectric resin layer 22 is made of PTFE resin with a thickness of 7μm and nano-silica filler accounting for 4wt% (80nm particle size); the circuit forming adopts scheme two, and the excess electroplated metal layer 31 is removed by etching process; the total thickness of the finished FPC is 31μm. The preparation steps differed. In the intermediate functional core unit 2, 4 wt% of 80 nm nano silica filler was added to the PTFE resin precursor of S2.1 and stirred at 500 r / min for 80 min. Circuit forming steps: S4.2.1: A 100W laser shockwave bombards the two-dimensional topology functional layer 21 to print circuit patterns; S4.2.2: Electroplating is performed using the same parameters as in Example 1, S4.1.1; S4.2.3: 350 g / L ferric chloride solution, etch at 45°C for 8 min to remove excess metal layer; S4.2.4: Same as S4.1.4~S4.1.5 of Example 1; Performance test results: dielectric constant (10GHz): 2.2, dielectric loss: 0.0007, peel strength: 1.6N / mm, tensile strength: 210MPa, thermal conductivity: 0.85W / (m·K), signal loss at 10GHz: 0.07dB / cm, total thickness: 31μm, meeting the design requirements.

[0033] Example 3: The difference between this embodiment and Embodiment 1 is that the graphene powder content in the mixed heat-resistant resin base layer 11 of the carrier support unit 1 is 15wt% (2000 mesh), and the filling material 23 of the intermediate functional core unit 2 is selected as nano-silica filler, as detailed below: Mixed heat-resistant resin base layer 11: graphene powder content 15wt% (2000 mesh), thickness 12μm; filler material 23 is nano-silica filler, filling rate 95%; the total thickness of the finished FPC is 30μm; The preparation steps differed as follows: S1.1 of the carrier support unit 1: 2000-mesh sheet graphene powder and modified polyimide resin precursor were mixed at a mass ratio of 15:85; S2.5 of the intermediate functional core unit 2: filled with nano-silica filler and sintered at 290℃ for 20 min. Performance test results: dielectric constant (10GHz): 2.1, dielectric loss: 0.0006, peel strength: 1.7N / mm, tensile strength: 230MPa, thermal conductivity: 0.82W / (m·K), signal loss at 10GHz: 0.06dB / cm, total thickness: 30μm, meeting the design requirements.

[0034] Comparative Example 1 (Traditional Ultra-thin FPC): The traditional structure is used: a 25μm polyimide resin layer + a 25μm electrolytic copper foil, which is prepared by a lamination process, with a total thickness of 50μm. Performance test results: Dielectric constant (10GHz): 3.0, dielectric loss: 0.002, peel strength: 1.0N / mm, tensile strength: 150MPa, thermal conductivity: 0.3W / (m·K), signal loss at 10GHz: 0.3dB / cm; The comparison shows that, under the premise of reducing the total thickness by more than 20%, the FPC structure of the present invention reduces dielectric loss by more than 65%, increases peel strength by more than 50%, increases tensile strength by more than 33%, increases thermal conductivity by more than 173%, and reduces signal loss by more than 76%, and its comprehensive performance far exceeds that of traditional ultra-thin FPCs.

[0035] Comparative Example 2 (Ultra-thin FPC without functional layer modification): It adopts a layered structure similar to that of the present invention, but without the two-dimensional topological functional layer 21 and the lubrication transition layer 12, with a total thickness of 35 μm; Performance test results: Dielectric constant (10GHz): 2.8, dielectric loss: 0.0015, peel strength: 0.9N / mm, tensile strength: 120MPa, thermal conductivity: 0.4W / (m·K), signal loss at 10GHz: 0.2dB / cm.

[0036] The performance test results of Examples 1, 2, and 3 and Comparative Examples 1 and 2 are shown in the table below:

[0037] The comparison shows that, through functional layer modification and collaborative design, the present invention reduces dielectric loss by more than 60%, increases peel strength by more than 67%, increases tensile strength by more than 67%, increases thermal conductivity by more than 100%, and reduces signal loss by more than 70% at similar thicknesses, fully demonstrating the technical advantages of functional layer collaborative design.

[0038] The present invention and its embodiments have been described above. This description is not restrictive, and the accompanying drawings are only one embodiment of the present invention; the actual structure is not limited thereto. In conclusion, if those skilled in the art are inspired by this description and design similar structures and embodiments without departing from the spirit of the invention, such designs should fall within the protection scope of the present invention.

Claims

1. An ultrathin low-dielectric FPC structure based on functional layer modification, characterized in that, From bottom to top, the components include a carrier support unit (1), an intermediate functional core unit (2), and a circuit forming unit (3). The carrier support unit (1) includes a mixed heat-resistant resin base layer (11), a lubrication transition layer (12), and an interface activation layer (13) connected in sequence. The intermediate functional core unit (2) includes an M9-grade low-dielectric resin layer (22), a two-dimensional topology functional layer (21), and a filler material (23). The two-dimensional topology functional layer (21) is symmetrically arranged on both sides of the M9-grade low-dielectric resin layer (22). The circuit forming unit (3) includes an electroplated metal layer (31) and an encapsulation protection layer (32). The electroplated metal layer (31) and the two-dimensional topology functional layer (21) form a conductive path.

2. The ultrathin low-dielectric FPC structure based on functional layer modification according to claim 1, characterized in that: The raw materials for preparing the mixed heat-resistant resin base layer (11) include topological material powder and thermosetting resin; the void portion formed by laser shock in the two-dimensional topological functional layer (21) is filled with filler material (23); the raw materials for preparing the M9 grade low dielectric resin layer (22) include resin and nano silica filler; the raw materials for preparing the encapsulation protective layer (32) include M9 grade resin and nano silica filler.

3. The ultrathin low-dielectric FPC structure based on functional layer modification according to claim 2, characterized in that: The lubrication transition layer (12) covers the upper surface of the mixed heat-resistant resin base layer (11); the surface of the lubrication transition layer (12) is plasma activated to form a micron-level uneven structure; the interface activation layer (13) is a coupling agent coating; The interface activation layer (13) is coated on the uneven surface of the lubrication transition layer (12); the interface activation layer (13) and the lower two-dimensional topological functional layer (21) of the intermediate functional core unit (2) are bonded together by chemical bonding; the two-dimensional topological functional layer (21) is a periodic honeycomb protrusion structure formed by laser shock wave modification of a single layer of topological material; the electroplated metal layer (31) is formed by electroplating based on the conductivity of the two-dimensional topological functional layer (21); the surface of the electroplated metal layer (31) is smoothed by laser shock wave; the encapsulation protective layer (32) covers the surface of the electroplated metal layer (31).

4. A method for fabricating an ultrathin low-dielectric FPC structure based on functional layer modification according to any one of claims 1 to 3, characterized in that, Includes the following steps: S1. Preparation of the carrier support unit (1); S2. Preparation of intermediate functional core unit (2); S2.1: Add nano-silica filler to the resin precursor, and ensure that the nano-silica filler is uniformly dispersed by stirring to form M9 grade low dielectric resin precursor slurry, and obtain M9 grade low dielectric resin layer (22). S2.2: Preparation of a dispersion of a monolayer polarized topological material; S2.3: The single-layer polarized topological material dispersion is uniformly coated on both sides of the M9 grade low dielectric resin layer (22) to form a coated composite structure, and then the coated composite structure is pre-sintered; S2.4: Topological modification of the dispersion coatings on both sides is performed to form a periodic honeycomb topological structure, resulting in a two-dimensional topological functional layer (21). S2.5: Fill the gaps in the topology with filler material (23), and then sinter the filler material twice to obtain the intermediate functional core unit (2). S3. The carrier support unit (1) and the intermediate functional core unit (2) are combined to form a composite blank; S4. Prepare circuit forming units (3) to obtain finished FPC; S5. Post-processing and performance testing.

5. The method for fabricating an ultrathin low-dielectric FPC structure based on functional layer modification according to claim 4, characterized in that, Step S4 includes the following specific steps: S4.1.1: Using the upper two-dimensional topological functional layer (21) of the intermediate functional core unit (2) as a conductive substrate, the electroplating power supply is turned on, and electroplating is performed on the upper surface of the composite blank to form an electroplated metal layer (31). S4.1.2: The electroplated metal layer (31) is smoothed by laser shock wave; S4.1.3: A preset circuit pattern is printed by bombarding the electroplated metal layer (31) and the two-dimensional topology functional layer (21) with laser shock waves; S4.1.4: Prepare the encapsulation protective layer (32) slurry. Use the same type of resin as the M9 grade low dielectric resin layer (22), add nano silica filler, mix evenly and cover the circuit surface to form the encapsulation protective layer (32). S4.1.5: Encapsulation sintering realizes the integrated combination of the encapsulation protection layer (32) and the circuit and intermediate functional core unit (2) to obtain the finished FPC.

6. The method for fabricating an ultrathin low-dielectric FPC structure based on functional layer modification according to claim 4, characterized in that, Step S4 includes the following specific steps: S4.2.1: The upper two-dimensional topology functional layer (21) of the intermediate functional core unit (2) is first bombarded with laser shock waves to print the preset circuit pattern. S4.2.2: Using the two-dimensional topology functional layer (21) of the printed circuit as a conductive substrate, electroplating is performed to form an electroplated metal layer (31). S4.2.3: Remove excess electroplated metal layers outside the circuit (31); S4.2.4: Prepare the encapsulation protective layer (32) slurry. Use the same type of resin as the M9 grade low dielectric resin layer (22), add nano silica filler, mix evenly and cover the circuit surface to form the encapsulation protective layer (32). S4.2.5: Encapsulation sintering realizes the integrated combination of the encapsulation protective layer (32) and the circuit and intermediate functional core unit (2) to obtain the finished FPC.

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