Photovoltaic cell, preparation method and preparation equipment thereof and photovoltaic module

Abstract

The invention relates to a photovoltaic cell, a preparation method and preparation equipment thereof and a photovoltaic module. The preparation method of the photovoltaic cell comprises the following steps: forming a patterned passivation layer on the surface of doped silicon; depositing a catalyst layer on the surface of the doped silicon exposed out of the passivation layer; preparing a nickel transition layer and a copper electrode layer which are laminated on the catalyst layer through chemical plating in sequence; and carrying out annealing treatment in a protective gas atmosphere. According to the preparation method of the photovoltaic cell, relatively low series resistance can be realized, so that the photovoltaic cell with relatively high conversion efficiency can be prepared.

Description

Technical Field

[0001] This application relates to the field of photovoltaic technology, and in particular to photovoltaic cells, their preparation methods, preparation equipment, and photovoltaic modules. Background Technology

[0002] Back-contact photovoltaic (PV) cells are a type of photovoltaic technology that integrates positive and negative metal electrodes on the back of the cell. With no metal grid lines obstructing the front, this maximizes sunlight absorption and improves the cell's conversion efficiency. Back-contact PV cells require the fabrication of staggered positive and negative electrodes on the back. Traditional back-contact PV cells involve multiple masking and photolithography processes to achieve electrode patterning, resulting in relatively poor adhesion of the metal electrodes and consequently, higher series resistance in the PV cell. Summary of the Invention

[0003] Therefore, it is necessary to provide a photovoltaic cell, its fabrication method, fabrication equipment, and photovoltaic module. The photovoltaic cell fabrication method of this application can achieve a low series resistance, thereby enabling the fabrication of photovoltaic cells with high conversion efficiency.

[0004] In a first aspect, this application provides a method for preparing a photovoltaic cell, comprising the following steps:

[0005] A patterned passivation layer is formed on the surface of doped silicon;

[0006] A catalyst layer is deposited on the surface of the doped silicon exposed above the passivation layer;

[0007] A nickel transition layer and a copper electrode layer are sequentially electroless plated onto the catalyst layer to prepare a stacked nickel transition layer;

[0008] Annealing is performed under a protective gas atmosphere.

[0009] In some embodiments, forming a patterned passivation layer on the surface of doped silicon includes the following steps:

[0010] A passivation layer is deposited over the entire surface of the doped silicon.

[0011] The passivation layer is subjected to laser patterning.

[0012] In some embodiments, after laser patterning the passivation layer, the following steps are also included:

[0013] The surface of the doped silicon exposed in the passivation layer after laser patterning is cleaned with acid.

[0014] In some embodiments, the method for preparing the nickel transition layer includes the following steps:

[0015] The intermediate product after the catalyst layer is deposited is placed in an electroless nickel plating solution, the electroless nickel plating solution comprising a nickel source, a first reducing agent, a first complexing agent, a first stabilizer, and a first pH adjuster;

[0016] Keep warm at the first preset temperature.

[0017] In some embodiments, the method for preparing the copper electrode layer includes the following steps:

[0018] The intermediate product after preparing the nickel transition layer is placed in a chemical copper plating solution, which includes a copper source, a second reducing agent, a second complexing agent, a second stabilizer, and a second pH adjuster.

[0019] Keep warm at the second preset temperature.

[0020] In some embodiments, the annealing temperature is 180°C to 250°C; the annealing time is 8 min to 15 min.

[0021] Secondly, this application provides a photovoltaic cell fabrication apparatus, comprising:

[0022] A patterning device for forming a patterned passivation layer on a doped silicon surface;

[0023] A catalyst deposition apparatus for depositing a catalyst layer on the surface of the doped silicon exposed above the passivation layer;

[0024] A chemical plating apparatus is used to sequentially chemically plate a nickel transition layer and a copper electrode layer on the surface of the doped silicon after the catalyst layer has been deposited.

[0025] Annealing apparatus for performing annealing treatment in a protective gas atmosphere.

[0026] Thirdly, this application provides a photovoltaic cell prepared by any one of the photovoltaic cell preparation methods described above, comprising: doped silicon, and a copper electrode layer located on the doped silicon; the copper electrode layer and the doped silicon layer form a copper-nickel-silicon alloy connection.

[0027] In some embodiments, the photovoltaic cell is a back-contact photovoltaic cell.

[0028] Fourthly, this application provides a photovoltaic module, comprising:

[0029] Cover plate;

[0030] At least one battery string, the battery string comprising a photovoltaic cell prepared by the photovoltaic cell preparation method described in any one of the above-mentioned methods, or the photovoltaic cell described above;

[0031] And an encapsulation layer, which is located between the cover plate and the battery string, and the cover plate is connected to the battery string through the encapsulation layer.

[0032] In the aforementioned photovoltaic cell fabrication method, after depositing a catalyst layer on the surface of the doped silicon exposed above the patterned passivation layer, a nickel transition layer and a copper electrode layer are prepared by electroless plating. Then, an annealing process under a protective gas atmosphere is performed to prepare a copper electrode electrically connected to the doped silicon. Compared to electroplating, electroless copper plating eliminates the need for a copper seed layer, reducing damage to the doped silicon and avoiding the risk of electrochemical corrosion. Furthermore, the nickel transition layer improves the adhesion of the copper electrode to the doped silicon. Annealing allows the copper electrode layer, the nickel transition layer, and the doped silicon to form a copper-nickel-silicon alloy interface, achieving better contact between the copper electrode and the doped silicon, thereby obtaining a lower series resistance. In other words, the photovoltaic cell fabrication method of this application can achieve a lower series resistance, thus enabling the fabrication of photovoltaic cells with high conversion efficiency.

[0033] Furthermore, the photovoltaic cell fabrication method of this application can achieve selective fabrication of copper electrodes. Compared with the traditional back-contact photovoltaic cell, which requires multiple mask fabrication and photolithography to achieve patterning of electrodes, the photovoltaic cell fabrication method of this application can determine the electrode fabrication area by patterning the passivation layer. Moreover, this method is not limited by screen printing and can achieve high electrode fabrication accuracy through simpler steps. Attached Figure Description

[0034] Figure 1 A schematic flowchart illustrating a method for preparing a photovoltaic cell according to an embodiment of this application;

[0035] Figure 2 A schematic diagram of a structure in which a patterned passivation layer is formed on the surface of doped silicon, according to an embodiment of this application;

[0036] Figure 3 In order to be in Figure 2 A schematic diagram of a structure for fabricating a nickel transition layer and a copper electrode layer based on the structure shown;

[0037] Figure 4 In order to be in Figure 3 A schematic diagram of the structure after annealing based on the structure shown.

[0038] Figure 5 This is a schematic diagram of the structure of a photovoltaic cell provided in one embodiment of this application.

[0039] Explanation of reference numerals in the attached figures:

[0040] 11-Doped silicon; 12-Passivation layer; 13-Nickel transition layer; 14-Copper electrode layer; 21-Silicon substrate; 22-First doped region; 23-Second doped region; 24-First passivation layer; 25-First electrode; 26-Second electrode; 27-Second passivation layer. Detailed Implementation

[0041] To make the above-mentioned objectives, features, and advantages of this application more apparent and understandable, a detailed description of specific embodiments of this application is provided below. Many specific details are set forth in the following description to provide a thorough understanding of this application. However, this application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar modifications without departing from the spirit of this application. Therefore, this application is not limited to the specific embodiments disclosed below.

[0042] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0043] In the description of this application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0044] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0045] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," "joining," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components, unless otherwise expressly limited. Those skilled in the art can understand the specific meaning of the above terms in this application according to the specific circumstances.

[0046] In the accompanying drawings, the thicknesses of layers, films, regions, substrates, etc., are exaggerated for clarity. Throughout the specification, the same reference numerals refer to the same elements. It should be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it may be directly on the other element or there may be intervening elements. Conversely, when an element is referred to as being "directly on" another element, there are no intervening elements.

[0047] One embodiment of this application provides a method for preparing a photovoltaic cell, comprising the following steps:

[0048] A patterned passivation layer 12 is formed on the surface of the doped silicon 11;

[0049] A catalyst layer is deposited on the surface of the doped silicon 11 exposed to the passivation layer 12;

[0050] A nickel transition layer 13 and a copper electrode layer 14 are sequentially electroless plated onto the catalyst layer;

[0051] Annealing is performed under a protective gas atmosphere.

[0052] In the above-described photovoltaic cell fabrication method, after depositing a catalyst layer on the surface of the patterned passivation layer 12 exposed on the doped silicon 11, a nickel transition layer 13 and a copper electrode layer 14 are prepared by electroless plating. Then, an annealing process under a protective gas atmosphere is performed to prepare a copper electrode electrically connected to the doped silicon 11. Compared to electroplating, electroless copper plating eliminates the need for a copper seed layer, reducing damage to the doped silicon 11 and avoiding the risk of electrochemical corrosion. Furthermore, the nickel transition layer 13 improves the adhesion of the copper electrode to the doped silicon 11. Annealing allows the copper electrode layer 14, the nickel transition layer 13, and the doped silicon 11 to form a copper-nickel-silicon alloy interface, achieving better contact between the copper electrode and the doped silicon 11, thereby obtaining a lower series resistance. In other words, the photovoltaic cell fabrication method of this application can achieve a lower series resistance, thus enabling the fabrication of photovoltaic cells with high conversion efficiency.

[0053] Furthermore, the photovoltaic cell fabrication method of this application can achieve selective fabrication of copper electrodes. Compared with the traditional back-contact photovoltaic cell, which requires multiple mask fabrication and photolithography to achieve patterning of electrodes, the photovoltaic cell fabrication method of this application can determine the electrode fabrication area by patterning the passivation layer 12. Moreover, this method is not limited by screen printing and can achieve high electrode fabrication accuracy through simpler steps.

[0054] Reference Figure 1 As shown, in some embodiments, the method for preparing a photovoltaic cell includes:

[0055] S10. A patterned passivation layer 12 is formed on the surface of the doped silicon 11.

[0056] Reference Figure 2 As shown, Figure 2 This is a schematic diagram of a patterned passivation layer 12 formed on the surface of doped silicon 11, provided in one embodiment of this application.

[0057] In some embodiments, forming a patterned passivation layer 12 on the surface of the doped silicon 11 includes the following steps:

[0058] A passivation layer 12 is deposited over the entire surface of the doped silicon 11;

[0059] The passivation layer 12 is laser patterned.

[0060] First, a passivation layer 12 is prepared over the entire surface. Then, the passivation layer 12 is laser-patterned to expose some of the doped silicon 11 in the passivation layer 12, thereby obtaining a high-precision electrode area.

[0061] In some embodiments, the passivation layer 12 includes a silicon nitride sub-passivation layer and a silicon oxide sub-passivation layer stacked together, wherein the silicon nitride sub-passivation layer is located between the doped silicon 11 and the silicon oxide sub-passivation layer.

[0062] In some embodiments, the thickness of the silicon nitride passivation layer is 60 nm to 100 nm.

[0063] Optionally, the thickness of the silicon nitride sub-passivation layer is 60nm, 65nm, 70nm, 75nm, 80nm, 85nm, 90nm, 95nm or 100nm, or the thickness of the silicon nitride sub-passivation layer may be within any two of the above thicknesses.

[0064] In some embodiments, the thickness of the silicon oxide passivation layer is 10 nm to 30 nm.

[0065] Optionally, the thickness of the silicon oxide sub-passivation layer is 10nm, 12nm, 15nm, 18nm, 20nm, 22nm, 25nm, 28nm or 30nm, or the thickness of the silicon oxide sub-passivation layer can be within any two of the above thicknesses.

[0066] In some embodiments, the passivation layer 12 is laser-patterned using an ultraviolet laser.

[0067] In some embodiments, the wavelength of the ultraviolet laser is 266nm~355nm.

[0068] Optionally, the wavelength of the ultraviolet laser is 266nm, 349nm, 351nm or 355nm, or the wavelength of the ultraviolet laser can be within the range of any two of the above wavelengths.

[0069] In some embodiments, the pulse frequency of the ultraviolet laser is 50 kHz to 200 kHz.

[0070] Optionally, the pulse frequency of the ultraviolet laser is 50 kHz, 80 kHz, 100 kHz, 120 kHz, 150 kHz, 180 kHz or 200 kHz, or the pulse frequency of the ultraviolet laser can be within the range of any two of the above frequencies.

[0071] In some embodiments, the depth of laser patterning is 3μm to 6μm.

[0072] Optionally, the depth of laser patterning is 3μm, 3.5μm, 4μm, 4.5μm, 5μm, 5.5μm or 6μm, or the depth of laser patterning can be within any two of the above depths.

[0073] In some embodiments, after laser patterning the passivation layer 12, the following steps are also included:

[0074] The surface of the doped silicon 11 exposed in the passivation layer 12 after laser patterning is cleaned with acid.

[0075] Cleaning the surface of the doped silicon 11 exposed in the passivation layer 12 after laser patterning with acid can remove residual oxides on the surface of the doped silicon 11, improve the adhesion of the catalyst layer and the copper electrode layer 14, and reduce the series resistance.

[0076] In some embodiments, hydrofluoric acid is used to clean the surface of the doped silicon 11 exposed to the passivation layer 12 after laser patterning.

[0077] S20. Deposit a catalyst layer on the surface of the doped silicon 11 exposed on the passivation layer 12.

[0078] In some of these embodiments, the catalyst layer comprises palladium.

[0079] In some embodiments, depositing a catalyst layer on the surface of the doped silicon 11 exposed above the passivation layer 12 includes:

[0080] The silicon substrate 21, on which the patterned passivation layer 12 is formed, is immersed in an activation solution, which includes palladium.

[0081] In some embodiments, the activating solution includes PdCl2.

[0082] S30. A nickel transition layer 13 and a copper electrode layer 14 are sequentially electrolessly deposited on the surface of the doped silicon 11 after the catalyst layer is deposited.

[0083] Reference Figure 3 As shown, Figure 3 In order to be in Figure 2 A schematic diagram of the structure for fabricating a nickel transition layer 13 and a copper electrode layer 14 based on the structure shown.

[0084] In some embodiments, the width of the copper electrode layer 14 is less than or equal to 10 μm.

[0085] Compared to traditional screen printing methods for electrode fabrication, which result in electrode linewidths greater than or equal to 20 μm, the method described in this application can achieve electrode linewidths less than or equal to 10 μm. This enables higher precision electrode fabrication and facilitates the fabrication of fine grids for back-contact batteries. Optionally, the width of the copper electrode layer 14 is 1 μm to 10 μm. More preferably, the width of the copper electrode layer 14 is 1 μm, 2 μm, 3 μm, 4 μm, 5 μm, 6 μm, 7 μm, 8 μm, 9 μm, or 10 μm. Alternatively, the width of the copper electrode layer 14 can also be within any two of the aforementioned widths.

[0086] In some embodiments, the thickness of the copper electrode layer 14 is 10 μm to 20 μm.

[0087] Optionally, the thickness of the copper electrode layer 14 is 10μm, 12μm, 14μm, 16μm, 18μm or 20μm, or the thickness of the copper electrode layer 14 may be within any two of the above-mentioned thicknesses.

[0088] In some embodiments, the thickness of the nickel transition layer 13 is 50 nm to 200 nm.

[0089] Within the aforementioned thickness range of the nickel transition layer 13, the nickel transition layer 13 effectively improves the adhesion of the copper electrode layer 14, and also effectively enables the copper electrode layer 14, the nickel transition layer 13, and the doped silicon 11 to form a copper-nickel-silicon alloy interface, thereby achieving a lower series resistance. Optionally, the thickness of the nickel transition layer 13 can be 50 nm, 80 nm, 100 nm, 120 nm, 150 nm, 180 nm, or 200 nm, or the thickness of the nickel transition layer 13 can be within any two of the aforementioned thicknesses.

[0090] In some embodiments, the method for preparing the nickel transition layer 13 includes the following steps:

[0091] The intermediate product after the catalyst layer is deposited is placed in an electroless nickel plating solution, which includes a nickel source, a first reducing agent, a first complexing agent, a first stabilizer, and a first pH adjuster.

[0092] Keep warm at the first preset temperature.

[0093] In some embodiments, the nickel source includes at least one of nickel sulfate and nickel chloride.

[0094] In some embodiments, the first reducing agent includes at least one of sodium phosphate and sodium borohydride.

[0095] In some embodiments, the first stabilizer includes at least one of potassium iodate and thiourea.

[0096] In some embodiments, the first pH adjuster includes at least one of ammonia and sodium hydroxide.

[0097] In some embodiments, the pH value of the electroless nickel plating solution is 5 to 6.

[0098] Optionally, the pH value of the electroless nickel plating solution is 5, 5.1, 5.2, 5.3, 5.4, 5.5, 5.6, 5.7, 5.8, 5.9 or 6, or the pH value of the electroless nickel plating solution may be within the range of any two of the above pH values.

[0099] In some embodiments, the first preset temperature is 50°C to 70°C.

[0100] Optionally, the first preset temperature is 50℃, 52℃, 55℃, 58℃, 60℃, 62℃, 65℃, 68℃ or 70℃, or the first preset temperature may be within the range of any two of the above temperatures.

[0101] In some embodiments, the method for preparing the copper electrode layer 14 includes the following steps:

[0102] The intermediate product after preparing the nickel transition layer 13 is placed in a chemical copper plating solution, which includes a copper source, a second reducing agent, a second complexing agent, a second stabilizer, and a second pH adjuster.

[0103] Keep warm at the second preset temperature.

[0104] In some embodiments, the copper source includes at least one of copper sulfate and basic copper carbonate.

[0105] In some embodiments, the second reducing agent includes at least one of formaldehyde and sodium hypophosphite.

[0106] In some embodiments, the second stabilizer includes at least one of potassium ferrocyanide and biquinoline.

[0107] In some embodiments, the second pH adjuster includes at least one of sodium hydroxide and sodium carbonate.

[0108] In some embodiments, the pH value of the chemical copper plating solution is 12-13.

[0109] Optionally, the pH value of the electroless copper plating solution is 12, 12.1, 12.2, 12.3, 12.4, 12.5, 12.6, 12.7, 12.8, 12.9 or 13, or the pH value of the electroless copper plating solution may be within the range of any two of the above pH values.

[0110] In some embodiments, the second preset temperature is 50°C to 70°C.

[0111] Optionally, the second preset temperature is 50℃, 52℃, 55℃, 58℃, 60℃, 62℃, 65℃, 68℃ or 70℃, or the second preset temperature may be within the range of any two of the above temperatures.

[0112] In some embodiments, the fabrication of the copper electrode layer 14 further includes:

[0113] A tin protective layer is prepared on the surface of the nickel transition layer 13.

[0114] The tin protective layer can prevent the nickel transition layer 13 from being oxidized, improve the bonding force between the copper electrode layer 14 and the doped silicon 11, and reduce the series resistance. It is understood that if a tin protective layer is prepared on the surface of the nickel transition layer 13, the annealing process will form a copper-tin-nickel-silicon alloy interface.

[0115] In some embodiments, a tin protective layer is prepared by immersion plating on the surface of the nickel transition layer 13.

[0116] In some embodiments, the thickness of the tin protective layer is 50 nm to 500 nm.

[0117] Optionally, the thickness of the tin protective layer is 50nm, 100nm, 200nm, 300nm, 400nm or 500nm, or the thickness of the tin protective layer may be within any two of the above thicknesses.

[0118] S40. Annealing is performed under a protective gas atmosphere.

[0119] Reference Figure 4 As shown, Figure 4 In order to be in Figure 3 The diagram shows the structure after annealing based on the structure shown.

[0120] In some embodiments, the annealing temperature is 180°C to 250°C, and the annealing time is 8 min to 15 min.

[0121] The photovoltaic cell fabrication method of this application enables the copper electrode and doped silicon 11 to form an electrical contact at a relatively low temperature through annealing, eliminating the need for high-temperature treatment and reducing damage to the doped silicon 11. Optionally, the annealing temperature is 180°C, 190°C, 200°C, 210°C, 220°C, 230°C, 240°C, or 250°C, or the annealing temperature can be within any two of the above temperatures. Optionally, the annealing time is 8 min, 9 min, 10 min, 11 min, 12 min, 13 min, 14 min, or 15 min, or the annealing time can be within any two of the above times.

[0122] In some embodiments, the protective gas is at least one of nitrogen, argon, and helium.

[0123] Another embodiment of this application provides a photovoltaic cell fabrication apparatus, comprising:

[0124] A patterning device for forming a patterned passivation layer 12 on the surface of doped silicon 11;

[0125] A catalyst deposition apparatus for depositing a catalyst layer on the surface of doped silicon 11 exposed above the passivation layer 12;

[0126] A chemical plating apparatus is used to sequentially chemically plate a nickel transition layer 13 and a copper electrode layer 14 on the surface of doped silicon 11 after the catalyst layer is deposited.

[0127] Annealing apparatus for performing annealing treatment in a protective gas atmosphere.

[0128] Another embodiment of this application provides a photovoltaic cell, which is prepared by any of the photovoltaic cell preparation methods described above, including: doped silicon 11, and a copper electrode layer 14 located on the doped silicon 11; the copper electrode layer 14 and the doped silicon 11 layer form a copper-nickel-silicon alloy connection.

[0129] In some of these implementations, the photovoltaic cell is a back-contact photovoltaic cell.

[0130] Reference Figure 5 As shown, in some embodiments, the photovoltaic cell includes:

[0131] Silicon substrate 21, having a first surface and a second surface disposed opposite to each other along its thickness direction;

[0132] The first doped region 22 is located on the first surface;

[0133] The second doped region 23 is located on the first surface and is spaced apart from the first doped region 22. The doping types of the doping elements in the second doped region 23 and the first doped region 22 are different.

[0134] The first passivation layer 24 is located on the portion of the first surface where the first doped region 22 and the second doped region 23 are not provided;

[0135] The first electrode 25 is electrically connected to the first doped region 22;

[0136] The second electrode 26 is electrically connected to the second doped region 23.

[0137] In some embodiments, the photovoltaic cell further includes a second passivation layer 27 located on a second surface.

[0138] Another embodiment of this application provides a photovoltaic module, including:

[0139] Cover plate;

[0140] At least one battery string, the battery string comprising a photovoltaic cell prepared by any of the above-mentioned photovoltaic cell preparation methods, or the above-mentioned photovoltaic cell;

[0141] And the encapsulation layer, which is located between the cover plate and the battery string, with the cover plate connected to the battery string through the encapsulation layer.

[0142] The following are specific examples:

[0143] Example 1

[0144] Methods for preparing photovoltaic cells:

[0145] (1) A silicon nitride layer with a thickness of 80 nm and a silicon oxide layer with a thickness of 20 nm are deposited on the back side of a silicon substrate (with doped regions) as a passivation layer 12.

[0146] (2) Electrode patterns were directly written on the passivation layer 12 using a 355nm ultraviolet laser with a line width of 8μm and a depth of 5μm, exposing the doped region;

[0147] (3) Use hydrofluoric acid solution to clean the exposed doped areas to remove residual oxides;

[0148] (4) Immerse the silicon substrate in PdCl2 activation solution and deposit Pd nanocatalyst in the laser etching area;

[0149] (5) The silicon substrate is placed in a chemical nickel plating solution. The chemical nickel plating solution is formulated as follows: nickel sulfate, sodium hypophosphite, lactic acid, and potassium iodate. The pH is adjusted to 5.2 with ammonia. A nickel transition layer 13 with a thickness of 100 nm is selectively deposited at 65 °C. Then, the silicon substrate is placed in a chemical copper plating solution. The chemical copper plating solution is formulated as follows: copper sulfate, formaldehyde, ethylenediaminetetraacetic acid, and potassium ferrocyanide. The pH is adjusted to 12.5 with sodium hydroxide. A copper electrode layer 14 with a thickness of 15 μm is selectively deposited at 60 °C.

[0150] (6) Annealing at 200°C for 10 min under nitrogen atmosphere to form a copper-nickel-silicon alloy interface.

[0151] Comparative Example 1

[0152] Methods for preparing photovoltaic cells:

[0153] (1) A silicon nitride layer with a thickness of 80 nm and a silicon oxide layer with a thickness of 20 nm are deposited on the back side of a silicon substrate (with doped regions) as passivation layers.

[0154] (2) Electrodes are prepared by traditional screen printing.

[0155] The photovoltaic cells prepared in Example 1 and Comparative Example 1 were tested, and the test results are shown in the table below:

[0156]

[0157] It can be seen that the photovoltaic cell preparation method of this application can achieve high electrode preparation accuracy while also achieving low series resistance, thereby enabling the preparation of photovoltaic cells with high conversion efficiency.

[0158] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0159] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims, and the specification and drawings can be used to interpret the content of the claims.

Claims

1. A method for preparing a photovoltaic cell, characterized in that, Includes the following steps: A patterned passivation layer is formed on the surface of doped silicon; A catalyst layer is deposited on the surface of the doped silicon exposed above the passivation layer; A nickel transition layer and a copper electrode layer are sequentially electroless plated onto the catalyst layer to prepare a stacked nickel transition layer; Annealing is performed under a protective gas atmosphere.

2. The method for preparing a photovoltaic cell according to claim 1, characterized in that, Forming a patterned passivation layer on a doped silicon surface includes the following steps: A passivation layer is deposited over the entire surface of the doped silicon. The passivation layer is subjected to laser patterning.

3. The method for preparing a photovoltaic cell according to claim 2, characterized in that, After laser patterning the passivation layer, the following steps are also included: The surface of the doped silicon exposed in the passivation layer after laser patterning is cleaned with acid.

4. The method for preparing a photovoltaic cell according to claim 1, characterized in that, The method for preparing the nickel transition layer includes the following steps: The intermediate product after the catalyst layer is deposited is placed in an electroless nickel plating solution, the electroless nickel plating solution comprising a nickel source, a first reducing agent, a first complexing agent, a first stabilizer, and a first pH adjuster; Keep warm at the first preset temperature.

5. The method for preparing a photovoltaic cell according to claim 1, characterized in that, The method for preparing the copper electrode layer includes the following steps: The intermediate product after preparing the nickel transition layer is placed in a chemical copper plating solution, which includes a copper source, a second reducing agent, a second complexing agent, a second stabilizer, and a second pH adjuster. Keep warm at the second preset temperature.

6. The method for preparing a photovoltaic cell according to any one of claims 1 to 5, characterized in that, The annealing temperature is 180℃~250℃; the annealing time is 8min~15min.

7. A photovoltaic cell manufacturing apparatus, characterized in that, include: A patterning device for forming a patterned passivation layer on a doped silicon surface; A catalyst deposition apparatus for depositing a catalyst layer on the surface of the doped silicon exposed above the passivation layer; A chemical plating apparatus is used to sequentially chemically plate a nickel transition layer and a copper electrode layer on the surface of the doped silicon after the catalyst layer has been deposited. Annealing apparatus for performing annealing treatment in a protective gas atmosphere.

8. A photovoltaic cell, characterized in that, The photovoltaic cell is prepared by any one of claims 1 to 6, comprising: doped silicon, and a copper electrode layer located on the doped silicon; the copper electrode layer and the doped silicon layer form a copper-nickel-silicon alloy connection.

9. The photovoltaic cell according to claim 8, characterized in that, The photovoltaic cell is a back-contact photovoltaic cell.

10. A photovoltaic module, characterized in that, include: Cover plate; At least one battery string, the battery string comprising a photovoltaic cell prepared by the method of any one of claims 1 to 6, or a photovoltaic cell as described in claim 8 or 9; And an encapsulation layer, which is located between the cover plate and the battery string, and the cover plate is connected to the battery string through the encapsulation layer.

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