Bonding structure and bonding method
By forming an epitaxial structure of a P-type indium phosphide layer, a zinc layer, and a zinc oxide layer on an indium phosphide substrate, the safety and strength issues of bonding indium phosphide substrates to silicon substrates in the prior art are solved, achieving efficient and low-cost integration.
Patent Information
- Application Number
- CN202511779822.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-28
- Publication Date
- 2026-02-27
AI Technical Summary
Existing bonding methods between indium phosphide substrates and silicon substrates suffer from problems such as the generation of highly toxic gases, high equipment requirements, low bonding strength, and complex processes. In particular, when the p-type indium phosphide layer is used as the p-type contact layer in the structure of optoelectronic devices, the risk of metal impurity diffusion increases.
A P-type indium phosphide layer, a zinc layer, and a zinc oxide layer are formed on an indium phosphide substrate. An epitaxial structure is prepared by metal-organic chemical vapor deposition, and the zinc oxide layer is bonded to one side of the silicon substrate, avoiding the use of acid treatment and plasma etching.
This method achieves efficient integration of indium phosphide material with silicon substrate, avoiding the generation of highly toxic gases and increased surface roughness, improving bonding strength, and reducing process complexity and cost.
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Figure CN121586508A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor technology, specifically relating to a bonding structure and bonding method. Background Technology
[0002] Silicon photonics integration has wide applications in optoelectronics, mainly involving materials such as lithium niobate, indium phosphide, gallium arsenide, and polymers, with indium phosphide playing a crucial role. Silicon, as an indirect bandgap material, is often used as a gain medium in optoelectronic devices by employing III-V group materials such as indium phosphide or gallium arsenide. However, the significant lattice mismatch between III-V materials and silicon makes direct epitaxial growth of III-V materials (such as indium phosphide) on silicon substrates difficult and results in unsatisfactory growth quality. Therefore, heterogeneous integration methods are generally used to integrate indium phosphide layers on silicon substrates. Furthermore, while packaging and testing costs account for a relatively small proportion of the total cost in electronic system integration, this is the opposite in silicon photonics system integration. For most indium phosphide optoelectronic devices, packaging and testing costs can reach 70%–80% of the total cost. Therefore, reducing the cost of packaging and testing in indium phosphide-based optoelectronic devices is crucial, and bonding is an extremely important part of the packaging and testing process.
[0003] Currently, the bonding methods between indium phosphide substrates and silicon substrates in the existing technology are mainly as follows: (1) Pre-treating the surface of indium phosphide substrates and silicon substrates with chemical agents such as concentrated acid and hydrogen peroxide, and then bonding at high temperature; (2) Activating the surface of indium phosphide substrates and silicon substrates with methods such as plasma activation or reactive ion beam etching, and then bonding; (3) Forming an aluminum oxide layer or silicon oxide layer on the surface of silicon substrates using methods such as deposition and epitaxy, and then bonding.
[0004] However, when treating the surface of indium phosphide substrates with acid, the reaction between the acidic solution and indium phosphide produces highly toxic phosphine gas, increasing protection costs and operational difficulty. Activation treatment of indium phosphide substrates using plasma or reactive ion beam etching methods is relatively safe, but requires sophisticated equipment, and the significantly increased surface roughness of the indium phosphide substrate also significantly reduces bonding strength. Fabricating alumina and silicon oxide layers on silicon substrates requires additional equipment, further increasing process difficulty and stability. Furthermore, when using p-type indium phosphide layers as p-type contact layers in optoelectronic device structures, to prevent the diffusion of doped metal impurities from the p-type indium phosphide layer into the silicon substrate during bonding, an alumina or silicon oxide layer is typically deposited on the silicon substrate surface to block metal impurity diffusion. Simultaneously, the p-type indium phosphide layer surface needs to be cleaned using a standard cleaning procedure to remove impurities before bonding under specific temperature and pressure conditions.
[0005] Therefore, to address the aforementioned technical problems, it is necessary to provide a bonding structure and bonding method. Summary of the Invention
[0006] The purpose of this invention is to provide a bonding structure and bonding method that can easily integrate indium phosphide material with a silicon substrate.
[0007] To achieve the above objectives, an embodiment of the present invention provides the following technical solution:
[0008] A bonding structure includes a silicon substrate and an epitaxial structure bonded to the silicon substrate. The epitaxial structure includes an indium phosphide substrate and an intrinsic indium phosphide layer, a p-type indium phosphide layer, a zinc layer, and a zinc oxide layer sequentially disposed on the side surface of the indium phosphide substrate facing the silicon substrate. The zinc oxide layer is bonded to the side surface of the silicon substrate facing the indium phosphide substrate, and the doping element of the p-type indium phosphide layer is zinc.
[0009] In one embodiment, the thickness of the zinc oxide layer is 50 nm to 200 nm.
[0010] In one embodiment, the thickness of the zinc layer is 0.5 nm to 5 nm.
[0011] In one embodiment, the thickness of the intrinsic indium phosphide layer is a first thickness, and the sum of the thicknesses of the intrinsic indium phosphide layer, the P-type indium phosphide layer, the zinc layer, and the zinc oxide layer is a second thickness, wherein the ratio of the first thickness to the second thickness is (0.05~0.2):1.
[0012] In one embodiment, the indium phosphide substrate is an N-type indium phosphide substrate.
[0013] Another embodiment of the present invention provides the following technical solution:
[0014] A bonding method comprising the following steps:
[0015] Provide silicon substrates;
[0016] Provide indium phosphide substrates;
[0017] An intrinsic indium phosphide layer, a P-type indium phosphide layer, a zinc layer, and a zinc oxide layer are sequentially prepared on an indium phosphide substrate to obtain an epitaxial structure, wherein the doping element of the P-type indium phosphide layer is zinc.
[0018] An epitaxial structure is bonded to a silicon substrate, wherein the zinc oxide layer is bonded to the side surface of the silicon substrate facing the indium phosphide substrate.
[0019] In one embodiment, an intrinsic indium phosphide layer, a p-type doped indium phosphide layer, a zinc layer, and a zinc oxide layer are sequentially prepared on an indium phosphide substrate using a metal-organic chemical vapor deposition process.
[0020] In one embodiment, the steps of sequentially preparing an intrinsic indium phosphide layer, a p-type doped indium phosphide layer, a zinc layer, and a zinc oxide layer on an indium phosphide substrate using a metal-organic chemical vapor deposition process include:
[0021] An indium phosphide substrate is placed in the reaction chamber of a metal-organic chemical vapor deposition (MOCVD) apparatus, and the reaction chamber is evacuated.
[0022] A phosphorus source and an indium source are introduced into the reaction chamber to prepare an intrinsic indium phosphide layer on an indium phosphide substrate;
[0023] A phosphorus source, an indium source, and a zinc source are introduced into the reaction chamber to prepare a P-type indium phosphide layer on the intrinsic indium phosphide layer;
[0024] A zinc source is introduced into the reaction chamber to prepare a zinc layer on a P-type indium phosphide layer;
[0025] A zinc source and oxygen are introduced into the reaction chamber to prepare a zinc oxide layer on the zinc layer.
[0026] In one embodiment, in the step of preparing a P-type indium phosphide layer on an intrinsic indium phosphide layer:
[0027] The zinc source flow rate was 0.05 mmol / min to 0.1 mmol / min.
[0028] In one embodiment, the step of preparing a zinc oxide layer on a zinc layer includes:
[0029] In the first stage, the growth rate of the zinc oxide layer is a first growth rate of 0.05 nm / s to 0.15 nm / s;
[0030] In the second stage, the growth rate of the zinc oxide layer is a second growth rate of 0.35 nm / s to 0.45 nm / s;
[0031] The first growth rate is increased to the second growth rate within 30s to 90s.
[0032] Compared with the prior art, the present invention has the following beneficial effects:
[0033] This invention achieves convenient integration of indium phosphide material with silicon substrate by directly forming a P-type indium phosphide layer, a zinc layer and a zinc oxide layer on an indium phosphide substrate, and then bonding the zinc oxide layer to the side surface of the silicon substrate facing the indium phosphide substrate. This avoids the problems of acid washing generating highly toxic and harmful gases or plasma cleaning and etching causing deterioration of the surface morphology of the indium phosphide layer and increased roughness, which affect the bonding strength. Attached Figure Description
[0034] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0035] Figure 1 This is a schematic diagram of the bonding structure in Embodiment 1 of the present invention;
[0036] Figures 2a-2d This is a process flow diagram of the bonding method in Embodiment 1 of the present invention;
[0037] Figure 3 This is an ECV test diagram of the epitaxial structure in Embodiment 1 of the present invention;
[0038] Figure 4 This is a polarized light microscope characterization image of the zinc oxide layer in Embodiment 1 of the present invention.
[0039] Explanation of key figure labels:
[0040] 10-Silicon substrate, 21-Indium phosphide substrate, 22-Intrinsic indium phosphide layer, 23-P-type indium phosphide layer, 24-Zinc layer, 25-Zinc oxide layer. Detailed Implementation
[0041] To enable those skilled in the art to better understand the technical solutions in this disclosure, the technical solutions in the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments in this disclosure, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this disclosure.
[0042] This invention discloses a bonding structure, including a silicon substrate and an epitaxial structure bonded to the silicon substrate. The epitaxial structure includes an indium phosphide substrate and an intrinsic indium phosphide layer, a P-type indium phosphide layer, a zinc layer and a zinc oxide layer sequentially disposed on the indium phosphide substrate. The zinc oxide layer is bonded to the side surface of the silicon substrate facing the indium phosphide substrate. The doping element of the P-type indium phosphide layer is zinc.
[0043] The present invention also discloses a bonding method, comprising the following steps:
[0044] Provide silicon substrates;
[0045] Provide indium phosphide substrates;
[0046] An intrinsic indium phosphide layer, a P-type indium phosphide layer, a zinc layer, and a zinc oxide layer are sequentially prepared on an indium phosphide substrate to obtain an epitaxial structure. The doping element of the P-type indium phosphide layer is zinc element;
[0047] Bond the epitaxial structure to a silicon substrate, and the zinc oxide layer is bonded to the surface of the silicon substrate facing the indium phosphide substrate.
[0048] The present invention will be further described below in conjunction with specific examples.
[0049] Example 1:
[0050] Refer Figure 1 As shown, the bonding structure in this embodiment includes a silicon substrate 10 and an epitaxial structure bonded to the silicon substrate 10. The epitaxial structure includes an indium phosphide substrate 21 and an intrinsic indium phosphide layer 22, a P-type indium phosphide layer 23, a zinc layer 24, and a zinc oxide layer 25 sequentially provided on the surface of the indium phosphide substrate 21 facing the silicon substrate 10. The zinc oxide layer 25 is bonded to the surface of the silicon substrate 10 facing the indium phosphide substrate 21, and the doping element of the P-type indium phosphide layer 23 is zinc element.
[0051] Among them, the indium phosphide substrate 21 is an N-type indium phosphide substrate to serve as the N-type contact layer in the indium phosphide-based optoelectronic device, and the P-type indium phosphide layer 23 serves as the P-type contact layer in the indium phosphide-based optoelectronic device.
[0052] It is worth noting that the epitaxial structure including the N-type indium phosphide substrate and the intrinsic indium phosphide layer, P-type indium phosphide layer, zinc layer, and zinc oxide layer sequentially provided on the N-type indium phosphide substrate can serve as the main structure of the indium phosphide-based optoelectronic device.
[0053] Further, the thickness of the intrinsic indium phosphide layer 22 is the first thickness, and the sum of the thicknesses of the intrinsic indium phosphide layer 22, P-type indium phosphide layer 23, zinc layer 24, and zinc oxide layer 25 is the second thickness. The ratio of the first thickness to the second thickness is (0.05 - 0.2):1, and the intrinsic indium phosphide layer 22 is reserved as a buffer layer.
[0054] Preferably, the ratio of the first thickness to the second thickness in this embodiment is 0.08:1, that is, the intrinsic indium phosphide layer accounts for 8% of the total thickness of the structure prepared on the N-type indium phosphide substrate.
[0055] Specifically, the thickness of the intrinsic indium phosphide layer 22 in this embodiment is 60 nm, and the thickness of the P-type indium phosphide layer 23 is 520 nm.
[0056] Further, the thickness of the zinc layer 24 is 0.5 nm to 5 nm, serving as a buffer layer for growing the zinc oxide layer and a supplementary diffusion source for the P-type indium phosphide layer.
[0057] Specifically, the thickness of the zinc layer 24 in this embodiment is 2 nm.
[0058] Furthermore, the thickness of the zinc oxide layer 25 is 50nm~200nm. The zinc oxide layer is a protective layer for the p-type indium phosphide layer, and also a good optical window. While blocking the zinc impurities doped in the p-type indium phosphide layer from entering the silicon substrate, it can achieve good bonding between the indium phosphide-based epitaxial structure and the silicon substrate, without affecting the performance of the indium phosphide-based optoelectronic device.
[0059] Specifically, in this embodiment, the thickness of the zinc oxide layer 25 is 100 nm.
[0060] Furthermore, the bonding method in this embodiment includes the following steps:
[0061] S1, Reference Figure 2a As shown, a silicon substrate 10 is provided.
[0062] S2, Reference Figure 2b As shown, an indium phosphide substrate 21 is provided.
[0063] Specifically, in this embodiment, the indium phosphide substrate 21 is an N-type indium phosphide substrate.
[0064] S3, Reference Figure 2c As shown, an intrinsic indium phosphide layer 22, a P-type indium phosphide layer 23, a zinc layer 24, and a zinc oxide layer 25 are sequentially prepared on an indium phosphide substrate 21 to obtain an epitaxial structure. The doping element of the P-type indium phosphide layer 23 is zinc.
[0065] Specifically, in this embodiment, an intrinsic indium phosphide layer, a P-type doped indium phosphide layer, a zinc layer, and a zinc oxide layer are sequentially prepared on an indium phosphide substrate using a metal-organic chemical vapor deposition process.
[0066] More specifically, this step includes:
[0067] (1) Place the indium phosphide substrate in the reaction chamber of the metal-organic chemical vapor deposition equipment and evacuate the reaction chamber.
[0068] Specifically, an N-type indium phosphide substrate is introduced into the reaction chamber, nitrogen gas is introduced into the reaction chamber, and the vacuum level of the reaction chamber is maintained at 100 mbar to 200 mbar, preferably 100 mbar.
[0069] (2) Introduce a phosphorus source and an indium source into the reaction chamber to prepare an intrinsic indium phosphide layer on an indium phosphide substrate.
[0070] Specifically, before preparing the intrinsic indium phosphide layer, the process includes: shutting off the nitrogen gas and introducing hydrogen gas as a carrier gas into the reaction chamber, with the hydrogen flow rate controlled at 10 L / min to 30 L / min, preferably 20 L / min; simultaneously raising the temperature of the reaction chamber to 300°C and introducing phosphine gas at a flow rate of 20 sccm to 50 sccm as a protective gas; and maintaining the temperature and pressure within the reaction chamber stable after the temperature of the reaction chamber reaches 650°C to 710°C.
[0071] More specifically, after the temperature and pressure within the reaction chamber stabilized, the flow rate of phosphine was increased to 300 sccm as a phosphorus source, while trimethylindium gas at a flow rate of 0.1 mmol / min was introduced into the reaction chamber as an indium source, growing an intrinsic indium phosphide layer with a thickness of 60 nm on an N-type indium phosphide substrate. The intrinsic indium phosphide layer served as a buffer layer for the growth of the P-type indium phosphide layer.
[0072] (3) Introduce phosphorus source, indium source and zinc source into the reaction chamber to prepare P-type indium phosphide layer on intrinsic indium phosphide layer.
[0073] Specifically, phosphine is continuously introduced as the phosphorus source and trimethylindium gas is introduced as the indium source. At the same time, the zinc source switch of the organometallic chemical vapor deposition equipment is turned on, and diethylzinc gas is introduced into the reaction chamber as the zinc source for growing the P-type indium phosphide layer. The flow rate of the zinc source is 0.05 mmol / min to 0.1 mmol / min.
[0074] More specifically, in this embodiment, the flow rate of diethylzinc gas is set to 0.05 mmol / min. During the growth of the P-type indium phosphide layer, the zinc source is continuously introduced for 10-15 seconds, then paused for 2-5 seconds, and the process is repeated until a P-type indium phosphide layer with a thickness of 520 nm is grown on the intrinsic indium phosphide layer.
[0075] It should be understood that, in other embodiments, other organometallic sources such as dimethylzinc may also be used as zinc sources.
[0076] (4) A zinc source is introduced into the reaction chamber to prepare a zinc layer on the P-type indium phosphide layer.
[0077] Specifically, the phosphorus source (phosphine) and indium source (trimethylindium) are turned off, and the carrier gas is switched from hydrogen to nitrogen. At the same time, the zinc source (diethylzinc) is continuously introduced for 1s to 6s, and a zinc layer of 0.5nm to 5nm is deposited on the p-type indium phosphide layer.
[0078] More specifically, in this embodiment, the zinc layer has a thickness of 2 nm. The zinc layer prepared on the p-type indium phosphide layer can serve as a buffer layer for the preparation of the zinc oxide layer, and also as a supplementary diffusion source for p-type doping during the subsequent cooling process.
[0079] (5) Introduce a zinc source and oxygen into the reaction chamber to prepare a zinc oxide layer on the zinc layer.
[0080] Specifically, before preparing the zinc oxide layer, the zinc source needs to be closed for a period of time, and the temperature in the reaction chamber is reduced to 400 °C.
[0081] In addition, this step includes:
[0082] In the first stage, the growth rate of the zinc oxide layer is the first growth rate, and the first growth rate is 0.05 nm / s to 0.15 nm / s;
[0083] In the second stage, the growth rate of the zinc oxide layer is the second growth rate, and the second growth rate is 0.35 nm / s to 0.45 nm / s;
[0084] Raise the first growth rate to the second growth rate within 30 s to 90 s.
[0085] After completion of growth, the thickness of the zinc oxide layer is 50 nm to 200 nm.
[0086] Specifically, after reducing the temperature in the reaction chamber to 400 °C and stabilizing for 5 min, reduce the nitrogen flow rate to 1 L / min to 2 L / min, and purge the reaction chamber for 2 min to 5 min, preferably for 2 min; then introduce a zinc source (diethylzinc gas) and oxygen into the reaction chamber. In the first stage, control the flow rates of the diethylzinc gas and oxygen to be 0.01 mmol / min and 10 sccm respectively. At this time, the growth rate of the zinc oxide layer is 0.1 nm / s, and linearly increase the flow rates of the diethylzinc gas and oxygen to 0.04 mmol / min and 150 sccm within 60 s to reach the second stage. In the second stage, the growth rate of the zinc oxide layer is 0.4 nm / s, and continuously grow a zinc oxide layer with a thickness of 100 nm on the zinc layer.
[0087] After completion of the preparation of the zinc oxide layer, close the oxygen and the zinc source (diethylzinc gas). After cooling the epitaxial structure to room temperature under nitrogen protection, take out the epitaxial structure. During this process, the zinc layer replenishes the P-type diffusion source of the P-type indium phosphide layer.
[0088] See Figure 3As shown in the figure, in this embodiment, an electrochemical capacitance-voltage profiler (ECV) test was performed on the prepared epitaxial structure. Since the zinc oxide layer is a weakly n-type layer, it can form a pn junction-like structure with the p-type doped indium phosphide layer at about 100 nm. Therefore, the test structure shows a concentration disorder at the interface of the epitaxial structure at about 100 nm. When entering the normal doping range, the doping concentration of zinc impurities is stable. At the same time, near the background concentration of the n-type indium phosphide substrate of -1e 18 / cm², the diffusion of zinc impurity doping is completely cut off at a depth of 600 nm, proving that this preparation method can prepare an epitaxial structure with good quality.
[0089] See Figure 4 As shown in the figure, the characterization results of the polarized light microscope show that a zinc oxide layer was successfully prepared on the zinc layer.
[0090] It should be noted that the characterization results show that the surface of the zinc oxide layer prepared in this embodiment is a relatively rough diffuse reflection interface. However, by optimizing the fine parameters of the preparation process, a zinc oxide layer with a mirror-effect surface can be prepared. The surface quality of the zinc oxide layer directly determines the quality of the subsequent bonding process.
[0091] S4. See Figure 2d As shown in the figure, the epitaxial structure is bonded to the silicon substrate 10, and the zinc oxide layer 25 is bonded to the surface of the silicon substrate 10 on the side facing the indium phosphide substrate 21.
[0092] Specifically, in this step, a bonding process is used to bond the zinc oxide layer to the surface of the silicon substrate on the side facing the indium phosphide substrate, which will not be elaborated here.
[0093] In this embodiment, after a p-type indium phosphide layer is prepared on an indium phosphide substrate by a metal organic chemical vapor deposition process, a zinc source is then introduced into the reaction chamber to prepare a zinc layer on the p-type indium phosphide layer, making the surface of the p-type indium phosphide layer zinc-rich. Then, a thin zinc oxide layer is grown to form an antioxidant hydrophilic layer, and then the indium phosphide-based epitaxial structure with the zinc oxide layer is bonded to the silicon substrate. The zinc oxide layer grown by the metal organic chemical vapor deposition equipment has high density and high flatness. During bonding, only organic cleaning agents and deionized water are needed for rinsing, and no other steps such as acid etching or surface treatment using plasma are required, avoiding the generation of highly toxic gases and increasing surface roughness, reducing the bonding cost and bond strength.
[0094] From the above technical solutions, it can be seen that the present invention has the following beneficial effects:
[0095] This invention achieves convenient integration of indium phosphide material with silicon substrate by directly forming a P-type indium phosphide layer, a zinc layer and a zinc oxide layer on an indium phosphide substrate, and then bonding the zinc oxide layer to the side surface of the silicon substrate facing the indium phosphide substrate. This avoids the problems of acid washing generating highly toxic and harmful gases or plasma cleaning and etching causing deterioration of the surface morphology of the indium phosphide layer and increased roughness, which affect the bonding strength.
[0096] It will be apparent to those skilled in the art that this disclosure is not limited to the details of the exemplary embodiments described above, and that this disclosure can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the embodiments should be considered in all respects as exemplary and non-limiting, and the scope of this disclosure is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within this disclosure. No reference numerals in the claims should be construed as limiting the scope of the claims.
[0097] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.
Claims
1. A bonded structure, comprising: The bonding structure comprises a silicon substrate and an epitaxial structure bonded on the silicon substrate, the epitaxial structure comprises an indium phosphide substrate and, sequentially on a side surface of the indium phosphide substrate facing the silicon substrate, an intrinsic indium phosphide layer, a P-type indium phosphide layer, a zinc layer and a zinc oxide layer, the zinc oxide layer is bonded on a side surface of the silicon substrate facing the indium phosphide substrate, and the doping element of the P-type indium phosphide layer is zinc element.
2. The bonded structure of claim 1, wherein, The thickness of the zinc oxide layer is 50 nm to 200 nm.
3. The bonded structure of claim 1, wherein, The thickness of the zinc layer is 0.5 nm to 5 nm.
4. The bonded structure of claim 1, wherein, The thickness of the intrinsic indium phosphide layer is a first thickness, the sum of the thicknesses of the intrinsic indium phosphide layer, the P-type indium phosphide layer, the zinc layer and the zinc oxide layer is a second thickness, and the ratio of the first thickness to the second thickness is (0.05-0.2):
1.
5. The bonded structure of claim 1, wherein, The indium phosphide substrate is an N-type indium phosphide substrate.
6. A bonding method characterized by, The bonding method comprises the following steps: providing a silicon substrate; providing an indium phosphide substrate; sequentially preparing an intrinsic indium phosphide layer, a P-type indium phosphide layer, a zinc layer and a zinc oxide layer on the indium phosphide substrate to obtain an epitaxial structure, and the doping element of the P-type indium phosphide layer is zinc element; bonding the epitaxial structure on the silicon substrate, and the zinc oxide layer is bonded on a side surface of the silicon substrate facing the indium phosphide substrate.
7. The bonding method according to claim 6, wherein The intrinsic indium phosphide layer, the P-type doped indium phosphide layer, the zinc layer and the zinc oxide layer are sequentially prepared on the indium phosphide substrate by a metal organic compound chemical vapor deposition process.
8. The bonding method according to claim 6, wherein The step of sequentially preparing the intrinsic indium phosphide layer, the P-type doped indium phosphide layer, the zinc layer and the zinc oxide layer on the indium phosphide substrate by a metal organic compound chemical vapor deposition process comprises: placing the indium phosphide substrate in a reaction chamber of a metal organic compound chemical vapor deposition device and vacuumizing the reaction chamber; introducing a phosphorus source and an indium source into the reaction chamber to prepare the intrinsic indium phosphide layer on the indium phosphide substrate; introducing the phosphorus source, the indium source and a zinc source into the reaction chamber to prepare the P-type indium phosphide layer on the intrinsic indium phosphide layer; introducing the zinc source into the reaction chamber to prepare the zinc layer on the P-type indium phosphide layer; introducing the zinc source and oxygen into the reaction chamber to prepare the zinc oxide layer on the zinc layer.
9. The bonding method according to claim 8, wherein In the step of preparing the P-type indium phosphide layer on the intrinsic indium phosphide layer: The flow rate of the zinc source is 0.05 mmol / min to 0.1 mmol / min.
10. The bonding method according to claim 8, wherein The step of preparing the zinc oxide layer on the zinc layer comprises: In a first stage, the growth rate of the zinc oxide layer is a first growth rate, and the first growth rate is 0.05 nm / s to 0.15 nm / s; In a second stage, the growth rate of the zinc oxide layer is a second growth rate, and the second growth rate is 0.35 nm / s to 0.45 nm / s; The first growth rate is increased to the second growth rate in 30 s to 90 s.