External device memory access method, memory access system and electronic device

Abstract

The invention provides an external device memory access method, a memory access system and an electronic device. The external device memory access method is applied to a central processing unit (CPU), and the CPU is connected with at least one PCIE device. The CPU comprises a virtual address space; the processor accesses the memory of the PCIE equipment through the physical memory address of the PCIE equipment mapped by the virtual address; the method comprises the following steps: receiving an operation instruction for operating the memory of the PCIE equipment; determining a mapping relation between the operation address and the virtual address in the virtual address space based on a preset function, and executing the operation instruction; the preset function is used for configuring a mapping relation between the operation address and the virtual address in the virtual address space under the condition that the virtual address space does not comprise the operation address. According to the method, the CPU can access all memories of the large-memory PCIE equipment.

Description

Technical Field

[0001] This application relates to the field of integrated circuits, and more specifically, provides an external device memory access method, a memory access system, and an electronic device. Background Technology

[0002] The CPU (Central Processing Unit) can connect to various external PCIe devices via PCIe (Peripheral Component Interconnect Express, a high-speed serial computer expansion bus standard). For example, the CPU can connect to a GPU (Graphics Processing Unit), a wireless network card, a solid-state drive, etc.

[0003] After the CPU connects to different PCIe devices, when the CPU needs to access the PCIe devices, it can access the memory of the PCIe devices through I / O (Input / Output) mapping. In this process, I / O mapping maps the memory address or register address of the external PCIe device to the CPU's virtual address space. After the CPU connects to various PCIe devices, it needs to allocate a virtual address range of the corresponding size to the PCIe device according to the memory size required by the PCIe device, and record it as a mapping table relationship stored in the virtual address space.

[0004] The range of virtual addresses that a CPU can allocate is matched to the size of its own memory. However, for various reasons, the CPU may be unable to allocate enough virtual addresses to each PCIe device. For example, poor CPU performance may result in a small amount of CPU memory; another example is when the CPU is connected to a large number of PCIe devices, each of which needs to be allocated a matching virtual address based on its own memory; yet another example is when PCIe devices with significantly more memory than the CPU are connected, such as GPUs or GPGPUs (General-Purpose Computing on Graphics Processing Units).

[0005] The reasons mentioned above may prevent the CPU from allocating enough virtual addresses to each PCIe device, thus preventing the CPU's virtual addresses from mapping all physical memory addresses of the PCIe devices, and consequently preventing the CPU from accessing all memory of the PCIe devices through I / O mapping.

[0006] Some programs may access different memory segments of a PCIe device. If the CPU cannot access all the memory of the PCIe device through I / O mapping, it will affect program development and use. Summary of the Invention

[0007] In view of this, this application aims to provide an external device memory access method, memory access system and electronic device, so that when the CPU has insufficient memory allocated to the PCIe device, the CPU can still access the entire memory segment of the PCIe device through IO mapping.

[0008] First, this application provides an external device memory access method, applied to a central processing unit (CPU), wherein the CPU is connected to at least one PCIe device; the CPU includes a virtual address space, which is used to record the mapping relationship between virtual addresses and the physical memory addresses of the PCIe device; the address range of the virtual addresses matches the memory size of the CPU; the processor accesses the memory of the PCIe device through the physical memory address of the PCIe device mapped by the virtual address; the external device memory access method includes: receiving an operation instruction to operate on the memory of the PCIe device; the operation instruction includes the operation address of the memory of the PCIe device; determining the mapping relationship between the operation address and the virtual address in the virtual address space based on a preset function and executing the operation instruction; wherein, the preset function is used to configure the mapping relationship between the operation address and the virtual address in the virtual address space when the virtual address space does not include the operation address.

[0009] In this embodiment, a preset function can configure the virtual address space. When the virtual address space does not include the operation address involved in the operation instruction, the preset function can configure the mapping relationship between the operation address and the virtual address in the virtual address space. This allows the CPU to access all memory of the PCIe device through the configured mapping relationship between virtual and operation addresses, enabling operation on each memory segment of the PCIe device. This method can meet the needs of connecting large-memory PCIe devices to the CPU and accessing them through I / O mapping when CPU memory performance is insufficient, or it can meet the needs of connecting a larger number of PCIe devices.

[0010] In one embodiment, the virtual address space includes an initial mapping relationship, which is a preset mapping relationship between virtual addresses and physical memory addresses of the PCIe device; the step of determining the mapping relationship between the operation address and the virtual address in the virtual address space based on a preset function and executing the operation instruction includes: determining whether the virtual address space includes the operation address; if it is determined that the virtual address space does not include the operation address, modifying the initial mapping relationship based on the operation address to obtain a target mapping relationship; wherein, the target mapping relationship includes the mapping relationship between the operation address and the virtual address; accessing the memory corresponding to the operation address based on the target mapping relationship; and performing the operation corresponding to the operation instruction on the memory corresponding to the operation address.

[0011] In this embodiment, the CPU allocates a corresponding virtual address range for each connected PCIe and records it in the virtual address space. The range of virtual addresses in the virtual address space matches the CPU's memory. Since the CPU's memory size cannot be changed, the virtual addresses allocated by the CPU for the same device are usually fixed, and the mapping relationship is also fixed. In this case, the mapping relationship can be modified so that the operation address is mapped by the virtual address, thereby enabling the CPU to access the entire memory of the PCIe device.

[0012] In one embodiment, the operation instruction includes input parameters and / or identification information, the input parameters and / or identification information being used to characterize the PCIe device to be accessed; determining whether the virtual address space includes the operation address includes: determining a target virtual address based on the input parameters and / or identification information in the operation instruction; determining an initial physical memory address mapped by the target virtual address based on the initial mapping relationship; if the initial physical memory address does not include the operation address, then determining that the virtual address space does not include the operation address.

[0013] In this embodiment, the CPU allocates a corresponding address range for each connected PCIe device and records it in the virtual address space. The memory size of the PCIe device that the CPU can access matches the address range allocated to that PCIe device. Input parameters and identification information are used to identify the PCIe device to be accessed. Therefore, based on the input device and identification information, the PCIe device to be accessed is determined, and thus the target virtual address allocated to that PCIe device is determined. If the operation address is not within the initial physical memory address range mapped by the target virtual address, it is guaranteed that the memory corresponding to the operation address is not mapped. Based on this method, it is possible to quickly determine whether the operation address is mapped by the virtual address without checking each one individually, which helps to improve the memory access efficiency of PCIe devices.

[0014] In one embodiment, modifying the initial mapping relationship based on the operation address includes: modifying the initial physical memory address to the operation address, so that the target virtual address maps to the operation address.

[0015] In this embodiment of the application, in the initial mapping relationship, the target virtual address maps to the initial physical memory. The initial physical memory address can be modified to the operation address. Thus, the target virtual address maps to the operation address, and when the memory is accessed, the memory segment corresponding to the operation address on the PCIe device can be accessed through the target virtual address.

[0016] In one embodiment, before modifying the initial mapping relationship based on the operation address to obtain the target mapping relationship, the method further includes: saving the initial mapping relationship; after executing the operation corresponding to the operation instruction on the memory corresponding to the operation address, the method further includes: modifying the mapping relationship in the virtual address space to restore the target mapping relationship to the initial mapping relationship.

[0017] Application development and use are usually based on the virtual addresses initially allocated by the CPU to PCIe. In this application embodiment, the mapping relationship is modified. After modification, the CPU application may encounter abnormalities in subsequent development and use. Therefore, in this application embodiment, the initial mapping relationship can be saved and restored after performing the corresponding operation, so that the CPU can run normally and reduce the abnormalities caused by the modification of the mapping relationship.

[0018] In one embodiment, the operation instruction further includes an operation type of the operation to be performed; the preset function further includes preset operation functions for performing different operation types; before performing the operation corresponding to the operation instruction on the memory corresponding to the operation address, the method further includes: determining the target operation type of the operation corresponding to the operation instruction; determining the target preset operation function for performing the operation corresponding to the target operation type; performing the operation corresponding to the operation instruction on the memory corresponding to the operation address includes: calling the target preset operation function to perform the operation corresponding to the operation instruction.

[0019] There are various operations on memory. In this embodiment, a preset operation function for performing memory operations can also be configured in the preset function. Thus, the corresponding preset operation function can be directly called to perform the corresponding operation without modifying the mapping relationship and calling the corresponding function again in other ways to perform the operation, which simplifies the operation process and improves memory access efficiency.

[0020] In one embodiment, the operation type includes a zeroing operation; the preset operation function includes a first function, and the target preset operation function corresponding to the zeroing operation is the first function; the step of calling the target preset operation function to execute the operation corresponding to the operation instruction includes: calling the first function to zero the memory corresponding to the operation address.

[0021] In this embodiment of the application, a first function corresponding to the zeroing operation is configured in a preset function. This simplifies the operations required to zero the memory of a PCIe device and improves the efficiency of the zeroing operation.

[0022] In one embodiment, the operation type includes a copy operation; the preset operation function includes a second function, and the target preset operation function corresponding to the copy operation is the second function; the step of calling the target preset operation function to execute the operation corresponding to the operation instruction includes: determining the copy direction corresponding to the operation instruction; if the copy direction indicates that data is copied from the memory corresponding to the operation address, calling the second function to copy data from the memory corresponding to the operation address to the CPU; or, if the copy direction indicates that data is copied from the CPU to the memory corresponding to the operation address, calling the second function to copy data from the CPU into the memory corresponding to the operation address.

[0023] The memory operations include copying data from the memory of the PCIe device to the memory of the CPU, or copying data from the memory of the CPU to the memory of the PCIe device. In the embodiments of this application, a second function for performing the copy operation can also be encapsulated in the preset function, thereby simplifying the operation of copying data to the PCIe device and improving the copying efficiency.

[0024] In one embodiment, the preset function is a pre-packaged function.

[0025] In this embodiment, the preset function is a pre-encapsulated function. Therefore, during subsequent development, the preset function can be directly called without having to redesign the function's functionality or implementation logic, which helps to improve subsequent development efficiency.

[0026] In one embodiment, determining the mapping relationship between the operation address and the virtual address in the virtual address space based on a preset function and executing the operation instruction includes: determining whether the virtual address space includes the operation address; if it is determined that the virtual address space does not include the operation address, calling the preset function and the operation address to modify the initial mapping relationship to obtain a target mapping relationship; wherein, the target mapping relationship includes the mapping relationship between the operation address and the virtual address; accessing the memory corresponding to the operation address based on the target mapping relationship; and performing the operation corresponding to the operation instruction on the memory corresponding to the operation address.

[0027] In one embodiment, performing the operation corresponding to the operation instruction on the memory corresponding to the operation address includes: determining the target operation type of the operation corresponding to the operation instruction; determining a target preset operation function to perform the operation corresponding to the target operation type; and calling the target preset operation function to perform the operation corresponding to the operation instruction on the memory corresponding to the operation address.

[0028] In the embodiments of this application, the preset function can also be configured to modify the mapping relationship and continue to use the original operation function to perform the operation.

[0029] In a second aspect, embodiments of this application provide a central processing unit (CPU) including: a controller, memory, and at least one I / O interface; the controller is connected to the memory and the I / O interface respectively; the I / O interface is used to connect a PCIe device; the controller is used to execute the external device memory access method as described in any of the first aspects.

[0030] Thirdly, embodiments of this application provide a memory access system, including: a central processing unit (CPU) as described in the second aspect and at least one PCIe device; the PCIe device is connected to the CPU.

[0031] Fourthly, embodiments of this application provide an electronic device, including a processor as described in the second aspect or a memory access system as described in the third aspect. Attached Figure Description

[0032] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0033] Figure 1 This is a schematic diagram illustrating the connection between a CPU and a PCIe device according to an embodiment of this application; Figure 2 A flowchart illustrating an external device memory access method provided in an embodiment of this application; Figure 3 This is a schematic diagram of the execution flow of a preset function including a first function, provided in an embodiment of this application. Figure 4 This is a schematic diagram of the execution flow of a preset function including a second function, provided in an embodiment of this application. Figure 5 This is a schematic diagram of the packaging provided in an embodiment of this application; Figure 6 This is a schematic diagram of the structure of a central processing unit (CPU) provided in an embodiment of this application.

[0034] Icons: Controller 610; Memory 620; I / O interface 630; Arithmetic unit 640. Detailed Implementation

[0035] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0036] First, this application provides an external device memory access method that can be applied to a central processing unit (CPU) to enable the CPU to access all the memory of an external PCIe device.

[0037] In the embodiments of this application, the CPU is connected to at least one PCIe device, which may be a wireless network card, GPU, GPGPU, etc., and is not limited thereto.

[0038] In the embodiments of this application, the CPU is configured to access the PCIe device based on I / O mapping. In I / O mapping, the CPU configures a virtual address space according to its own memory size. This virtual address space can be a PCIe BAR (Base Address Register). The PCIe BAR is a set of key registers in the PCIe device configuration space, used to define and manage the mapping location and range of internal device resources (such as registers or memory buffers) in the system address space, enabling the CPU to access these resources through system addresses. For details, please refer to existing technologies, which will not be elaborated upon here.

[0039] The virtual address space can allocate virtual addresses, and the range of virtual addresses that can be allocated within the virtual address space matches the size of the CPU's memory. For example, if the CPU's memory size is 2GB, then the range of virtual addresses that can be allocated within the virtual address space is 0 to 2GB.

[0040] Correspondingly, the virtual address space is also used to record the mapping relationship between virtual addresses and the physical memory addresses of PCIe devices. After a PCIe device is connected to the CPU, the CPU will allocate the corresponding virtual address to the PCIe device according to the range of virtual addresses that can be allocated in its own virtual address space.

[0041] Please refer to the following. Figure 1 , Figure 1 This is a schematic diagram illustrating the connection between a CPU and PCIe devices according to an embodiment of this application. In this example, the CPU is connected to three PCIe devices: PCIe device 1, PCIe device 2, and PCIe device 3. If the CPU's memory size is 2GB, then the memory address range that the CPU can allocate is 0 to 2GB.

[0042] Generally, the virtual address range allocated to a PCIe device is roughly equivalent to the memory of the PCIe device. For example, if PCIe device 1 and PCIe device 2 each have 512MB of memory, then each PCIe device 1 and PCIe device 2 will be allocated an address range of 512MB. For example, the virtual address range allocated to PCIe device 1 is 0~512MB, and the virtual address range allocated to PCIe device 2 is 512MB~1GB.

[0043] Due to the limitations of the CPU's own memory size, the CPU may not be able to allocate enough memory to PCIe devices. For example, assuming PCIe device 3 is a GPU, and the GPU's memory is called video memory, PCIe device 3 has 16GB of video memory. The video memory of PCIe device 3 far exceeds the remaining address space of the CPU. Based on this, the CPU can allocate the remaining virtual addresses to PCIe device 3 at most.

[0044] In I / O mapping technology, the processor accesses the PCIe device's memory through a virtual address mapped to the PCIe device's physical memory address. Therefore, there is a mapping relationship between virtual addresses and the PCIe device's physical memory address. In the above embodiment, the CPU's remaining 1GB of virtual address space can only map to 1GB of GPU's video memory. For example, a CPU virtual address range of 1GB to 2GB can map to a GPU physical address range of 0 to 1GB. Since the GPU has 16GB of video memory, the CPU cannot access all of the GPU's video memory.

[0045] Currently, methods such as shared memory and DMA transfer can be used to enable the CPU to access the GPU's video memory; however, these methods require corresponding hardware architecture to work in tandem.

[0046] Compared to other methods, I / O mapping maps virtual addresses to the memory of PCIe devices, reducing hardware requirements. However, it is limited by the CPU's memory and cannot map large amounts of memory. Furthermore, the video memory of existing PCIe devices such as GPUs and GPGPUs is increasing, making it increasingly difficult for the CPU to access the full memory of large PCIe devices.

[0047] Based on this, the external device memory access method provided in this application can enable the CPU to access all the memory of the PCIe device on the basis of IO mapping, or enable some CPUs with poor performance to connect to PCIe devices with large memory and perform corresponding operations.

[0048] Please see Figure 2 , Figure 2 This is a flowchart illustrating an external device memory access method according to an embodiment of this application. The external device memory access method includes: S210 receives operation instructions to operate on the memory of a PCIe device.

[0049] In the embodiments of this application, the operation instruction may include the operation type to be performed and the operation address of the PCIe device's memory. Through the operation instruction, the CPU can perform corresponding memory-related operations on the PCIe device memory corresponding to the operation address, such as clearing or copying data.

[0050] In a CPU, virtual addresses are allocated based on different CPU devices. Accordingly, the CPU can determine the virtual address based on the PCIe device or the memory identifier of the PCIe device. Therefore, operation instructions can also include identification information representing the PCIe device or the memory of the PCIe device to be operated. For example, the identification information can be a handle.

[0051] Accordingly, the operation instructions may also include information about the operation to be performed, such as the size of the memory to be accessed, the data to be operated on, such as the data to be initialized, the data to be copied, and the direction of data copying.

[0052] For specific operating instructions, please refer to existing technologies, which will not be elaborated here.

[0053] S220: Based on a preset function, determine the mapping relationship between the operation address and the virtual address in the virtual address space and execute the operation instruction.

[0054] After a PCIe device is connected to the CPU, the CPU allocates a corresponding virtual address to the PCIe device's memory and records it in the virtual address space to form a mapping relationship. That is, the virtual address space is used to record the mapping relationship between virtual addresses and the physical memory addresses of the PCIe device.

[0055] Therefore, by examining the mapping relationships in the virtual address space, it can be determined whether the operation address is included in the mapping relationship, and thus whether the CPU can access the PCIe device memory corresponding to the operation address through the mapping of the virtual address.

[0056] When the mapping relationship in the virtual address space includes the mapping between virtual addresses and operand addresses, the CPU can access the memory corresponding to the operand address through the mapping between virtual addresses and operand addresses, and then execute the operation corresponding to the operand instruction. For details on this method, please refer to existing technologies; further elaboration will not be provided here.

[0057] In some cases, the CPU needs to access the memory address of a PCIe device outside the mapping relationship. For example, the CPU virtual address maps the physical memory address range of the GPU video memory from 0 to 1G, while the operation instruction indicates that the operation instruction needs to access and operate on a memory segment of the GPU video memory with a physical memory address range of 2G to 3G. In this case, the CPU will not be able to directly access the GPU through the mapping relationship.

[0058] In the embodiments of this application, a memory access method is provided when the virtual address space does not include operation addresses.

[0059] In the embodiments of this application, a preset function is configured within the CPU. This preset function is used to configure the mapping relationship between the operation address and the virtual address in the virtual address space when the virtual address space does not include the operation address.

[0060] By configuring the mapping relationship between the operation address and the virtual address in the virtual address space through preset functions, the CPU can then locate the memory segment corresponding to the operation address in the PCIe device through the mapping relationship of the virtual address space.

[0061] Therefore, when executing operation instructions, the CPU can access all the memory of the PCIe device by configuring the mapping relationship through the preset function. Thus, even if the CPU's memory is insufficient to map all the memory of the PCIe device, the CPU can still access the memory that was previously inaccessible through the reconfigured mapping relationship.

[0062] Based on this, even if there is a significant difference in memory size between the PCIe device and the CPU, the CPU can still access the memory of the PCIe device without needing to configure shared memory or other circuit structures between them. As a result, the CPU will reduce its own memory size limitation and can connect to more PCIe devices, or connect to PCIe devices with larger memory, to meet the needs of development and use.

[0063] In an optional embodiment of this application, the preset function can be configured to: determine whether the virtual address space includes an operation address; if it is determined that the virtual address space does not include an operation address, modify the initial mapping relationship based on the operation address to obtain a target mapping relationship; access the memory corresponding to the operation address based on the target mapping relationship; and execute the operation corresponding to the operation instruction on the memory corresponding to the operation address.

[0064] In the embodiments of this application, the mapping relationship between the virtual address initially allocated by the CPU to the memory of the PCIe device and the physical memory address of the PCIe device can be regarded as the initial mapping relationship, which is a preset mapping relationship between the virtual address and the physical memory address of the PCIe device.

[0065] The target mapping relationship is the mapping relationship modified by a preset function, and the target mapping relationship includes the mapping relationship between the operation address and the virtual address.

[0066] The above process is configured to perform the functions of a preset function. That is, in the embodiments of this application, the preset function can not only determine the address and modify the mapping relationship, but also execute the corresponding operation of the operation instruction.

[0067] In the CPU, a virtual address is allocated to a PCIe device after it is connected. Correspondingly, the virtual address in the virtual address space is usually unchanged and bound to the PCIe device. Therefore, in the embodiments of this application, the PCIe device to be operated on and its corresponding virtual address can be determined first through the operation instruction, and then it can be determined whether the physical memory address mapped by the virtual address corresponding to the PCIe device is the operation address.

[0068] Therefore, in some embodiments of this application, determining whether the virtual address space includes an operation address may include: determining the target virtual address based on the input parameters and / or identification information in the operation instruction; determining the initial physical memory address mapped to the target virtual address based on the initial mapping relationship; and determining that the virtual address space does not include the operation address if the physical memory address does not include the operation address.

[0069] The operation instructions will include input parameters and / or identification information, which can be used to characterize the PCIe device to be accessed.

[0070] For copy operations, the input parameters can include the direction of the copy, such as copying data from the CPU's memory to the PCIe device's memory, or copying data from the PCIe device's memory to the CPU's memory. This input parameter represents both the direction and the PCIe device to be operated on. By using the input parameters and the mapping relationship, the target virtual address corresponding to the PCIe device and its mapped initial physical memory address can be determined.

[0071] The input parameters can also include the size of the memory segment to be accessed or the data to be operated on, such as 512M or 1G. The address range of the memory segment to be operated on can also be determined by the operation address and the input parameters.

[0072] In the embodiments of this application, the identification information can be a handle, including the ID of the requested memory. This ID can be used to characterize the PCIe device to be accessed. The ID allows locating the requested memory on the PCIe device and finding its corresponding physical address and other information. Therefore, through the handle and the mapping relationship, the target virtual address corresponding to the PCIe device and its mapped initial physical memory address can be determined.

[0073] In this embodiment, the target virtual address is determined based on the input parameters and / or identification information in the operation instruction. The target virtual address can represent the virtual address corresponding to the PCIe device to be accessed, and then the initial physical memory address mapped by the target virtual address is determined.

[0074] The target virtual address is actually an address range, and the initial physical memory address is also an address judgment. Therefore, when making a judgment, it can be to determine whether the initial physical memory address includes the operation address, that is, whether the operation address is within the range of the initial physical memory address, and then determine whether the virtual address space does not include the operation address.

[0075] Furthermore, in one embodiment of this application, modifying the initial mapping relationship based on the operation address may include: modifying the initial physical memory address to the operation address so that the target virtual address maps to the operation address.

[0076] In this embodiment, both the initial physical memory address and the operational address belong to the same PCIe device. This method does not change the PCIe device mapped to the virtual address, effectively preventing the modification / change of the mapping relationship from affecting the normal operation of other PCIe devices. In the CPU, the virtual address space is implemented through the PCIe bar, which is a set of registers. Therefore, before modifying the virtual address space, it is necessary to acquire a PCIe bar configuration lock to modify the PCIe bar registers and avoid conflicts during the modification process. The principle of the PCIe bar configuration lock can be found in existing technologies and will not be elaborated here.

[0077] In some embodiments of this application, before modifying the initial mapping relationship based on the operation address to obtain the target mapping relationship, the method may further include: saving the initial mapping relationship. And after executing the operation corresponding to the operation instruction on the memory corresponding to the operation address, the method may further include: modifying the mapping relationship in the virtual address space to restore the target mapping relationship to the initial mapping relationship.

[0078] That is, in the embodiments of this application, the initial mapping relationship can be saved, modified when the operation is performed, and restored to the initial mapping relationship after the operation is completed.

[0079] In this embodiment, the mapping relationship is modified. Since the development and use of applications are usually based on the virtual address initially allocated by the CPU to PCIe, the modification of the mapping relationship may cause the CPU application to malfunction in subsequent development and use. Therefore, in this embodiment, the initial mapping relationship can be saved and restored after performing the corresponding operation, so that the CPU and PCIe device can work normally and reduce the abnormalities caused by the modification of the mapping relationship.

[0080] In one embodiment of this application, the preset function further includes preset operation functions that perform different types of operations. For example, the preset operation functions may include: the memset function for initializing or clearing memory, and the memcopy function for copying data.

[0081] Accordingly, in the embodiments of this application, the operation instruction further includes the operation type of the operation to be performed. Before performing the operation corresponding to the operation instruction on the memory corresponding to the operation address, the method further includes: determining the target operation type of the operation corresponding to the operation instruction, and determining the target preset operation function for performing the operation corresponding to the target operation type.

[0082] Furthermore, executing the operation corresponding to the operation instruction on the memory corresponding to the operation address may include: calling a target preset operation function to execute the operation corresponding to the operation instruction. The CPU operates on the memory of the PCIe device through corresponding operation functions. In the embodiments of this application, preset functions can be configured to execute operation functions for corresponding operations on memory, thereby simplifying the memory access process and improving the efficiency of accessing and operating PCIe memory.

[0083] In one embodiment of this application, the operation type includes a zeroing operation; the preset operation function includes a first function, and the target preset operation function corresponding to the zeroing operation is the first function. Calling the target preset operation function to execute the operation corresponding to the operation instruction may include: calling the first function to zero the memory corresponding to the operation address.

[0084] In this embodiment, if the target operation type is determined to be a zeroing operation, the target preset operation function can be determined to be a first function. The first function can be the memset function, used to initialize and zero out memory.

[0085] In this embodiment, a first function corresponding to the zeroing operation is configured in a preset function, thereby simplifying the operations required to zero the memory of the PCIe device and improving the efficiency of the zeroing operation.

[0086] For ease of understanding, the execution process of the preset functions, including the first function, is explained here. Please refer to [link / reference]. Figure 3 , Figure 3 This is a schematic diagram of the execution flow of a preset function including a first function, provided in an embodiment of this application.

[0087] Upon receiving an operation instruction, the operation type corresponding to the instruction can be determined first. If it is determined that a clearing operation is required, a preset function including the first function can be called.

[0088] When this preset function is executed, it first acquires the PCIe bar device lock to enable subsequent operations on the registers that record the mapping relationship in the virtual address space. Then, it obtains the operation address from the operation instruction, and determines the target virtual address and the corresponding initial physical memory address based on the input parameters and / or identification information in the operation instruction. Finally, it determines whether the initial physical memory address includes the operation address.

[0089] In cases where this is included, the memory corresponding to the operation address can be accessed directly based on the current mapping relationship (initial mapping relationship), and the first function can be called to perform the corresponding operation.

[0090] If the virtual address is not included, the mapping relationship needs to be modified based on the operation address to obtain the target mapping relationship, so that the mapping relationship includes the mapping relationship between the operation address and the virtual address. Then, the memory corresponding to the operation address can be accessed based on the mapping relationship, and the first function can be called to perform the corresponding operation.

[0091] Finally, the mapping relationship can be restored, whereby the mapping relationship remains unchanged if no modifications are made during the execution of the instructions.

[0092] In some embodiments of this application, the operation type may also include a copy operation. The preset operation function includes a second function, and the target preset operation function corresponding to the copy operation is the second function. In this embodiment, the second function may be the memcopy function.

[0093] Accordingly, calling the target preset operation function to execute the operation corresponding to the operation instruction may include: determining the copy direction corresponding to the operation instruction; if the determined copy direction indicates copying data from the memory corresponding to the operation address, calling the second function to copy data from the memory corresponding to the operation address to the CPU; or, if the determined copy direction indicates copying data from the CPU to the memory corresponding to the operation address, calling the second function to copy data from the CPU into the memory corresponding to the operation address.

[0094] The operation instructions will include the size of the data to be copied and the direction of the data to be copied. The direction of the data to be copied can be directly determined based on the operation instructions.

[0095] In the embodiments of this application, a second function for performing the copy operation can also be encapsulated in the preset function, thereby simplifying the operation of copying PCIe devices and improving copying efficiency.

[0096] For ease of understanding, the execution process of the preset function, including the second function, is explained here. Please refer to [link / reference]. Figure 4 , Figure 4 This is a schematic diagram of the execution flow of a preset function including a second function, provided in an embodiment of this application.

[0097] Upon receiving an operation instruction, the operation type can be determined first. If a zeroing operation is required, a pre-defined function, including a second function, is invoked. Similarly, during the execution of this pre-defined function, the PCIe bar device lock is acquired first, enabling subsequent operations on the registers recording the mapping relationships in the virtual address space. Then, the operation address in the operation instruction can be obtained, and the target virtual address and corresponding initial physical memory address are determined based on the input parameters and / or identification information in the operation instruction. Finally, it is determined whether the initial physical memory address includes the operation address.

[0098] In cases where this is included, the memory corresponding to the operation address can be accessed directly based on the current mapping relationship (initial mapping relationship), and the second function can be called to perform the corresponding operation.

[0099] If the virtual address is not included, the mapping relationship needs to be modified based on the operation address to obtain the target mapping relationship, so that the mapping relationship includes the mapping relationship between the operation address and the virtual address. Then, the memory corresponding to the operation address can be accessed based on the mapping relationship, and the second function can be called to perform the corresponding operation.

[0100] The second function is used to copy data. Therefore, it is necessary to determine the copy direction based on the operation instruction, so as to access the memory corresponding to the operation address based on the mapping relationship and call the second function to copy data from the memory of the PCIe device to the memory of the CPU, or to access the memory corresponding to the operation address based on the mapping relationship and call the second function to copy data from the memory of the CPU to the memory of the PCIe device.

[0101] Finally, as in the aforementioned embodiments, the mapping relationship can be restored, wherein if no modifications are made during the execution of instructions, the mapping relationship remains unchanged.

[0102] In the above embodiments of this application, the operation functions can be configured in different preset functions. Accordingly, after receiving an operation instruction to operate on the memory of the PCIe device, the target operation type of the operation corresponding to the operation instruction can be determined first; then the preset function corresponding to the target operation type can be determined, and the corresponding preset function can be called to perform the mapping relationship modification and the corresponding operation.

[0103] In some other embodiments of this application, the preset function may also include different preset operation functions at the same time, and the preset operation function to be called is selected during the execution of the preset function. The specific implementation method is not limited here.

[0104] The above embodiments can be viewed as incorporating the functionality of preset operation functions into the function with mapping modification capability provided in this application. In other embodiments of this application, the operation functions, such as the memset function or memcopy function, can be further configured to incorporate new functionality, enabling the configured function to modify the mapping relationship, thus obtaining the preset function provided in the embodiments of this application. The specific method of obtaining the preset function is not limited here.

[0105] In the embodiments of this application, the preset function is a pre-encapsulated function, and the relationship between the preset function and the operation function can be determined according to the actual function encapsulation and requirements.

[0106] In this embodiment, the encapsulation method can use Ioctl encapsulation. By encapsulating the preset function, it is convenient to directly call it during subsequent development and use, without having to redesign based on the same function again, thereby improving development efficiency.

[0107] Please see Figure 5 , Figure 5 This is a schematic diagram illustrating the encapsulation provided in one embodiment of this application. When encapsulating a preset function, it is necessary to encapsulate the function in both user mode and kernel mode. After encapsulation in user mode, the application can call the function through the corresponding interface. After encapsulation in kernel mode, the preset function is encapsulated in the CPU's internal driver for modular management. Specific encapsulation methods can be found in existing technologies and will not be elaborated upon here.

[0108] In the embodiments of this application, the first function and the second function can be encapsulated in different preset functions or in the same preset function, and there is no limitation on this.

[0109] In other embodiments of this application, the preset function may or may not have the functionality of a preset operation function, but may only modify the mapping relationship. Accordingly, in this embodiment, determining the mapping relationship between the operation address and the virtual address in the virtual address space based on the preset function and executing the operation instruction may include: determining whether the virtual address space includes the operation address; if it is determined that the virtual address space does not include the operation address, calling the preset function and the operation address to modify the initial mapping relationship to obtain the target mapping relationship; accessing the memory corresponding to the operation address based on the target mapping relationship; and performing the operation corresponding to the operation instruction on the memory corresponding to the operation address.

[0110] In this embodiment, the preset function may only modify the mapping relationship without performing the judgment and operation instruction-related functions.

[0111] In addition, the operation corresponding to the operation instruction is executed on the memory corresponding to the operation address, including: determining the target operation type of the operation corresponding to the operation instruction; determining the target preset operation function to execute the operation corresponding to the target operation type; and calling the target preset operation function to execute the operation corresponding to the operation instruction on the memory corresponding to the operation address.

[0112] That is, in this embodiment, since the preset function only modifies the mapping relationship and does not include the operation function related to the execution operation, it is necessary to call the target preset operation function again to execute the operation instruction corresponding to the memory corresponding to the operation address to complete the operation instruction. The execution of other processes is similar to the aforementioned embodiment and will not be repeated here. In this embodiment, the preset function can configure the virtual address space. When the virtual address does not include the operation address involved in the operation instruction, the preset function can configure the mapping relationship between the operation address and the virtual address in the virtual address space. This allows the CPU to access all the memory of the PCIe device through the configured mapping relationship between the virtual address and the operation address, so as to operate on each memory segment of the PCIe device. This method can meet the needs of the CPU to connect and access large memory PCIe devices when the CPU memory performance is insufficient, or meet the needs of connecting more PCIe devices.

[0113] Based on the same inventive concept, this application also provides a central processing unit (CPU). Please refer to [link to relevant documentation]. Figure 6 , Figure 6 This is a schematic diagram of a central processing unit (CPU) according to an embodiment of this application. The CPU includes a controller 610, a memory 620, and an I / O interface 630. The controller 610 is connected to both the memory 620 and the I / O interface 630. The I / O interface 630 is used to connect to PCIe devices. There can be multiple I / O interfaces 630, meaning that at least one I / O interface 630 can be connected to at least one PCIe device.

[0114] In the embodiments of this application, the controller 610 can be used to execute the external device memory access method provided in any of the foregoing embodiments, and the details can be found in the foregoing content, which will not be repeated here.

[0115] In the embodiments of this application, the central processing unit may also include other structures, such as an arithmetic unit 640, registers, etc., and specific details can be found in the prior art.

[0116] Based on the same inventive concept, embodiments of this application also provide a memory access system, which includes a central processing unit (CPU) and at least one PCIe device.

[0117] The central processing unit (CPU) can refer to the CPU provided in the foregoing embodiments, or a CPU that can execute the external device memory access method provided in the foregoing embodiments. Each PCIe device is connected to the CPU.

[0118] In this embodiment, the PCIe device can be a GPU, GPGPU, wireless network card, or other similar device.

[0119] Based on the same inventive concept, this application also provides an electronic device, which may include the CPU or memory access system provided in the foregoing embodiments.

[0120] In the embodiments of this application, the electronic device may be a mobile phone, computer, server, industrial control computer, etc., and there is no limitation herein.

[0121] It is understood that the electronic device 300 may also include more general modules required by itself, which will not be described one by one in the embodiments of this application.

[0122] In the embodiments provided in this application, it should be understood that the disclosed methods and apparatus can also be implemented in other ways. The apparatus embodiments described above are merely illustrative. The functional modules in the various embodiments of this application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0123] If the aforementioned functions are implemented as software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, external hard drives, ROM, RAM, magnetic disks, or optical disks.

[0124] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

[0125] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

Claims

1. A method for accessing the memory of an external device, characterized in that, Applied to a central processing unit (CPU), wherein the CPU is connected to at least one PCIe device; The CPU includes a virtual address space, which is used to record the mapping relationship between virtual addresses and the physical memory addresses of the PCIe device; the total address range of the virtual addresses matches the memory size of the CPU. The processor accesses the memory of the PCIe device through the physical memory address of the PCIe device mapped by the virtual address; The external device memory access method includes: Receive an operation instruction to operate on the memory of the PCIe device; the operation instruction includes the memory address of the PCIe device to be operated on. The mapping relationship between the operation address and the virtual address is determined in the virtual address space based on a preset function, and the operation instruction is executed. The preset function is used to configure the mapping relationship between the operation address and the virtual address in the virtual address space when the operation address is not included in the virtual address space.

2. The external device memory access method according to claim 1, characterized in that, The virtual address space includes an initial mapping relationship, which is a preset mapping relationship between virtual addresses and the physical memory addresses of the PCIe device; The preset function is configured as follows: Determine whether the virtual address space includes the operation address; If it is determined that the virtual address space does not include the operation address, the initial mapping relationship is modified based on the operation address to obtain the target mapping relationship; wherein, the target mapping relationship includes the mapping relationship between the operation address and the virtual address; Access the memory corresponding to the operation address based on the target mapping relationship; The operation corresponding to the operation instruction is executed on the memory corresponding to the operation address.

3. The external device memory access method according to claim 2, characterized in that, The operation instructions include input parameters and / or identification information, which are used to characterize the PCIe device to be accessed; The step of determining whether the virtual address space includes the operation address includes: The target virtual address is determined based on the input parameters and / or identification information in the operation instructions; The initial physical memory address of the target virtual address mapping is determined based on the initial mapping relationship; If the initial physical memory address does not include the operation address, then it is determined that the virtual address space does not include the operation address.

4. The external device memory access method according to claim 3, characterized in that, Modifying the initial mapping relationship based on the operation address includes: The initial physical memory address is modified to the operation address so that the target virtual address maps to the operation address.

5. The external device memory access method according to claim 2, characterized in that, Before modifying the initial mapping relationship based on the operation address to obtain the target mapping relationship, the method further includes: Save the initial mapping relationship; After executing the operation corresponding to the operation instruction on the memory corresponding to the operation address, the method further includes: Modify the mapping relationship in the virtual address space to restore the target mapping relationship to the initial mapping relationship.

6. The external device memory access method according to claim 2, characterized in that, The operation instruction also includes the operation type of the operation to be performed; the preset function also includes preset operation functions for performing different operation types; Before executing the operation corresponding to the operation instruction on the memory corresponding to the operation address, the method further includes: Determine the target operation type corresponding to the operation instruction; Determine the target preset operation function that corresponds to the operation of the target operation type; The step of performing the operation corresponding to the operation instruction on the memory corresponding to the operation address includes: The target preset operation function is invoked to execute the operation corresponding to the operation instruction.

7. The method according to claim 6, characterized in that, The operation type includes a zeroing operation; the preset operation function includes a first function, and the target preset operation function corresponding to the zeroing operation is the first function; The step of calling the target preset operation function to execute the operation corresponding to the operation instruction includes: The first function is called to clear the memory corresponding to the operation address.

8. The external device memory access method according to claim 6, characterized in that, The operation type includes a copy operation; the preset operation function includes a second function, and the target preset operation function corresponding to the copy operation is the second function; The step of calling the target preset operation function to execute the operation corresponding to the operation instruction includes: Determine the copy direction corresponding to the operation instruction; If the copy direction indicates that data is copied from the memory corresponding to the operation address, the second function is called to copy data from the memory corresponding to the operation address to the CPU. Alternatively, if the copy direction indicates that data is being copied from the CPU to the memory corresponding to the operation address, the second function is called to copy data from the CPU into the memory corresponding to the operation address.

9. The external device memory access method according to any one of claims 2-8, characterized in that, The preset function is a pre-packaged function.

10. The external device memory access method according to claim 1, characterized in that, The virtual address space includes an initial mapping relationship, which is a preset mapping relationship between virtual addresses and the physical memory addresses of the PCIe device; The step of determining the mapping relationship between the operation address and the virtual address in the virtual address space based on a preset function and executing the operation instruction includes: Determine whether the virtual address space includes the operation address; If it is determined that the virtual address space does not include the operation address, the preset function and the operation address are called to modify the initial mapping relationship to obtain the target mapping relationship; wherein, the target mapping relationship includes the mapping relationship between the operation address and the virtual address; Access the memory corresponding to the operation address based on the target mapping relationship; The operation corresponding to the operation instruction is executed on the memory corresponding to the operation address.

11. The external device memory access method according to claim 10, characterized in that, The step of performing the operation corresponding to the operation instruction on the memory corresponding to the operation address includes: Determine the target operation type corresponding to the operation instruction; Determine the target preset operation function that corresponds to the operation of the target operation type; The target preset operation function is invoked to execute the operation corresponding to the operation instruction on the memory corresponding to the operation address.

12. A central processing unit, characterized in that, include: Controller, memory, and at least one I / O interface; The controller is connected to the memory and the I / O interface respectively; The IO interface is used to connect PCIe devices; The controller is used to execute the external device memory access method as described in any one of claims 1-11.

13. A memory access system, characterized in that, include: The central processing unit (CPU) and at least one PCIe device as described in claim 12; The PCIe device is connected to the CPU.

14. An electronic device, characterized in that, This includes the central processing unit as described in claim 12 or the memory access system as described in claim 13.

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