Magnetic disk device

Abstract

The embodiment of the invention relates to a magnetic disk device. A magnetic disk device is provided with a plurality of recording layers (L), a plurality of write heads (WHD), a plurality of read heads (RHD), a selection circuit (3Sb) capable of selecting two or more of the plurality of read heads (RHD), a read object selection unit (64), a read processing unit (63), and a detection unit (65). When the read object selection unit (64) selects the first recording layer and the second recording layer, the read processing unit (63) controls the driving of the selection circuit (3Sb) so that the selection circuit selects the first read head and the second read head and reads the data of the first recording layer and the data of the second recording layer at the same time, and the detection unit (65) detects the state of the first recording layer and the state of the second recording layer.

Description

[0001] This application enjoys priority over Japanese Patent Application No. 2024-140889 (filed on August 22, 2024). This application is incorporated herein by reference to the entire contents of that earlier application. Technical Field

[0002] Embodiments of the present invention relate to disk drives. Background Technology

[0003] As disk devices, known disk devices include conventional magnetic recording (CMR) type (or conventional recording type) disk devices that write multiple tracks at intervals in the radial direction of the disk, shingled magnetic recording (SMR) type disk devices that write multiple tracks overlapping in the radial direction of the disk, and hybrid recording type disk devices that select between conventional recording type and shingled recording type for execution. Summary of the Invention

[0004] One embodiment of the disk drive includes:

[0005] Multiple recording layers are set on the same disk or different disks, and have a first recording layer and a second recording layer;

[0006] Multiple write heads, including a first write head for writing data to the first recording layer and a second write head for writing data to the second recording layer;

[0007] Multiple read heads, including a first read head for reading data from the first recording layer and a second read head for reading data from the second recording layer;

[0008] The selection circuit, connected to the plurality of read heads, is capable of selecting two or more read heads from the plurality of read heads;

[0009] Read the object selection section;

[0010] The read processing unit is capable of performing read processing to read data from each of the recording layers; and

[0011] Testing Department

[0012] When the first recording layer and the second recording layer are selected in the read object selection section,

[0013] The read processing unit controls the drive of the selection circuit, causing the selection circuit to select the first read head and the second read head, and simultaneously read data from the first recording layer and the second recording layer via the selection circuit.

[0014] The detection unit detects the state of the first recording layer and the state of the second recording layer based on the signals read by the first reading head and the signals read by the second reading head.

[0015] According to this embodiment, a disk device capable of efficiently detecting defects on the disk can be provided. Attached Figure Description

[0016] Figure 1 This is a block diagram illustrating the configuration of the disk device involved in the comparative example.

[0017] Figure 2 It is a perspective view showing a portion of the aforementioned disk drive, and also a view showing multiple disks and multiple heads.

[0018] Figure 3 This is a schematic diagram illustrating an example of the configuration of multiple servo areas and multiple data areas of a disk involved in the above comparative example.

[0019] Figure 4 It indicates that the process is being carried out. Figure 3 The diagram shows the three tracks and the write head of the user data area of ​​the disk's recording processing.

[0020] Figure 5 It indicates that the process is being carried out. Figure 3 The diagram shows the three tracks and write head of the media cache, which is typically used for recording on a disk.

[0021] Figure 6 This is a schematic diagram illustrating an example of data writing to a disk.

[0022] Figure 7 It means Figure 6 The diagram shows two bands and one guard band in the user data area.

[0023] Figure 8 It means Figure 6 The diagram shows three sectors in one track of the tape.

[0024] Figure 9 It means Figure 7 The diagram shows two bands and one guard band, and is used to illustrate multiple object sectors and multiple unused sectors.

[0025] Figure 10 This is a top view showing a portion of a recording layer and a head involved in the above comparative example.

[0026] Figure 11 This is a circuit diagram showing the selection circuit of the head amplifier IC involved in the above comparative example.

[0027] Figure 12 This is a block diagram showing the configuration of a portion of the disk device involved in the above comparative example, and a diagram showing the configuration of the read channel, etc.

[0028] Figure 13 This is a block diagram illustrating the configuration of a disk device according to one embodiment.

[0029] Figure 14 This is a top view showing the multiple arms and multiple heads involved in the above embodiments.

[0030] Figure 15 This is a top view showing a portion of the two recording layers and two heads involved in the above embodiment, and is a diagram used to illustrate the positional relationship of the two recording layers and two heads in the radial direction.

[0031] Figure 16 This is a circuit diagram showing the selection circuit of the head amplifier IC involved in the above embodiment.

[0032] Figure 17 This is a block diagram illustrating the configuration of a portion of the disk drive according to the above embodiments, and it is also a diagram illustrating the relationship with... Figure 12 The diagram shows the different read channels and their configurations.

[0033] Figure 18A This is a top view showing a portion of a recording layer and a head according to the above embodiment, and a diagram showing the state of performing a write process that uses a write head to write data to a data track of the above-described recording layer.

[0034] Figure 18B This is a top view showing a portion of another recording layer and the other end of the embodiment described above, and is a representation of... Figure 18A A diagram showing the positional relationship between the other recording layer and the other end during the aforementioned write process.

[0035] Figure 19A This is a top view showing a portion of the other recording layer and the other head involved in the above embodiment, and a diagram showing the state of performing a write process to write data to another data track of the other recording layer using another write head.

[0036] Figure 19B This is a top view showing a portion of the aforementioned recording layer and the aforementioned head according to the above embodiment, and it is also a view showing... Figure 19AA diagram showing the positional relationship between the aforementioned record layer and the aforementioned header during the aforementioned write process.

[0037] Figure 20A This is a top view showing a portion of the recording layer and the head according to the above embodiment, and a diagram showing the state in which a reading process is being performed to read data from the data track of the recording layer using a reading head.

[0038] Figure 20B This is a top view showing a portion of the other recording layer and the other end involved in the above embodiment, and is shown in... Figure 20A The above-mentioned read process is being performed during the state of reading data from the other data track of the other recording layer using another read head.

[0039] Figure 21 This diagram illustrates the state in the above embodiment where a read process is being executed that simultaneously reads data from one data track of one recording layer and data from another data track of another recording layer. It also shows the read gate and is used to explain the read process when the timing of the other read head reaching the predetermined read position is later than the timing of the first read head reaching the predetermined read position.

[0040] Figure 22 This diagram illustrates the state in which a read process is being executed in the above embodiment, simultaneously reading data from one data track of one recording layer and data from another data track of another recording layer. It also shows the read gating and is used to explain the read process when the timing of the other read head reaching the predetermined read position coincides with the timing of the first read head reaching the predetermined read position.

[0041] Figure 23 This diagram illustrates the state in which a read process is being executed in the above embodiment, simultaneously reading data from one data track of one recording layer and data from another data track of another recording layer. It also shows the read gating and is used to explain the read process when the timing of the other read head reaching the predetermined read position is earlier than the timing of the first read head reaching the predetermined read position.

[0042] Figure 24 This is a top view showing a portion of the aforementioned recording layer according to the above embodiment, and a diagram showing the state of defects detected on the aforementioned recording layer spanning six adjacent sectors.

[0043] Figure 25This is a top view showing a portion of the aforementioned recording layer according to the above embodiment, and is followed by... Figure 24 The diagram shows the state after changing the track width and sector length of the aforementioned recording layer, and also shows the state of the aforementioned defect spanning two adjacent sectors.

[0044] Label Explanation

[0045] 1…Disk drive, 60…MPU, 61…Read / write processing unit, 62…Write processing unit, 63…Read processing unit, 64…Read target selection unit, 65…Detection unit, 66…Management unit, 70…Volatile memory, 80…Buffer memory, 90…Non-volatile memory, 100…Host, 110…System controller, 120…Driver IC, 130…Head amplifier IC, 3Sb…Selection circuit, 3R…Read amplifier, 3W…Write driver, 140…R / W channel, 14S…Selection circuit, 14D…Gantling detection unit, 14R1…Read channel, 4PC…Processing circuit, 14R2…Read channel, 4PC1…First processing circuit, 4PC2…Second processing circuit Processing circuit, 150…HDC, 151…Gantler generation unit, 24…VCM, 30…arm, DK…disk, L…recording layer, DTR…data area, SV…servo area, STR…track, SC…sector, NSC…unused sector, HD…head, WHD…write head, RHD…read head, DE…defect, Ls…sector length, Wt…track width, RG…read strobe, Cm…first offset, Cn…second offset, C(m,n)…third offset, ΔCR…offset correction, T1, T2, T3, T4, T5…timing, d1…radial direction, d2…travel direction, d3…rotation direction, d5, d6…overlapping write direction, da…first direction. Detailed Implementation

[0046] Hereinafter, with reference to the accompanying drawings, a comparative example and a disk device 1 according to an embodiment will be described in detail.

[0047] (Comparative Example)

[0048] First, the configuration of the disk device 1 involved in the comparative example will be explained. Figure 1 This is a block diagram illustrating the configuration of the disk device 1 involved in the comparative example. In this comparative example, the disk device 1 is a hybrid recording type disk device that selects between a normal recording type and a watt-hour recording type. However, the following techniques can be applied to both watt-hour recording type disk devices and normal recording type disk devices.

[0049] like Figure 1As shown, the disk drive 1 includes: multiple disks (DK) such as 1 to 10 disks as recording media, a spindle motor (SPM) 20 as a drive motor, a head stack assembly 22, a driver IC 120, a head amplifier integrated circuit (hereinafter referred to as head amplifier IC) 130, volatile memory 70, buffer memory (buffer) 80, non-volatile memory 90, and a system controller 110 as a single-chip integrated circuit. Furthermore, the disk drive 1 is connected to a host system (hereinafter simply referred to as host) 100.

[0050] Each disk drive (DK) is formed, for example, with a diameter of 97 mm (3.8 inches) and recording layers (magnetic recording layers) on both sides. Furthermore, in this comparative example, the disk drive 1 has 1 to 11 disk drives, but the number of disk drives is not limited to this.

[0051] The head stack assembly 22 can control the head HD mounted on the arm 30 to move to the target position on the disk DK by driving the voice coil motor (hereinafter referred to as VCM) 24, that is, it can perform seek. The VCM 24 functions as an actuator.

[0052] The disk DK allocates a user data area U, which can be used by the user, and a system area S, which is used to write information required by the system management, in the area where data can be written.

[0053] The HD head records and reproduces information on the disk DK. The HD head uses a slider as its main body and includes a write head (WHD) and a read head (RHD) mounted on the slider. The write head (WHD) writes data to the recording layer of the disk DK. The read head (RHD) reads data from the data tracks of the recording layer of the disk DK.

[0054] Sometimes the "center of the head HD" is called "head HD", the "center of the write head WHD" is called "write head WHD", and the "center of the read head RHD" is called "read head RHD". Sometimes the "center of the write head WHD" is simply called "head HD" and the "center of the read head RHD" is simply called "head HD".

[0055] The driver IC120 controls the driving of the SPM20 and VCM24 under the control of the system controller 110 (specifically, the MPU60 described later). The SPM20 supports multiple disks DK and rotates them.

[0056] The head amplifier IC 130 includes a selection circuit 3Sa, read amplifiers 3R1 and 3R2, and a write driver 3W. Read amplifiers 3R1 and 3R2 are each preamplifiers that amplify the read signal read from disk DK and output it to system controller 110 (specifically, read / write (R / W) channel 140, described later). The write driver 3W outputs a write current corresponding to the signal output from R / W channel 140 to the head HD.

[0057] Volatile memory 70 is a semiconductor memory whose stored data will be lost if the power supply is cut off. Volatile memory 70 stores data required for processing by various parts of disk drive 1. Volatile memory 70 is random access memory (RAM). Volatile memory 70 is, for example, DRAM (Dynamic Random Access Memory). However, volatile memory 70 can also be SDRAM (Synchronous Dynamic Random Access Memory).

[0058] The buffer memory 80 is a semiconductor memory that temporarily records data transmitted and received between the disk drive 1 and the host computer 100. Furthermore, the buffer memory 80 may be integrated with the volatile memory 70. The buffer memory 80 is a volatile RAM. For example, the buffer memory 80 may be DRAM, SRAM (Static Random Access Memory), SDRAM, FeRAM (Ferroelectric Random Access Memory), MRAM (Magnetoresistive Random Access Memory), etc.

[0059] The buffer memory 80 includes areas used as read cache and write cache, and temporarily stores commands received from the host 100, etc.

[0060] Non-volatile memory 90 is a semiconductor memory that retains stored data even when the power supply is cut off. Non-volatile memory 90 is, for example, a NAND flash read-only memory (FROM). However, non-volatile memory 90 can also be a NOR FROM.

[0061] The system controller (controller) 110 is implemented, for example, using a large-scale integrated circuit (LSI) called a System-on-a-Chip (SoC), in which multiple components are integrated into a single chip. The system controller 110 includes a read / write (R / W) channel 140, a hard disk controller (HDC) 150, and a microprocessor (MPU) 60. The system controller 110 is electrically connected to a driver IC 120, a head amplifier IC 130, volatile memory 70, buffer memory 80, non-volatile memory 90, and a host 100.

[0062] R / W channel 140 performs signal processing on read data transmitted from disk DK to host 100 and write data transmitted from host 100, according to instructions from MPU 60 (described later). R / W channel 140 has circuitry or functions for modulating the write data. Additionally, R / W channel 140 has circuitry or functions for measuring the signal quality of the read data. R / W channel 140 is electrically connected, for example, to head amplifier IC 130, HDC 150, MPU 60, etc.

[0063] HDC150 controls the data transfer between host 100 and R / W channel 140 according to instructions from MPU60 (described later). HDC150 is electrically connected to, for example, R / W channel 140, MPU60, volatile memory 70, buffer memory 80, and non-volatile memory 90.

[0064] The HDC150 includes a gating generation unit 151. The gating generation unit 151 generates various gating signals, such as write gating, read gating, and servo gating, based on commands from the host 100 and instructions from the MPU60, and outputs them to the R / W channel 140, such as the gating detection unit 14D. Hereinafter, "raising (starting, establishing) a predetermined gating signal" is sometimes referred to as "asserting the predetermined gating signal." Additionally, "lowering a predetermined gating signal" is sometimes referred to as "negating the predetermined gating signal." "Enabling the predetermined gating signal" and / or "negating the predetermined gating signal" sometimes also include the meaning of "generating a predetermined gating signal." Furthermore, the gating generation unit 151 may also be included in the R / W channel 140 or the MPU60.

[0065] The R / W channel 140 has a gating detection unit 14D. The gating detection unit 14D detects whether various strobes, such as write strobe, read strobe, and servo strobe, are in a valid or invalid state.

[0066] For example, the gating detection unit 14D performs write processing if it detects that the write gating is valid, and stops (pauses) the write processing if it detects that the write gating is invalid.

[0067] In addition, the gating detection unit 14D performs read processing if it detects that the read gating is valid, and stops read processing if it detects that the read gating is invalid. The gating detection unit 14D performs servo read processing if it detects that the servo gating is valid, and stops servo read processing if it detects that the servo gating is invalid. Furthermore, the gating detection unit 14D can also be located within the HDC150 or MPU60.

[0068] MPU60 is a control unit that controls various parts of disk drive 1 and is the main controller. MPU60 controls VCM24 via driver IC120 to perform servo control for head HD positioning. MPU60 controls the write operation of data to disk DK and selects the destination for the write data transmitted from host 100. Additionally, MPU60 controls the read operation of data from disk DK and controls the processing of read data transmitted from disk DK to host 100. MPU60 is connected to various parts of disk drive 1. MPU60 is electrically connected to, for example, driver IC120, R / W channel 140, and HDC150.

[0069] The MPU 60 includes a read / write processing unit 61, a read target selection unit 64, a detection unit 65, and a management unit 66. The MPU 60 executes the processing of these units, such as the read / write processing unit 61, the read target selection unit 64, the detection unit 65, and the management unit 66, on the firmware. Alternatively, the MPU 60 may also include these units as circuitry.

[0070] The read / write processing unit 61 includes a write processing unit 62 and a read processing unit 63. According to commands from the host 100, the write processing unit 62 controls the data write process, and the read processing unit 63 controls the data read process, causing the read head RHD to read data from the disk DK. The write processing unit 62 is capable of performing write processes to write data to each recording layer of the disk DK. The read / write processing unit 61 controls the VCM 24 via the driver IC 120 to position the head HD at a target position (a predetermined radius position) on the disk DK and perform read or write processes.

[0071] Figure 2 It is a perspective view showing a portion of disk device 1, and a view showing multiple disks (DK) and multiple headers (HD).

[0072] like Figure 2 As shown, in the circumferential direction, the direction of rotation of disk DK is set as rotation direction d3. Furthermore, in... Figure 2In the example shown, the rotation direction d3 is shown counterclockwise, but it can also be the opposite direction (clockwise). Additionally, the travel direction d2 of the head HD relative to the disk DK is opposite to the rotation direction d3. The travel direction d2 is the direction in which the head HD sequentially writes and reads data from the disk DK in the circumferential direction; that is, the direction in which the head HD travels relative to the disk DK in the circumferential direction.

[0073] The disk drive 1 comprises f disks (DK1 to DKf) and g heads (HD1 to HDg). In this comparative example, the number of heads HD is twice the number of disks DK (g = 2 × f).

[0074] Disks DK1 to DKf are arranged coaxially and overlapped with a gap between them. Disks DK1 to DKf have the same diameter. Here, terms such as "same," "identical," "consistent," and "equivalent" naturally include the meaning of being completely identical, as well as the meaning of being different to a degree that can be considered substantially identical. In addition, the diameters of disks DK1 to DKf may also be different from each other.

[0075] Each disk DK has recording layers L on both sides. Multiple recording layers L are disposed on the same disk or different disks DK. For example, disk DK1 has a first recording layer La1 and a second recording layer Lb1 opposite to the first recording layer La1. Disk DK2 has a first recording layer La2 and a second recording layer Lb2 opposite to the first recording layer La2. Disk DKi has a first recording layer Lai and a second recording layer Lbi opposite to the first recording layer Lai. Each first recording layer La is sometimes referred to as the surface or recording face. Each second recording layer Lb is sometimes referred to as the back side or recording face.

[0076] However, each of the first recording layers La is sometimes referred to as the back side. In this case, each of the second recording layers Lb is sometimes referred to as the surface.

[0077] Each record layer L has a user data area U and a system area S. Record layer La1 has a user data area Ua1 and a system area Sa1. Record layer Lb1 has a user data area Ub1 and a system area Sb1. Record layer La2 has a user data area Ua2 and a system area Sa2. Record layer Lb2 has a user data area Ub2 and a system area Sb2. Record layer Laf has a user data area Uaf and a system area Saf. Record layer Lbf has a user data area Ubf and a system area Sbf.

[0078] The track enclosed by the double dashed lines in the user data area Ua1 (first recording layer La1) is designated as track Ta1. The track located on the opposite side of track Ta1 in the user data area Ub1 (second recording layer Lb1) is designated as track Tb1.

[0079] The track in user data region Ua2 (first recording layer La2) enclosed by the double dashed lines in the figure is designated as track Tc1. The track in user data region Ub2 (second recording layer Lb2) located on the opposite side of track Tc1 is designated as track Td1.

[0080] Designate the track enclosed by the double dashed lines in the user data area Uaf (first recording layer Laf) as track Te1. Designate the track on the opposite side of track Te1 in the user data area Ubf (second recording layer Lbf) as track Tf1.

[0081] In this comparative example, tracks Ta1, Tb1, Tc1, Td1, Te1, and Tf1 are located on the same cylindrical surface. However, tracks Ta1, Tb1, Tc1, Td1, Te1, and Tf1 may not be located on the same cylindrical surface. In this case, tracks Ta1, Tb1, Tc1, Td1, Te1, and Tf1 may also be located at positions offset in the radial direction d1.

[0082] The head HD is relative to the disk DK. In this comparative example, one head HD is relative to each recording layer L of the disk DK. For example, head HD1 is relative to the first recording layer La1 of disk DK1, and data is written to and read from the first recording layer La1. Head HD2 is relative to the second recording layer Lb1 of disk DK1, and data is written to and read from the second recording layer Lb1.

[0083] Header HD3 is aligned with the first recording layer La2 of disk DK2, writing data to and reading data from the first recording layer La2. Header HD4 is aligned with the second recording layer Lb2 of disk DK2, writing data to and reading data from the second recording layer Lb2. Header HDg-1 is aligned with the first recording layer Laf of disk DKf, writing data to and reading data from the first recording layer Laf. Header HDg is aligned with the second recording layer Lbf of disk DKf, writing data to and reading data from the second recording layer Lbf.

[0084] Figure 3 This is a schematic diagram illustrating an example of the configuration of multiple Servo Zones (SVs) and multiple Data Zones (DTRs) for a single disk DK involved in this comparative example. For example... Figure 3 As shown, in the radial direction d1 of disk DK, the direction towards the outer periphery of disk DK is called the outer direction (outer side), and the direction opposite to the outer direction is called the inner direction (inner side).

[0085] exist Figure 3In the data, the user data region U is divided into an inner peripheral region IR located in the inward direction, an outer peripheral region OR located in the outward direction, and a middle peripheral region MR located between the inner peripheral region IR and the outer peripheral region OR.

[0086] The disk DK has multiple servo areas (SVs) and multiple data areas (DTRs). The multiple servo areas (SVs) can be arranged radially in the radial direction d1 of the disk DK and discretely spaced at predetermined intervals in the circumferential direction. Alternatively, the multiple servo areas (SVs) can extend linearly from the inner circumference to the outer circumference and be discretely spaced at predetermined intervals in the circumferential direction. Or, the multiple servo areas (SVs) can extend spirally from the inner circumference to the outer circumference and be discretely spaced at predetermined intervals in the circumferential direction. Furthermore, the multiple servo areas (SVs) can be arranged in an island-like pattern in the radial direction d1 and discretely spaced at predetermined intervals in the circumferential direction.

[0087] Hereinafter, a single servo region SV on a predetermined track is sometimes referred to as a "servo sector". Additionally, a "servo region SV" is sometimes referred to as a "servo sector SV". A servo sector contains servo data. Hereinafter, the "configuration of several servo data items constituting a servo sector" is sometimes referred to as a "servo pattern". Furthermore, the "servo data written to a servo sector" is sometimes referred to as a "servo sector".

[0088] Multiple Data Regions (DTRs) are configured between multiple Servo Regions (SVs). For example, a Data Region DTR corresponds to the area between two consecutive Servo Regions (SVs) in the circumferential direction. Hereinafter, a single Data Region DTR on a predetermined track is sometimes referred to as a "data sector." Furthermore, a "Data Region DTR" is sometimes referred to as a "Data Sector DTR." Data sectors contain user data. Additionally, "user data written to a data sector" is sometimes referred to as a "data sector." Sometimes, a "data sector" is also referred to as "user data." Furthermore, a "pattern composed of several data items" is sometimes referred to as a "data pattern." Figure 3 In the example shown, the data pattern of the predetermined track consists of multiple servo data (servo sectors) and multiple user data (data sectors).

[0089] A servo region SV has multiple partitioned servo regions ZSV. In addition to the partitioned servo regions ZSV, a servo region SV may also include: a region containing gaps (the deviation in circumferential position between two partitioned servo regions), a region containing servo data, and a data region DTR, etc. Multiple partitioned servo regions ZSV are discretely arranged along the radial direction d1. Each of the multiple partitioned servo regions ZSV extends along the radial direction d1.

[0090] Sometimes, a single partitioned servo region (servo area) ZSV on a predetermined track is referred to as a "partitioned servo sector" or "servo sector". Furthermore, sometimes the "partitioned servo region (servo area) ZSV" is referred to as a "partitioned servo sector ZSV" or "servo sector ZSV". Sometimes, "servo data written to a partitioned servo sector" is referred to as a "partitioned servo sector" or "servo sector". Hereinafter, sometimes the "configuration of several servo data constituting a partitioned servo sector" is referred to as a "partitioned servo pattern" or "servo pattern". Hereinafter, sometimes a single servo area SV on a predetermined track is referred to as a "partitioned pattern sector".

[0091] In addition, "servo area SV" is sometimes referred to as "partition pattern sector". "At least one piece of data written to a partition pattern sector" is sometimes referred to as "partition pattern sector". A partition pattern sector contains at least one partition servo sector. Hereinafter, "the data pattern of a partition pattern sector" is sometimes referred to as "partition data pattern".

[0092] exist Figure 3 In the example shown, the servo region SV has partitioned servo regions ZSV0, ZSV1, and ZSV2. The partitioned servo regions ZSV0, ZSV1, and ZSV2 are arranged in an alternating pattern along the radial direction d1. The partitioned servo regions ZSV0, ZSV1, and ZSV2 can also be arranged in a stepped pattern along the radial direction d1.

[0093] Partition servo region ZSV2 is located on the inner periphery side of partition servo region ZSV1. Partition servo region ZSV0 is located on the outer periphery side of partition servo region ZSV1. For example, partition servo region ZSV2 is configured from the inner periphery region IR to the middle periphery region MR, partition servo region ZSV1 is configured from the inner periphery region IR to the outer periphery region OR, and partition servo region ZSV0 is configured from the middle periphery region MR to the outer periphery region OR. Hereinafter, in the predetermined servo regions SV, sometimes the predetermined region in the radial direction where multiple partition servo regions ZSV are configured in the circumferential direction is referred to as the partition servo boundary region, dual servo region, or dual partition servo region ZB.

[0094] exist Figure 3In the example shown, the master servo regions SVO and slave servo regions SVE are arranged alternately with intervals in the circumferential direction. For example, in the circumferential direction, one slave servo region SVE is arranged between two consecutive master servo regions SVO arranged with intervals. In other words, in the circumferential direction, one slave servo region SVE is arranged between two consecutive master servo regions SVO arranged with intervals. For example, when all servo regions SV of disk DK are assigned consecutive numbers in sequence, the master servo region SVO corresponds to the odd-numbered servo region SV, and the slave servo region SVE corresponds to the even-numbered servo region SV. Furthermore, in the circumferential direction, more than two slave servo regions SVE can also be arranged between two consecutive master servo regions SVO arranged with intervals.

[0095] The master servo region (SVO) and slave servo region (SVE) can, for example, consist entirely of servo regions that read and demodulate servo data (hereinafter, sometimes referred to as normal servo regions). Hereinafter, "reading and demodulating servo data" is sometimes referred to as "performing servo reading." The master servo region (SVO) and slave servo region (SVE) can also, for example, consist of a normal servo region and a servo region that reads servo data from a smaller circumferential range compared to the servo data read in the normal servo region (hereinafter, sometimes referred to as short servo regions).

[0096] A media cache M is allocated to disk DK. However, media cache M may not be configured in disk DK.

[0097] By using the aforementioned multiple servo data, it is possible to derive the positioning error of the head HD (e.g., the written head WHD).

[0098] In this comparative example, we used a disk DK with three zones as an example, but the number of partitions on the disk DK can be changed in various ways. The number of partitions on the disk DK can also be 30 to 40. In addition, each partition can have multiple zones. For example, each partition can have hundreds of zones.

[0099] Figure 4 It indicates that the process is being carried out. Figure 3 The diagram shows the three tracks (STR) and the write head (WHD) of the user data area U for the watt-recording process of disk DK. User data area U is the watt-recording area. Within user data area U, data can be written sequentially in bands; that is, watt-recording is permitted.

[0100] like Figure 4 As shown, the write head WHD is capable of sequentially writing data to disk DK in the direction of travel d2. Figure 3The read head RHD shown can also sequentially read the data written to disk DK in the direction of travel d2.

[0101] The direction in which multiple tracks STR, which are multiple data tracks, are continuously recorded in a direction parallel to the radial direction d1, that is, the direction in the radial direction d1 in which the next track STR to be written overlaps with the previous track STR, is called the overlapping write direction or the recording travel direction. Figure 4 In the BAe shown, the overlapping write direction d5 is the inward direction, but the overlapping write direction can also be the outward direction.

[0102] For example, the overlapping write direction applicable to multiple BAs (multiple partitions Z) located on the outer periphery of a specific radius position can be opposite to the overlapping write direction applicable to multiple BAs (multiple partitions Z) located on the inner periphery of a specific radius position.

[0103] The BAe has multiple tracks STR, including tracks STRe, STRe+1, and STRe+2. Tracks STRe, STRe+1, and STRe+2 are continuously overlapped and written in the overlapped write direction d5 in the order described above. Track STRe in STRe, STRe+1, and STRe+2 corresponds to the track where data was first written, and track STRe+2 corresponds to the track where data was last written.

[0104] Track STRe, without being overwritten to other tracks, has a track sector STCe at its center in the radial direction d1. Track STRe+1, without being overwritten to other tracks, has a track sector STCe+1 at its center in the radial direction d1. Track STRe+2, without being overwritten to other tracks, has a track sector STCe+2 at its center in the radial direction d1.

[0105] exist Figure 4 In the example shown, tracks STRE, STRE+1, and STRE+2 are written with a pitch (recording track pitch) STP. Track sector STCe of track STRE and track sector STCe+1 of track STRE+1 are separated by a pitch STP in the radial direction d1. Track sector STCe+1 of track STRE+1 and track sector STCe+2 of track STRE+2 are separated by a pitch STP in the radial direction d1. Tracks STRE to STRE+2 can also be written with different pitches.

[0106] The radial width d1 of the region in track STR that is not overlapped with track STR+1 is the same as the radial width d1 of the region in track STR+1 that is not overlapped with track STR+2. Alternatively, the radial width d1 of the region in track STR that is not overlapped with track STR+1 can be different from the radial width d1 of the region in track STR+1 that is not overlapped with track STR+2.

[0107] exist Figure 4 For ease of explanation, each track STR is shown as a rectangle, but in reality, each track STR is curved along the circumferential direction. Alternatively, each track STR can also be wavy, varying in the radial direction d1 while extending circumferentially. Furthermore, in... Figure 4 In the process, although three tracks of STR are written in an overlapping manner, it is also possible to write two tracks of STR in an overlapping manner, or to write more than three tracks of STR in an overlapping manner.

[0108] The write processing unit 62 can select the watt-time recording mode for overlapping write data to multiple tracks STR in the overlapping write direction d5, so that the write head WHD can perform write of data to each track BA. Figure 4 In the example shown, the write processing unit 62 sequentially records watts of data onto tracks STRe to STRe+2 in the tape BAe in an inward direction with a spacing STP (overlapping write direction d5). Since the user data area U is the area where data is written in watt-recording format, the recording density of the user data area U can be increased.

[0109] The write processing unit 62 writes track STR+1 in the inward direction of track STR with a spacing STP, and overlaps the writing of a portion of the inner peripheral side of track STR+1. The write processing unit 62 writes track STR+2 in the inward direction of track STR+1 with a spacing STP, and overlaps the writing of a portion of the inner peripheral side of track STR+1.

[0110] Figure 5 It indicates that the process is being carried out. Figure 3 The diagram shows the three tracks (CTR) and write head (WHD) of the media cache M in the typical recording process of a disk DK. The media cache M and... Figure 3 The system area S shown is the normal recording area. Random data writing is permitted in both the media cache M and the system area S; that is, normal recording is allowed.

[0111] like Figure 5As shown, the media cache M has multiple tracks CTRs, including tracks CTRe, CTRe+1, and CTRe+2. These multiple tracks CTRs are data tracks. For example, tracks CTRe, CTRe+1, and CTRe+2 have the same width (track width) in the radial direction d1. Alternatively, the track widths of tracks CTRe to CTRe+2 can be different from each other.

[0112] Track CTRe has a track sector CTCe at its center in the radial direction d1, track CTRe+1 has a track sector CTCe+1 at its center in the radial direction d1, and track CTRe+2 has a track sector CTCe+2 at its center in the radial direction d1. Figure 5 In the example shown, tracks CTRe, CTRe+1, and CTRe+2 are written using a spacing (typically recording track spacing) CTP. The track sector CTCe of track CTRe is separated from the track sector CTCe+1 of track CTRe using a spacing CTP. The track sector CTCe+1 of track CTRe+1 is separated from the track sector CTCe+2 of track CTRe+2 using a spacing CTP.

[0113] Track CTRe and track CTRe+1 are separated by gap GP. Track CTRe+1 and track CTRe+2 are separated by gap GP. Furthermore, tracks CTRe to CTRe+2 can also be written with different spacing between them. Figure 5 For ease of explanation, each track CTR is shown in a rectangular shape, but in reality, each track CTR is curved along the circumferential direction. Alternatively, each track CTR can also be wavy, varying in the radial direction d1 while extending in the circumferential direction.

[0114] The write processing unit 62 can select a common recording format to perform write processing by writing data to multiple tracks CTR at intervals along the radial direction d1 of the disk DK. Figure 5 In the example shown, the write processing unit 62 positions the write head WHD at the track sector CTCe in a predetermined area of ​​the disk DK and performs normal recording on the track CTRe or a predetermined sector of the track CTRe.

[0115] The write processing unit 62 positions the write head WHD at track sector CTCe+1, which is separated from track sector CTCe by spacing CTP inward from track sector CTCe of track CTRe, and performs normal recording on track CTRe+1 or a predetermined sector of track CTRe+1. The write processing unit 62 positions the write head WHD at track sector CTCe+2, which is separated from track sector CTCe+1 by spacing CTP inward from track sector CTCe+1 of track CTRe+1, and performs normal recording on track CTRe+2 or a predetermined sector of track CTRe+2.

[0116] The write processing unit 62 can either sequentially record tracks CTRe, CTRe+1, and CTRe+2 in a predetermined area of ​​the disk DK, or randomly record predetermined sectors of track CTRe, track CTRe+1, and track CTRe+2.

[0117] Figure 6 This is a schematic diagram illustrating an example of data write processing in a disk DK. Tracks STR and CTR are the data tracks, respectively. Figure 6 As shown, the user data area U has bands BAa, BAb, and Bac. Bands BAa, BAb, and Bac belong to the same partition Ze. In partition Ze, bands BAa, BAb, and Bac are discontinuously arranged in the overlapping write direction d5 according to the above-described order.

[0118] BAa and BAb are adjacent in the radial direction d1, and BAb and BAc are adjacent in the radial direction d1.

[0119] Band BAa contains tracks STRa0, STRa1, STRa2, ..., STRa(x-3), STRa(x-2), and STRa(x-1), totaling x tracks. Tracks STRa0 to STRa(x-1) are recorded in the overlapping write direction d5 according to the above-described recording order. In band BAa, track STRa0 corresponds to the first track where data is initially written, and track STRa(x-1) corresponds to the last track where data is ultimately written.

[0120] The tape BAb contains tracks STRb0, STRb1, STRb2, ..., STRb(x-3), STRb(x-2), and STRb(x-1), totaling x tracks. Tracks STRb0 to STRb(x-1) are recorded in the overlapping write direction d5 according to the above-described recording order. In tape BAb, track STRb0 corresponds to the first track where data is initially written, and track STRb(x-1) corresponds to the last track where data is ultimately written.

[0121] Band BAc contains x tracks: STRc0, STRc1, STRc2, ..., STRc(x-3), STRc(x-2), and STRc(x-1). Tracks STRc0 to STRc(x-1) are recorded in the overlapping write direction d5 according to the above-described recording order. In Band BAc, track STRc0 corresponds to the first track where data is initially written, and track STRc(x-1) corresponds to the last track where data is ultimately written.

[0122] Each band BA belonging to the same partition Z has the same number of tracks STR. For example, each band BA belonging to partition Ze has the same number of tracks STR. In other words, the number of tracks STR in a band BA is fixed for each partition Z. In this example, each band BA belonging to partition Ze has x tracks STR.

[0123] Figure 6 Tracks CTR(x-2) and CTR(x-1) are shown. Figure 6 In the medium, tracks CTR(x-2) and CTR(x-1) are normally recorded in the media cache M or system region S. Tracks CTR(x-2) and CTR(x-1) are adjacent in the radial direction d1.

[0124] Figure 7 It means Figure 6 The diagram shows two bands BAa and BAb and one guard band GB in the user data area U. (See diagram.) Figure 7 As shown, in the watt recording mode, unlike the usual recording mode, the MPU60 manages the track group of the user data area U in units called bands, based on the feature of overlapping writing of a portion of the track STR.

[0125] A guard band (GB) is typically provided between adjacent bands (BAs) in the radial direction d1. The guard band (GB) includes a guard track (GTR). Unlike this comparative example, the guard band (GB) may also contain multiple guard tracks (GTRs). The guard band (GB) serves to suppress interference between adjacent bands (BAs). With the guard band (GB), wattage recording can be performed on a unit of one band (BA). Furthermore, the guard band (GB) allows for the separation of sequentially written areas (bands (BAs)).

[0126] For example, the track sector STCa(x-3) of track STa(x-3), the track sector STCa(x-2) of track STa(x-2), the track sector STCa(x-1) of track STa(x-1), the track sector GTC of the protection track GTR, the track sector STCb0 of track STRb0, the track sector STCb1 of track STRb1, and the track sector STCb2 of track STRb2 are located at equal intervals in the overlapping write direction d5.

[0127] Besides the guard band (GB), the recording capacity of each band (BA) in the user data area U is typically predetermined based on user requirements. The MPU60 can record the same amount of data for each band BA. Generally, the recording capacity of each band BA is 128 MiB or 256 MiB.

[0128] Figure 8It means Figure 6 The diagram shows three sectors SCe, SC(e+1), and SC(e+2) in track STRa0 with BAa. Figure 8 As shown, each track STR has multiple sectors SC arranged in a circular direction. Track STRa1 has multiple sectors SC including sectors SCe, SC(e+1), and SC(e+2). Tracks STR belonging to the same partition Z have the same number of sectors SC. In this comparative example, each track STR belonging to partition Ze has y sectors SC.

[0129] Each sector SC has a length Ls in the circumferential direction of disk DK. Sometimes, each sector SC is also a split sector formed by dividing a servo sector SV. In this case, the length of the sector SC may not be Ls.

[0130] The write head (WHD) is a magnetic head used for energy-assisted recording (EAMR). In this comparative example, the write head (WHD) is configured to utilize energy other than magnetism, but it is not limited to this; the write head (WHD) may also be a magnetic head that is not configured to perform energy-assisted recording.

[0131] Figure 9 It means Figure 7 The diagram shown includes two sections with bands Baa and BAb and one guard band GB, and is used to illustrate multiple object sector RSCs and multiple unused sector VSCs.

[0132] exist Figure 9 For ease of explanation, each track STR is shown as a rectangle, but in reality, each track STR is curved along the circumference. Furthermore, multiple track STRs are arranged non-overlappingly in the overlapped write direction d5, but in reality, multiple track STRs overlap while being arranged in the overlapped write direction d5. Additionally, in the diagram, the target sector RSC has a dot pattern, and the unused sector NSC has a grid pattern. Unused sectors VSC are represented by blank spaces.

[0133] like Figure 9 As shown, the track number with BAa is set to "a", and the track number with BAb is set to "b". The track numbers for each BA are set to "0" to "x-1". The sector numbers for each track STR are set to "0" to "y-1". Hereinafter, the next label "SC (track number, sector number)" is sometimes used to identify each sector SC with BA.

[0134] In this comparative example, band BAa is the band adjacent to band BAb, and is located upstream of band BAb in the overlapping write direction d5.

[0135] Each track STR with BAa contains G object sector RSCs (more than one object sector RSC) that have been written with valid data. For example, track STa0 has y object sector RSCs (G = y). All sectors SC of track STa0 are object sector RSCs. Track STa(x-1) has 5 object sector RSCs (G = 5). The remaining sectors SC of track STa(x-1) are unused sectors VSCs that have not been written with valid data.

[0136] Based on the above, the number of target sector RSCs in track STa0 is different from the number of target sector RSCs in track STa(x-1).

[0137] In the track STR with BAb, sector 4 (SC) of tracks 0 and 1 is a defective sector and is an unused sector (NSC). Sectors 0-3 and 5-y-1 (SC) are target sectors (RSC) and are record sectors (USC). All sectors in the track STR from 2 to x-2 (SC) are target sectors (RSC) and are record sectors (USC). In the track STR with BAb (x-1), sectors 0-6 (SC) are target sectors (RSC) and are record sectors (USC). On the other hand, in the track STR with BAb (x-1), the remaining sectors (SC) from 7 to y-1 are unused sectors (VSC) that have not been written with valid data.

[0138] Figure 10 This is a top view showing a portion of a recording layer Lm and a header HDm involved in this comparative example.

[0139] like Figure 10 As shown, the head HDm opposite to the recording layer Lm has a write head WHDm, a read head RHDm1, and a read head RHDm2. The write head WHDm, the read head RHDm1, and the read head RHDm2 are supported by the same arm 30.

[0140] During the writing of data to track STRI of recording layer Lm using the write head WHDm, a first offset Cm, which is the distance from the write head WHDm to the read head RHDm1, is set in the first direction da. When writing data to track STRI using the write head WHDm, the write processing unit 62 offsets the read head RHDm1 from the position of track STRI in the first direction da by Cm, so that the write head WHDm is opposite to track STRI, and user data is written to track STRI using the write head WHDm.

[0141] Furthermore, the first offset Cm depends on the Yaw angle, which is the tilt angle of the head HDm relative to the recording layer Lm in the circumferential direction. The first offset Cm can be common in either the band BA or the partition Z.

[0142] Figure 11 This is a circuit diagram showing the selection circuit 3Sa of the head amplifier IC130 involved in this comparative example.

[0143] like Figure 11 As shown, selection circuit 3Sa is a multiplexer that receives many input signals and outputs six signals. Selection circuit 3Sa can connect to one of the following headers, HD1 to HDg, at a time. In this example, selection circuit 3Sa is connected to header HD2.

[0144] The positive terminal R1P and the negative terminal R1N of the HD2 side of the selection circuit 3Sa are connected to the read head RHD21 of the HD2 head. The positive terminal R1P2 and the negative terminal R1N2 are connected to the read head RHD22 of the HD2 head. The positive terminal W1P and the negative terminal W1N are connected to the write head WHD2 of the HD2 head.

[0145] The positive terminal RDP and the negative terminal RDN of the R / W channel 140 side of the selection circuit 3Sa are connected to the read amplifier 3R1. The positive terminal RDP2 and the negative terminal RDN2 are connected to the read amplifier 3R2. The positive terminal WDP and the negative terminal WDN are connected to the write driver 3W.

[0146] The read signal output by the read head RHD is a working signal, and it is a paired signal. The write head WHD operates according to the working signal, and the write signal input to the write head WHD is a paired signal. By utilizing such a working signal, signals can be transmitted at high speed and without noise. Here, the working signal is mentioned to explain the difference between the signal level on the positive side and the signal level on the negative side. However, in the following description, the paired signals output by the read head RHD are sometimes combined into one signal and referred to as the read signal, and the paired signals input to the write head WHD are sometimes combined into one signal and referred to as the write signal.

[0147] Figure 12 This is a block diagram showing the configuration of a portion of the disk device 1 involved in this comparative example, and a diagram showing the configuration of the read channel 14R1, etc.

[0148] like Figure 12As shown, the read channel 14R1 of the R / W channel 140 is connected to the head amplifier IC 130 and has a processing circuit 4PC for two-dimensional magnetic recording (TDMR). The processing circuit 4PC includes: low-pass filters (LPF) 4R1a and 4R1b, analog-to-digital converters (ADC) 4R2a and 4R2b, a two-dimensional FIR (Finite Impulse Response) filter 4R3, a Viterbi decoder 4R4, and an LDPC (Low Density Parity Check) decoder 4R5.

[0149] Here, the recording layer Lm has a track STRI. The write processing unit 62 can write user data to the track STRI using the write head WHDm.

[0150] The LPF4R1a is connected to the read head RHDm1 of the head amplifier IC130 via the read amplifier 3R1. The LPF4R1a removes noise from the first read signal, which is read by the read head RHDm1 and amplified by the read amplifier 3R1. The ADC4R2a is connected to the LPF4R1a and converts the first read signal into a digital signal.

[0151] The LPF4R1b is connected to the read head RHDm2 of the head amplifier IC130 via the read amplifier 3R2. The LPF4R1b removes noise from the second read signal, which is read by the read head RHDm2 and amplified by the read amplifier 3R2. The ADC4R2b is connected to the LPF4R1b and converts the second read signal into a digital signal.

[0152] The two-dimensional FIR filter 4R3 is connected to ADCs 4R2a and 4R2b. The two-dimensional FIR filter 4R3 can perform waveform equalization processing on the waveform of the composite data obtained by combining the first read signal read by read head RHDm1 and the second read signal read by read head RHDm2, so as to minimize the error rate (BER) of the data written to track STRI, and output waveform equalization data as the result of waveform equalization processing of the composite data.

[0153] The Viterbi decoder 4R4 is connected to a two-dimensional FIR filter 4R3. The Viterbi decoder 4R4 receives waveform equalization data as input. It outputs decoded data after decoding the waveform equalization data. The internal operations of the Viterbi decoder 4R4 are performed using an algorithm that considers the track STRI. In the metric operations of the Viterbi decoder 4R4, the signal mean, noise variance, and tap coefficients of the noise whitening filter are preserved for each path metric considering the track STRI and optimized to minimize the BER of the track STRI.

[0154] The LDPC decoder 4R5 is connected to the Viterbi decoder 4R4. The LDPC decoder 4R5 is capable of performing decoding processing on the LDPC code of the decoded data input from the Viterbi decoder 4R4.

[0155] When the read target selection unit 64 selects track STRI of recording layer Lm, the read processing unit 63 drives the actuator (VCM24) to control the head HDm (read head RHDm1 and read head RHDm2) to perform a track-seeking operation, moving read head RHDm1 and read head RHDm2 to a position opposite to track STRI. Furthermore, the read processing unit 63 controls the drive of the selection circuit 3Sa, causing the selection circuit 3Sa to select head HDm (read head RHDm1 and read head RHDm2), and the user data of track STRI is read independently via the selection circuit 3Sa.

[0156] The processing circuit 4PC can synthesize and process the signals read by the read head RHDm1 and the read head RHDm2, and output a synthesized processed signal with reduced noise components.

[0157] According to the disk drive 1 described in the comparative example above, since two read heads RHDm1 and RHDm2 can be used to read data from one track STRI, high-quality data with reduced noise can be obtained. The selection circuit 3Sa can connect to one head HD at a time. Therefore, when detecting potential defects on the recording layer L, the selection circuit 3Sa selects one head HD, and the detection unit 65 can target one recording layer L to detect (check) the presence of defects. The management unit 66 can manage information about areas in the recording layer L where defects exist.

[0158] However, in order to shorten the time required for defect detection, preferably, the selection circuit 3Sa can simultaneously select more than two heads HD and simultaneously detect (check) whether more than two recording layers L are free of defects.

[0159] (One implementation method)

[0160] Next, the configuration of a disk device 1 according to one embodiment will be described. Figure 13 This is a block diagram illustrating the configuration of a disk drive 1 according to one embodiment. The disk drive 1 is configured similarly to the disk drive 1 of the comparative example described above, except for the configuration to be described in this embodiment.

[0161] like Figure 13 As shown, the head amplifier IC130 has a selection circuit 3Sb instead of selection circuit 3Sa. The R / W channel 140 also has a read channel 14R2 and a selection circuit 14S. Details of the selection circuit 3Sb will be explained later, but the selection circuit 3Sb can be connected to multiple read heads RHD and can select more than two read heads from multiple read heads RHD.

[0162] Furthermore, the R / W channel 140 has a read channel 14R1. By selecting the read channel 14R1 through the selection circuit 14S, the disk device 1 can, in the same manner as the comparative example described above, utilize TDMR to process two signals simultaneously acquired from the same data track (same data sector) and read data.

[0163] Figure 14 This is a top view showing the plurality of arms 30 and the plurality of heads HD involved in this embodiment. Figure 14 In this context, we focus on two arms 30 and two heads HDm and HDn from among multiple arms 30 and multiple heads HD.

[0164] like Figure 14 As shown, heads HDm and HDn are supported by arms 30. The actuator (VCM24) can control the movement of multiple arms 30, enabling multiple arms 30 to move in the same (uniformly, without difference) manner.

[0165] Here, we focus on the positional relationship between heads HDm and HDn. In the direction along the rotation axis of disk DK, heads HDm and HDn overlap. However, as illustrated in the example, sometimes heads HDm and HDn do not overlap in the direction along the rotation axis of disk DK. In this case, sometimes heads HDm and HDn deviate in the radial direction d1 of disk DK. Furthermore, sometimes heads HDm and HDn deviate in the circumferential direction of disk DK.

[0166] Figure 15 This is a top view showing a portion of the two recording layers Lm and Ln and the two headers HDm and HDn involved in this embodiment, and is a diagram used to illustrate the positional relationship between the two recording layers Lm and Ln and the two headers HDm and HDn in the radial direction d1.

[0167] like Figure 15As shown, multiple recording layers L include recording layer Lm and recording layer Ln. In the direction along the rotation axis of disk DK, the tracks STRi of recording layer Lm and recording layer Ln overlap. However, as... Figure 15 As shown, the track STRi of recording layer Lm and the track STRi of recording layer Ln can also be located at positions offset in the radial direction d1.

[0168] Multiple write heads WHD have a write head WHDm for writing data to the recording layer Lm and a write head WHDn for writing data to the recording layer Ln.

[0169] The write processing unit 62 can select an overlap write direction d5 parallel to the radial direction d1, for example, to overlap write data of track STR(i+3) of track STR(i+2) of recording layer Lm in a watt-time recording mode. Furthermore, the write processing unit 62 can select an overlap write direction d6 parallel to the radial direction d1, for example, to overlap write data of track STR(i) of track STR(i) of recording layer Ln in a watt-time recording mode.

[0170] exist Figure 15 In the example, the overlapping write direction d5 is the same as the overlapping write direction d6, but they can also be opposite directions.

[0171] Multiple read heads RHD have read heads RHDm1 and RHDm2 that read data from the recording layer Lm, and read heads RHDn1 and RHDn2 that read data from the recording layer Ln.

[0172] Header HDm has a write head WHDm, a read head RHDm1, and a read head RHDm2. Header HDn has a write head WHDn, a read head RHDn1, and a read head RHDn2.

[0173] During the writing of data to track STR(i+3) of recording layer Lm using the write head WHDm, the distance from the write head WHDm to the read head RHDm1 in the first direction da, i.e., the first offset, is set as Cm, the distance from the write head WHDn to the read head RHDn2 in the first direction da, i.e., the second offset, is set as Cn, and the distance from the read head RHDm1 to the read head RHDn2 in the first direction da, i.e., the third offset, is set as C(m,n).

[0174] The first offset Cm, the second offset Cn, and the third offset C(m, n) depend on the Yaw angle and can be common in either the BA band or the Z band.

[0175] Figure 16This is a circuit diagram showing the selection circuit 3Sb of the head amplifier IC130 involved in this embodiment.

[0176] like Figure 16 As shown, the selection circuit 3Sb is a multiplexer that receives many input signals and outputs six signals. The selection circuit 3Sb is connected to multiple read heads RHD. The selection circuit 3Sb can freely select two or more read heads RHD from the multiple read heads RHD. Therefore, the select circuit 3Sb can connect to two or more read heads RHD from HD1 to HDg at a time. In this example, the selection circuit 3Sb is connected to both read heads HD1 and HDg.

[0177] The positive terminal ROP and the negative terminal RON of the head HD1 side of the selection circuit 3Sb are connected to the read head RHD11 of the head HD1.

[0178] The positive terminal RnP and the negative terminal RnN of the head HDg side of the selection circuit 3Sb are connected to the reading head RHDg1 of the head HDg.

[0179] The positive terminal W0P and the negative terminal W0N of the head HD1 side of the selection circuit 3Sb are connected to the write head WHD1 of the head HD1.

[0180] The positive terminal RDP and the negative terminal RDN of the R / W channel 140 side of the selection circuit 3Sb are connected to the read amplifier 3R1. The positive terminal RDP2 and the negative terminal RDN2 are connected to the read amplifier 3R2. The positive terminal WDP and the negative terminal WDN are connected to the write driver 3W.

[0181] In this embodiment, the signals taken from the read head RHD and the signals taken into the write head WHD are each also working signals. However, in the following description, sometimes the pairs of signals taken from the read head RHD are combined into one and referred to as a read signal, and the pairs of signals taken into the write head WHD are combined into one and referred to as a write signal.

[0182] Figure 17 This is a block diagram showing the configuration of a portion of the disk device 1 according to this embodiment, and it is also a diagram showing the configuration of... Figure 12 The diagram shows the configuration of different read channels 14R1 and 14R2.

[0183] like Figure 17 as well as Figure 13As shown, when the read target selection unit 64 selects recording layer Lm and recording layer Ln, the read processing unit 63 controls the drive of the selection circuit 3Sb, causing the selection circuit 3Sb to select read head RHDm1 and read head RHDn2, enabling simultaneous reading of data from recording layer Lm and recording layer Ln via the selection circuit 3Sb. Here, it is possible to simultaneously read the data of track STi of recording layer Lm and the data of track STR(i-2) of recording layer Ln. The detection unit 65 can detect the state of recording layer Lm (track STi of recording layer Lm) and the state of recording layer Ln (track STR(i-2) of recording layer Ln) based on the signals read by read head RHDm1 and read head RHDn2.

[0184] Because the states of two recording layers L can be detected simultaneously, a disk device 1 that can efficiently detect defects on disk DK can be obtained. For example, when applied to the manufacture of disk device 1, the manufacturing time can be shortened because the test time for detecting defects can be shortened, which helps to reduce manufacturing costs.

[0185] In addition, while simultaneously detecting the state of two recording layers L, the read processing unit 63 controls the drive of the selection circuit 14S, causing the selection circuit 14S to select the read channel 14R2.

[0186] The read channel 14R2 has multiple processing circuits. In this embodiment, the read channel 14R2 has a first processing circuit 4PC1 and a second processing circuit 4PC2. When the read target selection unit 64 selects the recording layer Lm and the recording layer Ln, the first processing circuit 4PC1 processes the signal read by the read head RHDm1 and outputs a first processed signal with reduced noise components, and the second processing circuit 4PC2 processes the signal read by the read head RHDn2 and outputs a second processed signal with reduced noise components. The detection unit 65 can detect the state of the recording layer Lm and the state of the recording layer Ln based on the first processed signal and the second processed signal.

[0187] The first processing circuit 4PC1 includes an LPF4R1a, an ADC4R2a, an FIR filter 4R3a, and a defect detection circuit 4R6a.

[0188] The LPF4R1a is connected to the read head RHDm1 of the head HDm via selection circuit 14S, read amplifier 3R1 of head amplifier IC 130, and selection circuit 3Sb. The LPF4R1a removes noise from the first read signal, which is read by the read head RHDm1 and amplified by read amplifier 3R1. The ADC4R2a is connected to the LPF4R1a and converts the first read signal into a digital signal.

[0189] The FIR filter 4R3a is connected to the ADC 4R2a. The FIR filter 4R3a is a one-dimensional FIR filter. The FIR filter 4R3a can perform waveform equalization processing to equalize the waveform of the first read signal, thereby minimizing the error rate of the first read signal. The FIR filter 4R3a can output the first waveform equalization data.

[0190] The defect detection circuit 4R6a can output information on the presence or absence of defects and the extent of defects in the track STRi (data sector) of the recording layer Lm as a first processing signal based on the data provided by the FIR filter 4R3a.

[0191] The second processing circuit 4PC2 includes LPF4R1b, ADC4R2b, FIR filter 4R3b, and defect detection circuit 4R6b.

[0192] The LPF4R1b is connected to the read head RHDn2 of the head amplifier IC130 via selection circuit 14S, read amplifier 3R2 of the head amplifier IC130, and selection circuit 3Sb. The LPF4R1b removes noise from the second read signal, which is read by the read head RHDn2 and amplified by read amplifier 3R2. The ADC4R2b is connected to the LPF4R1b and converts the second read signal into a digital signal.

[0193] The FIR filter 4R3b is connected to the ADC 4R2b. The FIR filter 4R3b is a one-dimensional FIR filter. The FIR filter 4R3b can perform waveform equalization processing to equalize the waveform of the second read signal, minimizing the error rate of the second read signal. The FIR filter 4R3b can output the second waveform equalized data.

[0194] The defect detection circuit 4R6b can output information indicating the presence and extent of defects in track STR(i-2) (data sector) of recording layer Ln as a second processing signal based on data provided from the FIR filter 4R3b. Thus, the detection unit 65 can simultaneously detect the state of track STRi of recording layer Lm and the state of track STR(i-2) of recording layer Ln based on the first and second processing signals.

[0195] Furthermore, when detecting the state of recording layer L using read channel 14R2, the data written to recording layer L is different from user data. The data in recording layer Lm, recording layer Ln, etc., are each bit data with a simplified code arrangement compared to user data. For example, they are data arranged in a regular code pattern such as 0, 1, 0, 1, ... By reading this simplified bit data, the state of recording layer L can be detected, and read channel 14R2 can be easily constructed.

[0196] When the detection unit 65 detects a defect in the recording layer Lm, the management unit 66 can manage the information of the defective area in the recording layer Lm, and can identify one or more sectors SC located in the defective area as abnormal sectors, and exclude each abnormal sector from the objects of write processing and read processing.

[0197] For example, in the detection department 65, etc., it was detected that Figure 9 In the case of partition Ze, the management unit 66 can identify sectors SC(STRb0,4) and SC(STRb1,4) with BAb as abnormal sectors. Therefore, sectors SC(STRb0,4) and SC(STRb1,4) with BAb can be treated as unused sectors NSC.

[0198] Next, the write processing of the write processing unit 62 will be explained. Figure 18A This is a top view showing a portion of a recording layer Lm and a head HDm according to this embodiment, and a diagram showing the state of performing a write process using a write head WHDm to write data to one track SRi of the aforementioned recording layer Lm. Figure 18B This is a top view showing a portion of another recording layer Ln and the other end HDn involved in this embodiment. Figure 18A A diagram showing the positional relationship between the record layer Ln and the header HDn during the aforementioned write process.

[0199] like Figure 18A as well as Figure 18B As shown, by aligning the read head RHDm1 with track STR(i+5) and the write head WHDm with track STRI, the write processing unit 62 can write data to track STRI using the write head WHDm.

[0200] If we are interested in the positional relationship between the recording layer Ln and the head HDn during the period when data is written to track STRI which is directly opposite the recording layer Lm, then the read head RHDn2 is opposite to track STR(i+3), and the write head WHDn is opposite to track STRI.

[0201] Figure 19A This is a top view showing a portion of the recording layer Ln and the head HDn according to this embodiment, and a diagram showing the state of performing a write process that uses the write head WHDn to write data to track STR(i-2) of the recording layer Ln. Figure 19B This is a top view showing a portion of the recording layer Lm and the header HDm involved in this embodiment. Figure 19A A diagram showing the positional relationship between the Lm record layer and the head HDm during the write process.

[0202] like Figure 19A as well as Figure 19B As shown, by positioning the read head RHDn2 opposite track STR(i+1) and the write head WHDn opposite track STR(i-2), the write processing unit 62 can write data to track STR(i-2) using the write head WHDn.

[0203] If we are interested in the positional relationship between the recording layer Lm and the head HDm during the writing of data on track STR(i-2) which is directly opposite the recording layer Ln, then the read head RHDm1 is opposite to track STR(i+3), and the write head WHDm is opposite to track STR(i-2).

[0204] Next, the read processing of the read processing unit 63 will be explained.

[0205] Figure 20A This is a top view showing a portion of the recording layer Lm and the head HDm according to this embodiment, and a diagram showing the state of reading processing that uses the read head RHDm1 to read data from track STRI of the recording layer Lm. Figure 20B This is a top view showing a portion of the recording layer Ln and the header HDn according to this embodiment. Figure 20A The graph shows the state of the read process during which data is being read from track STR(i-2) of recording layer Ln using read head RHDn2.

[0206] When the read target selection unit 64 selects track STRI of recording layer Lm and track STR(i-2) of recording layer Ln, the read processing unit 63 drives the actuator (VCM24) to control the track seeking operation of read head RHDm1 and read head RHDn2, causing read head RHDm1 to move to a position opposite to track STRI. Consequently, read head RHDn2 moves to a position opposite to track STR(i-2).

[0207] Next, the read processing unit 63 can control the drive of the selection circuit 3Sb, so that the selection circuit 3Sb selects the read head RHDm1 and the read head RHDn2, and reads the data of track STi of the recording layer Lm and the data of track STR(i-2) of the recording layer Ln simultaneously via the selection circuit 3Sb.

[0208] The detection unit 65 is able to detect the state of track STi of the recording layer Lm and the state of track STR(i-2) of the recording layer Ln based on the signals read by the read head RHDm1 and the read head RHDn2.

[0209] To simultaneously read data from track STRi of recording layer Lm and data from track STR(i-2) of recording layer Ln, such as Figure 18A , Figure 18B , Figure 19A ,as well as Figure 19B As shown, data (simplified bit data) for detecting the state of the track STR needs to be written to these tracks in advance.

[0210] Here, the first direction da, which is parallel to the radial direction d1 and extends from the outer periphery of disk DK toward the inner periphery, is set to positive. During the writing of data to track STRI using the write head WHDm, the position of the read head RHDm1 in the radial direction d1 is set as the reference position, the first offset is set as Cm, the second offset is set as Cn, and the third offset is set as C(m, n).

[0211] Furthermore, the offset correction amount calculated from -Cm+Cn+C(m,n) is set as ΔCR.

[0212] Therefore, when writing data to track STR(i-2) using the write head WHDn, the write processing unit 62 offsets the read head RHDn2 from the aforementioned reference position in the first direction da by ΔCR, so that the write head WHDn is aligned with track STR(i-2) of the recording layer Ln. Thus, data can be written to track STRi of the recording layer Lm and track STR(i-2) of the recording layer Ln, which are located in positions that can be read simultaneously.

[0213] Furthermore, by using the offset correction amount ΔCR, data can be written to the desired radial position (position in the radial direction d1) of each recording layer L. Therefore, in the direction along the rotation axis of disk DK, the head HDm and head HDn may not overlap, and the tracks STi of recording layer Lm and recording layer Ln may not overlap. For example, the track spacing of multiple recording layers L may also be inconsistent.

[0214] Furthermore, the head HDm and head HDn can also be located at positions offset from the circumference of the disk DK, and the servo regions of the recording layer Lm and the recording layer Ln can also be located at positions offset from the circumference. Next, we focus on the read processing considering the offset of the head HD position and the offset of the servo region position in the circumference direction.

[0215] Figure 21 This diagram shows the state in which read processing is performed simultaneously, reading data from track STRi of recording layer Lm and data from track STR(i-2) of recording layer Ln in this embodiment. It also shows the read strobe RG. This diagram is used to explain the read processing when the timing of the read head RHDn2 arriving at the predetermined read position is later than the timing of the read head RHDm1 arriving at the predetermined read position.

[0216] like Figure 21 as well as Figure 13 As shown, the gating generation unit 151 can generate a read gating RG. The gating detection unit 14D can cause the read processing unit 63 to perform read processing when the read gating RG is detected to be valid. The read head RHDm1 and the read head RHDn2 travel above the track STRi of the recording layer Lm and the track STR(i-2) of the recording layer Ln, respectively, in the travel direction d2.

[0217] The track STRi of the recording layer Lm and the track STR(i-2) of the recording layer Ln have multiple servo regions SV and multiple data regions DTR arranged alternately in the circumferential direction, respectively.

[0218] In the track STRi of the recording layer Lm, multiple servo regions SV include a first servo region SV1 and a second servo region SV2, and multiple data regions DTR include a first data region DTR1 that follows the first servo region SV1 and is located before the second servo region SV2 in the travel direction d2.

[0219] In the track STR(i-2) of the recording layer Ln, multiple servo regions SV include the third servo region SV3 and the fourth servo region SV4, and multiple data regions DTR include the second data region DTR2 which follows the third servo region SV3 and is located in front of the fourth servo region SV4 in the travel direction d2.

[0220] The third servo region SV3 among the multiple servo regions SV of track STR(i-2) of the recording layer Ln is the servo region closest to the read head RHDn2 when the read head RHDm1 is opposite to the first servo region SV1.

[0221] The fourth servo region SV4 among the multiple servo regions SV of track STR(i-2) of the recording layer Ln is the servo region closest to the read head RHDn2 when the read head RHDm1 is opposite to the second servo region SV2.

[0222] Here, the timing of the read head RHDm1 passing through the last position of the first servo region SV1 of track STi in recording layer Lm is set as the first timing T1. The timing of the read head RHDn2 passing through the last position of the third servo region SV3 of track STR(i-2) in recording layer Ln is set as the second timing T2. The correction period, which is the time interval between the first timing T1 and the second timing T2, is set as ΔTR.

[0223] Figure 21This indicates that the second timing T2 is later than the first timing T1. In this case, the gating generation unit 151 enables the read gating RG at the first timing T1, maintains the read gating RG in an enabled state at the beginning of the second servo region SV2 of the track STRI of the recording layer Lm at the third timing T3, and disables the read gating RG at the fourth timing T4, which is ΔTR after the third timing T3.

[0224] Therefore, it is possible to read all the data in the first data area DTR1 and all the data in the second data area DTR2.

[0225] Figure 22 This diagram shows the state in which read processing is performed simultaneously, reading data from track STRi of recording layer Lm and track STR(i-2) of recording layer Ln in this embodiment. It also shows the read strobe RG. This diagram is used to explain the read processing when the timing of the read head RHDn2 reaching the predetermined read position coincides with the timing of the read head RHDm1 reaching the predetermined read position. Figure 22 This illustrates the case where the second timing T2 coincides with the first timing T1.

[0226] like Figure 22 as well as Figure 13 As shown, the gating generation unit 151 enables the read gating RG at the first time T1 and disables the read gating RG at the third time T3.

[0227] Therefore, it is possible to read all the data in the first data area DTR1 and all the data in the second data area DTR2.

[0228] Figure 23 This diagram shows the state in which read processing is performed simultaneously, reading data from track STRi of recording layer Lm and track STR(i-2) of recording layer Ln in this embodiment. It also shows the read strobe RG. This diagram is used to explain the read processing when the timing of the read head RHDn2 reaching the predetermined read position is earlier than the timing of the read head RHDm1 reaching the predetermined read position. Figure 23 This illustrates the case where the second timing T2 is earlier than the first timing T1.

[0229] like Figure 23 as well as Figure 13 As shown, the gating generation unit 151 enables the read gating RG at a 5th time T5, which is ΔTR earlier than the 1st time T1, maintains the read gating RG in an enabled state at the 1st time T1, and switches the read gating RG to invalid at the 3rd time T3.

[0230] Therefore, it is possible to read all the data in the first data area DTR1 and all the data in the second data area DTR2.

[0231] exist Figures 21-23 In any case, the data in the first data area DTR1 and the data in the second data area DTR2 can be read without omission.

[0232] Next, the defect management on the record layer L conducted by the management department 66 will be explained.

[0233] Figure 24 This is a top view showing a portion of the recording layer Lm involved in this embodiment, and a diagram showing the state of the defect DE detected on the recording layer Lm spanning 6 adjacent sectors SC. Figure 25 This is a top view showing a portion of the recording layer Lm according to this embodiment, and is followed by... Figure 24 The diagram showing the state after changing the track width Wt and sector length Ls of the recording layer Lm is a diagram showing the state of the above-mentioned defect DE spanning two adjacent sectors SC.

[0234] like Figure 24 as well as Figure 13 As shown, the width of each track STR in the radial direction d1 is defined as the track width Wti, and the length of each data sector STR in the circumferential direction is defined as the sector length Lsi. When the detection unit 65 detects a defect DE in the recording layer Lm, the management unit 66 can manage the information of the area where the defect DE exists in the radial direction d1 using a reference width with a resolution higher than the track width Wti, and in the circumferential direction using a reference length with a resolution higher than the sector length Lsi.

[0235] Here, we consider the case where the track width Wt and sector length Ls change midway through the user's use of disk device 1.

[0236] like Figure 25 as well as Figure 13 As shown, the track width Wti is changed to the track width Wth, and the sector length Lsi is changed to the sector length Lsh. In this case, the management unit 66 can determine the sector SC(h+1) of track STRj of the recording layer Lm and the sector SC(h+1) of track STR(j+1) as abnormal sectors and process them as unused sectors NSC.

[0237] In Figure 24When comparing the track width Wt and sector length Ls before the changes, it can be seen that the number of unused sector NSCs has decreased from 6 to 2. Since it is sometimes possible to reduce the number of unused sector NSCs, it is preferable to manage the track width Wt using a higher resolution reference width and the sector length Ls using a higher resolution reference length.

[0238] According to the disk device 1 of the above embodiment configured as described above, the disk device 1 includes a plurality of recording layers L, a plurality of write heads WHD, a plurality of read heads RHD, a selection circuit 3Sb, a read target selection unit 64, a read processing unit 63, and a detection unit 65.

[0239] Multiple recording layers L are located on the same disk DK or different disk DKs, and each has a recording layer Lm and a recording layer Ln. Multiple write heads WHD have a write head WHDm for writing data to recording layer Lm and a write head WHDn for writing data to recording layer Ln. Multiple read heads RHD have a read head RHDm1 for reading data from recording layer Lm and a read head RHDn2 for reading data from recording layer Ln.

[0240] The selection circuit 3Sb is connected to multiple read heads RHD, enabling the selection of two or more read heads from the multiple read heads RHD. The read processing unit 63 is capable of performing read processing to read data from each recording layer L.

[0241] When the read target selection unit 64 selects recording layer Lm and recording layer Ln, the read processing unit 63 can control the drive of the selection circuit 3Sb, causing the selection circuit 3Sb to select read head RHDm1 and read head RHDn2, and simultaneously read data from recording layer Lm and recording layer Ln via the selection circuit 3Sb. The detection unit 65 can detect the state of recording layer Lm and the state of recording layer Ln based on the signals read from read head RHDm1 and read head RHDn2.

[0242] Because it can read data from two recording layers L simultaneously, a disk device 1 that can efficiently detect defects on disk DK can be obtained.

[0243] The embodiments of the present invention have been described above. However, the above embodiments are merely illustrative examples and are not intended to limit the scope of the invention. The new embodiments described above can be implemented in various other ways, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. The above embodiments and / or their variations are included in the scope and spirit of the invention, and are included in the scope of the invention as described in the claims and its equivalents.

[0244] For example, the selection circuit 3Sb can also be configured to select three or more read heads RHD from a plurality of read heads RHD. In this case, the head amplifier IC130 may have three or more read amplifiers 3R, including read amplifiers 3R1 and 3R2. The read channel 14R2 may have three or more processing circuits 4PC, including a first processing circuit 4PC1 and a second processing circuit 4PC2. Thus, since data from three or more recording layers L can be read simultaneously, defects on the disk DK can be detected more efficiently.

[0245] The above-mentioned technology is not limited to hybrid recording type disk devices, but can also be applied to watt-type recording type disk devices, as well as conventional recording type disk devices.

Claims

1. A disk drive, comprising: Multiple recording layers are set on the same disk or different disks, and have a first recording layer and a second recording layer; Multiple write heads, including a first write head for writing data to the first recording layer and a second write head for writing data to the second recording layer; Multiple read heads, including a first read head for reading data from the first recording layer and a second read head for reading data from the second recording layer; The selection circuit, connected to the plurality of read heads, is capable of selecting two or more read heads from the plurality of read heads; Read the object selection section; The read processing unit is capable of performing read processing to read data from each of the recording layers; as well as Testing Department When the first recording layer and the second recording layer are selected in the read object selection section, The read processing unit controls the drive of the selection circuit, causing the selection circuit to select the first read head and the second read head, and simultaneously read data from the first recording layer and the second recording layer via the selection circuit. The detection unit detects the state of the first recording layer and the state of the second recording layer based on the signals read by the first reading head and the signals read by the second reading head.

2. The disk drive according to claim 1, The data in the first recording layer and the data in the second recording layer are each bit data whose code arrangement is simpler than that of user data.

3. The disk drive according to claim 1, It also has a management department. Each of the recording layers has a plurality of data tracks arranged in the radial direction of the disk. Each of the data tracks has a plurality of data sectors arranged in the circumferential direction of the disk. When the detection unit detects a defect in the first recording layer, The management unit manages the information of the region with the defect in the first recording layer, and determines one or more data sectors located in the region with the defect as abnormal sectors, and excludes each abnormal sector from the write processing and read processing of the written data.

4. The disk drive according to claim 1, It also includes a first read channel, which has multiple processing circuits connected to the selection circuit, including a first processing circuit and a second processing circuit. When the first recording layer and the second recording layer are selected in the read object selection section, The first processing circuit processes the signal read by the first reading head and outputs a first processed signal with reduced noise components. The second processing circuit processes the signal read by the second reading head and outputs a second processed signal with reduced noise components. The detection unit detects the state of the first recording layer and the state of the second recording layer based on the first processing signal and the second processing signal.

5. The disk drive according to claim 1, further comprising: Multiple arms, including a first arm; Actuators that move the plurality of arms; The second read channel, connected to the selection circuit, has a processing circuit for two-dimensional magnetic recording technology; and The write processing unit is capable of performing write processing on the data to be written to each of the recording layers. The plurality of read heads also includes a third read head that is supported by the first arm together with the first read head and reads data from the first recording layer. The first recording layer has a first data track. The write processing unit uses the first write head to write user data to the first data track. When the read target selection unit selects the first data track of the first recording layer... The read processing unit, The actuator is driven to control the first and third read heads to perform a track-seeking action, moving them to positions opposite to the first data track. The selection circuit is controlled to select the first read head and the third read head, and the user data of the first data track is read independently via the selection circuit. The processing circuit synthesizes and processes the signals read by the first reading head and the third reading head, and outputs a synthesized processed signal with reduced noise components.

6. The disk drive according to claim 1, further comprising: Multiple arms, including a first arm and a second arm; Actuators that cause the plurality of arms to move in the same manner; and The write processing unit is capable of performing write processing on the data to be written to each of the recording layers. The first arm supports the first write head and the first read head. The second arm supports the second write head and the second read head. The first recording layer has a first data track. The second recording layer has a second data track. The write processing unit uses the first write head to write data to the first data track, and uses the second write head to write data to the second data track. When the read object selection unit selects the first data track of the first recording layer and the second data track of the second recording layer, The read processing unit, The actuator is driven to control the first and second read heads to perform a track-seeking action, causing the first read head to move to a position opposite to the first data track, and the second read head to move to a position opposite to the second data track. The selection circuit is controlled to select both the first and second read heads, and the data from the first and second data tracks is read simultaneously via the selection circuit. The detection unit detects the state of the first data track and the state of the second data track based on the signals read by the first read head and the second read head. When the first direction, which is parallel to the radial direction of the disk and extends from the outer periphery to the inner periphery, is set as positive, During the process of writing data to the first data track using the first write head When the position of the first read head in the radial direction of the disk is set as the reference position, the first offset, which is the distance from the first write head to the first read head in the first direction, is set as Cm, the second offset, which is the distance from the second write head to the second read head in the first direction, is set as Cn, the third offset, which is the distance from the first read head to the second read head in the first direction, is set as C(m,n), and the offset correction amount calculated according to -Cm+Cn+C(m,n) is set as ΔCR, When writing data to the second data track using the second write head... The write processing unit causes the second read head to shift ΔCR from the reference position toward the first direction, so that the second write head is opposite to the second data track.

7. The disk drive according to claim 6, further comprising: The gating generation department generates and reads gating options; and The gating detection unit, upon detecting that the read gating is valid, causes the read processing unit to perform read processing. The first read head and the second read head travel above the first data track and the second data track, respectively, in a direction of travel along the circumference of the disk. The first data track and the second data track each have multiple servo regions and multiple data regions arranged alternately in the circumferential direction. In the first data track, the plurality of servo regions include a first servo region and a second servo region, and the plurality of data regions include the first data region which follows the first servo region and precedes the second servo region in the direction of travel. In the second data track, the plurality of servo regions include a third servo region and a fourth servo region, and the plurality of data regions include a second data region that follows the third servo region and precedes the fourth servo region in the direction of travel. The third servo region among the plurality of servo regions of the second data track is the servo region that the second read head is closest to when the first read head is opposite the first servo region. When the timing of the first read head passing through the last position of the first servo region of the first data track is set as the first timing, the timing of the second read head passing through the last position of the third servo region of the second data track is set as the second timing, and the correction period, which is the time interval between the first timing and the second timing, is set as ΔTR, If the second timing is later than the first timing, the gating generation unit enables the read gating at the first timing, maintains the read gating in an enabled state at a third timing when the first read head passes the beginning of the second servo region of the first data track, and disables the read gating at a fourth timing after ΔTR has elapsed from the third timing. When the second timing coincides with the first timing, the gating generation unit enables the read gating at the first timing and disables the read gating at the third timing. If the second timing is earlier than the first timing, the gating generation unit enables the read gating at a fifth timing ΔTR earlier than the first timing, maintains the read gating in an enabled state at the first timing, and switches the read gating to invalid at the third timing.

8. The disk drive according to claim 1, It also has a management department. Each of the recording layers has a plurality of data tracks arranged in the radial direction of the disk. Each of the data tracks has a plurality of data sectors arranged in the circumferential direction of the disk. If the width of each data track in the radial direction is defined as the track width, and the length of each data sector in the circumferential direction is defined as the sector length, then... When the detection unit detects a defect in the first recording layer, The management department manages information about the areas where the defects exist in the radial direction using a reference width with a resolution higher than the track width, and in the circumferential direction using a reference length with a resolution higher than the sector length.

9. The disk drive according to claim 1, It also includes a write processing unit, which is capable of performing write processing on the data to be written to each of the recording layers. Each of the recording layers has a plurality of data tracks arranged in the radial direction of the disk. The write processing unit, A watt-type recording method capable of selectively overwriting data from the first data track of the first recording layer to the data of the third data track in a first overwrite direction parallel to the radial direction, and... A watt-type recording method capable of selectively overwriting data of the second data track of the second recording layer into the fourth data track in a second overwrite direction parallel to the radial direction.

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