MMC sub-module and voltage-sharing control method thereof
By designing a parallel structure and switch combination unit for the MMC submodule, the problem that the control strategy of the MMC submodule in the photovoltaic-storage integrated system is difficult to take into account both the power output characteristics of new energy and DC fault suppression is solved, thereby improving fault tolerance and reducing power loss.
Patent Information
- Application Number
- CN202511856742.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-10
- Publication Date
- 2026-03-03
AI Technical Summary
In existing integrated photovoltaic and energy storage systems, the control strategy of the MMC submodule is difficult to take into account the characteristics of new energy output, and DC fault suppression is difficult, resulting in system safety, reliability and power loss problems.
Design an MMC submodule including an energy storage unit, a module capacitor bank and a switch combination unit. It stores or releases electrical energy through a parallel structure, realizes bidirectional current switching and multi-level output, and generates a reverse voltage to offset the fault electromotive force during DC faults, thus blocking the fault propagation.
It improves the fault tolerance of the photovoltaic-storage integrated converter, reduces power loss, and enhances the safety, reliability, and power output characteristics of the system.
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Figure CN121602831A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of converter technology, and in particular to an MMC submodule and its voltage equalization control method. Background Technology
[0002] Integrated photovoltaic (PV) and energy storage systems, combining photovoltaic power generation and battery energy storage, are an indispensable component for ensuring a balance between power supply and demand. DC / AC converters are the core equipment ensuring the normal operation of these systems, typically employing a two-level topology. However, with the gradual increase in PV power generation capacity and voltage levels, PV-energy storage converters based on two-level topologies require cascading multiple DC / AC energy conversion units. This results in high harmonic content and losses in the PV-energy storage converter's output voltage, and a failure in a single energy conversion unit can cause the entire converter to malfunction, hindering the safe and reliable operation of the integrated PV-energy storage system. Modular multilevel converters (MMCs), with their advantages of good output characteristics, low switching losses, and ease of modular redundancy design, can be applied in integrated PV-energy storage systems. Furthermore, the modular design of MMCs makes it possible to distribute energy storage units within the integrated PV-energy storage system, significantly reducing the requirements for battery voltage levels and capacity. However, currently, there are relatively few MMC sub-modules suitable for integrated PV-energy storage converters, their control strategies struggle to accommodate the characteristics of new energy output, and DC fault suppression is difficult. Summary of the Invention
[0003] This invention provides an MMC submodule and its voltage equalization control method, which is applicable to photovoltaic-storage integrated converters. It can take into account the output characteristics of new energy sources and has DC fault interruption capability, thereby improving the fault tolerance capability of photovoltaic-storage integrated converters and effectively reducing uneven power loss.
[0004] To achieve the above objectives, embodiments of the present invention provide an MMC submodule, including: Energy storage unit, modular capacitor bank and switch combination unit; The energy storage unit and the module capacitor bank are connected in parallel to store or release excess electrical energy generated by photovoltaic power generation. The switch combination unit is used to realize bidirectional current switching and adapt to multi-level output; The module capacitor bank and the switch combination unit are used to generate a reverse voltage to counteract the electromotive force of the DC fault in the event of a DC fault, thereby blocking the spread of the fault.
[0005] As an improvement to the above solution, the switch combination unit includes: First switching transistor, second switching transistor, third switching transistor, fourth switching transistor, fifth switching transistor, sixth switching transistor, first diode, second diode, third diode, fourth diode, fifth diode, sixth diode; The fourth and fifth switching transistors are combined to form a reverse-resistance type switching transistor. The first interface is connected to the emitter of the first switching transistor and the collector of the second switching transistor; the emitter and collector of the first switching transistor are connected to the two ends of the first diode; the emitter and collector of the second switching transistor are connected to the two ends of the second diode; the collector of the first switching transistor is connected to one end of the energy storage unit, the module capacitor bank, and the fifth diode; the other end of the fifth diode is connected to the energy storage unit, the module capacitor bank, and the emitter of the sixth switching transistor; the emitter and collector of the sixth switching transistor are connected to the two ends of the sixth diode; the collector of the sixth switching transistor is connected to the second interface. The fourth diode has one end connected to the port, the emitter of the fourth switching transistor, and the collector of the fifth switching transistor; the other end of the fourth diode is connected to the energy storage unit, the module capacitor bank, and the collector of the third switching transistor; the emitter and collector of the third switching transistor are connected to the two ends of the third diode; the emitter of the third switching transistor is connected to the energy storage unit, the module capacitor bank, the emitter of the second switching transistor, the collector of the fourth switching transistor, and the emitter of the fifth switching transistor; the collector of the fourth switching transistor is connected to the emitter of the fifth switching transistor, and the emitter of the fourth switching transistor is connected to the collector of the fifth switching transistor.
[0006] As an improvement to the above solution, the energy storage unit includes a first energy storage battery pack and a second energy storage battery pack; The module capacitor bank includes a first capacitor and a second capacitor; Wherein, one end of the first energy storage battery pack is connected to the collector of the first switching transistor, the first capacitor and one end of the fifth diode respectively; the other end of the first energy storage battery pack is connected to the other end of the first capacitor, the collector of the first switching transistor, the second switching transistor, the third switching transistor and the emitter of the fifth switching transistor respectively; One end of the second energy storage battery pack is connected to the collector of the third switch, the second capacitor, and one end of the fourth diode, respectively; the other end of the second energy storage battery pack is connected to the emitter of the sixth switch, the second capacitor, and the other end of the fifth diode, respectively.
[0007] As an improvement to the above solution, the switch combination unit has four switching states, enabling the MMC submodule to output three levels, including: First switching state: the first and third switching transistors are off, and the second, fourth, fifth, and sixth switching transistors are on, so that the first capacitor and the second capacitor are both bypassed, and the MMC submodule outputs a voltage of 0. Second switching state: The second and third switches are off, while the first, fourth, fifth, and sixth switches are on, causing the first capacitor to be connected in series in the circuit, and the second capacitor to be bypassed. The MMC submodule outputs a voltage of [voltage value missing]. ; Third switching state: The first and fourth switches are off, while the second, third, fifth, and sixth switches are on, causing the first capacitor to be bypassed. The second capacitor is connected in series in the circuit. The MMC submodule outputs a voltage of... ; Fourth switching state: The second and fourth switches are off, while the first, third, fifth, and sixth switches are on, causing both the first and second capacitors to be connected in series in the circuit. The MMC submodule outputs a voltage of... .
[0008] As an improvement to the above scheme, the first, second, third, fourth, fifth, and sixth switching transistors are all IGBTs.
[0009] As an improvement to the above scheme, the fourth and fifth diodes are clamping diodes.
[0010] To achieve the above objectives, embodiments of the present invention also provide an MMC submodule voltage equalization control method, comprising: When the switching cycle begins, the instantaneous value of the output voltage of the MMC converter at the current moment is detected, and the total number of module capacitors that need to be put into the bridge arm of the MMC converter is calculated based on the instantaneous value. Based on the output level of the MMC sub-module, the MMC sub-modules in the MMC converter are grouped, and the number of MMC sub-modules in each group is calculated based on the total number of module capacitors. The external and internal voltages of the MMC submodules contained in the bridge arm are sorted to obtain the external voltage order and internal voltage order of the MMC submodules. Based on the number of each group of MMC sub-modules, the current direction of the bridge arm, the external voltage sequence, and the internal voltage sequence, the MMC sub-modules that need to be put into the bridge arm are determined in order to achieve voltage equalization control of the MMC sub-modules.
[0011] As an improvement to the above scheme, the step of grouping the MMC submodules in the MMC converter according to the output level of the MMC submodule, and calculating the number of MMC submodules in each group according to the total number of module capacitors, includes: Based on the output level of the MMC submodule, the MMC submodules in the MMC converter are divided into three groups, and the output of all MMC submodules in the first group is set to... The output of all MMC submodules in the second group The third group of all MMC submodules outputs 0; The number of MMC submodules in each group is calculated based on the total number of module capacitors and the total number of MMC submodules in the MMC converter.
[0012] As an improvement to the above scheme, the external voltage of the MMC submodule is the sum of the capacitor voltages contained in the MMC submodule; the internal voltage of the MMC submodule is the voltage of each capacitor contained in the MMC submodule.
[0013] As an improvement to the above solution, the step of determining the MMC submodules to be engaged in each bridge arm based on the number of each group of MMC submodules, the current direction of the bridge arm, the external voltage sequence, and the internal voltage sequence, in order to achieve voltage equalization control of the MMC submodules, includes: If the current direction of the bridge arm is positive and the number of the second group of MMC sub-modules is 1, according to the external voltage order and internal voltage order, the target capacitor with the smallest internal voltage in the MMC sub-module with the smallest external voltage in the second group of MMC sub-modules at the current moment is put in; according to the number of the first group of MMC sub-modules, all capacitors in the first group of MMC sub-modules with the smallest external voltage are then put in. If the current direction of the bridge arm is positive and the number of the second group of MMC sub-modules is 0, according to the number of the first group of MMC sub-modules, put all the capacitors in the first group of MMC sub-modules with the smallest external voltage into the bridge arm. If the current direction of the bridge arm is negative and the number of the second group of MMC sub-modules is 1, according to the external voltage order and internal voltage order, put in the target capacitor with the largest internal voltage in the MMC sub-module with the largest external voltage in the second group of MMC sub-modules at the current moment; according to the number of the first group of MMC sub-modules, put in all the capacitors in the first group of MMC sub-modules with the largest external voltage. If the current direction of the bridge arm is negative and the number of the second group of MMC sub-modules is 0, according to the number of the first group of MMC sub-modules, all capacitors in the first group of MMC sub-modules with the largest external voltage are connected to achieve voltage equalization control of the MMC sub-modules.
[0014] Compared with existing technologies, this invention discloses an MMC submodule and its voltage equalization control method, including an energy storage unit, a module capacitor bank, and a switch combination unit. The energy storage unit and the module capacitor bank are connected in parallel to store or release excess electrical energy generated by photovoltaic power generation. The switch combination unit is used to realize bidirectional current switching and adapt to multi-level output. The module capacitor bank and the switch combination unit are used to generate a reverse voltage to offset the electromotive force of the DC fault during a DC fault, thereby blocking the fault propagation. This invention is suitable for photovoltaic-storage integrated converters, can take into account the power output characteristics of new energy sources, and has DC fault blocking capability, thereby improving the fault tolerance of photovoltaic-storage integrated converters and effectively reducing uneven power loss. Attached Figure Description
[0015] Figure 1 This is a structural block diagram of an MMC submodule provided in an embodiment of the present invention; Figure 2 This is a circuit schematic diagram of an MMC submodule provided in an embodiment of the present invention; Figure 3 This is a flowchart illustrating a voltage equalization control method for an MMC submodule provided in an embodiment of the present invention; Figure 4 This is a flowchart of an MMC submodule voltage equalization control method provided in an embodiment of the present invention. Detailed Implementation
[0016] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0017] It should be noted that the terms "comprising" and "specific" in this invention, and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units that are explicitly listed, but may include other steps or units that are not explicitly listed or that are inherent to such process, method, product, or device.
[0018] Please see Figure 1 , Figure 1 This is a structural block diagram of an MMC submodule provided in an embodiment of the present invention. The MMC submodule includes: Energy storage unit 11, modular capacitor bank 12 and switch combination unit 13; The energy storage unit 11 and the module capacitor bank 12 are connected in parallel to store or release excess electrical energy generated by photovoltaic power generation. The switch combination unit 13 is used to realize bidirectional current switching and adapt to multi-level output; The module capacitor bank 12 and the switch combination unit 13 are used to generate a reverse voltage to counteract the electromotive force of the DC fault when a DC fault occurs, so as to block the spread of the fault.
[0019] For example, the energy storage unit connected in parallel with the module capacitor bank can charge and discharge reasonably according to the capacitor voltage level. While maintaining the capacitor voltage stability, it can also absorb excess energy. When a DC fault occurs, the switch combination unit is locked. At this time, regardless of the current direction, it flows into the positive terminal of the module capacitor bank to charge the module capacitor bank, thus achieving the effect of fault blocking.
[0020] Specifically, the switch combination unit includes: First switching transistor, second switching transistor, third switching transistor, fourth switching transistor, fifth switching transistor, sixth switching transistor, first diode, second diode, third diode, fourth diode, fifth diode, sixth diode; The fourth and fifth switching transistors are combined to form a reverse-resistance type switching transistor. The first interface is connected to the emitter of the first switching transistor and the collector of the second switching transistor; the emitter and collector of the first switching transistor are connected to the two ends of the first diode; the emitter and collector of the second switching transistor are connected to the two ends of the second diode; the collector of the first switching transistor is connected to one end of the energy storage unit, the module capacitor bank, and the fifth diode; the other end of the fifth diode is connected to the energy storage unit, the module capacitor bank, and the emitter of the sixth switching transistor; the emitter and collector of the sixth switching transistor are connected to the two ends of the sixth diode; the collector of the sixth switching transistor is connected to the second interface. The fourth diode has one end connected to the port, the emitter of the fourth switching transistor, and the collector of the fifth switching transistor; the other end of the fourth diode is connected to the energy storage unit, the module capacitor bank, and the collector of the third switching transistor; the emitter and collector of the third switching transistor are connected to the two ends of the third diode; the emitter of the third switching transistor is connected to the energy storage unit, the module capacitor bank, the emitter of the second switching transistor, the collector of the fourth switching transistor, and the emitter of the fifth switching transistor; the collector of the fourth switching transistor is connected to the emitter of the fifth switching transistor, and the emitter of the fourth switching transistor is connected to the collector of the fifth switching transistor.
[0021] For example, such as Figure 2 As shown, Figure 2 This is a circuit schematic diagram of an MMC submodule provided in an embodiment of the present invention. Figure 2In the diagram, the first interface a is connected to the emitter of the first switching transistor T1 and the collector of the second switching transistor T2; the emitter and collector of the first switching transistor T1 are connected to the two ends of the first diode D1; the emitter and collector of the second switching transistor T2 are connected to the two ends of the second diode D2; the collector of the first switching transistor T1 is connected to one end of the energy storage unit, the module capacitor bank, and the fifth diode D5; the other end of the fifth diode D5 is connected to the energy storage unit, the module capacitor bank, and the emitter of the sixth switching transistor T6; the emitter and collector of the sixth switching transistor T6 are connected to the two ends of the sixth diode D6; and the collector of the sixth switching transistor T6 is connected to the second interface. One end of the fourth diode D4, the emitter of the fourth switch T4, and the collector of the fifth switch T5; the other end of the fourth diode D4 is connected to the energy storage unit, the module capacitor bank, and the collector of the third switch T3; the emitter and collector of the third switch T3 are connected to the two ends of the third diode D3; the emitter of the third switch T3 is connected to the energy storage unit, the module capacitor bank, the emitter of the second switch T2, the collector of the fourth switch T4, and the emitter of the fifth switch T5; the collector of the fourth switch T4 is connected to the emitter of the fifth switch T5, and the emitter of the fourth switch T4 and the collector of the fifth switch T5 are also connected.
[0022] Specifically, the energy storage unit includes a first energy storage battery pack and a second energy storage battery pack; The module capacitor bank includes a first capacitor and a second capacitor; Wherein, one end of the first energy storage battery pack is connected to the collector of the first switching transistor, the first capacitor and one end of the fifth diode respectively; the other end of the first energy storage battery pack is connected to the other end of the first capacitor, the collector of the first switching transistor, the second switching transistor, the third switching transistor and the emitter of the fifth switching transistor respectively; One end of the second energy storage battery pack is connected to the collector of the third switch, the second capacitor, and one end of the fourth diode, respectively; the other end of the second energy storage battery pack is connected to the emitter of the sixth switch, the second capacitor, and the other end of the fifth diode, respectively.
[0023] For example, such as Figure 2 As shown, Figure 2 In this context, the energy storage unit includes a first energy storage battery pack Bat1 and a second energy storage battery pack Bat2. The module capacitor bank includes a first capacitor C1 and a second capacitor C2; Wherein, one end of the first energy storage battery pack Bat1 is connected to the collector of the first switch transistor T1, the first capacitor C1 and one end of the fifth diode D5 respectively; the other end of the first energy storage battery pack Bat1 is connected to the other end of the first capacitor C1, the collector of the first switch transistor T1, the second switch transistor T2, the third switch transistor T3 and the emitter of the fifth switch transistor T5 respectively. One end of the second energy storage battery pack Bat2 is connected to the collector of the third switch transistor T3, the second capacitor C2, and one end of the fourth diode D4, respectively; the other end of the second energy storage battery pack Bat2 is connected to the emitter of the sixth switch transistor T6, the second capacitor C2, and the other end of the fifth diode D5, respectively.
[0024] For example, the MMC submodule includes four independent IGBT switching assemblies, two capacitors, two energy storage battery packs, two clamping diodes, and one reverse-resistance IGBT. The first, second, third, and sixth switching assemblies are all composed of IGBTs combined with anti-parallel diodes, a structure that enables these switching assemblies to conduct current bidirectionally and turn off unidirectionally. The reverse-resistance IGBT is composed of two IGBTs connected in anti-parallel, providing bidirectional current conduction and turn-off capabilities.
[0025] The emitter of IGBT (T1) in the first switching assembly is connected to the collector of IGBT (T2) in the second switching assembly, achieving the effect of two assemblies connected in series. Then, a first capacitor module (C1) is connected in parallel, with its positive terminal connected to the collector of IGBT (T1) and its negative terminal connected to the emitter of IGBT (T2). The emitter of IGBT (T3) in the third switching assembly is connected to the reverse-resistance IGBTs (T4, T5), and then anti-parallel to the first clamping diode (D4). That is, the cathode of the first clamping diode (D4) is connected to the collector of IGBT (T3) in the third switching assembly, and its anode is connected to the reverse-resistance IGBTs (T4, T5). The positive terminal of the second capacitor module (C2) is connected to the cathode of the first clamping diode (D4) and the collector of the IGBT (T3) in the third switching assembly, while the negative terminal is connected to the emitter of the IGBT (T6) in the sixth switching assembly. The collector of the IGBT (T6) in the sixth switching assembly is connected to the anode (D4) of the first clamping diode and the reverse-resistance IGBTs (T4, T5). The negative terminal of the first capacitor module (C1) is connected to the emitter of the IGBT (T3) in the third switching assembly and the reverse-resistance IGBTs (T4, T5). At the same time, the anode of the second clamping diode (D5) is connected to the emitter of the IGBT (T6) in the sixth switching assembly and the negative terminal of the second capacitor module (C2). The two energy storage battery packs are connected in parallel with the two capacitor modules to store or release excess electrical energy generated by photovoltaic power generation.
[0026] Meanwhile, this submodule has two external interfaces. The first interface a is connected to the emitter of IGBT (T1) in the first switching transistor assembly and the collector of IGBT (T2) in the second switching transistor assembly. The second interface b is connected to the collector of IGBT (T6) in the sixth switching transistor assembly, the anode of the first clamping diode (D4), and the reverse-resistance type IGBTs (T4, T5).
[0027] During normal operation of this topology, the voltage reference value of both capacitor modules is UC. This topology also determines that this submodule has four switching states and can output 0. , Three levels.
[0028] Specifically, the switch combination unit has four switching states, enabling the MMC submodule to output three levels, including: First switching state: the first and third switching transistors are off, and the second, fourth, fifth, and sixth switching transistors are on, so that the first capacitor and the second capacitor are both bypassed, and the MMC submodule outputs a voltage of 0. Second switching state: The second and third switches are off, while the first, fourth, fifth, and sixth switches are on, causing the first capacitor to be connected in series in the circuit, and the second capacitor to be bypassed. The MMC submodule outputs a voltage of [voltage value missing]. ; Third switching state: The first and fourth switches are off, while the second, third, fifth, and sixth switches are on, causing the first capacitor to be bypassed. The second capacitor is connected in series in the circuit. The MMC submodule outputs a voltage of... ; Fourth switching state: The second and fourth switches are off, while the first, third, fifth, and sixth switches are on, causing both the first and second capacitors to be connected in series in the circuit. The MMC submodule outputs a voltage of... .
[0029] For example, in switch state 1: T1 and T3 are off, and T2, T4, T5, and T6 are on, so that both the first capacitor and the second capacitor are bypassed and the external output voltage is 0. Switch state 2: T2 and T3 are off, T1, T4, T5 and T6 are on, so that the first capacitor is connected in series in the circuit, the second capacitor is bypassed, and the external output voltage is UC. Switch state 3: T1 and T4 are off, T2, T3, T5 and T6 are on, which bypasses the first capacitor and connects the second capacitor in series in the circuit, and the output voltage is UC. Switch state 4: T2 and T4 are off, T1, T3, T5, and T6 are on, so that the first capacitor and the second capacitor are connected in series in the circuit, and the external output voltage is 2UC.
[0030] Specifically, the first, second, third, fourth, fifth, and sixth switching transistors are all IGBTs.
[0031] Specifically, the fourth and fifth diodes are clamping diodes.
[0032] This invention discloses an MMC submodule, comprising an energy storage unit, a module capacitor bank, and a switch combination unit. The energy storage unit and the module capacitor bank are connected in parallel for storing or releasing excess electrical energy generated by photovoltaic power generation. The switch combination unit is used to achieve bidirectional current switching and adapt to multi-level output. The module capacitor bank and the switch combination unit are used to generate a reverse voltage to offset the electromotive force of the DC fault during a DC fault, thereby blocking fault propagation. This is suitable for photovoltaic-storage integrated converters, taking into account the power output characteristics of new energy sources and possessing DC fault blocking capability, thus improving the fault tolerance of the photovoltaic-storage integrated converter and effectively reducing uneven power loss. The topology of this MMC submodule allows both capacitor modules contained in the submodule of the photovoltaic-storage converter to be charged during a DC fault. They are connected in series in the fault circuit to provide a back electromotive force to suppress the fault current, improving the safe and reliable operation of the entire photovoltaic-storage integrated system.
[0033] See Figure 3 , Figure 3 This is a flowchart illustrating an MMC submodule voltage equalization control method provided in an embodiment of the present invention. The MMC submodule voltage equalization control method includes: S1, When the switching cycle begins, detect the instantaneous value of the output voltage of the MMC converter at the current moment, and calculate the total number of module capacitors that need to be put into the bridge arm of the MMC converter based on the instantaneous value. S2, group the MMC submodules in the MMC converter according to the output level of the MMC submodule, and calculate the number of MMC submodules in each group according to the total number of module capacitors; S3, sort the external voltage and internal voltage of the MMC sub-modules contained in the bridge arm to obtain the external voltage order and internal voltage order of the MMC sub-modules; S4. Based on the number of each group of MMC sub-modules, the current direction of the bridge arm, the external voltage sequence, and the internal voltage sequence, determine the MMC sub-modules that need to be put into the bridge arm to achieve voltage equalization control of the MMC sub-modules.
[0034] For example, at the beginning of a switching cycle, the instantaneous value of the converter output voltage at a certain moment is detected, and the value is substituted into formulas (1)-(3) to obtain the number of module capacitors that need to be put into the bridge arm. .
[0035] (1) (2) (3) In the formula, The number of module capacitors to be connected to the lower bridge arm; This is the nearest integer function; This is the DC side voltage; The modulation ratio reflects the matching relationship between the modulating signal and the DC-side voltage. For modulated waves, The phase corresponding to the modulated wave. The angular frequency of the modulated wave. For time; This indicates the number of module capacitors connected to the upper bridge arm; This represents the total number of module capacitors required for the bridge arm.
[0036] Specifically, step S2 includes: S21, based on the output level of the MMC submodule, divide the MMC submodules in the MMC converter into three groups, and set the output of all MMC submodules in the first group to be... The output of all MMC submodules in the second group The third group of all MMC submodules outputs 0; S22, calculate the number of each group of MMC submodules based on the total number of module capacitors and the total number of MMC submodules in the MMC converter.
[0037] For example, the submodules in the MMC converter are defined as three groups, with all submodules in one group outputting... The output of all submodules in the second group All submodules in the three groups output 0. The number of submodules in these three groups are respectively , , Calculate their values separately.
[0038] (4) (5) (6) In the formula, for Half of; for The remainder obtained by dividing by 2; This represents the number of remaining submodules. This represents the total number of submodules in the MMC converter.
[0039] Specifically, the external voltage of the MMC submodule is the sum of the capacitor voltages contained in the MMC submodule; the internal voltage of the MMC submodule is the voltage of each capacitor contained in the MMC submodule.
[0040] Specifically, step S4 includes: S41, if the current direction of the bridge arm is positive and the number of the second group of MMC sub-modules is 1, according to the external voltage order and internal voltage order, put in the target capacitor with the smallest internal voltage in the MMC sub-module with the smallest external voltage in the second group of MMC sub-modules at the current moment; according to the number of the first group of MMC sub-modules, put in all the capacitors in the first group of MMC sub-modules with the smallest external voltage. S42, if the current direction of the bridge arm is positive and the number of the second group of MMC sub-modules is 0, according to the number of the first group of MMC sub-modules, put all the capacitors in the first group of MMC sub-modules with the smallest external voltage into the bridge arm. S43, if the current direction of the bridge arm is negative and the number of the second group of MMC sub-modules is 1, according to the external voltage order and internal voltage order, put in the target capacitor with the largest internal voltage in the MMC sub-module with the largest external voltage in the second group of MMC sub-modules at the current moment; according to the number of the first group of MMC sub-modules, put in all the capacitors in the first group of MMC sub-modules with the largest external voltage. S44, if the current direction of the bridge arm is negative and the number of the second group of MMC sub-modules is 0, according to the number of the first group of MMC sub-modules, put in all the capacitors of the first group of MMC sub-modules with the largest external voltage to achieve voltage equalization control of the MMC sub-modules.
[0041] For example, the direction of the current in the bridge arm is determined, and the voltages of the two capacitors in each submodule are added together to obtain the external capacitor voltage of the submodule; the voltages of the two capacitors inside the submodule are the internal capacitor voltages of the submodule. The external and internal capacitor voltages of the submodules contained in the bridge arm are sorted respectively. If the current direction of the bridge arm is positive, The algorithm is set to 1. By sorting the voltages of the internal and external capacitors within the submodule, the submodule with the lowest external voltage at that moment is selected, and the capacitor with the lowest voltage within that submodule is connected. Then, the remaining submodules with the lowest external voltages are selected... Each submodule has all its capacitors connected. If the current direction is positive, The value is 0, directly setting the external voltage to the minimum. All capacitors in each submodule are connected. If the current direction is negative... If the value is 1, the submodule with the highest external voltage at that moment is selected by sorting the internal and external capacitor voltages of the submodule, and the capacitor with the highest voltage in that submodule is identified and connected; then the remaining submodules with the highest external voltages are selected. For each submodule, connect all its capacitors. If the current direction is negative... The value is 0; directly apply the maximum external voltage. All capacitors in each submodule are connected.
[0042] like Figure 4 As shown, Figure 4 This is a flowchart of an MMC submodule voltage equalization control method provided in this embodiment of the invention. Based on parameters such as the current system voltage and modulation ratio, the total number of capacitors to be connected is calculated. The current direction is determined. If the current direction is positive, the external voltages (overall voltages of all submodules) are sorted, and then the internal voltages (the individual voltages of C1 and C2) of each submodule are sorted. After sorting the voltages, the value of K2 is determined. If the current direction is positive, and... If the value is 0, select the one with the lowest external voltage. For each sub-module, both capacitors of each module are connected. Instead of using half-power modules, the module with the lower voltage is directly connected at full power, charging its capacitors and achieving external balancing. If the current direction is positive, and... If the value is 1, first select the submodule with the lowest external voltage, then select the capacitor with the lowest internal voltage within that submodule and connect it individually; then select the capacitor with the lowest external voltage. For each submodule, connect both of its capacitors; first process internal balancing (charge the internal capacitor with the lowest voltage), then process external balancing (charge the external module with the lowest voltage). If the current direction is negative, similarly, first balance the external voltage of the submodule, then balance its internal voltage. If the current direction is negative, and... If the value is 0, directly select the external voltage with the highest value. For each sub-module, both capacitors of each module are connected. Instead of using half-power modules, directly select the module with the higher voltage and connect it at full power, allowing these higher-voltage capacitors to discharge and achieving external balancing. If the current direction is negative, and... If the value is 1, first select the submodule with the highest external voltage, then select the capacitor with the highest internal voltage within that submodule and connect it individually; then select the submodule with the highest external voltage... For each submodule, put both of their capacitors into operation, first process the internal balancing (discharge the internal capacitor with the higher voltage), then process the external balancing (discharge the external module with the higher voltage).
[0043] The MMC submodule voltage equalization control method provided in this embodiment of the invention reduces the computational burden on the controller, extends the lifespan of the controller, and enables the system to operate continuously for a long time.
[0044] The above description represents the preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications are also considered to be within the scope of protection of the present invention.
Claims
1. An MMC submodule, characterized in that, include: Energy storage unit, modular capacitor bank and switch combination unit; The energy storage unit and the module capacitor bank are connected in parallel to store or release excess electrical energy generated by photovoltaic power generation. The switch combination unit is used to realize bidirectional current switching and adapt to multi-level output; The module capacitor bank and the switch combination unit are used to generate a reverse voltage to counteract the electromotive force of the DC fault in the event of a DC fault, thereby blocking the spread of the fault.
2. The MMC submodule as described in claim 1, characterized in that, The switch combination unit includes: First switching transistor, second switching transistor, third switching transistor, fourth switching transistor, fifth switching transistor, sixth switching transistor, first diode, second diode, third diode, fourth diode, fifth diode, sixth diode; The fourth and fifth switching transistors are combined to form a reverse-resistance type switching transistor. The first interface is connected to the emitter of the first switching transistor and the collector of the second switching transistor; the emitter and collector of the first switching transistor are connected to the two ends of the first diode; the emitter and collector of the second switching transistor are connected to the two ends of the second diode; the collector of the first switching transistor is connected to one end of the energy storage unit, the module capacitor bank, and the fifth diode; the other end of the fifth diode is connected to the energy storage unit, the module capacitor bank, and the emitter of the sixth switching transistor; the emitter and collector of the sixth switching transistor are connected to the two ends of the sixth diode; the collector of the sixth switching transistor is connected to the second interface. The fourth diode has one end connected to the port, the emitter of the fourth switching transistor, and the collector of the fifth switching transistor; the other end of the fourth diode is connected to the energy storage unit, the module capacitor bank, and the collector of the third switching transistor; the emitter and collector of the third switching transistor are connected to the two ends of the third diode; the emitter of the third switching transistor is connected to the energy storage unit, the module capacitor bank, the emitter of the second switching transistor, the collector of the fourth switching transistor, and the emitter of the fifth switching transistor; the collector of the fourth switching transistor is connected to the emitter of the fifth switching transistor, and the emitter of the fourth switching transistor is connected to the collector of the fifth switching transistor.
3. The MMC submodule as described in claim 2, characterized in that, The energy storage unit includes a first energy storage battery pack and a second energy storage battery pack; The module capacitor bank includes a first capacitor and a second capacitor; Wherein, one end of the first energy storage battery pack is connected to the collector of the first switching transistor, the first capacitor and one end of the fifth diode respectively; the other end of the first energy storage battery pack is connected to the other end of the first capacitor, the collector of the first switching transistor, the second switching transistor, the third switching transistor and the emitter of the fifth switching transistor respectively; One end of the second energy storage battery pack is connected to the collector of the third switch, the second capacitor, and one end of the fourth diode, respectively; the other end of the second energy storage battery pack is connected to the emitter of the sixth switch, the second capacitor, and the other end of the fifth diode, respectively.
4. The MMC submodule as described in claim 3, characterized in that, The switch combination unit has four switching states, enabling the MMC submodule to output three levels, including: First switching state: the first and third switching transistors are off, and the second, fourth, fifth, and sixth switching transistors are on, so that the first capacitor and the second capacitor are both bypassed, and the MMC submodule outputs a voltage of 0. Second switching state: The second and third switches are off, while the first, fourth, fifth, and sixth switches are on, causing the first capacitor to be connected in series in the circuit, and the second capacitor to be bypassed. The MMC submodule outputs a voltage of [voltage value missing]. ; Third switching state: The first and fourth switches are off, while the second, third, fifth, and sixth switches are on, causing the first capacitor to be bypassed. The second capacitor is connected in series in the circuit. The MMC submodule outputs a voltage of... ; Fourth switching state: The second and fourth switches are off, while the first, third, fifth, and sixth switches are on, causing both the first and second capacitors to be connected in series in the circuit. The MMC submodule outputs a voltage of... .
5. The MMC submodule as described in claim 2, characterized in that, The first, second, third, fourth, fifth, and sixth switching transistors are all IGBTs.
6. The MMC submodule as described in claim 2, characterized in that, The fourth and fifth diodes are clamping diodes.
7. A voltage equalization control method for an MMC submodule, characterized in that, include: When the switching cycle begins, the instantaneous value of the output voltage of the MMC converter at the current moment is detected, and the total number of module capacitors that need to be put into the bridge arm of the MMC converter is calculated based on the instantaneous value. Based on the output level of the MMC sub-module, the MMC sub-modules in the MMC converter are grouped, and the number of MMC sub-modules in each group is calculated based on the total number of module capacitors. The external and internal voltages of the MMC submodules contained in the bridge arm are sorted to obtain the external voltage order and internal voltage order of the MMC submodules. Based on the number of each group of MMC sub-modules, the current direction of the bridge arm, the external voltage sequence, and the internal voltage sequence, the MMC sub-modules that need to be put into the bridge arm are determined in order to achieve voltage equalization control of the MMC sub-modules.
8. The MMC submodule voltage equalization control method as described in claim 7, characterized in that, The step of grouping the MMC submodules in the MMC converter according to the output level of the MMC submodule, and calculating the number of MMC submodules in each group according to the total number of module capacitors, includes: Based on the output level of the MMC submodule, the MMC submodules in the MMC converter are divided into three groups, and the output of all MMC submodules in the first group is set to... The output of all MMC submodules in the second group The third group of all MMC submodules outputs 0; The number of MMC submodules in each group is calculated based on the total number of module capacitors and the total number of MMC submodules in the MMC converter.
9. The MMC submodule voltage equalization control method as described in claim 7, characterized in that, The external voltage of the MMC submodule is the sum of the capacitor voltages contained in the MMC submodule; the internal voltage of the MMC submodule is the voltage of each capacitor contained in the MMC submodule.
10. The MMC submodule voltage equalization control method as described in claim 8, characterized in that, The step of determining the MMC submodules to be engaged in each bridge arm based on the number of each group of MMC submodules, the current direction of each bridge arm, the external voltage sequence, and the internal voltage sequence, in order to achieve voltage equalization control of the MMC submodules, includes: If the current direction of the bridge arm is positive and the number of the second group of MMC sub-modules is 1, according to the external voltage order and internal voltage order, the target capacitor with the smallest internal voltage in the MMC sub-module with the smallest external voltage in the second group of MMC sub-modules at the current moment is put in; according to the number of the first group of MMC sub-modules, all capacitors in the first group of MMC sub-modules with the smallest external voltage are then put in. If the current direction of the bridge arm is positive and the number of the second group of MMC sub-modules is 0, according to the number of the first group of MMC sub-modules, put all the capacitors in the first group of MMC sub-modules with the smallest external voltage into the bridge arm. If the current direction of the bridge arm is negative and the number of the second group of MMC sub-modules is 1, according to the external voltage order and internal voltage order, put in the target capacitor with the largest internal voltage in the MMC sub-module with the largest external voltage in the second group of MMC sub-modules at the current moment; according to the number of the first group of MMC sub-modules, put in all the capacitors in the first group of MMC sub-modules with the largest external voltage. If the current direction of the bridge arm is negative and the number of the second group of MMC sub-modules is 0, according to the number of the first group of MMC sub-modules, all capacitors in the first group of MMC sub-modules with the largest external voltage are connected to achieve voltage equalization control of the MMC sub-modules.