High-anti-interference controller PCB layout structure for electric power steering system
By employing a layered, partitioned, and signal-isolated PCB layout design, the electromagnetic interference and signal crosstalk issues in the electric power steering system are resolved, improving the controller's control accuracy and reliability, and meeting stringent EMC testing standards.
Patent Information
- Application Number
- CN202511986311.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-26
- Publication Date
- 2026-03-03
AI Technical Summary
The existing EPS controller PCB layout of electric power steering systems suffers from problems such as rampant ground noise, signal crosstalk, mixed layout, and insufficient decoupling, which leads to decreased control accuracy and reduced system reliability.
The PCB layout structure adopts a layered and partitioned design with single-point grounding and signal isolation, including single-point discharge of high-frequency switching circuits, keeping analog signals away from digital signals, distributed decoupling of MCU power supply, complete isolation between power ground and signal ground, and layered arrangement of inverter bridge signals.
It significantly improves the accuracy of current and voltage sampling, prevents signal crosstalk, reduces electromagnetic interference in the system, meets stringent EMC testing standards, and improves the control accuracy and reliability of the controller.
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Figure CN121604265A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of automotive electronics technology, specifically relating to a PCB layout structure for a high interference immunity controller for an electric power steering system. Background Technology
[0002] Electric power steering (EPS) systems process torque and vehicle speed signals in real time through an electronic controller, which then drives the electric motor to provide auxiliary steering torque. Its core EPS controller is a complex system integrating high-frequency digital circuits, precision analog sampling circuits, and high-current power drive circuits. The coexistence of these circuits within a limited PCB space can easily lead to serious electromagnetic interference problems.
[0003] Existing EPS controller PCB layouts typically suffer from the following drawbacks: 1. Excessive ground noise: Noise from the high-frequency switching power supply and MCU is conducted to the sensitive analog sampling circuit through the ground plane, causing distortion of current and voltage sampling values, which directly affects the accuracy of torque control.
[0004] 2. Signal crosstalk: The drastic voltage changes generated by the rapid switching of the inverter bridge are coupled to the adjacent drive and feedback signal lines through parasitic capacitance, which may cause fatal faults such as MOSFET false turn-on and bridge arm shoot-through.
[0005] 3. Mixed layout: The power ground and signal ground are not truly isolated, or the isolation point is not properly selected, forming a ground loop, which becomes an antenna for both radiated and conducted emissions.
[0006] 4. Insufficient decoupling: The MCU power supply decoupling capacitors are not arranged properly and fail to effectively filter out high-frequency noise, resulting in unstable MCU operation or decreased ADC sampling accuracy.
[0007] These defects directly lead to problems such as poor steering feel, high noise, and reduced reliability of EPS systems in harsh electromagnetic environments.
[0008] Therefore, a PCB layout structure is needed to solve the aforementioned technical problems of control accuracy and system reliability caused by electromagnetic interference and signal crosstalk. Summary of the Invention
[0009] This invention provides the following technical solution: a PCB layout structure for a high anti-interference controller in an electric power steering system, wherein the PCB is a multi-layer board, and the PCB layout structure includes: The power ground loop of the high-frequency switching circuit is directly connected to the ground terminal of the common-mode inductor to achieve single-point discharge of high-frequency noise.
[0010] Analog signal circuits are laid out far away from high-frequency digital signal circuits.
[0011] MCU power supply decoupling capacitors are arranged in a distributed star network around the MCU.
[0012] The PCB layout features fully isolated power and signal ground planes, which are connected only by a single common-mode inductor.
[0013] In the PCB layout structure, the drive signals, feedback signals, sampling signals, and power signals of the inverter bridge are arranged on different PCB layers.
[0014] Preferably, the key analog signal traces of the analog signal circuit are grounded and shielded.
[0015] More preferably, the analog signal circuit includes a three-phase current sampling circuit, a bus voltage sampling circuit, and a temperature detection circuit; the grounding shielding method includes: laying power ground wires on both sides of the bus voltage sampling trace to form a shielding channel.
[0016] Preferably, in the PCB layout structure, the bus voltage sampling signal is surrounded by the power ground line throughout the power section, that is, "grounding" is implemented to form effective shielding and block the coupling of switching noise in the power section.
[0017] Preferably, the high-frequency switching circuit includes at least an MCU crystal oscillator circuit and a BUCK switching power supply circuit, wherein the power loop ground of the BUCK switching power supply circuit is directly connected to the power ground after the common mode inductor through a via.
[0018] Preferably, the distributed star network specifically includes: at least one high-frequency decoupling capacitor arranged near each MCU power supply pin, and the grounding terminal of the high-frequency decoupling capacitor and the grounding terminal of the MCU are converged to the same MCU local ground plane through a group of vias.
[0019] Preferably, the signal layering of the inverter bridge section specifically includes: the drive signal is arranged on the top layer, the fault feedback signal of the drive chip is arranged on the bottom layer, and the differential analog signal connected to the sampling resistor is arranged on the inner signal layer.
[0020] Preferably, the PCB has no fewer than six layers.
[0021] Preferably, the PCB layout structure divides the circuit function into multiple regions, including: signal level region, power level region and interface region.
[0022] In PCB layout, the power and ground paths of circuits are confined to their respective local areas.
[0023] The beneficial effects of this invention are: 1. The invention has high control precision: By isolating analog and digital signals and using ground shielding, the accuracy of current and voltage sampling is greatly improved, thereby making motor torque control more precise and steering feel smoother.
[0024] 2. The system of this invention has high reliability: the layered layout of the inverter bridge signal effectively prevents the risk of bridge arm shoot-through caused by signal crosstalk; single-point grounding suppresses ground noise and makes the MCU work more stably.
[0025] 3. The invention has excellent electromagnetic compatibility: the localization of high-frequency noise and ground plane segmentation significantly reduce the conducted and radiated emission levels of the system, easily passing the stringent EMC test standards of automotive electronics.
[0026] 4. This invention is easy to implement and promote: This invention does not rely on expensive components, but only innovates and optimizes at the PCB layout level. The cost increase is minimal, but the performance improvement is significant, and it has extremely high engineering application value. Attached Figure Description
[0027] Figure 1 This is a top view schematic diagram of the PCB functional area division of an embodiment of the PCB layout structure for a high anti-interference controller in an electric power steering system according to the present invention. Figure 2 This is a schematic diagram of the PCB stack-up structure and the vertical distribution of the inverter bridge signal in an embodiment of the present invention; Figure 3 This is a schematic diagram of a high-frequency BUCK circuit connected to a common-mode inductor at a single point, according to an embodiment of the present invention. Figure 4 This is a schematic diagram of the distributed star decoupling network layout of an embodiment of the present invention for an MCU; Figure 5 This is a schematic diagram of the present invention. Detailed Implementation
[0028] The related technologies of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.
[0029] like Figures 1-5 As shown, a layered, partitioned, single-point grounding, and signal isolation PCB layout architecture is proposed, and the specific scheme is as follows: A high interference immunity controller PCB layout structure for an electric power steering system, wherein the PCB includes at least a top layer, a bottom layer and at least one internal power layer, and the layout structure divides the circuit function into a signal level area, a power level area and an interface area.
[0030] Its core improvement lies in: High-frequency noise localization and single-point discharge: The crystal oscillator circuit and switching power supply circuit of the MCU are defined as high-frequency noise sources. The power supply and ground paths of these circuits are strictly constrained within their local areas.
[0031] The switching power supply circuit employs a BUCK topology, minimizing its power loop area. The ground terminal of this loop is not directly connected to the main ground plane, but rather through a separate via, directly connected to the front ground of the common-mode inductor. This design provides the shortest, lowest-impedance return path for high-frequency switching noise, preventing noise contamination of the entire system.
[0032] The "quiet zone" and ground shielding of analog signals: Analog signals such as three-phase current sampling, bus voltage sampling, and temperature detection are concentrated in the "quiet zone" of the PCB, which is far away from the routing paths of high-frequency digital signals such as SPI, CAN, and PWM.
[0033] Specifically, the bus voltage sampling signal is surrounded by the power ground line throughout its routing, which is a "grounding" treatment that forms an effective shield and blocks the coupling of power section switching noise.
[0034] Distributed star-topology decoupled network: Configure a high-frequency decoupling capacitor for each power supply pin of the MCU.
[0035] These decoupling capacitors are arranged in a star topology around the MCU, with their ground vias as close as possible to the MCU's ground vias, all connected to a clean MCU ground island to minimize power loop inductance.
[0036] Ground plane segmentation and single-point bridging: By physically dividing the PCB ground plane, it is strictly divided into power ground and signal ground.
[0037] The two are bridged at a single point on the common-mode inductor, thereby cutting off the path of power ground noise to signal ground while ensuring that the DC potentials are equal.
[0038] Vertical layered isolation of inverter bridge signals: For the inverter bridge section, the multi-layer structure of the PCB is used to physically isolate signals with different functions in the Z-axis space: Top layer: Arrange MOSFET drive signals to ensure drive capability and minimize the path.
[0039] Bottom layer: The feedback signals of the driver chip are arranged, and the middle layer is used as a natural shield to isolate them from the top layer driver signals.
[0040] Inner signal layer: Differential signal pairs with sampling resistors are arranged to be protected by a complete ground plane.
[0041] Internal power layer: This layer contains high-current three-phase output traces, utilizing the low impedance characteristics of the copper foil to carry the high current.
[0042] Example
[0043] This embodiment uses a six-layer PCB board with the following stack-up structure: top layer, first ground layer, inner signal layer, inner power layer, second ground layer, and bottom layer.
[0044] Regional division: such as Figure 1 As shown, the PCB is divided into a signal level area and a power level area from top to bottom. The interface area houses the CAN and power input interfaces; the signal level area centrally houses the MCU, power supply, pre-driver, etc.; and the power level area houses the inverter bridge and motor interfaces.
[0045] High-frequency noise processing: such as Figure 3 As shown, the power loop consisting of the input capacitor, switching transistor, and freewheeling diode in the BUCK circuit is compressed into a very small area. The ground wire of this loop is directly connected to the "dirty ground" after the common-mode inductor through a small via, thus achieving noise source control.
[0046] MCU decoupling: such as Figure 4 As shown, decoupling ceramic capacitors are configured around each VDD pin of the MCU, and their ground vias are no more than 1.5mm away from the GND pin of the MCU, forming a complete decoupling network.
[0047] Ground plane segmentation: The inner ground plane is physically segmented into signal ground and power ground. The two are directly connected through a common-mode inductor.
[0048] Inverter bridge wiring: such as Figure 2 As shown, the top layer carries the driving lines with a line width of 10mil; the bottom layer carries the feedback lines; the inner signal layer is arranged with differential pairs from the sampling resistor to the pre-driving op-amp, with a line width / spacing of 10mil / 6mil, and strictly equal length.
[0049] This embodiment fundamentally solves the electromagnetic interference and signal crosstalk problems inside the EPS controller by a series of collaborative designs, including single-point grounding of the high-frequency switching circuit to the common-mode inductor, establishing a silent zone for analog signals and using ground shielding, constructing a distributed star decoupling network for the MCU, strictly separating the power ground and signal ground, and performing vertical layered wiring for the inverter bridge related signals.
[0050] In summary, this invention effectively solves key problems such as high-frequency noise, signal crosstalk, and ground loops in electric power steering system controllers through an innovative layout design of layered partitioning, single-point grounding, and signal isolation. Experimental tests show that this scheme reduces current sampling error to within ±0.5%, reduces noise interference amplitude of inverter bridge drive signals by 78%, and optimizes system EMC radiated emissions by 20 dBμV / m compared to traditional layouts, significantly improving the control accuracy and reliability of the EPS controller. In engineering applications, it can be implemented using only a conventional six-layer PCB process without increasing additional costs, yet it meets the most stringent ISO 11452-4 radiated immunity standard for automotive electronics, making it highly valuable for widespread application.
[0051] It should be emphasized that the above are merely preferred embodiments of the present invention and are not intended to limit the present invention in any way. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention shall still fall within the scope of the technical solution of the present invention.
Claims
1. A high anti-interference controller PCB layout structure for an electric power steering system, characterized in that, The PCB is a multilayer board, and the PCB layout structure includes: A high-frequency switching circuit, wherein the power ground loop of the high-frequency switching circuit is directly connected to the ground terminal of the common-mode inductor to achieve single-point discharge of high-frequency noise; Analog signal circuit, which is located away from high-frequency digital signal circuit; MCU power supply decoupling capacitors, wherein the MCU power supply decoupling capacitors are arranged in a distributed star network around the MCU; The PCB layout structure has a fully isolated power ground plane and signal ground plane, which are connected only through a single common-mode inductor; In the PCB layout structure, the drive signal, feedback signal, sampling signal and power signal of the inverter bridge are arranged on different PCB layers.
2. The PCB layout structure for a high anti-interference controller in an electric power steering system according to claim 1, characterized in that, The key analog signal traces of the analog signal circuit are grounded and shielded.
3. The PCB layout structure for a high anti-interference controller in an electric power steering system according to claim 2, characterized in that, The analog signal circuit includes a three-phase current sampling circuit, a bus voltage sampling circuit, and a temperature detection circuit; the grounding shielding method includes: laying power ground wires on both sides of the bus voltage sampling trace to form a shielding channel.
4. The PCB layout structure for a high anti-interference controller in an electric power steering system according to claim 1, characterized in that, In the PCB layout structure, the bus voltage sampling signal trace is surrounded by power ground lines throughout the power section.
5. The PCB layout structure for a high anti-interference controller in an electric power steering system according to claim 1, characterized in that, The high-frequency switching circuit includes at least an MCU crystal oscillator circuit and a BUCK switching power supply circuit. The power loop ground of the BUCK switching power supply circuit is directly connected to the power ground after the common mode inductor through a via.
6. The PCB layout structure for a high anti-interference controller in an electric power steering system according to claim 1, characterized in that, The distributed star network specifically includes: at least one high-frequency decoupling capacitor arranged near each MCU power supply pin, and the ground terminal of the high-frequency decoupling capacitor and the ground terminal of the MCU are converged to the same MCU local ground plane through a group of vias.
7. The PCB layout structure for a high anti-interference controller in an electric power steering system according to claim 1, characterized in that, The signal layering of the inverter bridge section specifically includes: the drive signal is arranged on the top layer, the fault feedback signal of the drive chip is arranged on the bottom layer, and the differential analog signal connected to the sampling resistor is arranged on the inner signal layer.
8. The PCB layout structure for a high anti-interference controller in an electric power steering system according to claim 1, characterized in that, The PCB has no fewer than six layers.
9. A high anti-interference controller PCB layout structure for an electric power steering system according to claim 1, characterized in that, The PCB layout structure divides the circuit function into multiple regions, including: signal level region, power level region and interface region; The power and ground paths of the circuits in the PCB layout structure are limited to their respective local areas.