Photoelectric packaging structure, preparation method and camera module
By embedding the photosensitive chip within the plastic-encapsulated module in the camera module and utilizing a multi-layer circuit structure rewiring layer process, the shortcomings of wire bonding and flip-chip packaging are overcome, resulting in a shorter signal conduction path and higher wiring flexibility and reliability.
Patent Information
- Application Number
- CN202411159128.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-22
- Publication Date
- 2026-03-03
AI Technical Summary
The wire bonding packaging of existing camera modules results in long signal conduction paths, which reduces signal transmission quality. Furthermore, flip-chip packaging requires high flatness and symmetrical distribution, which limits universality and flexibility.
The optoelectronic packaging structure with embedded photosensitive chip in plastic-encapsulated module achieves direct electrical connection between photosensitive chip and substrate module through redistribution layer process. The multi-layer circuit structure is used to redistribute signals, reduce signal conduction paths and improve wiring flexibility and density.
It improves signal transmission quality, reduces the lateral dimensions of the packaging structure, enhances the flexibility and reliability of the packaging structure, and avoids the high requirements for substrate flatness.
Smart Images
Figure CN121604528A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor packaging technology, and in particular to an optoelectronic packaging structure, a method for preparing the optoelectronic packaging structure, and a camera module having the optoelectronic packaging structure. Background Technology
[0002] A camera module typically consists of a circuit board and a photosensitive chip mounted on the circuit board. The photosensitive chip is usually connected to the conductive pads of the circuit board using wire bonding or flip-chip packaging processes to achieve signal connection.
[0003] However, wire bonding, which connects the photosensitive chip to the circuit board via metal leads, results in a longer signal path, reducing signal transmission quality. Furthermore, the wire bonding process requires a certain amount of space between the photosensitive chip and the conductive pads on the circuit board, increasing the lateral dimension between them. Flip-chip packaging requires a high degree of flatness and symmetrically distributed solder joints on the circuit board, limiting its versatility. Summary of the Invention
[0004] In view of this, it is necessary to provide an optoelectronic packaging structure, a method for preparing the optoelectronic packaging structure, and a camera module having the optoelectronic packaging structure.
[0005] This application provides a first aspect of an optoelectronic packaging structure, including a molding compound module, a photosensitive chip, and a substrate module. The molding compound module includes a molding body, which includes a first surface and a second surface disposed opposite to each other. The photosensitive chip is embedded within the molding body and includes a photosensitive region and a non-photosensitive region connected together. The photosensitive region and the non-photosensitive region are exposed on the second surface, and the non-photosensitive region has a bonding pad. The substrate module is disposed on the second surface and includes a dielectric layer and a first multilayer circuit structure disposed within the dielectric layer. The dielectric layer includes a third surface facing the second surface and a fourth surface disposed opposite to the third surface. The first multilayer circuit structure includes a first circuit layer and a second circuit layer stacked along the thickness direction of the substrate module. The first circuit layer is exposed on the third surface and includes a first conductive portion and a first conductive circuit pattern. One side of the first conductive portion contacts a connecting pad. A first direction and a second direction are defined to be perpendicular to the thickness direction, respectively. At least a portion of the first conductive circuit pattern extends along the first direction. The second circuit layer includes a second conductive portion and a second conductive circuit pattern. A portion of the second conductive circuit pattern is electrically connected to the second conductive portion and a portion of the second conductive circuit pattern is electrically connected to the first conductive circuit pattern. At least a portion of the second conductive circuit pattern extends along the second direction. The second conductive portion is electrically connected to the other side of the first conductive portion. At least the first conductive portion and the second conductive portion together form a first conductive channel extending along the thickness direction, so that the photosensitive chip is electrically connected to the first circuit layer and the second circuit layer through the connecting pad and the first conductive channel.
[0006] A second aspect of this application provides a method for fabricating an optoelectronic packaging structure, comprising: encapsulating a photosensitive chip with a molding compound, the molding compound including a first surface and a second surface disposed opposite to each other; the photosensitive chip including a photosensitive region and a non-photosensitive region connected together, the photosensitive region and the non-photosensitive region being exposed on the second surface, the non-photosensitive region being provided with a connecting pad; disposing a first insulating layer on the second surface, and disposing a first circuit layer within the first insulating layer; the first insulating layer including a third surface facing the second surface; the first circuit layer being exposed on the third surface and including a first conductive portion and a first conductive circuit pattern; one side of the first conductive portion contacting the connecting pad; and defining a first direction and a second direction respectively perpendicular to the thickness of the first insulating layer. The first conductive circuit pattern extends along a first direction; a second insulating layer is disposed on the first insulating layer, and a second circuit layer is disposed within the second insulating layer. The second circuit layer includes a second conductive portion and a second conductive circuit pattern. A portion of the second conductive circuit pattern is electrically connected to the second conductive portion and a portion of the second conductive circuit pattern is electrically connected to the first conductive circuit pattern. At least a portion of the second conductive circuit pattern extends along the second direction. The second conductive portion is electrically connected to the other side of the first conductive portion. At least the first conductive portion and the second conductive portion together form a first conductive channel extending along the thickness direction, so that the photosensitive chip is electrically connected to the first circuit layer and the second circuit layer through the connecting pad and the first conductive channel.
[0007] A third aspect of this application provides a camera module, including a lens assembly. The camera module also includes the aforementioned optoelectronic packaging structure. The lens assembly is disposed on the side of the substrate module of the optoelectronic packaging structure opposite to the plastic-encapsulated module.
[0008] In this application, the connecting pads are in direct contact with the first conductive portion of the first circuit layer and are electrically connected to the second circuit layer through the first conductive channel. Through a redistribution layer process, the second conductive circuit pattern redistributes the connecting pads, and the first conductive circuit pattern further redistributes the connecting pads in non-photosensitive areas, thereby transmitting the electrical signals of the photosensitive chip to external components via the first multilayer circuit structure. Since the connecting pads are in direct contact with the first conductive channel, no additional connection medium is required between them. Compared to wire bonding packaging, the signal conduction path of the first conductive channel in this application is shorter, which is beneficial for improving signal transmission quality. Furthermore, it eliminates the need to reserve working space for wire bonding tools, which helps reduce the lateral dimensions of the optoelectronic packaging structure, thus facilitating the miniaturization of optoelectronic packaging structures. Simultaneously, compared to flip-chip packaging, this application is not limited to photosensitive chips with symmetrically distributed solder joints, nor is it limited by the size of the metal balls, resulting in excessively high requirements for substrate flatness. Moreover, since the extension directions of at least a portion of the first circuit layer are different from those of at least a portion of the second circuit layer, it is beneficial for improving the flexibility and density of wiring, thereby enhancing the flexibility and reliability of the optoelectronic packaging structure. Attached Figure Description
[0009] Figure 1 This is a module architecture diagram of a camera module provided in one embodiment of this application.
[0010] Figure 2 for Figure 1 The diagram shows the optoelectronic packaging structure of the camera module in some embodiments.
[0011] Figure 3 for Figure 1 The diagram shows the optoelectronic packaging structure of the camera module in some other embodiments.
[0012] Figure 4 This is a schematic diagram of the structure of the photosensitive chip after it has been encapsulated in a plastic encapsulation in one embodiment of this application.
[0013] Figure 5A In order to be in Figure 4 The diagram shows the structure after the first insulating layer and the first circuit layer are installed on the plastic encapsulation.
[0014] Figure 5B for Figure 5A A three-dimensional schematic diagram of the structure shown.
[0015] Figure 6A In order to be in Figure 5A The diagram shows the structure after the second insulating layer and the second circuit layer are installed on the first circuit layer.
[0016] Figure 6B for Figure 6A A three-dimensional schematic diagram of the structure shown.
[0017] Figure 7 In order to be in Figure 6A The diagram shows the structure after a hollow channel is opened in the plastic encapsulation and filled with conductive material.
[0018] Figure 8 This is a schematic diagram of an optoelectronic packaging structure provided in another embodiment of this application.
[0019] Figure 9 This is a schematic diagram of the optoelectronic packaging structure in some other embodiments.
[0020] Figure 10 This is a schematic diagram of an optoelectronic packaging structure provided in another embodiment of this application.
[0021] Explanation of main component symbols
[0022] Camera Module 1
[0023] Lens Component 2
[0024] Molded Module 10
[0025] Molded body 11
[0026] First surface 11A
[0027] Second surface 11B
[0028] First solder pad 12
[0029] Image sensor 20
[0030] Photosensitive area 21
[0031] Non-photosensitive area 22
[0032] Baseboard module 30
[0033] Dielectric layer 31
[0034] Third surface 31A
[0035] Fourth surface 31B
[0036] First multi-layer circuit structure 32
[0037] Through hole 33
[0038] Second multi-layer circuit structure 34
[0039] First electronic component 40
[0040] Optoelectronic packaging structures 100, 200, 300
[0041] 120 solder balls
[0042] Connecting pad 220
[0043] First substrate region 301
[0044] Second substrate region 302
[0045] First insulating layer 311
[0046] Second insulating layer 312
[0047] Third insulating layer 313
[0048] First line layer 321
[0049] Second line layer 322
[0050] Third line layer 323
[0051] Fourth line layer 341
[0052] Fifth line layer 342
[0053] First Conductor 3210
[0054] First conductive circuit pattern 3211
[0055] Second Conductor 3220
[0056] Second conductive circuit pattern 3221
[0057] Second solder pad 3222
[0058] Third Conductor 3230
[0059] Third conductive circuit pattern 3231
[0060] Hollow Channel P
[0061] First channel section P01
[0062] Second channel section P02
[0063] First conductive channel P1
[0064] Second conductive channel P2
[0065] First via V1
[0066] Second via V2
[0067] First direction X
[0068] Second direction Y
[0069] Z-direction of thickness
[0070] The following detailed description, in conjunction with the accompanying drawings, will further illustrate this application. Detailed Implementation
[0071] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.
[0072] It should be noted that when a component is said to be "fixed to" another component, it can be directly on the other component or there may be an intervening component. When a component is said to be "connected to" another component, it can be directly connected to the other component or there may be an intervening component. When a component is said to be "set on" another component, it can be directly set on the other component or there may be an intervening component.
[0073] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
[0074] Implementation Method 1
[0075] Please see Figure 1 This application provides a camera module 1, which includes a lens assembly 2 and an optoelectronic packaging structure 100. The lens assembly 2 has a light broadcasting path for allowing external light to pass through. The optoelectronic packaging structure 100 is used to receive external light passing through the lens assembly 2 to form an optical signal, and convert the optical signal into a corresponding electrical signal, that is, to realize photoelectric conversion.
[0076] Please see Figure 2 The optoelectronic packaging structure 100 includes a molding compound module 10, a photosensitive chip 20, and a substrate module 30. The molding compound module 10 includes a molding body 11, and the molding body 11 includes a first surface 11A and a second surface 11B disposed opposite to each other. In some embodiments, the molding body 11 is made of at least one of epoxy resin and phenolic resin.
[0077] The photosensitive chip 20 is embedded within a molding compound 11. The molding compound 11 covers at least the sides of the photosensitive chip 20, and improves the stability and reliability of the photosensitive chip 20. The photosensitive chip 20 includes a photosensitive region 21 and a non-photosensitive region 22 connected to each other. Both the photosensitive region 21 and the non-photosensitive region 22 are exposed on the second surface 11B. The photosensitive region 21 is used to receive light signals formed by external light propagating from the lens assembly 2 and convert the light signals into electrical signals. The non-photosensitive region 22 may be disposed around the photosensitive region 21. A connecting pad 220 is provided on the non-photosensitive region 22. In some embodiments, the first surface 11A of the molding compound 11 may be located below the photosensitive chip 20, that is, the molding compound 11 may also cover the bottom surface of the photosensitive chip 20.
[0078] The substrate module 30 is disposed on the second surface 11B and includes a dielectric layer 31 and a first multilayer circuit structure 32. The dielectric layer 31 includes a third surface 31A facing the second surface 11B and a fourth surface 31B opposite to the third surface 31A. The lens assembly 2 may be disposed on the fourth surface 31B. The first multilayer circuit structure 32 is disposed within the dielectric layer 31 and includes a first circuit layer 321, a second circuit layer 322, and a third circuit layer 323. The first circuit layer 321, the second circuit layer 322, and the third circuit layer 323 are stacked in the thickness direction Z of the substrate module 30, and the first circuit layer 321, the second circuit layer 322, and the third circuit layer 323 are electrically connected to each other. The first circuit layer 321 and the second circuit layer 322 may be outer circuit layers, and the third circuit layer 323 is at least one and located between the first circuit layer 321 and the second circuit layer 322. That is, the first multilayer circuit structure 32 may include at least three circuit layers. It is understood that in other embodiments, the first multilayer circuit structure 32 may also include only two circuit layers, and the two circuit layers are stacked in the thickness direction Z of the substrate module 30. The first circuit layer 321 is exposed on the third surface 31A and includes a first conductive circuit pattern 3211 and a first conductive portion 3210. Since the first conductive portion 3210 is exposed on the third surface 31A, it facilitates direct contact between one side of the first conductive portion 3210 and the connecting pad 220. The first direction X and the second direction Y are defined as different directions. In this embodiment, the first direction X and the second direction Y are perpendicular to the thickness direction Z of the substrate module 30, so at least a portion of the first conductive circuit pattern 3211 extends along the first direction X (in...). Figure 5B (As shown in the diagram). The first direction X and the second direction Y intersect; in some embodiments, the first direction X is perpendicular to the second direction Y.
[0079] The second circuit layer 322 may be exposed on the fourth surface 31B and includes a second conductive circuit pattern 3221 and a second conductive portion 3220. A portion of the second conductive circuit pattern 3221 is electrically connected to the second conductive portion 3220, and a portion of the second conductive circuit pattern 3221 is electrically connected to the first conductive circuit pattern 3211, and at least a portion of the second conductive circuit pattern 3221 extends along the second direction Y (in...). Figure 6B (As shown in the diagram). The second conductive portion 3220 is electrically connected to the first conductive portion 3210 on the side opposite to the connecting pad 220. At least the first conductive portion 3210 and the second conductive portion 3220 together form a first conductive channel P1 extending along the thickness direction Z of the substrate module 30. The first conductive channel P1 can penetrate the third surface 31A and the fourth surface 31B. Therefore, the photosensitive chip 20 can be electrically connected to the first circuit layer 321 and the second circuit layer 322 through the connecting pad 220 and the first conductive channel P1.
[0080] Through a redistribution layer (RDL) process, the second conductive line pattern 3221 redistributes the connection pads 220 of the non-photosensitive area 22. Since the first conductive line pattern 3211 is electrically connected to the second conductive line pattern 3221, the first conductive line pattern 3211 further redistributes the connection pads 220 of the non-photosensitive area 22, thereby transmitting the electrical signals of the photosensitive chip 20 to external components (such as system terminals, circuit boards, or chips) via the first multilayer circuit structure 32. Because the extension direction of at least a portion of the first circuit layer 321 is different from the extension direction of at least a portion of the second circuit layer 322, it is beneficial to improve the flexibility and density of wiring, thereby improving the flexibility and reliability of the optoelectronic packaging structure 100. In some embodiments, the first conductive line pattern 3211 extends along the first direction X and the second direction Y, respectively, and the second conductive line pattern 3221 also extends along the first direction X and the second direction Y, respectively, thereby further improving the flexibility and density of wiring. In some embodiments, the first multilayer circuit structure 32 includes a conductive material, which may be conductive ink or a metal material. The conductive ink may contain at least one element selected from silver, platinum, gold, copper, nickel, and aluminum. The metallic material may be silver, copper, or gold. In some embodiments, the dielectric layer 31 may be selected from resins such as epoxy resin, polyphenylene ether, polyimide, polyethylene terephthalate, and polyethylene naphthalate.
[0081] In some embodiments, the third circuit layer 323 includes a third conductive circuit pattern 3231 and a third conductive portion 3230. The first conductive portion 3210 and the second conductive portion 3220 are respectively connected to both sides of the third conductive portion 3230, and the first conductive portion 3210, the second conductive portion 3220, and the third conductive portion 3230 together form the aforementioned first conductive channel P1. At least a portion of the third conductive circuit pattern 3231 can extend along a first direction X or a second direction Y. The third conductive circuit pattern 3231 can be electrically connected to the first conductive circuit pattern 3211 through a first via V1, and the third conductive circuit pattern 3231 can also be electrically connected to the second conductive circuit pattern 3221 through a second via V2, thereby achieving interlayer conductivity of the multilayer conductive circuit patterns.
[0082] The substrate module 30 may further include a via 33 disposed within the dielectric layer 31. The via 33 penetrates the third surface 31A and the fourth surface 31B, and the position of the via 33 avoids the first multilayer circuit structure 32. The photosensitive area 21 of the photosensitive chip 20 is exposed through the via 33 and is used to receive the light signal formed by the external light propagating sequentially from the via 33 of the lens assembly 2, and convert the light signal into an electrical signal.
[0083] In the optoelectronic packaging structure 100 of this application, the connecting pad 220 is in direct contact with the first conductive portion 3210 of the first circuit layer 321 and is electrically connected to the second circuit layer 322 through the first conductive channel P1. That is, the connecting pad 220 is in direct contact with the first conductive channel P1, and no additional connecting medium is required between them. Compared with the existing wire bonding packaging process, the signal conduction path of the first conductive channel P1 in this application is shorter, which is beneficial to improving signal transmission quality. Moreover, it does not require the operating space needed for the wire bonding tool, which is beneficial to reducing the lateral dimension of the optoelectronic packaging structure 100, and thus is beneficial to the miniaturization of the optoelectronic packaging structure 100. At the same time, compared with the flip-chip packaging process, this application is not limited to using a photosensitive chip 20 with symmetrically distributed solder points, and is not limited by the size of the metal ball, which would lead to excessively high requirements for substrate flatness. Furthermore, since the extension direction of at least a portion of the first circuit layer 321 is different from the extension direction of at least a portion of the second circuit layer 322, it is beneficial to improve the flexibility and density of wiring, thereby improving the flexibility and reliability of the optoelectronic packaging structure 100. Furthermore, since the lens assembly 2 is disposed on the fourth surface 31B, the lens assembly 2 can also protect the photosensitive area 21 of the photosensitive chip 20, reducing the risk of damage to the photosensitive area 21 due to external forces. Because the fourth surface 31B is relatively flat, it also facilitates the mounting of the lens assembly 2 on the first surface 11A and increases the bonding area between the lens assembly 2 and the substrate module 30, thereby improving the bonding strength between the lens assembly 2 and the substrate module 30.
[0084] In some embodiments, the connection pad 220 and the first multilayer circuit structure 32 are made of the same conductive material. For example, both the connection pad 220 and the first multilayer circuit structure 32 may be made of silver. Using the same conductive material is beneficial for further improving signal transmission quality.
[0085] In some embodiments, the molding module 10 may further include a second conductive channel P2 and a first solder pad 12. The second conductive channel P2 is disposed within the molding body 11 and a portion of the dielectric layer 31, and the second conductive channel P2 penetrates the first surface 11A and the second surface 11B of the molding body 11. The first solder pad 12 is exposed on the first surface 11A. The two ends of the second conductive channel P2 are respectively connected to one of the conductive circuit patterns of the first multilayer circuit structure 32 and the first solder pad 12. When the first multilayer circuit structure 32 includes a third circuit layer 323, the two ends of the second conductive channel P2 are respectively connected to the third conductive circuit pattern 3231 and the first solder pad 12. That is, one end of the second conductive channel P2 passes through the first conductive circuit pattern 3211 and is connected to the third conductive circuit pattern 3231. By setting the first solder pad 12 to be exposed on the first surface 11A, it is convenient for the first solder pad 12 to be connected to external components. In this way, the electrical signal generated by the photosensitive chip 20 can be sequentially led to the external component through the first conductive channel P1, the first multilayer circuit structure 32, the second conductive channel P2, and the first solder pad 12. That is, the first conductive channel P1 and the second conductive channel P2 can cooperate to guide electrical signals from the lower first surface 11A. In some embodiments, the second conductive channel P2 and the first solder pad 12 each contain a conductive material, which can be conductive ink or a metal material. The conductive ink may contain at least one element selected from silver, platinum, gold, copper, nickel, and aluminum. The metal material may be silver, copper, or gold. The second conductive channel P2 and the first solder pad 12. In some embodiments, the connecting pad 220, the first multilayer circuit structure 32, the second conductive channel P2, and the first solder pad 12 are made of the same conductive material, thereby further improving signal transmission quality.
[0086] Please see Figure 3 In some embodiments, the first pad 12 may also be provided with solder balls 120. External components may be disposed on the solder balls 120, thereby allowing the electrical signals of the photosensitive chip 20 transmitted to the first pad 12 to be further conducted to the external components via the solder balls 120. The solder balls 120 may be made of solder balls.
[0087] like Figure 2 As shown, the optoelectronic packaging structure 100 may further include a first electronic component 40 connected to the first conductive line pattern 3211, and the molding compound 11 covers the first electronic component 40. Thus, through a redistribution layer process, the first conductive line pattern 3211 redistributes the connection pads 220 of the non-photosensitive area 22 to transmit the electrical signals of the photosensitive chip 20 to the first electronic component 40, and then from the first electronic component 40 to external components. The first electronic component 40 can be an active component or a passive component. Active components include transistors, integrated circuits, or image tubes, while passive components include resistors, inductors, and capacitors. In some specific embodiments, the first electronic component 40 is an active component.
[0088] This application also provides a method for preparing an optoelectronic packaging structure 100, comprising the following steps:
[0089] Step S1, please refer to Figure 4 A molding compound 11 is used to encapsulate the photosensitive chip 20. The molding compound 11 includes a first surface 11A and a second surface 11B disposed opposite to each other. The photosensitive chip 20 includes a photosensitive region 21 and a non-photosensitive region 22 connected to each other, both of which are exposed on the second surface 11B. A connecting pad 220 is provided on the non-photosensitive region 22.
[0090] The molding compound 11 covers at least the side surface of the photosensitive chip 20. In some embodiments, the first surface 11A may be located below the photosensitive chip 20, that is, the molding compound 11 may also cover the bottom surface of the photosensitive chip 20. The molding compound 11 can be formed by a molding process and can have a high degree of flatness. The molding compound 11 is made of at least one of epoxy resin and phenolic resin.
[0091] In some embodiments, after the molding compound 11 is provided, the molding compound 11 also covers the first electronic component 40, and a portion of the first electronic component 40 is exposed on the second surface 11B. The first electronic component 40 can be an active component or a passive component. Active components include transistors, integrated circuits, or image tubes, while passive components include resistors, inductors, and capacitors. In some specific embodiments, the first electronic component 40 is an active component.
[0092] For step S2, please refer to [link / reference]. Figure 4 and Figure 5A A first insulating layer 311 is formed on the second surface 11B, and a first wiring layer 321 is formed within the first insulating layer 311. The first insulating layer 311 includes a third surface 31A facing the second surface 11B. The first wiring layer 321 is exposed on the third surface 31A and includes a first conductive portion 3210 and a first conductive wiring pattern 3211. One side of the first conductive portion 3210 contacts a connecting pad 220. Figure 5B As shown, at least a portion of the first conductive line pattern 3211 extends along the first direction X.
[0093] Understandably, for the sake of clarity, Figure 5BThe structure located on the other side of the photosensitive chip 20 in the second direction Y is omitted. In some embodiments, the first circuit layer 321 can be formed by laser-forming a hollow circuit pattern in the first insulating layer 311 and filling the hollow circuit pattern with conductive material. The specific method of filling the conductive material can be inkjet printing. It is understood that the circuit pattern includes a pattern portion corresponding to the first conductive circuit pattern 3211 and a channel portion corresponding to the first conductive portion 3210. The conductive material of the first circuit layer 321 can be conductive ink or a metal material. The conductive ink can have at least one element selected from silver, platinum, gold, copper, nickel, and aluminum. The metal material can be silver, copper, or gold. In some embodiments, the material of the first insulating layer 311 can be selected from resins such as epoxy resin, polyphenylene ether, polyimide, polyethylene terephthalate, and polyethylene naphthalate.
[0094] In some embodiments, when the encapsulation body 11 is further provided with a first electronic component 40, the first electronic component 40 is connected to a first conductive circuit pattern 3211.
[0095] Step S3, please refer to Figure 6A Through a layer-addition process, a second insulating layer 312 is formed on the first insulating layer 311, and a second circuit layer 322 is formed within the second insulating layer 312. The second circuit layer 322 includes a second conductive portion 3220 and a second conductive circuit pattern 3221. A portion of the second conductive circuit pattern 3221 is electrically connected to the second conductive portion 3220 and a portion of the second conductive circuit pattern 3221 is electrically connected to the first conductive circuit pattern 3211, and at least a portion of the second conductive circuit pattern 3221 extends along the second direction Y (in...). Figure 6B As shown in the figure, the second conductive part 3220 is electrically connected to the other side of the first conductive part 3210. At least the first conductive part 3210 and the second conductive part 3220 together form a first conductive channel P1 extending along the thickness direction Z, so that the photosensitive chip 20 is electrically connected to the first circuit layer 321 and the second circuit layer 322 through the connecting pad 220 and the first conductive channel P1.
[0096] Understandably, for the sake of clarity, Figure 6B The structure located on the other side of the photosensitive chip 20 in the second direction Y is omitted. For example... Figure 6A As shown, in some embodiments, the second circuit layer 322 can be formed in a similar manner to the first circuit layer 321. Before setting the second insulating layer 312 and the second conductive circuit pattern 3221, a third insulating layer 313 can be first set on the first insulating layer 311, and a third circuit layer 323 can be set within the third insulating layer 313 (for clarity). Figure 6B(The third insulating layer 313 and the third circuit layer 323 are omitted). The third circuit layer 323 includes a third conductive portion 3230 and a third conductive circuit pattern 3231. The two sides of the third conductive portion 3230 are electrically connected to the first conductive portion 3210 and the second conductive portion 3220, respectively, to jointly form a first conductive channel P1. At least a portion of the third conductive circuit pattern 3231 extends along the first direction X or the second direction Y. The third conductive circuit pattern 3231 is electrically connected to the first conductive circuit pattern 3211 through a first via V1, and the third conductive circuit pattern 3231 is electrically connected to the second conductive circuit pattern 3221 through a second via V2. The first circuit layer 321, the second circuit layer 322, and the third circuit layer 323 together constitute a first multilayer circuit structure 32. The first insulating layer 311, the second insulating layer 312, and the third insulating layer 313 can be made of the same material, and the first insulating layer 311, the second insulating layer 312, and the third insulating layer 313 together constitute a dielectric layer 31. In other embodiments, the third insulating layer 313 and the third circuit layer 323 may be omitted, that is, the first multilayer circuit structure 32 may only include two circuit layers.
[0097] In some embodiments, the above preparation method may further include the following steps:
[0098] For step S4, please refer to [link / reference]. Figure 7 A hollow channel P is created in the molding compound 11 using a laser. The hollow channel P includes a first channel portion P01 and a second channel portion P02 connected to each other. The first channel portion P01 extends along the thickness direction of the molding compound 11 (i.e., the thickness direction Z of the substrate module 30), penetrating the first surface 11A and the second surface 11B, and further extending to the third conductive line pattern 3231. The second channel portion P02 is located on the first surface 11A.
[0099] For step S5, please refer to [link / reference]. Figure 2 The hollow channel P is filled with conductive material and cured to obtain a second conductive channel P2 and a first solder pad 12. The two ends of the second conductive channel P2 are respectively connected to one of the conductive line patterns of the first multilayer circuit structure 32 and the first solder pad 12. At this point, the optoelectronic packaging structure 100 is obtained.
[0100] In this embodiment, when the first multilayer circuit structure 32 includes a third circuit layer 323, the two ends of the second conductive channel P2 are respectively connected to the third conductive circuit pattern 3231 and the first solder pad 12. That is, one end of the second conductive channel P2 passes through the first conductive circuit pattern 3211 and connects to the third conductive circuit pattern 3231. In this way, the electrical signal generated by the photosensitive chip 20 can be sequentially led to an external component through the first conductive channel P1, the first multilayer circuit structure 32, the second conductive channel P2, and the first solder pad 12. In this embodiment, steps S4 and S5 are performed in step S3. In other embodiments, steps S4 and S5 can also be performed after step S1, that is, the second conductive channel P2 and the first solder pad 12 are first set in the molding compound 11, so that after the first circuit layer 321 is subsequently set, one end of the second conductive channel P2 is connected to the first conductive circuit pattern 3211 of the first circuit layer 321.
[0101] In some embodiments, a conductive material can be filled into the hollow channel P by inkjet printing to obtain a second conductive channel P2 and a first bonding pad 12. The conductive material can be conductive ink or a metallic material. The conductive ink may contain at least one element selected from silver, platinum, gold, copper, nickel, and aluminum. The metallic material may be silver, copper, or gold. The hollow channel P may be completely filled with the conductive material to form the second conductive channel P2. In other embodiments, the inner wall of the hollow channel P is provided with a conductive layer formed by curing the conductive material to form the hollow second conductive channel P2.
[0102] like Figure 3 As shown, in some embodiments, solder balls 120 may also be provided on the first solder pad 12. The solder balls 120 may be made of solder balls.
[0103] Implementation Method 2
[0104] Please see Figure 8 This application also provides an optoelectronic packaging structure 200. The difference from the optoelectronic packaging structure 100 described above lies in the position of the second conductive channel P2. Specifically, the second conductive channel P2 is disposed within the molding compound 11 and penetrates the first surface 11A and the second surface 11B, and the second conductive channel P2 does not extend into the dielectric layer 31. The two ends of the second conductive channel P2 are respectively connected to the first conductive line pattern 3211 and the first solder pad 12. For example... Figure 9 As shown, in some embodiments, solder balls 120 may also be provided on the first solder pad 12. The solder balls 120 may be made of solder balls.
[0105] In some embodiments, the substrate module 30 may further include a second multilayer circuit structure 34 disposed within the dielectric layer 31. The second multilayer circuit structure 34 is electrically connected to the first multilayer circuit structure 32. The second multilayer circuit structure 34 constitutes a second electronic component. The second electronic component can be an active component or a passive component. Active components include transistors, integrated circuits, or image tubes, while passive components include resistors, inductors, and capacitors. In some specific embodiments, the second electronic component is a passive component. In some embodiments, the second multilayer circuit structure 34 contains a conductive material, which can be conductive ink or a metallic material. The conductive ink may contain at least one element selected from silver, platinum, gold, copper, nickel, and aluminum. The metallic material may be silver, copper, or gold.
[0106] This application also provides a method for fabricating an optoelectronic packaging structure 200, which differs from the above-described method in that, when setting the first circuit layer 321 in step S2, a fourth circuit layer 341 may also be set within the first insulating layer 311. When setting the third circuit layer 323 in step S3, a fifth circuit layer 342 may also be set within the third insulating layer 313. Thus, at least the fourth circuit layer 341 and the fifth circuit layer 342 together constitute a second electronic component, meaning the second electronic component is also formed through a layer-addition process.
[0107] Furthermore, the hollow channel P created in step S4 is located within the encapsulation 11 and extends through the first surface 11A and the second surface 11B, and the hollow channel P does not extend into the dielectric layer 31. Thus, after filling the hollow channel P with conductive material in step S5, the two ends of the resulting second conductive channel P2 are respectively connected to the first pad 12 of the first conductive circuit pattern 3211.
[0108] Implementation Method 3
[0109] Please see Figure 10 This application also provides an optoelectronic packaging structure 300. The difference from the optoelectronic packaging structure 100 described above lies in the structure of the substrate module 30. Specifically, the substrate module 30 includes a first substrate region 301 and a second substrate region 302 connected together. Viewed from the thickness direction Z of the substrate module 30, the first substrate region 301 overlaps with the molding module 10, and the second substrate region 302 extends beyond the molding module 10, meaning the width of the substrate module 30 is greater than the width of the molding module 10. The second circuit layer 322 also includes second solder pads 3222, with the first conductive line pattern 3211 and the second solder pads 3222 respectively located in the first substrate region 301 and the second substrate region 302. The second solder pads 3222 are exposed on the fourth surface 31B, thus facilitating the connection of external components to the second solder pads 3222. At this time, the electrical signals generated by the photosensitive chip 20 can be exported from the uppermost fourth surface 31B.
[0110] The first multilayer circuit structure 32 is located within the first substrate region 301 and extends into the second substrate region 302. When the first multilayer circuit structure 32 includes a first circuit layer 321, at least one second circuit layer 322, and a third circuit layer 323, a portion of either the second circuit layer 322 or the third circuit layer 323 is located within the first substrate region 301, and a portion of the third circuit layer 323 is located within the second substrate region 302; the first circuit layer 321 may be located only within the first substrate region 301. The second circuit layer 322 within the first substrate region 301 may be fabricated simultaneously with the second circuit layer 322 within the second substrate region 302, and the third circuit layer 323 within the first substrate region 301 may be fabricated simultaneously with the third circuit layer 323 within the second substrate region 302.
[0111] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application and are not intended to limit it. Although this application has been described in detail with reference to the embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of this application without departing from the spirit and scope of the technical solutions of this application.
Claims
1. A photoelectric packaging structure, characterized in that, include: A molding module includes a molding body, the molding body including a first surface and a second surface disposed opposite to each other; A photosensitive chip is embedded in the plastic package and includes a photosensitive area and a non-photosensitive area connected together. The photosensitive area and the non-photosensitive area are exposed on the second surface. The non-photosensitive area is provided with a connection pad. as well as A substrate module is disposed on a second surface and includes a dielectric layer and a first multilayer circuit structure disposed within the dielectric layer. The dielectric layer includes a third surface facing the second surface and a fourth surface disposed opposite to the third surface. The first multilayer circuit structure includes a first circuit layer and a second circuit layer stacked along the thickness direction of the substrate module. The first circuit layer is exposed on the third surface and includes a first conductive portion and a first conductive circuit pattern. One side of the first conductive portion contacts the connecting pad. A first direction and a second direction are defined to be perpendicular to the thickness direction, respectively. At least a portion of the first conductive circuit pattern extends along the first direction. The second circuit layer includes a second conductive portion and a second conductive circuit pattern. A portion of the second conductive circuit pattern is electrically connected to the second conductive portion and a portion of the second conductive circuit pattern is electrically connected to the first conductive circuit pattern. At least a portion of the second conductive circuit pattern extends along the second direction. The second conductive portion is electrically connected to the other side of the first conductive portion. At least the first conductive portion and the second conductive portion together form a first conductive channel extending along the thickness direction, so that the photosensitive chip is electrically connected to the first circuit layer and the second circuit layer through the connecting pad and the first conductive channel.
2. The optoelectronic packaging structure as described in claim 1, characterized in that, The first multilayer circuit structure further includes a third circuit layer, which is located between the first circuit layer and the second circuit layer. The third circuit layer includes a third conductive portion and a third conductive circuit pattern. The two sides of the third conductive portion are electrically connected to the first conductive portion and the second conductive portion respectively to jointly form the first conductive channel. The third conductive circuit pattern is electrically connected to the first conductive circuit pattern and the second conductive circuit pattern respectively, and at least a portion of the third conductive circuit pattern extends along the first direction or the second direction.
3. The optoelectronic packaging structure as described in claim 2, characterized in that, The molding module further includes a second conductive channel and a first solder pad. The second conductive channel is disposed within the molding body and part of the dielectric layer. The second conductive channel penetrates the first surface and the second surface. The first solder pad is exposed on the first surface and is configured to connect to external components. The two ends of the second conductive channel are respectively connected to the first multilayer circuit structure and the first solder pad.
4. The optoelectronic packaging structure as described in claim 2, characterized in that, The optoelectronic packaging structure further includes a first electronic component, and the molding compound further covers the first electronic component, the first electronic component being connected to the first conductive circuit pattern.
5. The optoelectronic packaging structure as described in claim 1, characterized in that, The molding module further includes a second conductive channel and a first solder pad. The second conductive channel is disposed within the molding body and extends through the first surface and the second surface. The first solder pad is exposed on the first surface and configured to connect to external components. The two ends of the second conductive channel are respectively connected to the first conductive circuit pattern and the first solder pad.
6. The optoelectronic packaging structure as described in claim 5, characterized in that, The substrate module further includes a second multilayer circuit structure, which is disposed within the dielectric layer and electrically connected to the first multilayer circuit structure. The second multilayer circuit structure constitutes a second electronic component.
7. The optoelectronic packaging structure according to any one of claims 2 to 6, characterized in that, The first solder pad has solder balls.
8. The optoelectronic packaging structure according to any one of claims 2 to 6, characterized in that, The connecting pad, the first multilayer circuit structure, the second conductive channel, and the first solder pad are all made of the same conductive material.
9. The optoelectronic packaging structure as described in claim 1, characterized in that, The substrate module includes a first substrate region and a second substrate region connected to each other. The first substrate region overlaps with the molding module, and the second substrate region extends out of the molding module. The first multilayer circuit structure is located in the first substrate region and extends to the second substrate region. The first conductive circuit pattern and the second conductive circuit pattern are located in the first substrate region. The second circuit layer also includes a second solder pad, which is located in the second substrate region. The second solder pad is exposed on the fourth surface and configured to connect to external components.
10. The optoelectronic packaging structure as described in claim 1, characterized in that, The first conductive line extends along the first direction and the second direction, respectively, and the second conductive line pattern extends along the first direction and the second direction, respectively.
11. A method for fabricating an optoelectronic packaging structure, characterized in that, include: A photosensitive chip is encapsulated in a plastic encapsulation body, the plastic encapsulation body including a first surface and a second surface disposed opposite to each other, the photosensitive chip including a photosensitive area and a non-photosensitive area connected together, the photosensitive area and the non-photosensitive area being exposed on the second surface, and the non-photosensitive area being provided with a connecting pad; A first insulating layer is disposed on the second surface, and a first circuit layer is disposed within the first insulating layer. The first insulating layer includes a third surface facing the second surface. The first circuit layer is exposed on the third surface and includes a first conductive portion and a first conductive circuit pattern. One side of the first conductive portion contacts the connecting pad. A first direction and a second direction are defined to be perpendicular to the thickness direction of the first insulating layer, respectively. At least a portion of the first conductive circuit pattern extends along the first direction. A second insulating layer is disposed on the first insulating layer, and a second circuit layer is disposed within the second insulating layer. The second circuit layer includes a second conductive portion and a second conductive circuit pattern. A portion of the second conductive circuit pattern is electrically connected to the second conductive portion and a portion of the second conductive circuit pattern is electrically connected to the first conductive circuit pattern. At least a portion of the second conductive circuit pattern extends along the second direction. The second conductive portion is electrically connected to the other side of the first conductive portion. At least the first conductive portion and the second conductive portion together form a first conductive channel extending along the thickness direction, so that the photosensitive chip is electrically connected to the first circuit layer and the second circuit layer through the connecting pad and the first conductive channel.
12. The method for preparing the optoelectronic packaging structure as described in claim 11, characterized in that, Before setting the second insulating layer and the second circuit layer, the preparation method further includes: A third insulating layer is disposed on the first insulating layer, and a third circuit layer is disposed within the third insulating layer. The third circuit layer includes a third conductive portion and a third conductive circuit pattern. After the second insulating layer and the second circuit layer are provided, the two sides of the third conductive portion are electrically connected to the first conductive portion and the second conductive portion respectively to jointly form the first conductive channel. The third conductive circuit pattern is electrically connected to the first conductive circuit pattern and the second conductive circuit pattern respectively, and at least a portion of the third conductive circuit pattern extends along the first direction or the second direction.
13. The method for preparing the optoelectronic packaging structure as described in claim 12, characterized in that, Also includes: A hollow channel is created within the encapsulation using a laser. The hollow channel includes a first channel portion and a second channel portion connected to each other. The first channel portion penetrates the first surface and the second surface and extends to the first multilayer circuit structure. The second channel portion is disposed on the first surface. as well as Conductive material is filled into the first channel portion and the second channel portion and cured to obtain a second conductive channel and a first solder pad, respectively. The first solder pad is exposed on the first surface and configured to connect to external components. The two ends of the second conductive channel are respectively connected to the first multilayer circuit structure and the first solder pad.
14. The method for preparing the optoelectronic packaging structure as described in claim 13, characterized in that, The encapsulation also covers the first electronic component; After the first circuit layer is set, the first electronic component is connected to the first conductive circuit pattern.
15. The method for preparing the optoelectronic packaging structure as described in claim 12, characterized in that, Also includes: A hollow channel is created within the encapsulation using a laser. The hollow channel includes a first channel portion and a second channel portion connected to each other. The first channel portion penetrates the first surface and the second surface, and the second channel portion is disposed on the first surface. as well as Conductive material is filled into the first channel portion and the second channel portion and cured to obtain a second conductive channel and a first solder pad, respectively. The first solder pad is exposed on the first surface and configured to connect to an external component. The two ends of the second conductive channel are respectively connected to the first conductive circuit pattern and the first solder pad.
16. The method for preparing the optoelectronic packaging structure as described in claim 15, characterized in that, When setting the first circuit layer, the preparation method further includes: setting a fourth circuit layer within the first insulating layer; When setting the third circuit layer, the preparation method further includes: setting a fifth circuit layer within the third insulating layer, wherein at least the fourth circuit layer and the fifth circuit layer constitute a second electronic component, and the second electronic component is electrically connected to the first circuit layer, the second circuit layer, or the third circuit layer.
17. A camera module, comprising a lens assembly, characterized in that, The camera module further includes an optoelectronic packaging structure as described in any one of claims 1 to 10, wherein the lens assembly is disposed on the side of the substrate module of the optoelectronic packaging structure opposite to the plastic encapsulation module.