Transparent display device

Abstract

The invention relates to a transparent display device. In some examples, a transparent display device may include a substrate having a plurality of pixels, each pixel having a transmissive region and a plurality of sub-pixels; an auxiliary line disposed on the substrate and overlapping the transmissive region; a planarization layer disposed on the auxiliary line; a blocking portion disposed between the planarization layer and the auxiliary line; a plurality of undercuts partially disposed on the upper side and the lower side of the barrier; an opposing substrate disposed on the planarization layer; and a plurality of spacers disposed between the planarization layer and the opposing substrate.

Description

Technical Field

[0001] This disclosure relates to display devices, and more specifically, for example, but not limited to, transparent display devices. Background Technology

[0002] With the development of the information age, the demand for display devices for displaying images is growing in various forms. Recently, research on transparent display devices that allow users to view objects or backgrounds on opposite sides through transmissive display devices is actively underway.

[0003] A transparent display device may include a display area in a display panel on which an image is displayed, and the display area may include a transmissive area capable of transmitting external light and a non-transmissive area that does not transmit light. The non-transmissive area may include multiple light-emitting areas having light-emitting elements.

[0004] The descriptions provided in the Background section should not be considered prior art simply because they are mentioned or associated with in the Background section. The Background section may include information describing one or more aspects of the subject matter art. Summary of the Invention

[0005] The inventors of this disclosure have newly recognized that these transparent display devices are constructed by joining a lower substrate (or array substrate) on which a plurality of pixels emitting light to display images are arranged, to an upper substrate (or color filter substrate) on which a plurality of color filters corresponding to each of the plurality of pixels are arranged. However, in transparent display devices, foreign matter may be generated due to the collapse of the cell gap between the lower and upper substrates or the sagging of the substrates, and this foreign matter may lead to pixel defects. Therefore, it is necessary to maintain the cell gap between the lower and upper substrates.

[0006] Therefore, the inventors of this disclosure recognized the problems mentioned above and other limitations associated with the related art, and conducted various experiments to achieve a transparent display device capable of maintaining the cell gap between a substrate (e.g., a lower substrate) and a counter substrate (e.g., an upper substrate).

[0007] In addition, one aspect of this disclosure is to provide a transparent display device capable of blocking, preventing, or minimizing the propagation of cracks through the encapsulation layer.

[0008] In addition, one aspect of this disclosure is to provide a transparent display device capable of preventing or reducing moisture penetration into the light-emitting element.

[0009] Furthermore, one aspect of this disclosure is to provide a transparent display device that, due to the increased lifespan of the light-emitting elements, can be driven with lower power than conventional display devices, thereby reducing power consumption.

[0010] In addition, one aspect of this disclosure is to provide a transparent display device capable of minimizing or mitigating the reduction in transmittance (or transparency).

[0011] In addition, one aspect of this disclosure is to provide a transparent display device that can improve the reliability of resisting external forces.

[0012] Additional features and aspects of this disclosure are set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practicing the inventive concept provided herein. Other features and aspects of the inventive concept may be realized and obtained by means of the structures pointed out or derived therefrom in this disclosure, as well as the claims and drawings herein.

[0013] To achieve these and other aspects of the inventive concept, as implemented and broadly described herein, a transparent display device according to embodiments of the present disclosure includes: a substrate having a plurality of sub-pixels and at least one transmissive region; a planarization layer disposed on the substrate and overlapping the transmissive region; a blocking portion disposed between the planarization layer and the substrate; a plurality of undercut portions partially disposed on the upper and lower sides of the blocking portion; a counter substrate disposed on the planarization layer; and a plurality of spacers disposed between the planarization layer and the counter substrate.

[0014] According to an exemplary embodiment of this disclosure, the cell gap between the substrate (lower substrate) and the opposing substrate (upper substrate) of the transparent display device can be maintained.

[0015] According to an example embodiment of this disclosure, the transparent display device is able to block the propagation of cracks through the encapsulation layer.

[0016] According to an example embodiment of this disclosure, the transparent display device is able to prevent or reduce moisture penetration into the light-emitting element.

[0017] According to an exemplary embodiment of this disclosure, due to the increased lifespan of the light-emitting elements, the transparent display device can be driven with lower power than conventional display devices, thereby reducing power consumption.

[0018] According to exemplary embodiments of this disclosure, transparent display devices can have increased or improved transmittance (or transparency).

[0019] According to an example embodiment of this disclosure, the transparent display device can improve its reliability against external forces.

[0020] It should be understood that both the above general description and the following detailed description are illustrative and explanatory, and are intended to provide further explanation of the claimed inventive concept. Attached Figure Description

[0021] The accompanying drawings may be included to provide a further understanding of this disclosure and may be incorporated into and constitute a part of this disclosure. The drawings illustrate embodiments of the disclosure and, together with the description, serve to explain the various principles of the disclosure. In the drawings:

[0022] Figure 1 This is a schematic plan view of a transparent display device according to one or more embodiments of the present disclosure.

[0023] Figure 2 yes Figure 1 The diagram shows a schematic enlarged view of an example of a portion A containing multiple pixels.

[0024] Figure 3 yes Figure 2 An example of a schematic cross-sectional view of line I-I' is shown.

[0025] Figure 4 yes Figure 3 A schematic enlarged view of an example from Part B.

[0026] Figure 5 It is shown Figure 3 A schematic cross-sectional view of another example of the color filter shown.

[0027] Figure 6 This is a plan view illustrating a transparent display device according to another exemplary embodiment of the present disclosure.

[0028] Figure 7 yes Figure 6 A schematic enlarged view of an example from Part C.

[0029] Throughout the accompanying drawings and detailed description, unless otherwise stated, the same reference numerals should be understood to refer to the same elements, features, and structures. For clarity, illustrative purposes, and convenience, the relative dimensions and depictions of these elements may be exaggerated. Detailed Implementation

[0030] Reference will now be made in detail to exemplary embodiments of this disclosure, examples of which are illustrated in the accompanying drawings. In the following description, detailed descriptions of well-known functions or configurations relevant to this document will be omitted where it is determined that such detailed descriptions would unnecessarily obscure the essential points of the inventive concept. The described progression of processing steps and / or operations is exemplary; however, the order of steps and / or operations is not limited to the order set forth herein and may be varied as is known in the art, except for steps and / or operations that must occur in a specific order. The names of corresponding elements used in the following description may be chosen solely for ease of specification and may therefore differ from those used in actual products. Where possible, the same reference numerals will be used throughout the drawings to refer to the same or similar parts. The advantages and features of this disclosure and methods of implementation thereof will be elucidated by the following exemplary embodiments described in conjunction with the accompanying drawings.

[0031] However, this disclosure may be implemented in different forms and should not be construed as limited to the exemplary embodiments set forth herein.

[0032] Instead, these example implementations are provided so that this disclosure will be thorough and complete enough to help those skilled in the art to fully understand the scope of this disclosure.

[0033] The shapes, dimensions, scales, angles, and quantities illustrated in the drawings are given by way of example only to describe various exemplary embodiments of this disclosure, and therefore this disclosure is not limited to the details shown. Similar reference numerals refer to similar elements.

[0034] In the following description, detailed descriptions will be omitted where it is determined that the specific details of the relevant known functions or configurations unnecessarily obscure the essential points of this disclosure.

[0035] When using the terms “comprising,” “having,” and “including” as described in this disclosure, another component may be added unless a more restrictive term such as “only” is used. Elements described in the singular are intended to include multiple elements, and vice versa, unless the context clearly indicates otherwise.

[0036] When interpreting components, even if such an error or tolerance range is not explicitly described, the component is interpreted as including an error or tolerance range.

[0037] When describing positional relationships, such as using terms like "on," "above," "below," "above," "under," "below," "near," "close to," "adjacent to," "beside," or "next to" to describe the positional relationship between two components, one or more other components may be placed between the two components unless more restrictive terms such as "immediately," "directly," or "closely" are used. For example, when a structure is described as being "above," "below," "on top," "below," "below," "near," "close to," "adjacent to," "beside," or "next to" another structure, this description should be interpreted to include situations where these structures are in contact with each other and situations where a third structure is placed or inserted between them. Furthermore, the terms "left," "right," "top," "bottom," "down," "up," "upper," "lower," etc., refer to any frame of reference.

[0038] When describing temporal relationships, such as when time sequence is described as “after,” “following,” “next,” and “before,” discontinuous situations may be included unless more restrictive terms such as “directly” or “immediately” are used.

[0039] It will be understood that although the terms “first,” “second,” “A,” “B,” “(a),” “(b),” etc., may be used herein to describe various elements, the nature, order, sequence, or number of these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element, without departing from the scope of this disclosure. Furthermore, when an element or layer is described as “connected,” “joined,” or “adhered” to another element or layer, unless otherwise stated, the element or layer may not only be directly connected or adhered to the other element or layer, but may also be indirectly connected or adhered to the other element or layer through one or more intervening elements or layers. Furthermore, when an element is referred to as being disposed “on” or “below” another element, it should be understood that the elements may be configured to be in direct contact with each other, or may be configured not to be in direct contact with each other.

[0040] The “X-axis direction,” “Y-axis direction,” and “Z-axis direction” should not be interpreted by geometric relationships that are only perpendicular to each other, and can have a wider range of directions within the scope of the functionality of the elements disclosed herein.

[0041] The term "at least one" should be understood to include any and all combinations of one or more of the related listed items. For example, "at least one of the first, second, and third items" means a combination of all items derived from two or more of the first, second, and third items, as well as the first, second, or third item alone. Furthermore, the term "can" fully encompasses all the meanings and scope of the term "may," and vice versa.

[0042] Features of the various embodiments of this disclosure may be linked or combined with each other in part or in whole, and may be technically driven and interoperable with each other in various ways, as can be fully understood by those skilled in the art.

[0043] The exemplary implementations of this disclosure may be implemented independently of each other, or may be implemented together in an interdependent manner.

[0044] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which the exemplary embodiments pertain. It will also be understood that terms such as those defined in common dictionaries shall be interpreted as having a meaning consistent, for example, with their meaning in the context of the relevant field, and shall not be interpreted as having an idealized or overly formal meaning unless expressly defined herein. For example, the terms “component” or “unit” may be applied, for example, to a single circuit or structure, an integrated circuit, a computational block of a circuit arrangement, or any structure configured to perform the described functions as would be understood by one of ordinary skill in the art.

[0045] In the following, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. Furthermore, all components or elements of each display device according to all embodiments of the present disclosure are operatively connected and configured.

[0046] Figure 1 This is a schematic plan view of a transparent display device according to one or more embodiments of the present disclosure. Figure 2 yes Figure 1 The diagram shows a schematic enlarged view of part A, which contains multiple pixels.

[0047] In the following text, the first direction (e.g., the Y-axis direction) refers to the direction parallel to the common power line EVSS (or data line), the second direction (e.g., the X-axis direction) refers to the direction parallel to the gate line GL, and the third direction (e.g., the Z-axis direction) refers to the thickness direction of the transparent display device 100.

[0048] The following description describes a transparent display device 100 based on one or more embodiments of this disclosure as an organic light-emitting display device, but is not limited thereto. For example, the transparent display device according to one or more embodiments of this disclosure can be implemented as any one of a liquid crystal display device, a field emission display device, a quantum dot (QD) light-emitting diode device, and an electrophoretic display device, as well as an organic light-emitting display device.

[0049] Reference Figure 1 and Figure 2 A transparent display device 100 according to one or more embodiments of the present disclosure may include a display panel having a gating driver GD, a source driver integrated circuit (hereinafter referred to as "IC") 160, a flexible film 170, a circuit board 180 (e.g., a printed circuit board) and a timing controller 190.

[0050] The display panel may include a substrate 110 and a counter substrate 200 (e.g., ...) that are bonded to each other. Figure 3 (As shown). The substrate 110 may include auxiliary lines 120, a planarization layer 130, a blocking portion 140, and a plurality of undercut portions 150. Since the substrate 110 is bonded to the opposing substrate 200, the opposing substrate 200 can be placed on the planarization layer 130. A plurality of spacers SPC can be placed between the planarization layer 130 and the opposing substrate 200.

[0051] In typical transparent display devices, foreign matter may be generated due to the collapse of the cell gap between the lower and upper substrates or the sagging of the substrates. Therefore, in typical transparent display devices, foreign matter may lead to pixel defects.

[0052] Conversely, the transparent display device 100 according to an exemplary embodiment of the present disclosure has a plurality of spacers SPCs provided between the substrate 110 (or planarization layer 130) and the opposing substrate 200, such that the cell gap between the substrate 110 and the opposing substrate 200 will not collapse or the substrate will sag, thus preventing the generation of foreign matter. Therefore, the transparent display device 100 according to an exemplary embodiment of the present disclosure can prevent or reduce pixel defects caused by foreign matter originating from cell gap defects or substrate sag.

[0053] The substrate 110 may include thin-film transistors and may be a transistor array substrate, a lower substrate, a base substrate, or a first substrate. The substrate 110 may be a transparent glass substrate or a transparent plastic substrate.

[0054] The opposing substrate 200 can be bonded to the substrate 110 via an adhesive member. For example, the opposing substrate 200 may have a smaller size than the substrate 110 and can be bonded to the remainder of the substrate 110 except for the pad area. The opposing substrate 200 may be an upper substrate, a second substrate, or a package substrate.

[0055] The gating driver GD provides a gating signal to the gating line according to the gating control signal input from the timing controller 190. When the source driver IC 160 is manufactured as a driver chip, the source driver IC 160 can be packaged in a flexible film 170 using a chip-on-film (COF) method or a chip-on-plastic (COP) method.

[0056] Pads such as power pads and data pads can be formed in the non-display areas of the display panel. The flexible film 170 may include lines connecting the pads to the source driver IC 160 and lines connecting the pads to the circuit board 180. The flexible film 170 can be attached to the pads using an anisotropic conductive film, whereby the pads can be connected to the lines of the flexible film 170.

[0057] According to one example, substrate 110 may include a display area DA and a non-display area NDA. The non-display area NDA may completely or only partially surround the display area DA.

[0058] The display area DA is the area where an image is displayed, and it can be a pixel array area, an active area, a pixel array unit, a display unit, or a screen. For example, the display area DA can be located in the central part of the display panel.

[0059] According to an example display area DA, it may include gating lines, data lines, pixel drive power lines, and multiple pixels P (such as...). Figure 2 (As shown). Each of the plurality of pixels P may include a plurality of sub-pixels SP, which may be defined by gate lines and data lines, and a transmissive region TA located adjacent to some or all of the sub-pixels SP. The transmissive region TA is a region configured to allow light to pass through the front and rear surfaces of the display panel. Therefore, a user located in the direction of the front surface of the display panel can view the background or image located in the direction of the rear surface of the display panel through the transmissive region TA.

[0060] Each of the multiple sub-pixels SP can be defined as the smallest unit area that actually emits light.

[0061] According to one example, a unit pixel P is formed by at least four adjacent sub-pixels SP that are configured to emit light of different colors and a transmission region TA. The transmission region TA included in the unit pixel may be divided into multiple parts. A unit pixel may include, but is not limited to, red sub-pixels, white sub-pixels, blue sub-pixels, green sub-pixels, and the transmission region TA. According to another example, a unit pixel is formed by three adjacent sub-pixels SP that are configured to emit light of different colors and a transmission region TA. A unit pixel may include, but is not limited to, at least one red sub-pixel, at least one green sub-pixel, at least one blue sub-pixel, and a transmission region TA. In another example, a unit pixel may include at least one magenta sub-pixel, at least one cyan sub-pixel, at least one yellow sub-pixel, and one or more transmission regions TA. Furthermore, although... Figure 2 The arrangement of pixels in which subpixels are arranged sequentially in a first direction and a transmissive region TA is adjacent to the subpixels in a second direction is illustrated by way of example, but this disclosure is not limited thereto and various other arrangements of subpixels and transmissive regions are possible.

[0062] Each of the multiple sub-pixels SP may include a thin-film transistor and a light-emitting element connected to the thin-film transistor. The sub-pixel may include a light-emitting layer (or an organic light-emitting layer) interposed between a first electrode and a second electrode.

[0063] The emissive layers in each of the multiple sub-pixels SP can individually emit different colors of light, or they can collectively emit white light. According to one example, when the emissive layers of each of the multiple sub-pixels SP collectively emit white light, each of the red, green, and blue sub-pixels may include a color filter (or wavelength conversion element) for converting the white light into different colors. In this case, the white sub-pixel, according to one example, may not include a color filter. According to one example, the color filter CF may include a blue color filter CF1, a green color filter CF2, and a red color filter CF3.

[0064] In the transparent display device 100 according to an exemplary embodiment of the present disclosure, the area provided with a red color filter CF3 can be a red sub-pixel SP1, the area provided with a blue color filter CF1 can be a blue sub-pixel SP3, the area provided with a green color filter CF2 can be a green sub-pixel SP4, and the area without a color filter can be a white sub-pixel SP2. In this disclosure, the red sub-pixel SP1 can be represented as a first sub-pixel set to emit red light, the blue sub-pixel SP3 can be represented as a third sub-pixel set to emit blue light, the green sub-pixel SP4 can be represented as a fourth sub-pixel set to emit green light, and the white sub-pixel SP2 can be represented as a second sub-pixel set to emit white light.

[0065] Each of the multiple sub-pixels SP can supply a predetermined current to the organic light-emitting element according to the data voltage of the data line when a gating signal is input from the gating line using a thin-film transistor. Therefore, the light-emitting layer of each sub-pixel can emit light with a predetermined brightness according to the predetermined current.

[0066] Reference Figure 2 The display area DA includes a transmissive area TA and a non-transmissive area. The transmissive area TA is the region through which most of the light incident from the outside passes. The non-transmissive area is the region through which most of the light incident from the outside does not pass. The non-transmissive area may include a light-emitting area EA (such as...). Figure 3 (as shown) and non-luminescent NEA (e.g.) Figure 3 (As shown). The non-emitting region NEA can be any region other than the emitting region EA. In one example, the non-emitting region NEA can be disposed on the substrate 110 between the transmissive region TA and multiple sub-pixels SP (or multiple emitting regions EA) and between multiple sub-pixels SP (or multiple emitting regions EA).

[0067] Multiple pixels P and multiple lines for driving each of the multiple pixels P may be arranged in a non-light-emitting area NEA and / or a light-emitting area EA. According to one example, the multiple lines may include multiple first signal lines SL1 and multiple second signal lines SL2.

[0068] Multiple first signal lines SL1 may extend in a first direction (Y-axis direction). The multiple first signal lines SL1 may intersect with multiple second signal lines SL2. Each of the multiple first signal lines SL1 may include a pixel power line and a common power line EVSS arranged separately from the pixel power line. In one example, the common power line EVSS may partially overlap with each of the multiple sub-pixels SP. For example, as... Figure 2 As shown, the common power line EVSS can be arranged relatively long in the first direction (Y-axis direction) and overlaps with each of the first to fourth sub-pixels SP1, SP2, SP3, SP4 arranged in the first direction (Y-axis direction).

[0069] In an example implementation, the plurality of first signal lines SL1 may further include a plurality of data lines and reference lines. The plurality of data lines may include a first data line for driving a first sub-pixel SP1, a second data line for driving a second sub-pixel SP2, a third data line for driving a third sub-pixel, and a fourth data line for driving a fourth sub-pixel SP4.

[0070] In the following text, when the first signal line SL1 comprises multiple lines, one first signal line SL1 may refer to a signal line group consisting of multiple lines. For example, when the first signal line SL1 comprises four data lines, a pixel power line, a common power line, and a reference line, one first signal line SL1 may refer to a signal line group consisting of four data lines, a pixel power line, a common power line, and a reference line.

[0071] Multiple second signal lines SL2 may extend in a second direction (X-axis direction). Each of the multiple second signal lines SL2 may include at least one gating line GL (or scan line GL).

[0072] In the following text, when the second signal line SL2 comprises multiple lines, one second signal line SL2 may refer to a signal line group consisting of multiple lines. For example, when the second signal line SL2 comprises two scan lines GL, one second signal line SL2 may refer to a signal line group consisting of two scan lines.

[0073] At least one transmission region TA may be disposed between adjacent second signal lines SL2. Furthermore, at least one transmission region TA may be disposed between adjacent first signal lines SL1. For example, the transmission region TA may be surrounded by two first signal lines SL1 and two second signal lines SL2. However, this is not a limitation, and the number of signal lines surrounding the transmission region TA may vary depending on the line layout structure.

[0074] Return to reference Figure 1 The non-display area NDA is an area on which no image is displayed, and can be a peripheral circuit area, a signal providing area, a passive area, or a border area. The non-display area NDA can be configured to be near the display area DA. For example, the non-display area NDA can be configured to surround the display area DA.

[0075] A transparent display device 100 according to an exemplary embodiment of this disclosure may include a pad portion PA disposed in a non-display area NDA. The pad portion PA can be used to drive a plurality of pixels P. For example, the pad portion PA may provide power and / or signals to the plurality of pixels P disposed in the display area DA to output an image. The non-display area NDA may include a first non-display area NDA1, a second non-display area NDA2, a third non-display area NDA3, and a fourth non-display area NDA4. According to one example, the pad portion PA may be disposed in the first non-display area NDA1.

[0076] The gating driver GD provides gating signals to the gating lines based on the gating control signal input from the timing controller 190. For example... Figure 1As shown, the gate driver GD can be formed in a non-display area NDA on one side or both sides of the display area DA of the display panel using an in-panel gate driver (GIP) method. Alternatively, the gate driver GD can be manufactured as a driver chip, which is encapsulated in a flexible film using a tape-on-bundle (TAB) method and attached to the non-display area NDA on one or both sides of the display area DA of the display panel.

[0077] Multiple gating drivers GD may be separately disposed on the left side (e.g., a second non-display area NDA2) and the right side (e.g., a third non-display area NDA3) of the display area DA. According to one example, the multiple gating drivers GD may be connected to multiple pixels P and multiple second signal lines SL2 for providing signals to the multiple pixels P. The multiple second signal lines SL2 may include at least one signal line for providing signals for driving the pixels P.

[0078] Multiple first signal lines SL1 may extend in a first direction (Y-axis direction). The multiple first signal lines SL1 may intersect with multiple second signal lines SL2. The multiple first signal lines may include a pixel power line and at least one data line to provide data voltage to pixel P. Each of the multiple first signal lines SL1 may be connected to a pixel power short bar VDDB, a common power short bar VSSB, or at least one of multiple pads. The pixel power short bar VDDB and the common power short bar VSSB may be located in a fourth non-display area NDA4, configured based on the display area DA and the pad area PA.

[0079] A pixel is configured to overlap with at least one of a first signal line SL1 or a second signal line SL2, and emits predetermined light to display an image. The luminous area EA (e.g., ...) Figure 3 (As shown) can correspond to the light-emitting area in pixel P.

[0080] Each of the red sub-pixel SP1 (or first sub-pixel SP1), white sub-pixel SP2 (or second sub-pixel SP2), blue sub-pixel SP3 (or third sub-pixel SP3), and green sub-pixel SP4 (or fourth sub-pixel SP4) may include at least one or more light-emitting regions. At least one light-emitting region of each of the sub-pixels SP1, SP2, SP3, and SP4 may have the same shape and size, but is not necessarily limited thereto.

[0081] Reference Figure 2The first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, and the fourth sub-pixel SP4 can be arranged in a row in a first direction (Y-axis direction), and the transmission region TA can be arranged adjacent to each of the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, and the fourth sub-pixel SP4 in a second direction (X-axis direction). However, this is not limited to this, and the arrangement structure of the multiple sub-pixels SP can be arranged in various ways according to the circuit design. For example, the multiple sub-pixels SP may include the first sub-pixel SP1 and the third sub-pixel SP3 spaced apart in the first direction (Y-axis direction), and the second sub-pixel SP2 and the fourth sub-pixel SP4 spaced apart from each of the first sub-pixel SP1 and the third sub-pixel SP3 in the second direction (X-axis direction). The transmission region TA can be arranged adjacent to each of the second sub-pixel SP2 and the fourth sub-pixel SP4 in the second direction (X-axis direction). In the following, it will be described that each of the first to fourth sub-pixels SP1, SP2, SP3, SP4 is arranged in a row in the first direction (Y-axis direction) (e.g. Figure 2 An example (as shown).

[0082] Figure 3 yes Figure 2 The schematic cross-sectional view of line I-I' is shown.

[0083] Reference Figure 3 According to an exemplary embodiment of the present disclosure, the transparent display device 100 may have a non-light-emitting region NEA disposed between the transmissive region TA on the substrate 110 and a plurality of sub-pixels SP1, SP2, SP3, SP4 (or a plurality of light-emitting regions EA). Furthermore, the transparent display device 100 according to an exemplary embodiment of the present disclosure may have a non-light-emitting region NEA partially disposed within the transmissive region TA. For example, the non-light-emitting region NEA may be formed in the transmissive region TA at a position corresponding to the planarization layer 130 (or island OC) on the auxiliary line 120.

[0084] The non-emitting area (NEA) can refer to an area within the display area (DA) that does not emit light, and because it does not emit light, it can be represented as a dead zone. According to one example, a dead zone can be an area in which a black matrix and / or a dam are set, but is not limited to this, and can refer to an area that does not emit light.

[0085] The non-emitting region NEA and / or the emitting region EA may have multiple lines; for example, a first signal line SL1 and a second signal line SL2 may be configured. According to one example, the first signal line SL1 may include a pixel power line, a common power line EVSS, a reference line, and multiple data lines extending in a first direction (Y-axis direction). According to one example, the second signal line SL2 may include a gating line GL configured to extend in a second direction (X-axis direction).

[0086] A transparent display device 100 according to an exemplary embodiment of the present disclosure may include an auxiliary line 120, a planarization layer 130, a blocking portion 140, and a plurality of undercut portions 150.

[0087] An auxiliary line 120, according to one example, is arranged on the substrate 110 and may overlap with the transmission region TA. The auxiliary line 120 is used to supplement the cathode electrode 117 with a common voltage (or common power supply). Therefore, as... Figure 3 As shown, the auxiliary line 120 may extend from the transmission region TA toward one of the plurality of sub-pixels SP (e.g., the third sub-pixel SP3) and connect to the common power line EVSS. Furthermore, the cathode electrode 117 may be connected to the auxiliary line 120 in the undercut portion 150. Since the auxiliary line 120 is configured to connect to the common power line EVSS, it can be referred to using the terminology of a branch line of the common power line.

[0088] For example, in typical large-area transparent display devices, a voltage drop may occur when a common voltage supplied from the edge of the display panel is applied to the center. Therefore, typical large-area transparent display devices suffer from uneven brightness of the image emitted from the edge and center of the display panel. Furthermore, because typical large-area transparent display devices require high power to drive the display panel to address the aforementioned uneven image brightness, overall power consumption is increased.

[0089] However, in the transparent display device 100 according to an exemplary embodiment of the present disclosure, the auxiliary line 120 is arranged to overlap with the transmissive region TA included in the plurality of pixels P, such that even in the central portion of the display panel, the cathode electrode 117 can receive a common voltage through the auxiliary line 120. Therefore, the transparent display device 100 according to the exemplary embodiment of the present disclosure is configured such that the common voltage difference between the edge portion and the central portion of the display panel is small or non-existent, so that the brightness of the image emitted from the edge portion and the central portion of the display panel can be provided uniformly.

[0090] Furthermore, since the transparent display device 100 according to the exemplary embodiment of this disclosure is configured such that the cathode electrode 117 contacts the auxiliary line 120 at the undercut portion 150 in the transmission region TA, the voltage drop at the central portion of the display panel can be prevented or reduced, making it possible to make the brightness of the edge portion and the central portion of the display panel uniform with low power, thereby reducing the overall power consumption.

[0091] According to one example, a planarization layer 130 may be placed on an auxiliary line 120. According to one example, the planarization layer 130 is used to form a plurality of undercut portions 150. Therefore, the planarization layer 130 may be placed on the auxiliary line 120 with a predetermined width and thickness. The plurality of undercut portions 150 are intended to disconnect the encapsulation layer 118. The plurality of undercut portions 150 may refer to a plurality of spaces (or at least one space) formed between the auxiliary line 120 and the planarization layer 130. Therefore, the planarization layer 130 may be arranged to be spaced apart from the auxiliary line 120 in a third direction (Z-axis direction). For example, since a plurality of inorganic films 111 and barrier portions 140 may be arranged on the auxiliary line 120, the planarization layer 130 may be arranged to be spaced apart from the auxiliary line 120 in a third direction (Z-axis direction).

[0092] Furthermore, in the transparent display device 100 according to an exemplary embodiment of this disclosure, the planarization layer 130 (or island OC) on the auxiliary line 120 can serve as a support for the opposing substrate (or upper substrate). For example, as Figure 3 As shown, the planarization layer 130 on the auxiliary line 120 can be used as a support to maintain the cell gap (or spacing) between the substrate 110 and the opposing substrate 200 together with the plurality of inorganic films 111, the patterned structure PS, the spacer SPC, at least one color filter CF, and the black matrix BM. Therefore, the transparent display device 100 according to the exemplary embodiment of this disclosure can have improved reliability against external impacts (or external forces) without the need for a separate support.

[0093] Furthermore, when the transparent display device 100 according to the exemplary embodiment of this disclosure is implemented as a large-area transparent display device, since a support is provided for each of the plurality of transmission regions TA, it is possible to prevent or reduce the sagging of the opposing substrate (or upper substrate) toward the substrate 110 (or lower substrate 110).

[0094] The plurality of inorganic films 111 may include a first inorganic film IL1 and a second inorganic film IL2. According to one example, the first inorganic film IL1 may include a second passivation layer 111d. According to one example, the second inorganic film IL2 may be disposed below the first inorganic film IL1 and may include an interlayer insulating layer 111b and a first passivation layer 111c. The plurality of inorganic films 111 may also include a gate insulating layer 111a disposed between the active layer 112a and the gate electrode 112b of the thin-film transistor. Figure 3 As shown, the interlayer insulating layer 111b, the first passivation layer 111c, the blocking portion 140, and the second passivation layer 111d can be arranged between the planarization layer 130 and the auxiliary line 120.

[0095] The planarization layer 130 may be placed spaced apart from the outer cover layer 113, which is positioned to partially overlap with the light-emitting region EA of each of the plurality of sub-pixels SP. For example, the planarization layer 130 may be arranged to overlap with the transmissive region TA, and thus may be arranged to be spaced apart from the outer cover layer 113. The planarization layer 130 may be formed together with the outer cover layer 113 using the same materials and processes. Therefore, the planarization layer 130 may be placed on the same layer as the outer cover layer 113. For example, the planarization layer 130 may be disposed on the second passivation layer 111d. In this disclosure, different terms and reference numerals are used to distinguish the planarization layer 130 from the outer cover layer 113. Since the planarization layer 130 is configured in an island shape spaced apart from the outer cover layer 113, it may be referred to by the term "island OC".

[0096] According to one example, the blocking portion 140 is configured to form a plurality of undercut portions 150 (or second undercut portions 152). The blocking portion 140 may be disposed between the planarization layer 130 and the auxiliary line 120. For example, the blocking portion 140 may be placed between the first passivation layer 111c and the second passivation layer 111d. The blocking portion 140 may be formed on the same layer as the gate electrode 112b or the source electrode 112c, but is not limited thereto. The blocking portion 140 may be disposed on a layer other than the upper surface of the first passivation layer 111c. The blocking portion 140 may be formed of a material that will not be etched by an etchant that etches the plurality of inorganic films 111. For example, the blocking portion 140 may be formed of a single layer or multiple layers of metallic material.

[0097] The width W1 of the blocking portion 140 can be set to be wider than the width of the first inorganic film IL1 (or the width of the second inorganic film IL2). This is because the blocking portion 140 is formed of a metallic material and will not be etched by the etchant used to etch the inorganic film, allowing an undercut portion 150 (or a first undercut portion 151) to be formed on the blocking portion 140, and another undercut portion 150 (or a second undercut portion 152) to be formed below the blocking portion 140. Therefore, as... Figure 3 As shown, a first inorganic film IL1 (or a second passivation layer 111d) narrower than the blocking portion 140 can be disposed between the planarization layer 130 and the blocking portion 140. Furthermore, a second inorganic film IL2 (or an interlayer insulating layer 111b and a first passivation layer 111c) narrower than the blocking portion 140 can be disposed between the blocking portion 140 and the auxiliary line 120.

[0098] Furthermore, since the auxiliary line 120 extends from the transmission region TA toward the light-emitting region EA and connects to the common power line EVSS, the width W1 of the blocking portion 140 can be set to be narrower than the width W2 of the auxiliary line 120.

[0099] According to one example, a plurality of undercut portions 150 may be partially arranged on the upper and lower sides of the barrier portion 140. As described above, the plurality of undercut portions 150 may be formed between the auxiliary line 120 and the planarization layer 130, thereby disconnecting the encapsulation layer 118. The plurality of undercut portions 150 may be formed by partially etching the first inorganic film IL1 between the planarization layer 130 and the barrier portion 140 and partially etching the second inorganic film IL2 between the barrier portion 140 and the auxiliary line 120. Therefore, based on Figure 3 A predetermined space can be formed on each of the left and right sides of the first inorganic film IL1 (or the second passivation layer 111d) on the upper surface of the blocking portion 140. Furthermore, based on... Figure 3 A predetermined space may be formed on each of the left and right sides of the second inorganic film IL2 (or the interlayer insulating layer 111b and the first passivation layer 111c) on the lower surface of the blocking portion 140.

[0100] Therefore, the transparent display device 100 according to the exemplary embodiment of this disclosure may have a double undercut structure, wherein a plurality of undercut portions 150 are provided on each of the upper and lower sides of the blocking portion 140, thereby overlapping the plurality of undercut portions 150 in a third direction (Z-axis direction). Therefore, since the transparent display device 100 according to the exemplary embodiment of this disclosure can reliably cut the encapsulation layer 118 through a deeper double undercut structure, even if an external impact is transmitted through the spacer SPC to the encapsulation layer 118 on the planarization layer 130 and a crack occurs, the crack can be configured such that it does not propagate to the encapsulation layer 118 covering the light-emitting element layer E of each of the plurality of sub-pixels SP. Here, the light-emitting element layer E may refer to the light-emitting element that emits light in each of the plurality of sub-pixels SP.

[0101] As a result, the transparent display device 100 according to the exemplary embodiment of the present disclosure can maximize or improve the disconnection of the encapsulation layer 118 through a plurality of undercut portions 150, thereby blocking the propagation of cracks through the encapsulation layer 118. Furthermore, in the transparent display device 100 according to the exemplary embodiment of the present disclosure, cracks do not propagate in the encapsulation layer 118 covering each of the light-emitting elements (or light-emitting element layers E) in a plurality of sub-pixels SP, so that the encapsulation layer 118 can maintain a sealed state for the light-emitting elements (or light-emitting element layers E), and thus prevent or reduce moisture penetration into the light-emitting elements (or light-emitting element layers E).

[0102] Furthermore, each of the plurality of spacers SPCs may be placed in the transmissive region TA. In an exemplary embodiment of this disclosure, the transparent display device 100 may include at least one transmissive region TA for each of the plurality of pixels P. Therefore, since the transparent display device 100 according to the exemplary embodiment of this disclosure may have each of the plurality of spacers SPCs disposed in each of the plurality of transmissive regions TA, the cell gap between the substrate 110 and the opposing substrate 200 can be firmly maintained, thereby not only reducing the defect rate but also improving the robustness against external forces.

[0103] In the following text, refer again Figure 3 The structure of each of the multiple sub-pixels SP will be described in detail.

[0104] Reference Figure 3 A transparent display device 100 according to an example embodiment of the present disclosure may include a buffer layer BL, a plurality of inorganic film layers 111, a thin film transistor 112, an outer coating layer 113, a pixel electrode 114, a dam 115, an organic light-emitting layer 116, a cathode electrode 117, an encapsulation layer 118, a filling layer 119, a color filter CF, a black matrix BM, and an upper organic film UO.

[0105] More specifically, each sub-pixel SP according to the example embodiment may include a plurality of inorganic film layers 111 disposed on the upper surface of the buffer layer BL, including a gate insulating layer 111a, an interlayer insulating layer 111b, a first passivation layer 111c, and a second passivation layer 111d; an outer cover layer 113 disposed on the plurality of inorganic film layers 111; a pixel electrode 114 disposed on the outer cover layer 113; a dam 115 covering the edge of the pixel electrode 114; an organic light-emitting layer 116 on the pixel electrode 114 and the dam 115; a cathode electrode 117 on the organic light-emitting layer 116; an encapsulation layer 118 on the cathode electrode 117; a fill layer 119 on the encapsulation layer 118; a color filter CF and a black matrix BM on the fill layer 119; and an upper organic film UO covering the color filter CF and the black matrix BM.

[0106] Thin-film transistors 112 for driving sub-pixels SP can be disposed on multiple inorganic film layers 111. The multiple inorganic film layers 111 can also be referred to by the terms "inorganic film layer" or "circuit element layer". A buffer layer BL can be included in the multiple inorganic film layers 111 together with a gate insulating layer 111a, an interlayer insulating layer 111b, a first passivation layer 111c, and a second passivation layer 111d. A pixel electrode 114, an organic light-emitting layer 116, and a cathode electrode 117 can be included in the light-emitting element layer E.

[0107] A buffer layer BL may be formed between the substrate 110 and the gate insulating layer 111a to protect the thin-film transistor 112. The buffer layer BL may be disposed on the entire surface (or front surface) of the substrate 110. However, this is not a limitation, and the buffer layer BL may be partially disposed on the substrate 110. Figure 3 As shown, the common power line EVSS can be located in the portion where the buffer layer BL is not provided. However, this is not the only possibility, and the buffer layer BL can be configured to partially cover the common power line EVSS.

[0108] A common power line EVSS may be spaced apart from the thin-film transistor 112 and may be arranged to overlap with the light-emitting region EA and / or the non-light-emitting region NEA of each of the plurality of sub-pixels SP. An auxiliary line 120 may be connected to and arranged to the common power line EVSS. Thus, the auxiliary line 120 may receive a common voltage from the common power line EVSS. According to one example, the auxiliary line 120 may be formed together with the common power line EVSS. A buffer layer BL may also be used to prevent material contained in the substrate 110 from diffusing into the transistor layer during the high-temperature process during the fabrication process of the thin-film transistor. Optionally, in some cases, the buffer layer BL may be omitted.

[0109] According to one example, a thin-film transistor 112 (or driving transistor) may include an active layer 112a, a gate electrode 112b, a source electrode 112c, and a drain electrode 112d.

[0110] The active layer 112a may include a channel region, a drain region, and a source region in the thin-film transistor region of the circuit region of the sub-pixel SP. The drain region and the source region may be spaced apart from each other by the channel region interposed therebetween.

[0111] The active layer 112a may be formed of a semiconductor material based on any one of amorphous silicon, polycrystalline silicon, oxide and organic materials.

[0112] The gate insulating layer 111a may be formed on the channel region of the active layer 112a. As an example, the gate insulating layer 111a may be formed in an island shape only on the channel region of the active layer 112a, or it may be formed on the entire front surface of the substrate 110 or the buffer layer BL that includes the active layer 112a.

[0113] The gate electrode 112b may be formed on the gate insulating layer 111a to overlap with the channel region of the active layer 112a.

[0114] An interlayer insulating layer 111b can be formed on the gate electrode 112b and the drain and source regions of the active layer 112a. For example, in... Figure 3In this embodiment, the interlayer insulating layer 111b can be formed in the entire light-emitting region of the sub-pixel SP. However, the embodiments of this disclosure are not limited to this. The interlayer insulating layer 111b can be patterned between the drain electrode 112d and the gate electrode 112b and the drain region of the active layer 112a, and can be arranged in an island shape. In addition, it can be patterned between the source electrode 112c and the gate electrode 112b and the source region of the active layer 112a, and can be arranged in an island shape.

[0115] The source electrode 112c can be electrically connected to the source region of the active layer 112a through a source contact hole provided in the interlayer insulating layer 111b that overlaps with the source region of the active layer 112a. The drain electrode 112d can be electrically connected to the drain region of the active layer 112a through a drain contact hole provided in the interlayer insulating layer 111b that overlaps with the drain region of the active layer 112a.

[0116] The drain electrode 112d and the source electrode 112c can be made of the same metallic material. For example, each of the drain electrode 112d and the source electrode 112c can be made of a single metal layer, a single layer of an alloy, or multiple layers of two or more layers, which may be the same as or different from the gate electrode.

[0117] Furthermore, the circuit region may also include a first switching thin-film transistor and a second switching thin-film transistor disposed together with the thin-film transistor 112, as well as a capacitor. Since each of the first and second switching thin-film transistors is disposed on the circuit region of the sub-pixel SP and has the same structure as the thin-film transistor 112, their description will be omitted. The capacitor may be disposed in the overlapping region between the gate electrode 112b and the source electrode 112c of the thin-film transistor 112, overlapping each other using an interlayer insulating layer 111b inserted therebetween.

[0118] Additionally, to prevent or mitigate the shift in threshold voltage of the thin-film transistors disposed in the pixel region due to light, the display panel or substrate 110 may further include a light-shielding layer LS disposed below the active layer 112a of at least one of the thin-film transistors 112, the first switching thin-film transistor, or the second switching thin-film transistor. The light-shielding layer may be disposed between the substrate 110 and the active layer 112a to block light incident on the active layer 112a through the substrate 110, thereby minimizing or reducing the change in the threshold voltage of the transistors due to external light. Furthermore, since the light-shielding layer is disposed between the substrate 110 and the active layer 112a, the thin-film transistors can be prevented or reduced from being seen by the user.

[0119] A first passivation layer 111c may be disposed on the substrate 110 to cover the pixel area. The first passivation layer 111c covers the drain electrode 112d, source electrode 112c, and gate electrode 112b of the thin-film transistor 112, as well as the buffer layer BL. The first passivation layer 111c may be formed above the circuit area and the light-emitting area. The first passivation layer 111c may be omitted.

[0120] A second passivation layer 111d may be disposed on the substrate 110 to cover the first passivation layer 111c. The second passivation layer 111d may cover the connection electrode CE disposed on the first passivation layer 111c. According to one example, the connection electrode CE is used to connect the source electrode 112c and the pixel electrode 114. The connection electrode CE can be connected to the source electrode 112c through a contact hole formed in the first passivation layer 111c, and to the pixel electrode 114 through a contact hole formed in the second passivation layer 111d. The connection electrode CE and the second passivation layer 111d may be omitted.

[0121] An outer cover layer 113 may be disposed on the substrate 110 to cover the second passivation layer 111d. When the second passivation layer 111d is omitted, the outer cover layer 113 may be disposed on the substrate 110 to cover the circuit region (or thin-film transistor 112). The outer cover layer 113 may be formed in the circuit region CA and the light-emitting region EA in which the thin-film transistor 112 is disposed. In addition, the outer cover layer 113 may be formed in the non-display region NDA other than the pad region PA and in the entire display region DA. For example, the outer cover layer 113 may include an extension (or extension) extending or expanding from the display region DA to the other non-display regions NDA other than the pad region PA. Therefore, the outer cover layer 113 may have a size that is relatively wider than the size of the display region DA.

[0122] According to one example, the outer cover 113 can be formed to have a relatively thick thickness, thereby providing a flat surface on the display area DA and the non-display area NDA. For example, the outer cover 113 can be made of organic materials such as photoacrylic acid, benzocyclobutene, polyimide, and fluoropolymers.

[0123] On the other hand, the upper surface of the outer coating layer 113 can be made flat. Therefore, the pixel electrode 114 on the outer coating layer 113 can also be made flat, and the organic light-emitting layer 116 and cathode electrode 117 formed thereon can also be made flat. Since the pixel electrode 114, the organic light-emitting layer 116, and the cathode electrode 117 (e.g., the light-emitting element layer E) are made flat in the light-emitting region EA, the thickness of each of the pixel electrode 114, the organic light-emitting layer 116, and the cathode electrode 117 can be uniformly formed in the light-emitting region EA. Therefore, the organic light-emitting layer 116 can emit light uniformly without deviation in the light-emitting region EA.

[0124] According to one example, a pixel electrode 114 may be formed on an outer cover layer 113. The pixel electrode 114 may be connected to the drain or source electrode of the thin-film transistor 112 through a contact hole passing through the outer cover layer 113 and the second passivation layer 111d. An edge portion of the pixel electrode 114 may be covered by a dam 115. The pixel electrode 114 may be made of at least one of a transparent metallic material or a semi-transparent metallic material.

[0125] Since the transparent display device 100 according to the exemplary embodiment of this disclosure is a top-emitting type, the pixel electrode 114 can be made of a high-reflectivity metal material or a stacked structure of a high-reflectivity metal material and a transparent metal material. For example, the pixel electrode 114 can be formed of a metal material with high reflectivity, such as a stacked structure of aluminum and titanium (Ti / Al / Ti), a stacked structure of aluminum and ITO (ITO / Al / ITO), a silver alloy, and a stacked structure of silver alloy and ITO (ITO / silver alloy / ITO). The silver alloy can be an alloy such as silver (Ag), palladium (Pd), and copper (Cu).

[0126] Furthermore, the material constituting the pixel electrode 114 may include MoTi. The pixel electrode 114 may be a first electrode or an anode electrode.

[0127] The dam 115 can be a non-light-emitting area and is disposed on one side of the light-emitting area EA of each of the plurality of sub-pixels SP. For example, the dam 115 can be disposed in the non-light-emitting area NEA. The dam 115 can be formed to cover the portion where the edge of the pixel electrode 114 is located. Therefore, the dam 115 can prevent the pixel electrode 114 and the cathode electrode 117 from contacting at the edge of the pixel electrode 114. The exposed portion of the pixel electrode 114 not covered by the dam 115 can be included in the light-emitting portion (or light-emitting area EA). For example, the exposed portion of the pixel electrode 114 not covered by the dam 115 can define the light-emitting area EA.

[0128] After the dam 115 is formed, an organic light-emitting layer 116 may be formed to cover the pixel electrode 114 and the dam 115. Therefore, the dam 115 may be disposed between the pixel electrode 114 and the organic light-emitting layer 116. The dam 115 may be referred to by the term "pixel-defining film". According to one example, the dam 115 may comprise organic and / or inorganic materials.

[0129] An organic light-emitting layer 116 may be formed on the pixel electrode 114 and the embankment 115. According to one example, the organic light-emitting layer 116 may be disposed in the light-emitting region EA and the non-light-emitting region NEA. The organic light-emitting layer 116 may be disposed between the pixel electrode 114 and the cathode electrode 117. Therefore, when a voltage is applied to each of the pixel electrode 114 and the cathode electrode 117, an electric field is formed between the pixel electrode 114 and the cathode electrode 117. Therefore, the organic light-emitting layer 116 can emit light. The organic light-emitting layer 116 may be formed from a plurality of sub-pixels SP and a common layer disposed on the embankment 115.

[0130] The organic light-emitting layer 116 according to the embodiment can be configured to emit white light. The organic light-emitting layer 116 may include multiple layers emitting different colors of light. For example, the organic light-emitting layer 116 may include a first layer, a second layer, and a charge-generating layer (CGL) disposed between the first and second layers. Since the light-emitting layer can be configured to emit white light, each of the multiple sub-pixels SP may include a color filter CF suitable for the corresponding color.

[0131] The first stack can be disposed on the pixel electrode 114 and can be implemented as a structure in which a hole injection layer (HIL), a hole transport layer (HTL), an emissive layer (EML(B)) and an electron transport layer (ETL) are stacked in sequence.

[0132] The charge generation layer can provide charge to the first and second stacks. The charge generation layer may include an N-type charge generation layer for providing electrons to the first stack and a P-type charge generation layer for providing holes to the second stack. The N-type charge generation layer may include a metallic material as a dopant.

[0133] The second stack can be disposed on the first stack, and can be implemented as a structure in which a hole transport layer (HTL), a yellow-green (YG) light-emitting layer (EML(YG)) and an electron injection layer (EIL) are stacked in sequence.

[0134] In the display device 100 according to an embodiment of the present disclosure, since the organic light-emitting layer 116 is set as a common layer, the first stack, the charge-generating layer, and the second stack can be arranged above all of the plurality of sub-pixels SP. According to another example, the organic light-emitting layer 116 can be set as a three-layer or four-layer structure depending on the number of stacked layers.

[0135] A cathode electrode 117 may be formed on the organic light-emitting layer 116. The cathode electrode 117 may be disposed in the light-emitting region EA and the non-light-emitting region NEA. According to one example, the cathode electrode 117 may comprise a metallic material. The cathode electrode 117 may reflect light emitted from the organic light-emitting layer 116 in the plurality of sub-pixels SP toward the lower surface of the substrate 110. Therefore, the display device 100 according to an exemplary embodiment of the present disclosure can be implemented as a bottom-emitting display device.

[0136] Since the transparent display device 100 according to the exemplary embodiment of this disclosure is a top-emitting type, the cathode electrode 117 can be formed of a transparent conductive material TCO (such as ITO, IZO) capable of transmitting light or a semi-transparent conductive material TMCM (such as magnesium (Mg), silver (Ag), or an alloy of magnesium (Mg) and silver (Ag)). Such a cathode electrode 117 can be referred to by the terms "second electrode" or "opposite electrode".

[0137] An encapsulation layer 118 is formed on the cathode electrode 117. According to one example, the encapsulation layer 118 is used to prevent or reduce the penetration of oxygen or moisture into the organic light-emitting layer 116 and the cathode electrode 117. For this purpose, the encapsulation layer 118 may be configured to seal the light-emitting element layer E of each of a plurality of sub-pixels SP. For example, the encapsulation layer 118 may be disposed on a substrate 110 to cover the light-emitting region EA and the non-light-emitting region NEA. Furthermore, the encapsulation layer 118 may also be disposed in the transmissive region TA. For example, the encapsulation layer 118 may be deposited over the entire surface of the substrate 110. According to one example, the encapsulation layer 118 may be made of an inorganic material, but is not limited thereto, and may be made of an organic material, or may be made of a structure formed by laminating organic and inorganic materials. The encapsulation layer 118 may be interrupted at a plurality of undercut portions 150.

[0138] A filler layer 119 is formed on the encapsulation layer 118. Similar to the encapsulation layer 118, the filler layer 119 serves to prevent or reduce the permeation of oxygen or moisture into the organic light-emitting layer 116 and the cathode electrode 117. According to one example, the filler layer 119 may be configured to include a getter capable of absorbing oxygen or moisture. Alternatively, the filler layer 119 may be provided with multiple layers including at least one inorganic film layer and at least one organic film layer.

[0139] On the other hand, the filling layer 119 can be disposed not only in the light-emitting region EA, but also in the non-light-emitting region NEA. The filling layer 119 can be disposed between the encapsulation layer 118 and the opposing substrate 200.

[0140] Color filters CF and black matrix BM can be disposed between the fill layer 119 and the opposing substrate 200. As mentioned above, since the organic light-emitting layer 116 emits white light, a color filter is not required for the white light-emitting portion. On the other hand, a third color filter CF3 (or a red color filter CF3) can be disposed between the fill layer 119 and the opposing substrate 200 for the red sub-pixel SP1. A first color filter CF1 (or a blue color filter CF1) can be disposed between the fill layer 119 and the opposing substrate 200 for the blue sub-pixel SP3. A second color filter CF2 (or a green color filter CF2) can be disposed between the fill layer 119 and the opposing substrate 200. Figure 3 As shown, at least one color filter CF can be placed on the black matrix BM in the transmission region TA.

[0141] On the other hand, a black matrix BM can be disposed between multiple sub-pixels SP1, SP2, SP3, SP4 to prevent or reduce color mixing and / or light leakage. The black matrix BM may comprise a black material and may be configured to overlap with the dam 115. The area where the black matrix BM and / or the dam 115 are disposed may be a dead zone or a non-light-emitting area. According to one example, the black matrix BM may be formed on the opposing substrate 200 to overlap with at least a portion of the dam 115, thereby reducing the cell gap between the organic light-emitting layer 116 and the opposing substrate 200 to prevent or reduce color mixing of the sub-pixels.

[0142] In addition, such as Figure 3 As shown, according to an example, the black matrix BM partially overlaps with at least one color filter CF and planarization layer 130, and is located between spacer SPC and opposing substrate 200, thereby serving as a support to maintain the cell gap (or clearance) between substrate 110 and opposing substrate 200.

[0143] An upper organic film UO may be placed between the spacer SPC and at least one color filter CF. The upper organic film UO may be disposed on the front surface of the opposing substrate 200 to cover at least one color filter CF and partially contact the opposing substrate 200. Therefore, the upper organic film UO can prevent or reduce the at least one color filter CF and the black matrix BM from detaching or peeling off from the opposing substrate 200.

[0144] Figure 4 yes Figure 3 A schematic enlarged view of part B.

[0145] In the following text, refer to Figure 3 and Figure 4 The planarization layer 130, the blocking portion 140, and the plurality of undercut portions 150 included in the transparent display device 100 according to an exemplary embodiment of the present disclosure will be described in more detail. Furthermore, the pattern structure PS and the spacer SPC included in the transparent display device 100 according to an exemplary embodiment of the present disclosure will be described.

[0146] Reference Figure 3 and Figure 4 In the transparent display device 100 according to an exemplary embodiment of the present disclosure, a plurality of undercut portions 150 may include a first undercut portion 151 and a second undercut portion 152.

[0147] According to one example, the first undercut portion 151 may be partially located between the barrier portion 140 and the planarization layer 130. For example, the first undercut portion 151 may be formed on each of the left and right sides of the first inorganic film IL1 (or the second passivation layer 111d) on the upper surface of the barrier portion 140. The first undercut portion 151 may be formed by partially etching the first inorganic film IL1 between the planarization layer 130 and the barrier portion 140 via an inorganic film etchant. Thus, the first inorganic film IL1 (or the second passivation layer 111d) may be arranged adjacent to the first undercut portion 151. Since the barrier portion 140 is formed of a metallic material, it may not be etched by the inorganic film etchant. Therefore, as Figure 4 As shown, the width W3 of the first inorganic film IL1 (or the second passivation layer 111d) between the planarization layer 130 and the blocking portion 140 can be formed to be narrower than the width W1 of the blocking portion 140.

[0148] According to one example, the second undercut 152 may be partially located between the blocking portion 140 and the auxiliary line 120. For example... Figure 3 As shown, the second undercut portion 152 may be located below the first undercut portion 151. Therefore, the second undercut portion 152 may partially overlap with the first undercut portion 151 in the third direction (Z-axis direction).

[0149] The second undercut portion 152 may be formed on each of the left and right sides of the second inorganic film IL2 (or the interlayer insulating layer 111b and the first passivation layer 111c, respectively) on the lower surface of the blocking portion 140. The second undercut portion 152 may be formed by partially etching the second inorganic film IL2 (or the interlayer insulating layer 111b and the first passivation layer 111c) between the blocking portion 140 and the auxiliary line 120 via an inorganic film etchant. Therefore, the second inorganic film IL2 (or each of the interlayer insulating layer 111b and the first passivation layer 111c) may be located adjacent to the second undercut portion 152. As described above, the blocking portion 140 may be formed of a metallic material and therefore may not be etched by the inorganic film etchant. Therefore, as Figure 4 As shown, the width W4 of the second inorganic film IL2 (or each of the interlayer insulating layer 111b and the first passivation layer 111c) between the blocking portion 140 and the auxiliary line 120 can be set to be narrower than the width W1 of the blocking portion 140.

[0150] However, since the second inorganic film IL2 (or the interlayer insulating layer 111b and the first passivation layer 111c respectively) is located closer to the substrate 110 than the first inorganic film IL1 (or the second passivation layer 111d), the degree of etching by the inorganic film etchant can be less. Therefore, the width W4 of the second inorganic film IL2 (or each of the interlayer insulating layer 111b and the first passivation layer 111c) can be set to be wider than the width W3 of the first inorganic film IL1 (or the second passivation layer 111d). As a result, the transparent display device 100 according to the exemplary embodiment of this disclosure may have the structural feature that the width W4 of the second inorganic film IL2 (or each of the interlayer insulating layer 111b and the first passivation layer 111c) is wider than the width W3 of the first inorganic film IL1 (or the second passivation layer 111d) and narrower than the width W1 of the blocking portion 140.

[0151] Furthermore, in the transparent display device 100 according to an exemplary embodiment of the present disclosure, the thickness T2 of the second inorganic film IL2 can be set to be thicker than the thickness T1 of the first inorganic film IL1. Since the plurality of undercut portions 150 are intended to disconnect the encapsulation layer 118, the plurality of inorganic films 111 below the planarization layer 130 can be formed by etching (or patterning) as deeply as possible. This is because the deeper the plurality of inorganic films 111 below the planarization layer 130 are etched (or patterned) in the third direction (Z-axis direction), the more reliably the encapsulation layer 118 deposited on the entire surface in subsequent processes can be disconnected. Therefore, in the transparent display device 100 according to an exemplary embodiment of the present disclosure, the second inorganic film IL2, which is thicker than the first inorganic film IL1, is partially etched (or patterned) below the first inorganic film (IL1) to reliably disconnect the encapsulation layer 118, thereby preventing crack propagation to the encapsulation layer 118 covering the light-emitting element layer E.

[0152] As a result, the transparent display device 100 according to the exemplary embodiment of this disclosure is configured to block the crack propagation path in a dual manner through multiple undercut portions 150 (or a first undercut portion 151 and a second undercut portion 152), thereby improving the lifespan of the light-emitting element (or light-emitting element layer E). Therefore, in the transparent display device 100 according to the exemplary embodiment of this disclosure, the light-emitting element (or light-emitting element layer E) can be driven at low power from the perspective of the entire lifespan of the light-emitting element, thus reducing overall power consumption.

[0153] Refer again Figure 4The cathode electrode 117 is located below the encapsulation layer 118 and can contact the auxiliary line 120 at the second undercut 152. After forming the plurality of undercuts 150, the organic light-emitting layer 116 and the cathode electrode 117 are sequentially deposited on the entire surface of the substrate 110, such that the organic light-emitting layer 116 and the cathode electrode 117 can be disconnected by the plurality of undercuts 150. Therefore, the end of the cathode electrode 117 extending from the light-emitting element layer E can contact the upper surface of the auxiliary line (also referred to as the auxiliary electrode) 120 in the second undercut 152 formed in the transmission region TA. Therefore, the cathode electrode 117 can receive a common voltage from the auxiliary electrode 120. Therefore, in the transparent display device 100 according to the exemplary embodiment of the present disclosure, the cathode electrode 117 and the auxiliary electrode 120 can contact each other in each of the plurality of transmission regions TA arranged in the display region DA, thereby minimizing, preventing or at least partially mitigating the voltage drop at the central portion of the display panel.

[0154] Furthermore, the cathode electrode 117, covered by the planarization layer 130 (and the patterned structure PS), can be arranged to be upwardly spaced from the substrate 110. For example... Figure 4 As shown, the cathode electrode 117 covered by the planarization layer 130 (and patterned structure PS) can be arranged spaced apart from the substrate 110, with a plurality of undercut portions 150 inserted therebetween. Furthermore, since the cathode electrode 117 is interrupted by the plurality of undercut portions 150, the cathode electrode 117 can be formed discontinuously, and thus the cathode electrode 117 covered by the planarization layer 130 (and patterned structure PS) can be configured in an island shape.

[0155] As described above, since the organic light-emitting layer 116 is deposited on the entire surface of the substrate 110 after forming multiple undercut portions 150, it can be broken by the multiple undercut portions 150. Therefore, the end of the organic light-emitting layer 116 extending from the light-emitting element layer E can contact the upper surface of the auxiliary electrode 120 at the second undercut portion 152 formed in the transmission region TA. In contrast, the organic light-emitting layer 116 covering the planarization layer 130 (and the patterned structure PS) can be arranged to be spaced upward from the substrate 110. Figure 4 As shown, the organic light-emitting layer 116 covering the planarization layer 130 (and the patterned structure PS) can be arranged to be spaced apart from the substrate 110, wherein a plurality of undercut portions 150 are inserted therebetween.

[0156] Because the organic light-emitting layer 116 is interrupted by multiple undercut portions 150, the organic light-emitting layer 116 can be formed discontinuously. Therefore, by making the organic light-emitting layer 116 discontinuous, the transparent display device 100 according to the exemplary embodiment of this disclosure can prevent or reduce current leakage from the light-emitting sub-pixels SP to the non-light-emitting sub-pixels SP. The organic light-emitting layer 116 covering the planarization layer 130 (and the pattern structure PS) can be configured in an island shape.

[0157] Furthermore, in typical transparent display devices, since only the organic light-emitting layer needs to be disconnected to prevent or reduce lateral leakage current, the depth of the undercut can be set to be relatively shallow.

[0158] In contrast, by having multiple undercut portions 150 overlapping in the third direction (Z-axis direction), the transparent display device 100 according to the exemplary embodiment of this disclosure can have a deeper undercut portion, thereby disconnecting not only the organic light-emitting layer 116, but also the cathode electrode 117 and the encapsulation layer 118. Therefore, the transparent display device 100 according to the exemplary embodiment of this disclosure can have the effect of preventing or reducing lateral leakage current not only by disconnecting the organic light-emitting layer 116, but also by blocking crack propagation by disconnecting the encapsulation layer 118.

[0159] Furthermore, in the transparent display device 100 according to an exemplary embodiment of the present disclosure, the cathode electrode 117 is formed discontinuously by a plurality of undercut portions 150 overlapping in the third direction (Z-axis direction), such that the cathode electrode 117 and the auxiliary line 120 can contact at the undercut portion 150 (or the second undercut portion 152), so that no voltage drop occurs even in the central part of the display panel.

[0160] Furthermore, in the transparent display device 100 according to an exemplary embodiment of this disclosure, the depth of the undercut 150 is provided deep enough to break the encapsulation layer 118, therefore the width of the undercut 150 (for example, referring to...) Figure 4 The distance from the second passivation layer 111d to the encapsulation layer 118 tilted on the right side can also be set wider.

[0161] The transparent display device 100 according to an exemplary embodiment of the present disclosure may further include a pattern structure PS disposed on the upper surface 130a of the planarization layer 130.

[0162] According to one example, the patterned structure PS can be placed between the planarization layer 130 and the spacer SPC. Therefore, the patterned structure PS can function as a support for the substrate 110 and the opposing substrate 200. The patterned structure PS can be formed together with the embankment 115 on the upper surface of the outer cover layer 113. Therefore, the patterned structure PS and the embankment 115 can be placed on the same layer. In this case, the patterned structure PS and the embankment 115 can be formed of the same material. Therefore, the transparent display device 100 according to the exemplary embodiment of this disclosure can form the patterned structure PS on the planarization layer 130 together with the embankment 115 without additional separate processes, allowing a support (or part of a support) maintaining the cell gap (or spacing) between the substrate 110 and the opposing substrate 200 to be formed without increasing costs. However, this disclosure is not limited to this, and the patterned structure PS can be formed by a different process and from the embankment 115.

[0163] The patterned structure PS can be placed on the upper surface 130a of the planarization layer 130. Therefore, the patterned structure PS can be covered by the organic light-emitting layer 116, the cathode electrode 117, and the encapsulation layer 118. Since the organic light-emitting layer 116, the cathode electrode 117, and the encapsulation layer 118 are interrupted by multiple undercut portions 150 and are not continuously arranged, each of the organic light-emitting layer 116, the cathode electrode 117, and the encapsulation layer 118 covering the patterned structure PS can be arranged in an island shape.

[0164] Furthermore, the transparent display device 100 according to an exemplary embodiment of the present disclosure may also include a spacer SPC disposed between the encapsulation layer 118 covering the patterned structure PS and the upper organic film UO.

[0165] According to one example, a spacer SPC is used to maintain the cell gap (or spacing) between substrate 110 and opposing substrate 200. Therefore, the spacer SPC can be provided with a thickness capable of filling the gap between the encapsulation layer 118 covering the patterned structure PS and the upper organic film UO. According to one example, after the upper organic film UO is formed on the opposing substrate 200, the spacer SPC can be formed on the upper organic film UO to overlap with the black matrix BM. Subsequently, after the spacer SPC formed on the opposing substrate 200 is aligned with the patterned structure PS formed on the substrate 110, the opposing substrate 200 and substrate 110 can be bonded to each other. Therefore, as... Figure 3 and Figure 4 As shown, the planarization layer 130 and the pattern structure PS can be stacked and arranged sequentially on the lower side of the spacer-based SPC, and at least one color filter CF and a black matrix BM can be stacked and arranged sequentially on the upper side of the spacer-based SPC.

[0166] Therefore, in the transparent display device 100 according to the exemplary embodiment of this disclosure, a plurality of inorganic films 111, blocking portions 140, planarization layers 130, patterned structures PS, spacers SPC, organic films UO, at least one color filter CF, and black matrix BM can overlap on the auxiliary line 120, so that even if an external impact occurs, the cell gap (or spacing) between the substrate 110 and the opposing substrate 200 can be maintained. Here, the plurality of inorganic films 111, blocking portions 140, planarization layers 130, patterned structures PS, spacers SPC, organic films UO, at least one color filter CF, and black matrix BM arranged on the auxiliary line 120 in the transmission region TA can be used as supports to maintain the cell gap (or spacing) between the substrate 110 and the opposing substrate 200.

[0167] According to one example, the spacer SPC can be formed of an organic material, but is not necessarily limited to this. If the cell gap (or spacing) between the substrate 110 and the opposing substrate 200 can be maintained, the spacer SPC can be formed of an inorganic material or other materials.

[0168] Spacer SPCs are formed on the opposing substrate 200 and can then contact the patterned structure PS (or the encapsulation layer 118 covering the patterned structure PS) on the substrate 110 via an alignment process. Therefore, the upper surface SPCa of the spacer SPC can contact the island-shaped encapsulation layer 118 covering the patterned structure PS. As a result, since the opposing substrate 200 is bonded to the substrate 110 via an alignment process, if the spacer SPC is wide, alignment with the patterned structure PS becomes easier, thereby shortening the production cycle time of the transparent display device 100.

[0169] However, if the width of the spacer SPC is too wide, the spacer SPC may interact with other structures besides the patterned structure PS (e.g., Figure 3 The embankment 115, which is spaced apart from the pattern structure PS in the second direction (X-axis direction), is in contact with the embankment 115. In this case, due to external impact, the encapsulation layer 118 on the embankment 115 may crack, which may cause moisture to penetrate into the light-emitting element layer E, thereby reducing the reliability of the transparent display device 100.

[0170] Therefore, in the transparent display device 100 according to an exemplary embodiment of this disclosure, the width SW of the spacer SPC (or the upper surface SPCa of the spacer SPC) can be set such that it is easy to align with the pattern structure PS while not contacting other structures (e.g., the embankment 115). For example, the width SW of the spacer SPC (or the upper surface SPCa of the spacer SPC) can be set to be greater than the width W5 of the pattern structure PS and less than the width W2 of the auxiliary line 120 (e.g., the embankment 115). Figure 3 (As shown). Alternatively, the width SW of the spacer SPC (or the upper surface SPCa of the spacer SPC) can be set to be greater than the width W5 of the patterned structure PS and equal to the width W1 of the planarization layer 130. Alternatively, the width SW of the spacer SPC (or the upper surface SPCa of the spacer SPC) can be set to be greater than the width W5 of the patterned structure PS and to the extent that it can overlap with the plurality of undercut portions 150. In this case, the width SW of the spacer SPC (or the upper surface SPCa of the spacer SPC) can be greater than the width W1 of the planarization layer 130. Figure 5 In this context, although the width of the blocking portion 140 is represented as W1, the width of the planarization layer 130 is also the same as the width of the blocking portion 140, so it can also be represented as W1.

[0171] As a result, Figure 4As shown, the transparent display device 100 according to an exemplary embodiment of the present disclosure is configured such that the width W1 of the planarization layer 130 is greater than the width W5 of the pattern structure PS and equal to or less than the width SW of the spacer SPC, thereby reducing the alignment time between the opposing substrate 200 and the substrate 110 and preventing or reducing reliability degradation due to external impact (or external force).

[0172] Furthermore, in the transparent display device 100 according to an exemplary embodiment of the present disclosure, the width W5 of the pattern structure PS may be equal to or less than the width of the upper surface 130a of the planarization layer 130. If the width W5 of the pattern structure PS is greater than the width of the upper surface 130a of the planarization layer 130, the pattern structure PS protruding from the upper surface 130a of the planarization layer 130 may be lost during the etching of the inorganic film (or during the cleaning of the substrate 110). Therefore, in the transparent display device 100 according to an exemplary embodiment of the present disclosure, the width W5 of the pattern structure PS is set to be equal to or less than the width of the upper surface 130a of the planarization layer 130, so the loss of the pattern structure PS can be prevented or reduced, thereby reducing the defect rate.

[0173] Refer again Figure 4 In the transparent display device 100 according to an exemplary embodiment of the present disclosure, the width CFW of at least one color filter CF can be set to be narrower than the width BW of the black matrix BM. For example, as Figure 4 As shown, a first color filter CF1 can be placed on a black matrix BM, a second color filter CF2 can be placed on the first color filter CF1, and a third color filter CF3 can be placed on the second color filter CF2. For example, on the black matrix BM, the first color filter CF1, the second color filter CF2, and the third color filter CF3 can be stacked and arranged sequentially in the direction from the opposing substrate 200 toward the substrate 110. Here, the width CFW of the first color filter CF1 in contact with the black matrix BM can be set to be narrower than the width BW of the black matrix BM. Furthermore, the width of the second color filter CF2 in contact with the first color filter CF1 can be set to be narrower than the width CFW of the first color filter CF1. Furthermore, the width of the third color filter CF3 in contact with the second color filter CF2 can be set to be narrower than the width of the second color filter CF2. Therefore, the width of each of the first color filter CF1, the second color filter CF2, and the third color filter CF3 can be set to become increasingly narrower in the direction from the opposing substrate 200 toward the substrate 110. However, this disclosure is not necessarily limited to this, and the width of the first color filter CF1 may also be set to be narrower than the width of the second color filter CF2. In this case, the second color filter CF2 may contact the black matrix BM while covering the first color filter CF1. However, even in this case, the width of the second color filter CF2 may be set to be narrower than the width of the black matrix BM.

[0174] If the width of the color filter CF that is in contact with the black matrix BM is wider than the width of the black matrix BM, light may pass through the color filter that does not overlap with the black matrix, which may result in color mixing.

[0175] Therefore, in the transparent display device 100 according to an exemplary embodiment of the present disclosure, color mixing can be prevented or reduced by setting the width CFW of at least one color filter CF to be narrower than the width BW of the black matrix BM. Additionally, the transparent display device 100 according to an exemplary embodiment of the present disclosure can be configured such that the planarization layer 130 overlaps with the first color filter CF1, the second color filter CF2, and the third color filter CF3. Therefore, the planarization layer 130 and the first to third color filters CF1, CF2, CF3 can serve as supports for maintaining the cell gap (or spacing) between the substrate 110 and the opposing substrate 200.

[0176] Figure 5 It is shown Figure 3 A schematic cross-sectional view of another example of the color filter shown.

[0177] Reference Figure 5 In the transparent display device 100 according to an exemplary embodiment of the present disclosure, at least one color filter CF among the color filters may be arranged to extend to one of the plurality of sub-pixels SP (or the light-emitting region EA). Here, at least one color filter may refer to a color filter CF arranged in the transmissive region TA.

[0178] For example, the first color filter CF1 (or the first color filter CF1 overlapping the transmission region TA) used as a support can be configured to extend toward the third sub-pixel SP3 and cover the light-emitting region EA of the third sub-pixel SP3. Therefore, the first color filter CF1 overlapping the transmission region TA and the first color filter CF1 arranged in the light-emitting region EA of the third sub-pixel SP3 can be integrally formed. In this case, the first color filter CF1 can contact the opposing substrate 200 while covering the black matrix BM in the non-light-emitting region NEA between the light-emitting region EA and the transmission region TA.

[0179] Therefore, according to Figure 5 In the case of the transparent display device 100, at least one color filter CF overlapping with the transmission region TA is arranged to extend to one of the multiple sub-pixels SP (or the light-emitting region EA), such that the black matrix BM between the light-emitting region EA and the transmission region TA can be prevented or reduced from falling off or peeling off from the opposing substrate 200.

[0180] Figure 6 This is a plan view illustrating a transparent display device according to another embodiment of the present disclosure, and Figure 7 yes Figure 6 A schematic enlarged view of part C.

[0181] Reference Figure 6 Except for omitting the pattern structure PS and changing the structure of the spacer SPC, the transparent display device 100 according to another embodiment of this disclosure is similar to the one described above. Figure 1 The transparent display devices are the same. Therefore, the same reference numerals have been assigned to the same constructions, and only the different constructions will be described below.

[0182] According to Figure 1 In the case of a transparent display device, the patterned structure PS and spacer SPC on the auxiliary line 120 can serve as supports for maintaining the cell gap (or spacing) between the substrate 110 and the opposing substrate 200 together with the plurality of inorganic films 111, the planarization layer 130, at least one color filter CF, and the black matrix BM. Therefore, the transparent display device 100 according to the exemplary embodiment of this disclosure can have improved reliability against external impacts (or external forces) without the need for separate supports. Furthermore, in the case of the transparent display device 100 according to the exemplary embodiment of this disclosure, the width SW of the spacer SPC is set to be greater than the width W5 of the patterned structure PS, thereby shortening the alignment time. Additionally, the transparent display device 100 according to the exemplary embodiment of this disclosure may have a structural feature where the patterned structure PS is covered by an organic light-emitting layer 116, a cathode electrode 117, and an encapsulation layer 118.

[0183] In contrast, according to Figure 6 In the case of transparent display devices, the pattern structure PS can be omitted. This is because, according to... Figure 6 In the case of transparent display devices, and according to Figure 5 Compared to transparent display devices, the thickness (or height) of the spacer SPC changes. For example, in accordance with... Figure 6 In the case of a transparent display device, the thickness (or height) of the spacer SPC' can be set to be greater than the thickness required by the specified dimensions. Figure 5 The spacer SPC of the transparent display device. Therefore, according to Figure 6 In the case of a transparent display device, the pattern structure PS can be omitted, so the planarization layer 130 (or the upper surface 130a of the planarization layer 130) on the auxiliary line 120 can be covered by the organic light-emitting layer 116, the cathode electrode 117, and the encapsulation layer 118. In this case, the upper surface 130a of the planarization layer 130 can contact the organic light-emitting layer 116.

[0184] In addition, refer to Figure 7 , and according to Figure 1Compared to transparent display devices, the transparent display device 100 according to another embodiment of the present disclosure may have a narrower width SW' of the spacer SPC' (or the upper surface SPCa' of the spacer SPC'). For example, the transparent display device 100 according to another embodiment of the present disclosure may be configured such that the width SW' of the spacer SPC' (or the upper surface SPCa' of the spacer SPC') is smaller than the width W5 of the planarization layer 130 (or the upper surface 130a of the planarization layer 130).

[0185] Therefore, in a transparent display device 100 according to another embodiment of this disclosure, the width SW' of the spacer SPC' (or the upper surface SPCa' of the spacer SPC') is set to be smaller than the width W5 of the planarization layer 130 (or the upper surface 130a of the planarization layer 130), so that the area occupied by the spacer SPC' in the transmission region TA can be minimized or reduced, thereby minimizing or mitigating the decrease in transmittance (or transparency) of the transmission region TA. This is because if the width of the spacer SPC' is reduced, the width of at least one color filter CF and the black matrix BM placed above the spacer SPC' can also be reduced.

[0186] Furthermore, in another embodiment of the transparent display device 100 according to the present disclosure, the width SW' of the spacer SPC' (or the upper surface SPCa' of the spacer SPC') is set to be less than the width W5 of the planarization layer 130 (or the upper surface 130a of the planarization layer 130), so that the alignment margin between the opposing substrate 200 and the substrate 110 can also be ensured, so that the reduction of the alignment time can be maximized or improved, thereby reducing the production cycle time of the transparent display device.

[0187] Embodiments of this disclosure have been described in more detail with reference to the accompanying drawings, but this disclosure is not limited to these embodiments and can be implemented with various modifications without departing from the technical spirit of this disclosure. Therefore, the exemplary embodiments disclosed herein are intended to illustrate, not limit, the technical spirit of this disclosure, and the scope of the technical spirit of this disclosure is not limited by these embodiments. Thus, the above exemplary embodiments are exemplary in all respects and should be understood as non-limiting. The scope of protection of this disclosure should be interpreted by the claims, and all technical ideas within the scope of the claims should be interpreted as being included within the scope of the claims.

[0188] In some aspects, this disclosure provides a plurality of spacers that enable the cell gap between the substrate (lower substrate) and the opposing substrate (upper substrate) to be maintained.

[0189] Furthermore, in some aspects, this disclosure may include multiple undercuts that enable maximizing or improving the breakage of the encapsulation layer, thereby blocking the propagation of cracks through the encapsulation layer.

[0190] Furthermore, in some aspects, this disclosure is configured such that the encapsulation layer seals the light-emitting element of each of the plurality of sub-pixels, thereby preventing or reducing moisture penetration into the light-emitting element.

[0191] Furthermore, in some aspects, this disclosure provides for blocking crack propagation by multiple undercuts, thereby improving the lifespan of the light-emitting element, thus enabling the light-emitting element to be driven at low power over the entire lifespan of the light-emitting element, thereby reducing power consumption.

[0192] Furthermore, in some aspects, this disclosure provides that the width of the spacers is smaller than the width of the planarization layer (or island OC), thereby minimizing or mitigating the reduction in transmittance (or transparency) of the transmission region.

[0193] Furthermore, in some aspects, this disclosure provides that the planarization layer (or island OC) on the auxiliary line is configured to support the upper substrate, thereby improving the reliability against external forces.

[0194] The effects that can be obtained from this disclosure are not limited to those mentioned above, and other effects not mentioned will be apparent to those skilled in the art from the following description.

[0195] Cross-references to related applications

[0196] This application claims priority to Korean Patent Application No. 10-2024-0113082, filed in Korea on August 22, 2024, the entire contents of which are expressly incorporated herein by reference for all purposes, as if fully set forth herein.

Claims

1. A transparent display device, the transparent display device comprising: A substrate having a plurality of sub-pixels and at least one transmissive region adjacent to the sub-pixels; A planarization layer, the planarization layer being disposed on the substrate and overlapping the at least one transmissive region; A blocking portion is disposed between the planarization layer and the substrate; Multiple undercut portions are partially arranged on the upper and lower sides of the blocking portion; Opposing substrate, the opposing substrate being disposed on the planarization layer; as well as A plurality of spacers are disposed between the planarization layer and the opposing substrate.

2. The transparent display device according to claim 1, in, The plurality of sub-pixels include a plurality of light-emitting elements configured to emit light. The substrate further includes an encapsulation layer covering the plurality of light-emitting elements, and The encapsulation layer is broken by the plurality of undercut portions.

3. The transparent display device according to claim 2, the transparent display device further includes auxiliary lines, the auxiliary lines being disposed below the planarization layer and overlapping with the at least one transmissive region.

4. The transparent display device according to claim 3, wherein, The plurality of undercut portions include a first undercut portion partially disposed between the blocking portion and the planarization layer.

5. The transparent display device according to claim 4, wherein, The plurality of undercut portions also includes a second undercut portion disposed below the first undercut portion and partially disposed between the blocking portion and the auxiliary line.

6. The transparent display device according to claim 5, in, The substrate further includes: A first inorganic membrane, the first inorganic membrane being configured to be adjacent to the first undercut portion and between the blocking portion and the planarization layer; and A second inorganic membrane is disposed below the first inorganic membrane and between the blocking portion and the auxiliary line. The second inorganic membrane is thicker than the first inorganic membrane.

7. The transparent display device according to claim 6, wherein, The width of the first inorganic membrane is narrower than the width of the blocking portion.

8. The transparent display device according to claim 6, wherein, The width of the second inorganic membrane is wider than the width of the first inorganic membrane and narrower than the width of the blocking portion.

9. The transparent display device according to claim 3, wherein, The width of the blocking part is narrower than the width of the auxiliary line.

10. The transparent display device according to claim 3, further comprising: A common power line that partially overlaps with each of the plurality of sub-pixels. The auxiliary line extends from the at least one transmission region toward one of the plurality of sub-pixels and connects to the common power line.

11. The transparent display device according to claim 2, wherein, The portion of the encapsulation layer disposed above the planarization layer contacts the plurality of spacers.

12. The transparent display device according to claim 5, in, Each of the plurality of light-emitting elements includes: An outer coating layer disposed on the substrate; Pixel electrodes disposed on the outer coating layer; An organic light-emitting layer disposed on the pixel electrode; and The cathode electrode is disposed on the organic light-emitting layer. The cathode electrode is disposed below the encapsulation layer and contacts the auxiliary line in the second undercut portion.

13. The transparent display device according to claim 12, wherein, The organic light-emitting layer is broken by the plurality of undercut portions.

14. The transparent display device according to claim 12, wherein, The planarization layer is formed on the same layer as the outer cover layer, and is formed in an island shape spaced apart from the outer cover layer.

15. The transparent display device according to claim 12, in, The opposing substrate further includes: A black matrix that partially overlaps with the planarization layer; At least one color filter arranged on the black matrix; and An organic membrane covering the at least one color filter.

16. The transparent display device according to claim 15, wherein, The width of at least one color filter is narrower than the width of the black matrix.

17. The transparent display device according to claim 15, wherein, One of the at least one color filters is arranged to extend into one of the plurality of sub-pixels.

18. The transparent display device according to claim 15, in, The at least one color filter includes: A first color filter arranged on the black matrix; A second color filter arranged on the first color filter; and The third color filter is arranged on the second color filter. The planarization layer overlaps with the first color filter, the second color filter, and the third color filter.

19. The transparent display device according to claim 15, further comprising: The pattern structure arranged on the upper surface of the planarization layer, The patterned structure is covered by the organic light-emitting layer, the cathode electrode, and the encapsulation layer.

20. The transparent display device according to claim 19, in, Each of the plurality of sub-pixels also includes a dam that covers the edge of the pixel electrode. The pattern structure and the embankment are arranged on the same layer.

21. The transparent display device according to claim 19, in, Each of the plurality of spacers is arranged between the encapsulation layer covering the patterned structure and the upper organic film, and The width of the planarization layer is greater than the width of the pattern structure and equal to or less than the width of at least one of the plurality of spacers.

22. The transparent display device according to claim 15, wherein, The planarization layer is covered by the organic light-emitting layer, the cathode electrode, and the encapsulation layer.

23. The transparent display device according to claim 22, in, Each of the plurality of spacers is disposed between the encapsulation layer covering the planarization layer and the upper organic film, and The width of each of the plurality of spacers is smaller than the width of the planarization layer.

24. A transparent display device, the transparent display device comprising: A substrate having a plurality of sub-pixels and at least one transmissive region adjacent to the sub-pixels; A planarization layer, the planarization layer being disposed on the substrate and overlapping the at least one transmissive region; A blocking portion is disposed between the planarization layer and the substrate; Multiple undercut portions are partially arranged on the upper and lower sides of the blocking portion; as well as An encapsulation layer that covers the plurality of sub-pixels and extends into the at least one transmissive region. The encapsulation layer is broken by the plurality of undercut portions.

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