Power module junction temperature estimation correction method and system

Abstract

The invention relates to the field of automobile power electronics, in particular to a power module junction temperature estimation correction method and system. The power module junction temperature correction method comprises the following steps: preprocessing the power module to enable at least part of a chip of the power module to be exposed in an external environment; working condition testing is carried out on the power module by using a test bench, and actual junction temperature parameters of the chip are monitored by synchronously using thermal imaging equipment; estimating an estimated junction temperature parameter of the chip by using the initial junction temperature estimation model of the power module in the test process; and correcting the initial junction temperature estimation model according to the actual junction temperature parameter and the estimated junction temperature parameter to obtain a corrected junction temperature calculation model. According to the application, the junction temperature of the chip is directly tested through infrared camera shooting, and the NTC-based power module estimation model is corrected by taking the directly measured actual junction temperature parameter as a standard value, so that the timeliness and accuracy of temperature response of the power module are remarkably improved, and a prospective protection strategy is provided for an inversion module under an extreme working condition.

Description

Technical Field

[0001] This application relates to the field of automotive power electronics, specifically to a method and system for estimating and correcting the junction temperature of a power module. Background Technology

[0002] With the development of new energy vehicles, electric vehicle motor control has become a crucial aspect influencing automotive development. In the field of electric vehicle motor controllers, IGBT power module junction temperature monitoring is a core element in ensuring the safe operation and reliability of the system.

[0003] In related technologies, the industry commonly adopts temperature monitoring solutions based on NTC (negative temperature coefficient) sensors. This method indirectly measures the ambient temperature of the module by embedding an NTC sensor inside the power module or on the package surface, and estimates the actual junction temperature of the chip by combining it with a thermal resistance model (such as the junction-case thermal resistance Rθjc).

[0004] However, due to the internal thermal resistance (Rθjc) and thermal inertia of the IGBT module, the response speed of the NTC sensor lags behind the dynamic changes in the chip junction temperature. Under rapid load changes in vehicles (such as rapid acceleration and deceleration) or high-power conditions (such as stall), the chip junction temperature may rise sharply within milliseconds, and the NTC monitoring system cannot capture the temperature surge in time, resulting in a delay in the triggering of protection mechanisms (such as over-temperature shutdown). Furthermore, NTC temperature measurements are affected by module packaging materials, heat conduction paths, and environmental interference, resulting in a systematic deviation from the actual chip junction temperature. This deviation is further amplified under extreme conditions (such as temperatures ranging from -40°C to 650°C), failing to accurately reflect the instantaneous dynamic characteristics of the junction temperature. When the chip junction temperature exceeds the safety threshold, the protection system fails to intervene in time due to the lag, easily causing permanent thermal damage to the IGBT module (such as solder joint melting and chip burnout), seriously threatening the safety and durability of the entire vehicle. Therefore, how to test and correct the junction temperature monitoring system of the IGBT module has become an urgent problem for industry professionals. Summary of the Invention

[0005] In related technologies, the temperature monitoring method for IGBT power modules based on NTC has problems such as insufficient timeliness and limited accuracy. It cannot accurately reflect the dynamic changes in chip junction temperature, especially under rapid load changes or high power conditions, which may cause permanent damage to the module due to protection delay.

[0006] In a first aspect, embodiments of this application provide a method for estimating and correcting the junction temperature of a power module, the method comprising: The power module is pre-processed to expose at least part of the chip to the external environment; The power module was tested under operating conditions using a test bench, and the actual junction temperature parameters of the chip were monitored simultaneously using thermal imaging equipment. During the testing process, the initial junction temperature estimation model of the power module is used to estimate the predicted junction temperature parameters of the chip. The initial junction temperature estimation model is corrected based on the actual junction temperature parameters and the estimated junction temperature parameters to obtain the corrected junction temperature calculation model.

[0007] In conjunction with the first aspect, in one embodiment, the preprocessing of the power module to expose at least partially the power module's chip to the external environment includes: Remove part of the power module's package structure to expose the chip's top surface, and then apply a black coating to the exposed surface area of ​​the chip.

[0008] In conjunction with the first aspect, in one embodiment, the blackening treatment of the exposed surface area of ​​the chip includes: coating the exposed surface of the chip with black paint so that the emissivity of the exposed surface area of ​​the chip is not less than 0.95.

[0009] In conjunction with the first aspect, in one implementation, estimating the predicted junction temperature parameters of the chip using the initial junction temperature estimation model of the power module during the testing process includes: Collect the internal thermistor temperature parameters of the power module during testing; The estimated junction temperature parameters are calculated based on the thermistor temperature parameters and the initial junction temperature estimation model.

[0010] In conjunction with the first aspect, in one embodiment, the step of calculating the estimated junction temperature parameters based on the thermistor temperature parameters and the initial junction temperature estimation model includes: According to the formula: ΔT=P×Rθjc Calculate the temperature compensation parameter ΔT, where P is the chip power loss coefficient and Rθjc is the junction-to-case thermal resistance; According to the formula: T nj = T n +ΔT Calculate the estimated junction temperature parameter T nj , among which, T n This refers to the temperature parameter for thermistor.

[0011] In conjunction with the first aspect, in one embodiment, the step of correcting the initial junction temperature estimation model based on the actual junction temperature parameters and the estimated junction temperature parameters to obtain a corrected junction temperature calculation model includes: Establish the correspondence between the estimated junction temperature parameters and the actual junction temperature parameters under different operating conditions, and revise the initial junction temperature estimation model based on the correspondence between the estimated junction temperature parameters and the actual junction temperature parameters.

[0012] In conjunction with the first aspect, in one implementation, the step of correcting the initial junction temperature estimation model based on the correspondence between the estimated junction temperature parameters and the actual junction temperature parameters includes: The chip power loss coefficient in the initial junction temperature estimation model is corrected based on the correspondence between the estimated junction temperature parameters and the actual junction temperature parameters until the difference between the estimated junction temperature parameters and the actual junction temperature parameters under the same operating conditions is within the preset threshold range.

[0013] In conjunction with the first aspect, in one embodiment, the step of performing operating condition testing on the power module using a test bench and simultaneously monitoring the actual junction temperature parameters of the chip using a thermal imaging device includes: Install the power module in the controller and fix the thermal imaging device at a preset distance from the chip surface; The power module was tested using a test bench to simulate actual operating conditions.

[0014] In conjunction with the first aspect, in one embodiment, fixing the thermal imaging device at a preset distance from the chip surface includes: Fix the thermal imager at a preset distance from the chip surface, and keep the angle between the optical axis of the thermal imager lens and the chip plane between 75° and 90°.

[0015] Secondly, embodiments of this application provide a power module junction temperature estimation and correction system, the power module junction temperature estimation and correction system comprising: A preprocessing module is used to preprocess the power module so that the chip of the power module is at least partially exposed to the external environment; The test module is used to perform operating condition tests on the power module using a test bench and simultaneously use thermal imaging equipment to monitor the actual junction temperature parameters of the chip. The estimation module is used to estimate the chip's predicted junction temperature parameters during testing using the initial junction temperature estimation model of the power module. The correction module is used to correct the initial junction temperature estimation model based on the actual junction temperature parameters and the estimated junction temperature parameters, so as to obtain the corrected junction temperature calculation model.

[0016] The beneficial effects of the technical solutions provided in this application include: This application directly measures the chip junction temperature using infrared imaging and uses the directly measured actual junction temperature parameters as standard values ​​to correct the NTC-based power module estimation model. This significantly improves the timeliness and accuracy of the power module's temperature response, avoids protection failures caused by thermal delay, and provides a proactive protection strategy for inverter modules under extreme operating conditions. Attached Figure Description

[0017] Figure 1This is a flowchart illustrating an embodiment of the power module junction temperature estimation and correction method of this application; Figure 2 This is a schematic diagram of the power module junction temperature estimation and correction system of this application; Figure 3 This is a schematic diagram of the hardware structure of the power module junction temperature estimation and correction device involved in the embodiments of this application. Detailed Implementation

[0018] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present application.

[0019] In related technologies, the temperature monitoring method for IGBT power modules based on NTC has problems such as insufficient timeliness and limited accuracy. It cannot accurately reflect the dynamic changes in chip junction temperature, especially under rapid load changes or high power conditions, which may cause permanent damage to the module due to protection delay.

[0020] It should be noted that the applicant found that existing power modules all rely on an initial temperature parameter obtained from an NTC sensor, and then use a pre-set estimation model to estimate the actual temperature of the chip. However, the accuracy of the estimation model is limited by the junction-to-case thermal resistance and the chip's power loss. Therefore, inaccurate estimations are prone to occur during actual operation of the power module. Once the estimation model fails to accurately reflect the instantaneous dynamic characteristics of the junction temperature, and the chip junction temperature exceeds the safety threshold, the protection system may fail to intervene in time due to response lag, potentially causing permanent thermal damage to the IGBT module (such as solder joint melting and chip burnout), seriously threatening the safety and durability of the entire vehicle.

[0021] In a first aspect, this application provides a method for estimating and correcting the junction temperature of a power module, the method comprising: Step S1: Preprocess the power module to expose at least part of the power module's chip to the external environment.

[0022] Specifically, step S1 above includes: Step S1a: Modify the structure of the IGBT power module by removing part of the package structure of the power module to expose the upper surface of the chip.

[0023] It should be noted that after the chip's upper surface is exposed, it is necessary to ensure that the bonding and mounting wires do not obstruct the area on the chip's upper surface that will be used for temperature measurement later.

[0024] Step S1b: Apply black coating to the exposed surface area of ​​the chip.

[0025] Specifically, black paint is applied to the exposed surface of the chip. Furthermore, the application of black paint ensures that the emissivity of the exposed surface area of ​​the chip is not less than 0.95.

[0026] It should be noted that emissivity is a dimensionless parameter (range 0.0~1.0) of an object's surface heat radiation capacity.

[0027] Preferably, a high-temperature resistant black paint (emissivity ≥ 0.95) with a thickness of about 2 mm is uniformly coated on the chip surface to enhance thermal radiation consistency and improve heat preservation.

[0028] It is worth noting that by removing part of the packaging structure to expose the chip's upper surface and then blackening the exposed area, the uniformity of thermal radiation on the chip surface is enhanced, ensuring that the thermal imaging equipment can accurately capture the chip's junction temperature, providing a basic guarantee for real-time monitoring, thereby improving the timeliness and accuracy of temperature response.

[0029] Step S2: Perform operating condition tests on the power module using a test bench and simultaneously use thermal imaging equipment to monitor the actual junction temperature parameters of the chip.

[0030] Step S2 specifically includes: Step S2a: Assemble the processed power module into the controller according to standard procedures.

[0031] Furthermore, after assembly, it is necessary to ensure that the area of ​​the chip used for subsequent temperature measurement is unobstructed, and to reserve at least 30cm of observation space.

[0032] Step S2b: Use a high-precision thermal imager (such as FLIR A655sc) as the main temperature measurement device.

[0033] Understandably, by fixing thermal imaging equipment to a test bench and simulating actual working conditions, the engineering implementation of non-contact real-time monitoring can be achieved, ensuring that junction temperature data is synchronized with actual working conditions and significantly improving the timeliness of temperature response.

[0034] Preferably, in order to ensure complete capture of all chip temperatures, it is fixed at a distance of 30–40 cm from the chip surface, so that the angle between the optical axis of the thermal imager lens and the chip plane is maintained between 75° and 90°.

[0035] It is worth noting that by fixing the distance of the thermal imager (30–40cm) and the angle between the lens optical axis (75°–90°), the integrity and consistency of the thermal imaging data are ensured, measurement blind spots or angular errors are avoided, and the timeliness and accuracy of temperature response are further improved.

[0036] Step S2c: Use a load test bench to simulate actual operating conditions (such as speed, torque, bus voltage, switching frequency, etc.) and control cooling conditions (water flow, water temperature, pressure). Based on the pre-set thermal management strategy, test to cover all vehicle operating conditions.

[0037] Furthermore, the testing process uses a thermal imager to simultaneously test the junction temperature of the chip surface.

[0038] Preferably, the temperature range setting for thermal imaging parameters needs to be set according to the operating conditions (normal operating conditions: -40–150℃; stalled operating conditions: 150–650℃), and both emissivity and transmittance are set to 0.95, with high-speed real-time acquisition mode enabled.

[0039] Step S3: During the test, the estimated junction temperature parameters of the chip are estimated using the initial junction temperature estimation model of the power module.

[0040] Understandably, by collecting internal thermistor temperature parameters and using the initial junction temperature estimation model to calculate the predicted junction temperature, an initial benchmark for junction temperature estimation is established, providing reliable input data for subsequent model correction, reducing initial estimation bias, and improving overall monitoring accuracy.

[0041] The above step S3 specifically includes: Step S3a: Collect the internal thermistor temperature parameters of the power module during the test.

[0042] Specifically, during the test, the internal thermistor temperature parameters (NTC sensor) of the power module and the chip junction temperature measured by the thermal imager were recorded simultaneously under different operating conditions.

[0043] Step S3b: Calculate the estimated junction temperature parameters based on the thermistor temperature parameters and the initial junction temperature estimation model.

[0044] In some specific implementations, step S3b includes: Step 1: According to the formula: ΔT=P×Rθjc Calculate the temperature compensation parameter ΔT, where P is the chip power loss coefficient and Rθjc is the junction-to-case thermal resistance; Step 2: According to the formula: T nj = T n +ΔT Calculate the estimated junction temperature parameter T nj , among which, T n This refers to the temperature parameter for thermistor.

[0045] It is worth noting that the estimated junction temperature parameters are uncorrected estimates of the chip junction temperature parameters. However, the chip power loss coefficient mentioned above in the estimation cannot accurately represent the true state of the power module, which will result in the inaccurate estimated junction temperature parameters calculated by the initial junction temperature estimation model.

[0046] Step S4: Correct the initial junction temperature estimation model based on the actual junction temperature parameters and the estimated junction temperature parameters to obtain the corrected junction temperature calculation model.

[0047] Step S4 above includes: Step S4a: Establish the correspondence between the estimated junction temperature parameters and the actual junction temperature parameters under different operating conditions.

[0048] It is worth noting that the estimated junction temperature parameters are compared with the actual junction temperature parameters, and a correlation model between the two under different operating conditions is established to calibrate the software protection threshold.

[0049] Step S4b: Correct the initial junction temperature estimation model based on the correspondence between the estimated junction temperature parameters and the actual junction temperature parameters.

[0050] Specifically, the chip power loss coefficient in the initial junction temperature estimation model is corrected based on the correlation model and thermistor temperature parameters until the difference between the estimated junction temperature parameters and the actual junction temperature parameters under the same operating conditions is within a preset threshold range.

[0051] Step S5: After completing the correction of the junction temperature estimation model for the power module, perform tests under different operating conditions again on the test bench, and record the actual junction temperature parameters (Tr) of the thermal imager chip and the estimated junction temperature parameters (Tj) estimated by the software; compare the Tr and Tj data again, and then make corrections until the estimation accuracy requirements are met.

[0052] In summary, this invention significantly improves the timeliness and accuracy of the power module's temperature response by directly monitoring the chip junction temperature and using this parameter as a standard value to correct the estimation model of the power module, thus avoiding protection failures caused by thermal delay. It provides a proactive protection strategy for inverter modules under extreme operating conditions, optimizing the balance between controller cost and reliability. The estimation correction method of this application is applicable to the durability verification and safety design of electric vehicle motor controllers, meeting the industry's increasingly stringent requirements for system safety. This technical solution, based on non-contact real-time monitoring, accurately captures dynamic changes in chip junction temperature, effectively solving the shortcomings of traditional NTC temperature measurement methods in terms of timeliness and accuracy under rapid load changes or high-power conditions. This ensures the safe operation of the module while reducing system design costs, providing a quantifiable and implementable solution for the safety and reliability of electric vehicle motor controllers.

[0053] Secondly, this application provides a power module junction temperature estimation and correction system, which includes: a preprocessing module, a testing module, an estimation module, and a correction module; wherein... The preprocessing module is used to preprocess the power module to expose the chip of the power module to the external environment at least partially; the testing module is used to perform operating condition testing on the power module in a test bench and simultaneously use thermal imaging equipment to monitor the actual junction temperature parameters of the chip; the estimation module is used to estimate the expected junction temperature parameters of the chip using the initial junction temperature estimation model of the power module during the testing process; the correction module is used to correct the initial junction temperature estimation model based on the actual junction temperature parameters and the expected junction temperature parameters to obtain the corrected junction temperature calculation model.

[0054] The system includes the functional implementation of each module in the aforementioned power module junction temperature estimation and correction system, and a power module junction temperature estimation and correction method, which includes: Step S1: Preprocess the power module to expose at least part of the power module's chip to the external environment.

[0055] Specifically, step S1 above includes: Step S1a: Modify the structure of the IGBT power module by removing part of the package structure of the power module to expose the upper surface of the chip.

[0056] It should be noted that after the chip's upper surface is exposed, it is necessary to ensure that the bonding and mounting wires do not obstruct the area on the chip's upper surface that will be used for temperature measurement later.

[0057] Step S1b: Apply black coating to the exposed surface area of ​​the chip.

[0058] Specifically, black paint is applied to the exposed surface of the chip. Furthermore, the application of black paint ensures that the emissivity of the exposed surface area of ​​the chip is not less than 0.95.

[0059] It should be noted that emissivity is a dimensionless parameter (range 0.0~1.0) of an object's surface heat radiation capacity.

[0060] Preferably, a high-temperature resistant black paint (emissivity ≥ 0.95) with a thickness of about 2 mm is uniformly coated on the chip surface to enhance thermal radiation consistency and improve heat preservation.

[0061] It is worth noting that by removing part of the packaging structure to expose the chip's upper surface and then blackening the exposed area, the uniformity of thermal radiation on the chip surface is enhanced, ensuring that the thermal imaging equipment can accurately capture the chip's junction temperature, providing a basic guarantee for real-time monitoring, thereby improving the timeliness and accuracy of temperature response.

[0062] Step S2: Perform operating condition tests on the power module using a test bench and simultaneously use thermal imaging equipment to monitor the actual junction temperature parameters of the chip.

[0063] Step S2 specifically includes: Step S2a: Assemble the processed power module into the controller according to standard procedures.

[0064] Furthermore, after assembly, it is necessary to ensure that the area of ​​the chip used for subsequent temperature measurement is unobstructed, and to reserve at least 30cm of observation space.

[0065] Step S2b: Use a high-precision thermal imager (such as FLIR A655sc) as the main temperature measurement device.

[0066] Understandably, by fixing thermal imaging equipment to a test bench and simulating actual working conditions, the engineering implementation of non-contact real-time monitoring can be achieved, ensuring that junction temperature data is synchronized with actual working conditions and significantly improving the timeliness of temperature response.

[0067] Preferably, in order to ensure complete capture of all chip temperatures, it is fixed at a distance of 30–40 cm from the chip surface, so that the angle between the optical axis of the thermal imager lens and the chip plane is maintained between 75° and 90°.

[0068] It is worth noting that by fixing the distance of the thermal imager (30–40cm) and the angle between the lens optical axis (75°–90°), the integrity and consistency of the thermal imaging data are ensured, measurement blind spots or angular errors are avoided, and the timeliness and accuracy of temperature response are further improved.

[0069] Step S2c: Use a load test bench to simulate actual operating conditions (such as speed, torque, bus voltage, switching frequency, etc.) and control cooling conditions (water flow, water temperature, pressure). Based on the pre-set thermal management strategy, test to cover all vehicle operating conditions.

[0070] Furthermore, the testing process uses a thermal imager to simultaneously test the junction temperature of the chip surface.

[0071] Preferably, the temperature range setting for thermal imaging parameters needs to be set according to the operating conditions (normal operating conditions: -40–150℃; stalled operating conditions: 150–650℃), and both emissivity and transmittance are set to 0.95, with high-speed real-time acquisition mode enabled.

[0072] Step S3: During the test, the estimated junction temperature parameters of the chip are estimated using the initial junction temperature estimation model of the power module.

[0073] Understandably, by collecting internal thermistor temperature parameters and using the initial junction temperature estimation model to calculate the predicted junction temperature, an initial benchmark for junction temperature estimation is established, providing reliable input data for subsequent model correction, reducing initial estimation bias, and improving overall monitoring accuracy.

[0074] The above step S3 specifically includes: Step S3a: Collect the internal thermistor temperature parameters of the power module during the test.

[0075] Specifically, during the test, the internal thermistor temperature parameters (NTC sensor) of the power module and the chip junction temperature measured by the thermal imager were recorded simultaneously under different operating conditions.

[0076] Step S3b: Calculate the estimated junction temperature parameters based on the thermistor temperature parameters and the initial junction temperature estimation model.

[0077] In some specific implementations, step S3b includes: Step 1: According to the formula: ΔT=P×Rθjc Calculate the temperature compensation parameter ΔT, where P is the chip power loss coefficient and Rθjc is the junction-to-case thermal resistance; Step 2: According to the formula: T nj = T n +ΔT Calculate the estimated junction temperature parameter T nj , among which, T n This refers to the temperature parameter for thermistor.

[0078] It is worth noting that the estimated junction temperature parameters are uncorrected estimates of the chip junction temperature parameters. However, the chip power loss coefficient mentioned above in the estimation cannot accurately represent the true state of the power module, which will result in the inaccurate estimated junction temperature parameters calculated by the initial junction temperature estimation model.

[0079] Step S4: Correct the initial junction temperature estimation model based on the actual junction temperature parameters and the estimated junction temperature parameters to obtain the corrected junction temperature calculation model.

[0080] Step S4 above includes: Step S4a: Establish the correspondence between the estimated junction temperature parameters and the actual junction temperature parameters under different operating conditions.

[0081] It is worth noting that the estimated junction temperature parameters are compared with the actual junction temperature parameters, and a correlation model between the two under different operating conditions is established to calibrate the software protection threshold.

[0082] Step S4b: Correct the initial junction temperature estimation model based on the correspondence between the estimated junction temperature parameters and the actual junction temperature parameters.

[0083] Specifically, the chip power loss coefficient in the initial junction temperature estimation model is corrected based on the correlation model and thermistor temperature parameters until the difference between the estimated junction temperature parameters and the actual junction temperature parameters under the same operating conditions is within a preset threshold range.

[0084] Step S5: After completing the correction of the junction temperature estimation model for the power module, perform tests under different operating conditions again on the test bench, and record the actual junction temperature parameters (Tr) of the thermal imager chip and the estimated junction temperature parameters (Tj) estimated by the software; compare the Tr and Tj data again, and then make corrections until the estimation accuracy requirements are met.

[0085] Thirdly, embodiments of this application provide a power module junction temperature estimation and correction device, which can be a personal computer (PC), laptop computer, server, or other device with data processing capabilities.

[0086] Reference Figure 3 , Figure 3 This is a schematic diagram of the hardware structure of the power module junction temperature estimation and correction device involved in the embodiments of this application. In the embodiments of this application, the power module junction temperature estimation and correction device may include a processor, a memory, a communication interface, and a communication bus.

[0087] The communication bus can be of any type and is used to interconnect the processor, memory, and communication interface.

[0088] The communication interface includes input / output (I / O) interfaces, physical interfaces, and logical interfaces used for interconnecting devices within the power module junction temperature estimation and correction device, as well as interfaces used for interconnecting the power module junction temperature estimation and correction device with other devices (such as other computing devices or user equipment). Physical interfaces can be Ethernet interfaces, fiber optic interfaces, ATM interfaces, etc.; user equipment can be displays, keyboards, etc.

[0089] Memory can be various types of storage media, such as random access memory (RAM), read-only memory (ROM), non-volatile RAM (NVRAM), flash memory, optical storage, hard disk, programmable ROM (PROM), erasable PROM (EPROM), electrically erasable PROM (EEPROM), etc.

[0090] The processor can be a general-purpose processor, which can call the power module junction temperature estimation and correction program stored in the memory and execute the power module junction temperature estimation and correction method provided in the embodiments of this application. For example, the general-purpose processor can be a central processing unit (CPU). The method executed when the power module junction temperature estimation and correction program is called can be referred to in the various embodiments of the power module junction temperature estimation and correction method of this application, and will not be repeated here.

[0091] Those skilled in the art will understand that Figure 3 The hardware structure shown does not constitute a limitation of this application and may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0092] Fourthly, embodiments of this application also provide a computer-readable storage medium.

[0093] The present application has a computer-readable storage medium storing a power module junction temperature estimation and correction program, wherein when the power module junction temperature estimation and correction program is executed by a processor, it implements the steps of the power module junction temperature estimation and correction method as described above.

[0094] The method implemented when the power module junction temperature estimation and correction program is executed can be referred to in various embodiments of the power module junction temperature estimation and correction method of this application, and will not be repeated here.

[0095] It should be noted that the sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0096] The terms "comprising" and "having," and any variations thereof, in the specification, claims, and accompanying drawings of this application are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to such process, method, product, or apparatus. The terms "first," "second," and "third," etc., are used to distinguish different objects, etc., and do not indicate a sequence, nor do they limit "first," "second," and "third" to different types.

[0097] In the description of the embodiments of this application, terms such as "exemplary," "for example," or "for instance" are used to indicate examples, illustrations, or explanations. Any embodiment or design described as "exemplary," "for example," or "for instance" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of terms such as "exemplary," "for example," or "for instance" is intended to present the relevant concepts in a concrete manner.

[0098] In the description of the embodiments of this application, unless otherwise stated, " / " means "or". For example, A / B can mean A or B. The "and / or" in the text is merely a description of the relationship between related objects, indicating that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist simultaneously, and B exists alone. In addition, in the description of the embodiments of this application, "multiple" means two or more.

[0099] In some processes described in the embodiments of this application, multiple operations or steps are included in a specific order. However, it should be understood that these operations or steps may not be executed in the order they appear in the embodiments of this application, or they may be executed in parallel. The sequence number of the operation is only used to distinguish different operations, and the sequence number itself does not represent any execution order. In addition, these processes may include more or fewer operations, and these operations or steps may be executed sequentially or in parallel, and these operations or steps may be combined.

[0100] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) as described above, and includes several instructions to cause a terminal device to execute the methods described in the various embodiments of this application.

[0101] The above are merely preferred embodiments of this application and do not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A method of power module junction temperature estimation correction, the method comprising: The power module junction temperature correction method comprises: preprocessing the power module to expose the chips of the power module to the external environment at least partially; using a test bench to test the power module under working conditions and synchronously using a thermal imaging device to monitor the actual junction temperature parameters of the chips; during the testing process, using an initial junction temperature estimation model of the power module to estimate the estimated junction temperature parameters of the chips; correcting the initial junction temperature estimation model according to the actual junction temperature parameters and the estimated junction temperature parameters to obtain a corrected junction temperature calculation model.

2. The power module junction temperature estimation correction method of claim 1, wherein, The preprocessing of the power module to expose the chips of the power module to the external environment at least partially comprises: removing part of the packaging structure of the power module to expose the upper surface of the chips, and blackening the exposed surface area of the chips.

3. The power module junction temperature estimation correction method of claim 2, wherein, The blackening of the exposed surface area of the chips comprises: coating black paint on the exposed surface of the chips so that the emissivity of the exposed surface area of the chips is not less than 0.

95.

4. The power module junction temperature estimation correction method of claim 1, wherein, The estimation of the estimated junction temperature parameters of the chips during the testing process using the initial junction temperature estimation model of the power module comprises: collecting the thermal sensitive temperature parameters inside the power module during the testing; calculating the estimated junction temperature parameters according to the thermal sensitive temperature parameters and the initial junction temperature estimation model.

5. The power module junction temperature estimation correction method of claim 4, wherein, The calculation of the estimated junction temperature parameters according to the thermal sensitive temperature parameters and the initial junction temperature estimation model comprises: calculating the temperature compensation parameter ΔT according to the formula: ΔT = P × Rθjc, wherein P is the chip power loss coefficient and Rθjc is the junction-to-case thermal resistance; calculating the temperature compensation parameter ΔT according to the formula: ΔT = P × Rθjc, wherein P is the chip power loss coefficient and Rθjc is the junction-to-case thermal resistance. The correction of the initial junction temperature estimation model according to the actual junction temperature parameters and the estimated junction temperature parameters to obtain the corrected junction temperature calculation model comprises: establishing the correspondence between the estimated junction temperature parameters and the actual junction temperature parameters under different working conditions, and correcting the initial junction temperature estimation model according to the correspondence between the estimated junction temperature parameters and the actual junction temperature parameters. T nj = T n +ΔT Computing an estimated junction temperature parameter T nj where T n is a heat sensitive temperature parameter.

6. The power module junction temperature estimation correction method of claim 4, wherein, The correction of the initial junction temperature estimation model according to the correspondence between the estimated junction temperature parameters and the actual junction temperature parameters comprises: correcting the chip power loss coefficient in the initial junction temperature estimation model according to the correspondence between the estimated junction temperature parameters and the actual junction temperature parameters until the difference between the estimated junction temperature parameters and the actual junction temperature parameters under the same working condition is within a preset threshold range.

7. The power module junction temperature estimation correction method of claim 6, wherein, The use of the test bench to test the power module under working conditions and the synchronous use of the thermal imaging device to monitor the actual junction temperature parameters of the chips comprises: installing the power module in a controller and fixing the thermal imaging device at a preset distance from the surface of the chips; 8. The power module junction temperature estimation correction method of claim 1, wherein, using the test bench to simulate actual working conditions to test the power module. The fixing of the thermal imaging device at a preset distance from the surface of the chips comprises: fixing the thermal imager at a preset distance from the surface of the chips and keeping the angle between the lens optical axis of the thermal imager and the plane of the chips between 75° and 90°.

9. The power module junction temperature estimation correction method of claim 8, wherein, The power module junction temperature estimation correction system comprises: a preprocessing module for preprocessing the power module to expose the chips of the power module to the external environment at least partially; 10. A power module junction temperature estimation correction system, characterized by, a test module for using a test bench to test the power module under working conditions and synchronously using a thermal imaging device to monitor the actual junction temperature parameters of the chips; ​ ​ an estimation module configured to estimate an estimated junction temperature parameter of the chip during the test by using an initial junction temperature estimation model of the power module; a correction module configured to correct the initial junction temperature estimation model according to the actual junction temperature parameter and the estimated junction temperature parameter to obtain a corrected junction temperature calculation model.

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