Solar cell and cell module

Abstract

The invention discloses a solar cell and a cell module. The solar cell comprises a substrate; the first auxiliary grid lines and the second auxiliary grid lines are arranged on the substrate, the first auxiliary grid lines and the second auxiliary grid lines extend in the second direction, and the first auxiliary grid lines and the second auxiliary grid lines are alternately arranged in the first direction; the first direction intersects with the second direction; the first main grid line extends along the first direction, is connected with the first auxiliary grid line and is separated from the second auxiliary grid line; the second main grid line extends along the first direction, is connected with the second auxiliary grid line and is separated from the first auxiliary grid line; the orthographic projection of the third auxiliary grid line on the substrate is located in the orthographic projection of the first main grid line on the substrate and is electrically connected with the first main grid line, and / or the orthographic projection of the fourth auxiliary grid line on the substrate is located in the orthographic projection of the second main grid line on the substrate and is electrically connected with the second main grid line. The overall photoelectric conversion efficiency of the cell is improved.

Description

Technical Field

[0001] The present invention relates to the field of photovoltaic technology, and in particular to a solar cell and a battery module. Background Technology

[0002] In order to effectively conduct the current generated by solar cells, a large number of grid lines are arranged on the solar panel. These grid lines are covered with a specific pattern on the surface of the panel, forming a grid-like structure. When sunlight shines on the panel, the current generated by the photovoltaic effect is effectively collected and conducted through these grid lines.

[0003] Currently, there is still a need to improve the conversion efficiency of solar cells by designing patterns for the grid lines. Summary of the Invention

[0004] This invention provides a solar cell and a battery module that improves the overall photoelectric conversion efficiency of the battery.

[0005] In a first aspect, embodiments of the present invention provide a solar cell, comprising:

[0006] substrate;

[0007] A first sub-gate line and a second sub-gate line are disposed on the substrate, wherein the first sub-gate line and the second sub-gate line extend along a second direction and are alternately arranged in a first direction; the first direction intersects the second direction;

[0008] The first main grid line extends along the first direction, connects to the first sub-grid line, and is spaced apart from the second sub-grid line;

[0009] The second main grid line extends along the first direction, connects to the second sub-grid line, and is spaced apart from the first sub-grid line;

[0010] A third sub-gate line, the orthographic projection of the third sub-gate line on the substrate is located within the orthographic projection of the first main gate line on the substrate, and is electrically connected to the first main gate line; and / or, a fourth sub-gate line, the orthographic projection of the fourth sub-gate line on the substrate is located within the orthographic projection of the second main gate line on the substrate, and is electrically connected to the second main gate line.

[0011] Optionally, the third sub-gate line includes at least one first continuous gate line extending along the first direction; the first continuous gate line intersects with the first sub-gate line;

[0012] And / or, the fourth sub-gate line includes at least one second continuous gate line extending along the first direction; the second continuous gate line intersects with the second sub-gate line.

[0013] Optionally, along the first direction, the length of the first continuous gate line is less than or equal to the length of the first main gate line;

[0014] And / or, the length of the second continuous gate line is less than or equal to the length of the second main gate line.

[0015] Optionally, the third sub-gate line includes a plurality of first sub-gate line segments arranged at intervals along the first direction; the first sub-gate line segments do not intersect with the first sub-gate line or at least some of the first sub-gate line segments intersect with the first sub-gate line;

[0016] And / or, the fourth sub-gate line includes a plurality of second sub-gate line segments spaced apart along the first direction; the second sub-gate line segments do not intersect with the second sub-gate line or at least some of the second sub-gate line segments intersect with the second sub-gate line.

[0017] Optionally, the third sub-gate line includes a plurality of first conductive points arranged at intervals along the first direction; the first conductive points do not overlap with the first sub-gate line or at least some of the first conductive points overlap with the first sub-gate line;

[0018] And / or, the fourth sub-gate line includes a plurality of second conductive points spaced apart along the first direction; the second conductive points do not overlap with the second sub-gate line or at least some of the second conductive points overlap with the second sub-gate line.

[0019] Optionally, the third sub-gate line includes a plurality of third sub-gate line segments extending along the second direction, the third sub-gate line segments being spaced apart in the first direction;

[0020] And / or, the fourth sub-gate line includes a plurality of fourth sub-gate line segments extending along the second direction, the fourth sub-gate line segments being spaced apart in the first direction.

[0021] Optionally, the third sub-gate line is located on the side of the first main gate line that is close to or far from the substrate;

[0022] And / or, the fourth sub-gate line is located on the side of the second main gate line that is close to or away from the substrate.

[0023] Optionally, the first sub-gate line, the second sub-gate line, the third sub-gate line, and the fourth sub-gate line are arranged in the same layer.

[0024] Optionally, the substrate includes a first doped layer and a second doped layer. The first doped layer includes a first doped sub-region, which extends along the second direction. The second doped layer includes a second doped sub-region, which extends along the second direction. The first doped sub-region and the second doped sub-region are arranged alternately along the first direction.

[0025] The first doped sub-region extends continuously at the first main gate line, and the second doped sub-region is interrupted at the first main gate line; the second doped sub-region extends continuously at the second main gate line, and the first doped sub-region is interrupted at the second main gate line.

[0026] The orthographic projection of the first sub-gate line on the substrate lies within the orthographic projection of the first doped sub-region on the substrate, and the first sub-gate line is electrically connected to the first doped sub-region; the orthographic projection of the second sub-gate line on the substrate lies within the orthographic projection of the second doped sub-region on the substrate, and the second sub-gate line is electrically connected to the second doped sub-region; the first doped layer and the second doped layer have different conductivity types.

[0027] The first doped layer includes a third doped sub-region, the width of which is greater than the width of the first main gate line along the second direction; the orthographic projection of the third sub-gate line on the substrate lies within the orthographic projection of the third doped sub-region on the substrate; the third sub-gate line is electrically connected to the third doped sub-region; and or, the second doped layer includes a fourth doped sub-region, the width of which is greater than the width of the second main gate line along the second direction; the orthographic projection of the fourth sub-gate line on the substrate lies within the orthographic projection of the fourth doped sub-region on the substrate; the fourth sub-gate line is electrically connected to the fourth doped sub-region.

[0028] Secondly, embodiments of the present invention provide a battery assembly including the solar cell described in any embodiment of the present invention.

[0029] The solar cell provided in this embodiment of the invention includes a first sub-grid line and a second sub-grid line extending along a second direction Y and alternately arranged in a first direction X. The first main grid line intersects and is electrically connected to the first sub-grid line. The second sub-grid line is interrupted at the position where it intersects with the first main grid line. The second main grid line intersects and is electrically connected to the second sub-grid line. The first sub-grid line is interrupted at the position where it intersects with the second main grid line. By introducing a third sub-grid line in the orthographic projection area of ​​the first main grid line, and or, introducing a fourth sub-grid line in the orthographic projection area of ​​the second main grid line, the photogenerated carriers in the area below the main grid line are directly collected using the third sub-grid line and / or the fourth sub-grid line, thereby reducing the carrier diffusion path, reducing recombination loss, effectively eliminating the collection dead zone in the traditional structure, and further improving the overall photoelectric conversion efficiency of the cell. Attached Figure Description

[0030] Figure 1 A partial structural schematic diagram of a solar cell provided in an embodiment of the present invention;

[0031] Figures 2-3 A partial structural schematic diagram of another solar cell provided in an embodiment of the present invention;

[0032] Figure 4 A partial structural schematic diagram of another solar cell provided in an embodiment of the present invention;

[0033] Figure 5 A partial structural schematic diagram of another solar cell provided in an embodiment of the present invention;

[0034] Figures 6-7 A partial structural schematic diagram of another solar cell provided in an embodiment of the present invention;

[0035] Figure 8 A partial structural schematic diagram of another solar cell provided in an embodiment of the present invention;

[0036] Figure 9 A partial structural schematic diagram of another solar cell provided in an embodiment of the present invention;

[0037] Figure 10 This is a partial structural schematic diagram of another solar cell provided in an embodiment of the present invention.

[0038] Figure label:

[0039] 110. First sub-gate line; 120. Second sub-gate line; 130. Third sub-gate line; 131. First continuous gate line; 132. First sub-gate line segment; 133. First conductive point; 134. Third sub-gate line segment; 140. First main gate line; 150. First doped layer; 151. First doped sub-region; 152. Third doped sub-region; 160. Second doped layer; 161. Second doped sub-region; 162. Fourth doped sub-region; 170. Second main gate line; 180. Fourth sub-gate line; 181. Second continuous gate line; 182. Second sub-gate line segment; 183. Second conductive point; 184. Fourth sub-gate line segment; Detailed Implementation

[0040] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0041] In solar cells, the substrate is composed of various functional layers, and current is collected by grid lines, which typically consist of several main grid lines and numerous sub-grid lines. The main grid lines are used to collect photogenerated carriers collected by the sub-grid lines and transport them to external circuits; they are relatively wide, typically occupying 5%–15% of the total cell area. To reduce contact recombination or to accommodate passivated contact structures, the main grid region often uses non-burn-through conductive paste printing. This type of paste does not penetrate the surface passivation layer during sintering and therefore cannot form ohmic contacts with the silicon substrate. Consequently, photogenerated carriers in the area directly below the main grid cannot be directly collected by the main grid and must rely on the sub-grid lines that penetrate the main grid region for lateral transport. However, due to the large coverage area of ​​the main grid, carriers must travel a long lateral diffusion path to reach the effective collection point, during which they are easily lost due to recombination, significantly reducing short-circuit current and fill factor. Especially in high-efficiency cell structures, this region becomes a "dead zone" for carrier collection, restricting further improvements in the overall photoelectric conversion efficiency of the cell.

[0042] In view of this, Figure 1 This is a partial structural schematic diagram of a solar cell provided in an embodiment of the present invention. See also... Figure 1The solar cell includes a substrate 1, a first sub-gate line 110, a second sub-gate line 120, a third sub-gate line 130, a first main gate line 140, and a second main gate line 170. The substrate 1 can be an N-type or P-type doped semiconductor substrate. The substrate 1 includes opposing first and second surfaces. Depending on the solar cell structure type (e.g., IBC, TOPCon, HJT), the first sub-gate line 110, second sub-gate line 120, third sub-gate line 130, first main gate line 140, and second main gate line 170 can be disposed on the first surface, the second surface, or both sides. In this embodiment, taking an Interdigitated Back Contact (IBC) solar cell as an example, the first sub-gate line 110, second sub-gate line 120, third sub-gate line 130, first main gate line 140, and second main gate line 170 are disposed on the first surface, i.e., the back side of the substrate, which allows for unobstructed front-side light absorption by eliminating gate line shading.

[0043] like Figure 1 As shown, the first sub-gate line 110 and the second sub-gate line 120 extend along the second direction Y, and are alternately arranged in the first direction X. The first direction X intersects the second direction Y; exemplarily, the first direction X and the second direction Y are perpendicular. The first sub-gate line 110 and the second sub-gate line 120 extend to the region within the substrate where electron-hole pairs are generated, for efficiently collecting photogenerated carriers dispersed throughout the substrate. Specifically, the first sub-gate line 110 collects carriers of a first conductivity type, and the second sub-gate line 120 collects carriers of the opposite conductivity type. It should be noted that the carriers of the first conductivity type can be electrons, and the carriers of the opposite conductivity type can be holes. Alternatively, the carriers of the first conductivity type can be holes, and the carriers of the opposite conductivity type can be electrons.

[0044] The first main grid line 140 extends along the first direction X. The first sub-grid line 110 intersects with and is electrically connected to the first main grid line 140. The second sub-grid line 120 is disconnected at the intersection of the first main grid line 140 to form a gap, avoiding short circuits caused by contact between grid lines of different polarities. The first main grid line 140 is electrically connected to the first sub-grid line 110. The first main grid line 140 can provide a low-resistance path, shortening the average current transmission distance. The first main grid line 140 can efficiently collect the current of the first sub-grid line 110, thereby significantly reducing the series resistance of the entire battery and improving the fill factor and conversion efficiency of the battery. The second main grid line 170 extends along the first direction X and alternates with the first main grid line 140 in the second direction Y. The second main grid line 170 intersects with and is electrically connected to the second sub-grid line 120. The second main grid line 170 can provide a low-resistance path, shortening the average current transmission distance. The second main grid line 170 can efficiently collect the current of the second sub-grid line 120. Accordingly, the first sub-gate line 110 and the second main gate line 170 are separated at their intersection to form a gap, thus avoiding short circuits between electrodes of different polarities.

[0045] Since the first main grid line 140 is usually printed with non-burn-through conductive paste, it cannot directly form an ohmic contact with the silicon substrate, and the area below it is prone to become a dead zone for carrier collection. Therefore, in this embodiment of the invention, the solar cell is also provided with a third sub-grid line 130. The orthographic projection of the third sub-grid line 130 on the substrate 1 is located within the orthographic projection of the first main grid line 140 on the substrate 1. The third sub-grid line 130 extends along the first direction X and is electrically connected to the first main grid line 140. The third sub-grid line 130 is used to directly collect photogenerated carriers in the area below the main grid, thereby reducing the carrier diffusion path, reducing recombination loss, effectively eliminating the collection dead zone in the traditional structure, and further improving the overall photoelectric conversion efficiency of the cell.

[0046] The solar cell provided in this embodiment of the invention includes a first sub-grid line 110 and a second sub-grid line 120 extending along a second direction Y and alternately arranged in a first direction X. A first main grid line 140 intersects and is electrically connected to the first sub-grid line 110. The second sub-grid line is interrupted at the intersection with the first main grid line 140. A second main grid line 170 intersects and is electrically connected to the second sub-grid line 120. The first sub-grid line 110 and the second main grid line 170 are interrupted at the intersection. By introducing a third sub-grid line 130 in the orthographic projection area of ​​the first main grid line 140, the photogenerated carriers in the area below the main grid are directly collected using the third sub-grid line 130, thereby reducing the carrier diffusion path, reducing recombination loss, effectively eliminating the collection blind zone in the traditional structure, and further improving the overall photoelectric conversion efficiency of the cell.

[0047] Combination Figure 1In this embodiment of the invention, the solar cell is further provided with a fourth sub-grid line 180. The orthographic projection of the fourth sub-grid line 180 on the substrate 1 lies within the orthographic projection of the second main grid line 170 on the substrate 1. The fourth sub-grid line 180 extends along the first direction X and is electrically connected to the second main grid line 170. The fourth sub-grid line 180 directly collects photogenerated carriers in the region below the second main grid line 170, thereby reducing the carrier diffusion path, reducing recombination losses, effectively eliminating the collection dead zone in the traditional structure, and further improving the overall photoelectric conversion efficiency of the cell. It should be noted that, depending on the design of the solar cell and material costs, in some embodiments, only the third sub-grid line 130 or only the fourth sub-grid line 180 may be provided, or both the third sub-grid line 130 and the fourth sub-grid line 180 may be provided simultaneously.

[0048] Optional, combined Figure 1 The third sub-gate line 130 may intersect with the first sub-gate line 110. For example, the third sub-gate line 130 may include at least one first continuous gate line 131 extending along the first direction X; the first continuous gate line 131 intersects with the first sub-gate line 110; that is, the first continuous gate line 131 is a continuous line, and along the first direction X, the length of the first continuous gate line 131 is less than or equal to the length of the first main gate line 140, meaning the length of the first continuous gate line 131 can be adapted to the length of the first main gate line 140, thereby enabling collection of the entire area below the first main gate line 140. In this embodiment of the invention, an example is shown where a first continuous gate line 131 is provided at a corresponding position of the first main gate line 140. In other embodiments, multiple first continuous gate lines 131 can be arranged side-by-side in the second direction Y, based on the width of the first main gate line 140 in the second direction Y, forming a parallel array of third sub-gate lines 130, to further improve the carrier collection density and uniformity of the area covered by the first main gate line 140.

[0049] Figures 2-3 This is a partial structural schematic diagram of another solar cell provided in an embodiment of the present invention. See also... Figure 2 and Figure 3 The difference between this embodiment and the above embodiment is that the third sub-gate line 130 may include a plurality of first sub-gate line segments 132 arranged at intervals along the first direction X; the spatial relationship between the first sub-gate line segments 132 and the first sub-gate line 110 can be flexibly configured to balance carrier collection efficiency and material cost.

[0050] in, Figure 2 The first sub-gate line segment 132 does not intersect with the first sub-gate line 110, that is, the first sub-gate line segment 132 is located between the adjacent first sub-gate lines 110 in the first direction X. Figure 3At least a portion of the first sub-gate segment 132 intersects with the first sub-gate line 110. The intersection structure can form a low-resistance current path, which helps to quickly draw the carriers collected by the third sub-gate segment 134 into the first sub-gate line 110, thereby reducing the local bus resistance and improving the current collection efficiency.

[0051] In this embodiment of the invention, by employing multiple spaced first sub-gate segments 132, the amount of conductive paste, such as silver paste, used can be significantly reduced, thus lowering manufacturing costs, while ensuring uniform carrier collection within the projected area of ​​the first main gate line 140. Simultaneously, the length, width, and spacing of the segments can be optimized based on the geometry, doping distribution, and carrier diffusion length of the main gate line, achieving the best balance between performance and cost. In this embodiment, an exemplary arrangement of a column of first sub-gate segments 132 corresponding to the first main gate line 140 is shown. In other embodiments, multiple first sub-gate segments 132 can be arranged side-by-side in the second direction Y, based on the width of the first main gate line 140 in the second direction Y, forming a parallel array of third sub-gate lines 130 to further improve the carrier collection density and uniformity within the area covered by the first main gate line 140.

[0052] Figure 4 This is a partial structural schematic diagram of another solar cell provided in an embodiment of the present invention. See also... Figure 4 The difference between this embodiment and the previous embodiment is that the third sub-grid line 130 includes a plurality of first conductive points 133 spaced apart along the first direction X; the first conductive points 133 do not overlap with the first sub-grid line 110 or at least some of the first conductive points 133 overlap with the first sub-grid line 110. In this embodiment, by using a plurality of first conductive points 133, collection points can be flexibly set within the orthographic projection area of ​​the first main grid line 140, improving the uniformity of carrier collection while further reducing the amount of conductive paste used, thereby reducing manufacturing costs. In addition, the multiple first conductive points 133 can also provide stress relief for the first main grid line 140, avoiding microcracks caused by differences in thermal expansion coefficients and enhancing the mechanical stability of the battery. In other embodiments of this invention, based on the width of the first main grid line 140 in the second direction Y, multiple rows of first conductive points 133 can be arranged side by side in the second direction Y to form a parallel array of third sub-grid lines 130. For example, when the first main grid line 140 is relatively wide, two or more rows of first conductive points 133 can be provided to further improve the carrier collection density and uniformity of the area covered by the first main grid line 140. Furthermore, the specific shape and size of the first conductive points 133 can be adjusted according to actual needs. Common shapes include circles, squares, triangles, or other geometric shapes, and are not limited here.

[0053] Figure 5This is a partial structural schematic diagram of another solar cell provided in an embodiment of the present invention. See also... Figure 5 The difference between this embodiment and the above embodiment is that the third sub-gate line 130 extends along the second direction Y and is electrically connected to the first main gate line 140, combined with... Figure 2 The third sub-gate line 130 can be viewed as multiple third sub-gate line segments 134 extending along the second direction Y. These third sub-gate line segments 134 are spaced apart along the first direction X, thereby forming a collection structure with a wide region within the projected area of ​​the first main gate line 140. Through this arrangement, each third sub-gate line segment 134 can cover different width regions of the first main gate line 140 along the second direction Y, effectively expanding the carrier collection range. The number, length, and spacing of the third sub-gate line segments 134 along the first direction X can be flexibly adjusted according to the actual width of the first main gate line 140, the printing precision of the paste, and the lateral diffusion length of the carriers.

[0054] Optional, combined Figure 1 The fourth sub-gate line 180 may intersect with the second sub-gate line 120. For example, the fourth sub-gate line 180 may include at least one second continuous gate line 181 extending along the first direction X. The second continuous gate line 181 intersects with the second sub-gate line 120; that is, the second continuous gate line 181 is a continuous line. In the first direction X, the length of the second continuous gate line 181 is less than or equal to the length of the second main gate line 180, meaning the length of the second continuous gate line 181 can be adapted to the length of the second main gate line 170, thereby enabling collection of the entire area below the second main gate line 170. In this embodiment, an example shows a second continuous gate line 181 positioned corresponding to the second main gate line 170. In other embodiments, multiple second continuous gate lines 181 can be arranged side-by-side in the second direction Y, based on the width of the second main gate line 170 in the second direction Y, forming a parallel array of fourth sub-gate lines 180 to further improve the carrier collection density and uniformity of the area covered by the second main gate line 170.

[0055] Figures 6-7 This is a partial structural schematic diagram of another solar cell provided in an embodiment of the present invention. See also... Figure 6 and Figure 7 The difference between this embodiment and the above embodiment is that the fourth sub-gate line 180 may include a plurality of second sub-gate line segments 182 arranged at intervals along the first direction X; the spatial relationship between the second sub-gate line segments 182 and the second sub-gate line 120 can be flexibly configured to balance carrier collection efficiency and material cost.

[0056] Among them, such as Figure 6As shown, the second sub-gate line segment 182 may not intersect with the second sub-gate line 120; that is, the second sub-gate line segment 182 is located between adjacent second sub-gate lines 120 in the first direction X. Figure 7 As shown, at least part of the second sub-gate segment 182 may intersect with the second sub-gate line 120. The intersection structure can form a low-resistance current path, which helps to quickly draw the charge carriers collected by the second sub-gate segment 182 into the second sub-gate line 120, thereby reducing the local bus resistance and improving the current collection efficiency.

[0057] In this embodiment of the invention, by employing multiple spaced second sub-gate segments 182, the amount of conductive paste, such as silver paste, used can be significantly reduced, thus lowering manufacturing costs, while ensuring uniform carrier collection within the projected area of ​​the second main gate line 170. Simultaneously, the length, width, and spacing of the segments can be optimized based on the geometry, doping distribution, and carrier diffusion length of the main gate line, achieving the best balance between performance and cost. In this embodiment, an exemplary arrangement of a row of second sub-gate segments 182 corresponding to the second main gate line 170 is shown. In other embodiments, multiple second sub-gate segments 182 can be arranged side-by-side in the second direction Y, based on the width of the second main gate line 170 in the second direction Y, forming a parallel array of fourth sub-gate lines 180 to further improve the carrier collection density and uniformity of the area covered by the second main gate line 170.

[0058] Figure 8 This is a partial structural schematic diagram of another solar cell provided in an embodiment of the present invention. See also... Figure 8The fourth sub-grid line 180 may further include a plurality of second conductive points 183 spaced apart along the first direction X; the second conductive points 183 do not overlap with the second sub-grid line 120 or at least some of the second conductive points 183 overlap with the second sub-grid line 120. In this embodiment of the invention, by employing a plurality of second conductive points 183, collection points can be flexibly set within the orthographic projection area of ​​the second main grid line 170, thereby improving the uniformity of carrier collection and further reducing the amount of conductive paste used, thus reducing manufacturing costs. In addition, the multiple second conductive points 183 can also provide stress relief for the second main grid line 170, avoiding microcracks caused by differences in thermal expansion coefficients and enhancing the mechanical stability of the battery. In other embodiments of the invention, based on the width of the second main grid line 170 in the second direction Y, multiple rows of second conductive points 183 can be arranged side by side in the second direction Y to form a parallel array of fourth sub-grid lines 180. For example, when the second main grid line 170 is relatively wide, two or more rows of second conductive points 183 can be provided to further improve the carrier collection density and uniformity of the area covered by the second main grid line 170. Furthermore, the specific shape and size of the second conductive points 183 can be adjusted according to actual needs. Common shapes include circles, squares, triangles, or other geometric shapes, which are not limited here.

[0059] Figure 9 This is a partial structural schematic diagram of another solar cell provided by an embodiment of the present invention. The difference between this embodiment and the previous embodiment is that the fourth sub-grid line 180 can also extend along the second direction Y and be electrically connected to the second main grid line 170. The fourth sub-grid line 180 includes multiple fourth sub-grid line segments 184 extending along the second direction Y. The fourth sub-grid line segments 184 are spaced apart in the first direction X, thereby forming a wide-area collection structure within the orthographic projection area of ​​the second main grid line 170. Through this arrangement, each fourth sub-grid line segment 184 can cover different width areas of the second main grid line 170 in the second direction Y, effectively expanding the carrier collection range. The number, length, and spacing of the fourth sub-grid line segments 184 in the first direction X can be flexibly adjusted according to the actual width of the second main grid line 170, the paste printing accuracy, and the lateral diffusion length of the carriers.

[0060] Figure 10This is a partial structural diagram of another solar cell provided by an embodiment of the present invention. In this embodiment, a first doped layer 150 and a second doped layer 160 are disposed on a substrate 1. The first doped layer 150 and the second doped layer 160 have different conductivity types. For example, in a specific embodiment of the present invention, the first doped layer 150 can be N-type doped, and the second doped layer 160 can be P-type doped. The first doped layer 150 includes a first doped sub-region 151 extending along a second direction Y, and the second doped layer 160 includes a second doped sub-region 161 extending along a second direction Y. The first doped sub-region 151 and the second doped sub-region 161 are alternately arranged in a first direction X. The first doped sub-region 151 extends continuously below the first main grid line 140, while the second doped sub-region 161 is interrupted at the position of the first main grid line 140, so that there is only one continuous doped region of conductivity type below the first main grid line 140, avoiding recombination losses of different polarity carriers in the same region, thereby improving the current collection efficiency.

[0061] Furthermore, a passivation layer is typically disposed on the substrate 1. This passivation layer can cover the entire back surface of the substrate, as well as the first doped layer 150 and the second doped layer 160, to reduce the carrier recombination rate on the semiconductor surface. The orthogonal projection of the first sub-gate line 110 on the substrate 1 lies entirely within the orthogonal projection of the first doped region 151. The first sub-gate line 110 penetrates the passivation layer and forms an ohmic contact connection with the first doped region, used to collect electrons generated in the N-type region, ensuring efficient electron collection. Similarly, the orthogonal projection of the second sub-gate line 120 on the substrate lies entirely within the orthogonal projection of the second doped region 161. The second sub-gate line 120 penetrates the passivation layer and forms an ohmic contact connection with the second doped region, used to collect holes generated in the P-type region, ensuring efficient hole collection.

[0062] Optionally, the first doped layer 150 includes a third doped sub-region 152 along the second direction Y, and the width of the third doped sub-region is greater than the width of the first main gate line. The orthographic projection of the third sub-gate line 130 on the substrate 1 lies within the orthographic projection of the third doped sub-region 152 on the substrate 1. The third sub-gate line 130 penetrates the passivation layer and forms an ohmic contact with the third doped region to collect electrons generated in the N-type region, ensuring efficient electron collection. That is, the third sub-gate line 130 is also aligned with the third doped region to achieve effective extraction of photogenerated carriers within the area covered by the first main gate line 140. For example, when the third sub-gate line 130 is a continuous sub-gate line extending along the first direction X, its orthographic projection is completely contained within the orthographic projection area of ​​the first main gate line 140 and forms an ohmic contact with the third doped sub-region 152, further reducing the carrier diffusion path and improving the overall conversion efficiency.

[0063] Optionally, the second doped layer 160 includes a fourth doped sub-region 162. Along the second direction Y, the width of the fourth doped sub-region 162 is greater than the width of the second main gate line 170. The orthographic projection of the fourth sub-gate line 180 on the substrate 1 lies within the orthographic projection of the fourth doped sub-region 162 on the substrate 1. The fourth sub-gate line 180 penetrates the passivation layer and forms an ohmic contact with the fourth doped region to collect holes generated in the P-type region, ensuring efficient hole collection. That is, the fourth sub-gate line 180 is also aligned with the fourth doped region to achieve effective extraction of photogenerated carriers within the area covered by the second main gate line 170. For example, when the fourth sub-gate line 180 is a continuous sub-gate line extending along the first direction X, its orthographic projection is completely contained within the orthographic projection area of ​​the second main gate line 170 and forms an ohmic contact with the fourth doped sub-region 162, further reducing the carrier diffusion path and improving the overall conversion efficiency.

[0064] Optionally, the third sub-gate line 130 is located on the side of the first main gate line 140 that is close to or far from the substrate 1; and or,

[0065] The fourth sub-gate line 180 is located on the side of the second main gate line 170 that is close to or far from the substrate 1.

[0066] Specifically, in the fabrication process, the interlayer positional relationship between the third sub-gate line 130 and the first main gate line 140, as well as the interlayer positional relationship between the fourth sub-gate line 180 and the second main gate line 170, can be flexibly adjusted according to the printing sequence. For example, in the fabrication process, the third sub-gate line 130 can be printed first, followed by the first main gate line 140. Therefore, structurally, the third sub-gate line 130 is located on the side of the first main gate line 140 closer to the substrate 1. Alternatively, the first main gate line 140 can be printed first, followed by the third sub-gate line 130. Therefore, structurally, the third sub-gate line 130 is located on the side of the first main gate line 140 farther from the substrate 1. The third fine gate line is electrically connected to the first main gate line 140, and an ohmic contact connection is formed between the co-sintered third fine gate line and the third doped region to create a conductive path.

[0067] Accordingly, the fourth sub-gate line 180 can be printed first, followed by the second main gate line 170. Therefore, structurally, the fourth sub-gate line 180 is located on the side of the second main gate line 170 closer to the substrate 1. Alternatively, the second main gate line 170 can be printed first, followed by the fourth sub-gate line 180. Therefore, structurally, the fourth sub-gate line 180 is located on the side of the second main gate line 170 farther from the substrate 1. The fourth fine gate line is electrically connected to the second main gate line 170, and a conductive path is formed by co-sintering the fourth fine gate line with the fourth doped region to form an ohmic contact connection.

[0068] Furthermore, the first sub-gate line 110, the second sub-gate line 120, the third sub-gate line 130, and the fourth sub-gate line 180 are arranged in the same layer. Therefore, the third sub-gate line 130 and the fourth sub-gate line 180 can be prepared simultaneously with the first sub-gate line 110 and the second sub-gate line 120 using the same screen printing process, without the need for additional printing presses, masks, or process steps, thus not significantly increasing manufacturing costs. This design not only improves process compatibility but also ensures good alignment accuracy between the sub-gate lines.

[0069] This invention also provides a battery module, including solar cells according to any embodiment of the invention. In this embodiment, multiple solar cells in the battery module can be connected in series to form multiple battery strings. Each battery string can be connected in series, in parallel, or in a series-parallel combination to achieve current collection and output. For example, the connection between individual cells can be achieved by welding solder strips, or the connection between battery strings can be achieved by busbars. In some embodiments, the battery strings can form a cell array, and then be encapsulated together by a front panel, a front encapsulating film, a rear encapsulating film, and a back panel to form the battery module.

[0070] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A solar cell, characterized by, The application relates to a substrate, comprising: a substrate; a first sub-grid line and a second sub-grid line, wherein the first sub-grid line and the second sub-grid line are arranged along a second direction and are alternately arranged along a first direction; the first direction intersects the second direction; a first main grid line arranged along the first direction, connecting the first sub-grid line and being spaced from the second sub-grid line; a second main grid line arranged along the first direction, connecting the second sub-grid line and being spaced from the first sub-grid line; a third sub-grid line, a projection of the third sub-grid line on the substrate is located in a projection of the first main grid line on the substrate and is electrically connected to the first main grid line, and / or a fourth sub-grid line, a projection of the fourth sub-grid line on the substrate is located in a projection of the second main grid line on the substrate and is electrically connected to the second main grid line.

2. The solar cell according to claim 1, characterized in that, The third sub-grid line comprises at least one first continuous grid line extending along the first direction; the first continuous grid line intersects the first sub-grid line; and / or the fourth sub-grid line comprises at least one second continuous grid line extending along the first direction; the second continuous grid line intersects the second sub-grid line.

3. The solar cell according to claim 2, characterized in that, Along the first direction, the length of the first continuous grid line is less than or equal to the length of the first main grid line; and / or the length of the second continuous grid line is less than or equal to the length of the second main grid line.

4. The solar cell of claim 2, wherein The third sub-grid line comprises a plurality of first sub-grid line segments arranged along the first direction; the first sub-grid line segments do not intersect the first sub-grid line or at least part of the first sub-grid line segments intersect the first sub-grid line; and / or the fourth sub-grid line comprises a plurality of second sub-grid line segments arranged along the first direction; the second sub-grid line segments do not intersect the second sub-grid line or at least part of the second sub-grid line segments intersect the second sub-grid line.

5. The solar cell of claim 2, wherein The third sub-grid line comprises a plurality of first conductive points arranged along the first direction; the first conductive points do not overlap the first sub-grid line or at least part of the first conductive points overlap the first sub-grid line; and / or the fourth sub-grid line comprises a plurality of second conductive points arranged along the first direction; the second conductive points do not overlap the second sub-grid line or at least part of the second conductive points overlap the second sub-grid line.

6. The solar cell of claim 2, wherein The third sub-grid line comprises a plurality of third sub-grid line segments extending along the second direction, and the third sub-grid line segments are arranged along the first direction; and / or the fourth sub-grid line comprises a plurality of fourth sub-grid line segments extending along the second direction, and the fourth sub-grid line segments are arranged along the first direction.

7. The solar cell according to any one of claims 1 to 6, wherein The third sub-grid line is located on the side of the first main grid line close to or away from the substrate; and / or the fourth sub-grid line is located on the side of the second main grid line close to or away from the substrate.

8. The solar cell of claim 2, wherein, The first sub-grid line, the second sub-grid line, the third sub-grid line and the fourth sub-grid line are arranged on the same layer.

9. The solar cell of claim 1, wherein, The substrate comprises a first doped layer and a second doped layer, the first doped layer comprises first sub-doped regions, the first sub-doped regions are arranged along the second direction, the second doped layer comprises second sub-doped regions, the second sub-doped regions are arranged along the second direction, the first sub-doped regions and the second sub-doped regions are alternately arranged along the first direction; The first sub-doped regions continuously extend at the first main grid lines, the second sub-doped regions are interrupted at the first main grid lines; the second sub-doped regions continuously extend at the second main grid lines, the first sub-doped regions are interrupted at the second main grid lines; The first sub-doped regions continuously extend at the first main grid lines, the second sub-doped regions are interrupted at the first main grid lines; the second sub-doped regions continuously extend at the second main grid lines, the first sub-doped regions are interrupted at the second main grid lines; The first sub-doped regions continuously extend at the first main grid lines, the second sub-doped regions are interrupted at the first main grid lines; the second sub-doped regions continuously extend at the second main grid lines, the first sub-doped regions are interrupted at the second main grid lines; The first sub-doped regions continuously extend at the first main grid lines, the second sub-doped regions are interrupted at the first main grid lines; the second sub-doped regions continuously extend at the second main grid lines, the first sub-doped regions are interrupted at the second main grid lines; 10. A battery assembly characterized by, The first sub-doped regions continuously extend at the first main grid lines, the second sub-doped regions are interrupted at the first main grid lines; the second sub-doped regions continuously extend at the second main grid lines, the first sub-doped regions are interrupted at the second main grid lines; The solar cell comprising any one of claims 1-9. The solar cell comprising any one of claims 1-9.

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