Driving method of display panel and display device
By dividing the frame cycle of the display panel into stages and dynamically modulating the common electrode voltage, the ghosting problem caused by excessively long liquid crystal response time is solved, and a clearer dynamic picture display is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-24
- Publication Date
- 2026-03-10
AI Technical Summary
The current display panel's LCD response time is too long, resulting in severe ghosting.
Each frame cycle of the display panel is divided into a first stage and a second stage. In the first stage, the backlight module is turned on and a first voltage is applied to the common electrode. In the second stage, the backlight module is turned off and the voltage of the common electrode is dynamically modulated based on the grayscale switching direction to accelerate the stabilization process of the liquid crystal molecules.
By turning off the backlight and dynamically modulating the common electrode voltage, the afterimage of liquid crystal molecule flipping is significantly reduced, improving image quality and the clarity of dynamic images.
Smart Images

Figure CN121640940A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of display technology, and in particular to a driving method and display device for a display panel. Background Technology
[0002] In existing display technologies, due to the excessively long response time of the liquid crystal in the display panel, ghosting is easily formed (when the image on the screen changes rapidly, the residual image of the previous image fails to disappear in time and overlaps with the next image, causing motion blur). Summary of the Invention
[0003] The main technical problem addressed by this application is to provide a driving method and display device for a display panel, thereby solving the problem of ghosting caused by excessively long liquid crystal response time in the prior art.
[0004] To solve the above-mentioned technical problems, the first technical solution provided by this application is: to provide a driving method for a display panel, the display panel including pixels and a liquid crystal layer, the pixels having pixel electrodes and common electrodes, the two being configured to form a driving electric field to control the orientation of liquid crystal molecules in corresponding regions of the liquid crystal layer; Each frame cycle of the display panel is divided into a first stage and a second stage arranged sequentially; including: In response to the frame start signal, the display panel is driven to output the frame image; In the first stage of the current frame, the corresponding backlight module is turned on and a first voltage is applied to the common electrode; in the second stage of the current frame, the corresponding backlight module is turned off, a second voltage is determined based on the grayscale of the pixel in the current frame and the next frame, and the second voltage is applied to the corresponding common electrode.
[0005] In some embodiments, determining the second voltage based on the grayscale of a pixel in the current frame and the next frame includes: When a pixel has the same grayscale in the current frame and the next frame, the second voltage is equal to the first voltage. In response to a pixel having a lower grayscale value in the current frame than in the next frame, the second voltage is lower than the first voltage; In response to a pixel having a grayscale value greater than that of the next frame, the second voltage is greater than the first voltage. The first voltage is the reference voltage of the common electrode, and the deviation between the second voltage and the first voltage is less than the preset allowable offset of the reference voltage.
[0006] In some embodiments, the driving method for the display panel further includes: Establish a mapping relationship between inter-frame grayscale and the second voltage to form a voltage lookup table; Determining the second voltage based on the grayscale of a pixel in the current frame and the next frame includes: Based on the grayscale of the current frame and the next frame, a voltage lookup table is used to determine the second voltage of a pixel in the current frame.
[0007] In some embodiments, in response to a frame start signal, the display panel is driven to output a frame image, and the process further includes: Obtain the frame sequence to be displayed; Determine the time percentage of the second stage for each pixel in each frame period.
[0008] In some embodiments, the time percentage of a pixel in the second stage of the current frame is defined as a preset value, wherein the preset value is any one of the time percentage sets, and the time percentage set includes at least one time percentage. The default value is less than or equal to 20%.
[0009] In some embodiments, the time percentage set includes a time percentage, with a preset value of not less than 8% and not more than 12%; Determine the time percentage of the pixel in the second phase of each frame period, including: The pixel's time percentage in the second stage is the same in each frame cycle, and the preset value is a fixed value.
[0010] In some embodiments, the time percentage set includes multiple time percentages; Determine the time percentage of the pixel in the second phase of each frame period, including: Establish a mapping relationship between normalized grayscale difference and time proportion to form a time proportion lookup table; wherein, the absolute value of the difference between the normalized grayscale values of a pixel in two adjacent frames is defined as the normalized grayscale difference; For each current frame in the frame sequence, the time percentage of the pixel in the second stage is determined by querying the time percentage lookup table based on the normalized gray level difference between the current frame and the next frame.
[0011] To solve the above-mentioned technical problems, the second technical solution provided in this application is: to provide a display device, comprising: The display panel is driven using the aforementioned display panel driving method; Backlight module, used to provide backlight for the display panel; The timing controller is used to provide a frame start signal and drive the display panel to output frame images. A common electrode voltage generation circuit is used to provide a common electrode voltage for the common electrode of the display panel.
[0012] In some embodiments, the common electrode voltage generation circuit includes a digital-to-analog converter, a first operational amplifier, a second operational amplifier, a first voltage divider unit, a second voltage divider unit, and a transistor; The non-inverting input of the first operational amplifier is connected to the output of the digital-to-analog converter, and the inverting input of the first operational amplifier is connected to the first voltage divider unit. The output terminal of the first operational amplifier is connected to the gate of the transistor, and the source of the transistor is connected to the common node of the first voltage divider unit and the first operational amplifier. The non-inverting input of the second operational amplifier is connected to the drain of the transistor and the common node of the second voltage divider unit. The inverting input of the second operational amplifier is connected to the output of the second operational amplifier. The output of the second operational amplifier is used to provide the common electrode voltage to the common electrode.
[0013] In some embodiments, the common electrode voltage generation circuit further includes a first capacitor, a second capacitor, and a third voltage divider unit; the second operational amplifier is connected to the drain of the transistor and the common node of the second voltage divider unit via the first capacitor; the inverting input terminal of the second operational amplifier is connected to the output terminal of the second operational amplifier via the third voltage divider unit; one end of the second capacitor is grounded, and the other end of the second capacitor is connected to the common node of the third voltage divider unit and the output terminal of the second operational amplifier.
[0014] The beneficial effects of this application are as follows: Unlike existing technologies, this application provides a driving method and display device for a display panel. The display panel includes pixels and a liquid crystal layer. Each pixel has a pixel electrode and a common electrode, configured to form a driving electric field to control the orientation of liquid crystal molecules in corresponding regions of the liquid crystal layer. Each frame cycle of the display panel is divided into a first stage and a second stage arranged sequentially. The method includes: driving the display panel to output a frame image in response to a frame start signal; in the first stage of the current frame, controlling the corresponding backlight module to turn on and applying a first voltage to the common electrode; in the second stage of the current frame, controlling the corresponding backlight module to turn off, determining a second voltage based on the grayscale of the pixel in the current frame and the next frame, and applying the second voltage to the corresponding common electrode. By simultaneously performing backlight shutdown and dynamic modulation of the common electrode voltage in the second stage, backlight shutdown creates an optical black frame, directly eliminating the visual residue of liquid crystal molecule flipping afterimages. Common electrode voltage modulation provides accelerating torque or suppressing torque based on the grayscale switching direction, accelerating the stabilization process of liquid crystal molecules and reducing relaxation oscillations. The synergistic effect of these two methods significantly improves the effect of motion blur reduction, making it more efficient than a single technique. Attached Figure Description
[0015] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without any creative effort.
[0016] Figure 1 This is a flowchart illustrating one embodiment of the display panel driving method provided in this application; Figure 2 This is a schematic representation of the voltage lookup provided in this application; Figure 3 This is a flowchart illustrating another embodiment of the display panel driving method provided in this application; Figure 4 yes Figure 3 A flowchart illustrating the implementation method of step S02; Figure 5 This application represents the intended use of time percentage lookup information. Figure 6 This is a schematic diagram of the structure of an embodiment of the display device provided in this application; Figure 7 This is a signal timing diagram provided in this application; Figure 8 This is a schematic diagram of an embodiment of the common electrode voltage generation circuit provided in this application; Figure 9 This is a schematic diagram of another embodiment of the common electrode voltage generation circuit provided in this application.
[0017] Explanation of icon numbers: 100. Display device; 10. Display panel; 20. Backlight module; 30. Timing controller; 40. Common electrode voltage generation circuit; 50. Gate driver; 60. Source driver; 70. Memory module; 41. Digital-to-analog converter; 42. First operational amplifier; 43. Second operational amplifier; 44. First voltage divider unit; 45. Second voltage divider unit; 46. Third voltage divider unit; 47. Interface module; T0. Transistor; +, Non-inverting input terminal; -, Inverting input terminal; C1. First capacitor; C2. Second capacitor; R1. First resistor; R2. Second resistor; R3. Third resistor; R4. Fourth resistor; R0. Current limiting resistor; T. Frame period; t1. First stage; t2. Second stage; V1. First voltage; V2. Second voltage. Detailed Implementation
[0018] The embodiments of this application will now be described in detail with reference to the accompanying drawings.
[0019] In the following description, specific details such as particular system architectures, interfaces, and technologies are presented for illustrative purposes rather than for limiting purposes, in order to provide a thorough understanding of this application.
[0020] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.
[0021] The terms "first," "second," and "third" in this application are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first," "second," or "third" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified. All directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of this application are only used to explain the relative positional relationships and movements between components in a specific orientation (as shown in the figures). If the specific orientation changes, the directional indications also change accordingly. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or devices.
[0022] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.
[0023] Please see Figure 1 and Figure 2 , Figure 1 This is a flowchart illustrating one embodiment of the display panel driving method provided in this application. Figure 2 This is a schematic representation of the voltage lookup provided in this application.
[0024] This application provides a driving method for a display panel, the display panel 10 (see...) Figure 6 The display panel 10 includes pixels and a liquid crystal layer. Each pixel has a pixel electrode and a common electrode, which are configured to form a driving electric field to control the orientation of liquid crystal molecules in corresponding regions of the liquid crystal layer. Each frame period T of the display panel 10 (see...) Figure 7 ) is divided into the first stage t1 arranged sequentially (see Figure 7 ) and the second stage t2 (see Figure 7 );include: S1: In response to the frame start signal, drive the display panel 10 to output the frame image; S2: In the first stage t1 of the current frame, control the corresponding backlight module 20 (see...). Figure 6 Turn on, apply the first voltage V1 (see...) Figure 7 ) to the common electrode; in the second stage t2 of the current frame, control the corresponding backlight module 20 to turn off, and determine the second voltage V2 based on the grayscale of the pixel in the current frame and the next frame (see Figure 7 ), and apply the second voltage V2 to the corresponding common electrode.
[0025] By simultaneously performing backlight shutdown and common electrode voltage dynamic modulation in the second stage t2, backlight shutdown creates an optical black frame that directly eliminates the visual residue of liquid crystal molecule flipping afterimages, while common electrode voltage modulation provides acceleration torque or suppression torque based on the grayscale switching direction, accelerating the stabilization process of liquid crystal molecules and reducing relaxation oscillations; the synergistic effect of the two significantly improves the effect of motion blur reduction, which is more efficient than a single technical means.
[0026] Display panel 10 is an LCD panel.
[0027] There are multiple backlight modules 20, that is, the backlight adopts zone control, and one backlight module 20 is one backlight zone.
[0028] The common electrode voltage is the voltage applied to the common electrode.
[0029] The frame period T refers to the time interval between the start of display of two adjacent frames in a display system, that is, the length of time required to complete the display of one frame of image.
[0030] The frame period T division refers to dividing the frame period T into two consecutive stages. The first stage t1 is used for normal display of the image, and the second stage t2 is used for motion blur reduction processing.
[0031] Each pixel includes a pixel electrode and a common electrode, which are located on opposite sides or the same side of the liquid crystal layer and are insulated from each other. When a voltage is applied between the pixel electrode and the common electrode, a lateral or longitudinal driving electric field is formed between them. This driving electric field acts on the region in the liquid crystal layer corresponding to the pixel, thereby regulating the alignment direction of the liquid crystal molecules in that region. By changing the grayscale voltage on the pixel electrode, the intensity of the driving electric field can be adjusted, thereby controlling the deflection angle of the liquid crystal molecules and ultimately achieving grayscale modulation of the light transmittance of the pixel. The voltage difference applied between the pixel electrode and the common electrode determines the light transmittance of the corresponding pixel. Based on this, this application divides each frame period T into a second stage t2, and further modulates the voltage of the pixel on the common electrode of the current frame based on the grayscale switching direction within the second stage t2, providing accelerating torque or suppressing torque to the liquid crystal molecules, accelerating their stabilization process, and reducing relaxation oscillations.
[0032] Specifically, since the backlight module 20 is not turned on in the second stage t2, the afterimage generated by the flipping of liquid crystal molecules cannot be displayed. At the same time, the display time of a frame is correspondingly shortened, and the time spent on visual effect is less, thus eliminating ghosting. Dynamic images appear clearer, greatly improving image quality. In addition, after being excited by the driving voltage, liquid crystal molecules will undergo multiple decaying oscillations around the equilibrium position as they move towards the target angle, rather than immediately coming to a standstill. At the same time, the required flipping amplitude and force conditions of liquid crystal molecules are different when switching between different gray levels, resulting in differences in their stabilization time. By modulating the voltage of the common electrode, the reset of liquid crystal molecules is accelerated, reducing the relaxation oscillation of liquid crystal molecules, thereby further eliminating ghosting.
[0033] In some implementations, determining the second voltage V2 based on the grayscale of a pixel in the current frame and the next frame in step S2 includes: in response to the same grayscale of a pixel in the current frame and the next frame, the second voltage V2 is equal to the first voltage V1; in response to the grayscale of a pixel in the current frame being less than the grayscale of the next frame, the second voltage V2 is less than the first voltage V1; in response to the grayscale of a pixel in the current frame being greater than the grayscale of the next frame, the second voltage V2 is greater than the first voltage V1; wherein the first voltage V1 is the reference voltage of the common electrode, and the deviation between the second voltage V2 and the first voltage V1 is less than a preset allowable offset of the reference voltage.
[0034] The voltage difference between the pixel electrode and the common electrode, i.e., Vpixel = Vdata – Vcom, generates an electric field that controls the deflection angle of the liquid crystal molecules, thereby adjusting the light transmittance and achieving grayscale display.
[0035] Here, Vpixel is the actual driving voltage applied across the liquid crystal molecules, determining the pixel's transmittance; Vdata represents the data voltage, also called the pixel electrode voltage, determined by the source driver (see...). Figure 6The grayscale voltage written to the pixel electrode is determined based on the image content and target brightness; Vcom is the reference voltage of the common electrode.
[0036] The direction of the common electrode voltage modulation depends on the gray level that the current pixel is switching from to. Specifically, in response to the pixel having the same gray level in the current frame and the next frame, the second voltage V2 is equal to the first voltage V1, that is, Vcom=V1=V2.
[0037] When a pixel's grayscale in the current frame is lower than that in the next frame, the liquid crystal molecules need to overcome viscous forces and deflect significantly from one angle to another as the pixel moves from a low grayscale to a high grayscale. At this time, the voltage of the common electrode should be instantaneously reduced (i.e., V2 is less than V1). Since Vpixel = Vdata – V2, Vpixel increases instantaneously, providing an additional accelerating torque for the liquid crystal molecules and helping them start up faster.
[0038] If the gray level of a pixel in the current frame is greater than that in the next frame, and the sub-pixel moves from a high gray level to a low gray level, the liquid crystal molecules recover under the action of their own elasticity and viscosity. The voltage of the common electrode should be increased instantaneously (i.e., V2 is greater than V1) so that Vpixel decreases instantaneously, effectively suppressing the overshoot and oscillation of the liquid crystal molecules and making them quickly stabilize in a low gray level state.
[0039] In the embodiments of this application, high grayscale and low grayscale are relative concepts, not absolute numerical definitions.
[0040] The absolute deviation between the second voltage V2 and the first voltage V1 is less than the preset allowable offset of the first voltage V1, so as to avoid over-modulation and cause display abnormalities.
[0041] For example, the preset allowable offset ΔV = 0.5V. That is, |V2 – V1| < ΔV.
[0042] In some specific embodiments, the driving method for the display panel further includes: Establish a mapping relationship between inter-frame grayscale and the second voltage V2 to form a voltage lookup table; Step S1, which determines the second voltage V2 based on the grayscale of the pixel in the current frame and the next frame, includes: Based on the grayscale of the current frame and the next frame, the voltage lookup table is consulted to determine the second voltage V2 of the pixel in the current frame.
[0043] Inter-frame grayscale refers to the amount of grayscale change of a sub-pixel between the current frame and the next frame, and is used to determine the direction and amplitude of the common electrode voltage modulation.
[0044] The second voltage V2 is the target value for common electrode voltage modulation. When a sub-pixel switches from a low grayscale to a high grayscale, a second voltage V2 that is smaller than the first voltage V1 is used to increase the driving voltage and provide acceleration torque. When a sub-pixel switches from a high grayscale to a low grayscale, a second voltage V2 that is larger than the first voltage V1 is used to reduce the driving voltage and suppress overshoot. When the grayscale of the sub-pixel does not switch, a second voltage V2 equal to the first voltage V1 is used, the voltage is not modulated, and the first voltage V1 is still applied to the corresponding common electrode.
[0045] The voltage lookup table stores the corresponding second voltage V2 for all grayscale switching combinations. It can be implemented as a two-dimensional mapping table based on actual grayscale data. For example, when the current grayscale 0 switches to the next grayscale 16, the corresponding second voltage V2 value is V21, and when the current grayscale 240 switches to the next grayscale 255, the corresponding second voltage V2 value is Vnn. The entire range of grayscales from 0 to 255 can be used for mapping, without the need for additional calculation of brightness parameters, and can be quickly looked up directly from pre-stored data.
[0046] For example, a 256×256 table structure is used, where rows represent the grayscale of the current frame, columns represent the grayscale of the next frame, and cells store the value of the corresponding second voltage V2.
[0047] Furthermore, in other implementations, the lookup table index can be dynamically adjusted based on the inter-frame grayscale difference. By calculating the inter-frame grayscale difference D(x, y) = Fn+1(x, y) - Fn(x, y), the second voltage V2 can be directly located, avoiding additional calculations. Here, (x, y) represents the row and column coordinates of the pixel, Fn(x, y) represents the grayscale of the pixel at coordinates (x, y) in the current frame, and Fn+1(x, y) represents the grayscale of the pixel at coordinates (x, y) in the next frame.
[0048] By establishing a mapping relationship between inter-frame grayscale and the second voltage V2 to form a voltage lookup table, the appropriate second voltage V2 can be determined in real time, avoiding real-time calculation delay and significantly improving the driving response speed. This mapping relationship ensures that the adjustment range of the second voltage V2 is strictly limited within the preset allowable offset, preventing display abnormalities caused by modulation exceeding the threshold voltage of the liquid crystal display. Based on the adaptive modulation of grayscale switching, it provides acceleration torque or suppression torque to the liquid crystal molecules in a targeted manner, avoiding display abnormalities caused by fixed voltage modulation, effectively reducing molecular relaxation oscillation, thereby greatly reducing the ghosting phenomenon and improving the clarity and display quality of dynamic images.
[0049] Please see Figures 3 to 5 , Figure 3 This is a flowchart illustrating another embodiment of the display panel driving method provided in this application. Figure 4 yes Figure 3 A flowchart illustrating the implementation method of step S02. Figure 5 This application provides the intent to represent the time percentage lookup.
[0050] In some implementations, step S1 involves driving the display panel 10 to output a frame image in response to a frame start signal, and this is preceded by the following steps: S01: Obtain the frame sequence to be displayed; S02: Determine the time percentage of the pixel in the second stage t2 within each frame period T.
[0051] Obtaining the frame sequence to be displayed refers to reading or receiving a set of image frames arranged in chronological order from the data source. These image frames will be displayed by subsequent modules (such as timing controller 30, see...). Figure 6 The outputs (or display driver circuit) are sequentially sent to the display panel 10 for visual presentation.
[0052] Each image frame contains pixel data corresponding to a 10-pixel array on the display panel, including but not limited to grayscale data.
[0053] The time proportion of the second phase t2 in the frame period T is the ratio of the duration of the second phase t2 to the duration of the frame period T.
[0054] The time percentage of the second stage t2 in different frame periods T can be the same or different, depending on the actual needs.
[0055] In some implementations, the time percentage of a pixel in the second phase t2 of the current frame is defined as a preset value. The preset value is any one of the time percentage sets, and the time percentage set includes at least one time percentage. The preset value is less than or equal to 20%.
[0056] By limiting the time percentage to less than 20%, the second stage t2 is kept from being too long, which would sacrifice too much backlight time and cause a decrease in brightness.
[0057] The preset value can be optional or fixed.
[0058] In some specific implementations, the time percentage set includes a time percentage with a preset value of not less than 8% and not greater than 12%; determining the time percentage of the pixel in the second stage t2 of each frame period T in step S02 includes: The pixel has the same time proportion in the second stage t2 in each frame period T, and the preset value is a fixed value.
[0059] The time percentage of the second stage t2 can be set to specific values such as 8%, 9%, 10%, 11%, or 12%.
[0060] For example, the preset value is a single fixed value, which is 10%.
[0061] All pixels undergo motion blur reduction with the same time allocation in each frame period T, ensuring simplified driving logic and system stability. For example, 10% is selected when displaying ordinary video content to balance motion blur reduction with brightness loss.
[0062] By fixing the time percentage of the second stage (t2) within the range of 8% to 12%, this driving method effectively avoids the problem of insufficient ghosting improvement due to an excessively small time percentage, which would affect the clarity of dynamic images. Simultaneously, it prevents the defects of significant brightness reduction and increased power consumption caused by an excessively large time percentage. This range covers the typical needs of medium-motion scenarios, such as ordinary video playback, ensuring that the duration of the ghosting improvement zone is moderate. This fully eliminates the visual residue of liquid crystal molecule flipping images while maintaining efficient utilization of display brightness, thus achieving an optimal balance between dynamic image quality improvement and display efficiency, significantly enhancing the smoothness and clarity of the viewing experience.
[0063] In some other specific embodiments, the time percentage set includes multiple time percentages; determining the time percentage of a pixel in the second stage t2 of each frame period T in step S02 includes: S021: Establish the mapping relationship between normalized gray level difference and time proportion to form a time proportion lookup table; wherein, the absolute value of the difference between the normalized gray level values of a pixel in two adjacent frames is defined as the normalized gray level difference. S022: For each current frame in the frame sequence, based on the normalized grayscale difference between the pixel in the current frame and the next frame, query the time percentage lookup table to determine the time percentage of the pixel in the second stage t2 of the current frame.
[0064] The normalized grayscale difference of a subpixel in adjacent frames can be regarded as the ratio of the absolute value of the grayscale difference between two adjacent frames to the maximum grayscale value of 255.
[0065] Specifically, it is: Δg = |Fn+1(x,y) - Fn(x,y)| / 255.
[0066] Where Δg represents the normalized gray level difference.
[0067] Normalized grayscale is a dimensionless process that divides the original digital grayscale value by its maximum possible value, allowing display systems with different bit depths to perform grayscale response characteristic analysis within a unified range of [0, 1]. That is, the value range of Δg is [0, 1].
[0068] Since the human eye has a resolution greater than one pixel, data is recorded using the grayscale value of a single pixel (for example, each pixel consists of three sub-pixels: red, green, and blue, represented as R, G, and B respectively). The human eye perceives the overall effect of the three RGB sub-pixels within a pixel, but the actual output is the data of a single R, G, or B sub-pixel. Therefore, the overall grayscale data Y of the pixel is represented as: Y = 0.299*R + 0.587*G + 0.114*B, where 0.299, 0.587, and 0.114 represent different proportions of RGB, which are defined in the standard luminance formula (ITU-R BT.601). The proportions reflect the human eye's sensitivity to the three RGB colors. In other embodiments, pixels may include subpixels of other colors. The number and color of subpixels within a pixel are not limited here and are selected according to actual needs.
[0069] Let the coordinates of the corresponding pixel be (x, y), and record the grayscale Fn(x, y) of the current frame and the grayscale Fn+1(x, y) of the next frame. For example, from a pure black screen (current frame) to a pure white screen (next frame), the grayscale of the corresponding pixel in the current frame is (R=0, G=0, B=0), and the grayscale in the next frame is (R=255, G=255, B=255). Then: Fn+1(x,y)=0.299*255+0.587*255+0.114*255=255; Fn(x,y)=0.299*0+0.587*0+0.114*0=0; D(x, y)=|Fn+1(x, y)-Fn(x, y)|=255-0=255; Δg(x, y) = 255 / 255 = 1.
[0070] The grayscale difference is calculated pixel by pixel for grayscale data of different frames. The larger the grayscale difference between frames, the more intense the image motion at that position.
[0071] For example, in the time percentage lookup table, when the normalized grayscale difference is in the range of 0.00 to 0.02, the time percentage of the second stage t2 is 0%, which is suitable for static image or document display scenarios.
[0072] When the time percentage is in the range of 0.02 to 0.10, the second stage t2 accounts for 5% of the total time, which is suitable for extremely slow motion scenarios.
[0073] When the time percentage is in the range of 0.10 to 0.30, the second stage t2 accounts for 10% of the total time, which is suitable for ordinary video or mouse movement scenarios.
[0074] When the time percentage is in the range of 0.30 to 0.60, the second stage t2 accounts for 15% of the total time, which is suitable for fast-moving scenes such as game screens.
[0075] When the time percentage is in the range of 0.60 to 1.00, the second stage t2 accounts for 20% of the total time, which is suitable for fast camera switching scenarios.
[0076] The time proportion of the second stage t2 is quickly determined through a lookup table mechanism without additional hardware overhead. Furthermore, the calculation of normalized grayscale difference can be based on the RGB data of a single pixel, avoiding the complexity of multi-pixel processing and ensuring computational efficiency.
[0077] By dynamically adjusting the time proportion of the second stage t2, the duration of the motion blur improvement zone is reduced when the image is static or moving at low speeds, avoiding unnecessary backlight shutdowns, thus maintaining high brightness and reducing power consumption. Conversely, the duration of the motion blur improvement zone is increased when the image is moving at high speeds, more effectively eliminating motion blur and improving the clarity of dynamic images. This adaptive mechanism based on normalized grayscale difference achieves a precise balance between motion blur improvement and display brightness and power consumption, significantly improving the visual quality of dynamic displays while avoiding brightness loss in static images and motion blur residue in dynamic images, ensuring the uniformity and stability of display quality.
[0078] Please see Figures 6 to 9 , Figure 6 This is a schematic diagram of the structure of an embodiment of the display device provided in this application. Figure 7 This is a signal timing diagram provided in this application. Figure 8 This is a schematic diagram of an embodiment of the common electrode voltage generation circuit provided in this application. Figure 9 This is a schematic diagram of another embodiment of the common electrode voltage generation circuit provided in this application.
[0079] This application provides a display device 100, which includes a display panel 10, a backlight module 20, a timing controller 30, and a common electrode voltage generation circuit 40.
[0080] The display panel 10 is driven using the driving method described above; the backlight module 20 is used to provide backlight for the display panel 10; the timing controller 30 is used to provide a frame start signal and drive the display panel 10 to output a frame image; the common electrode voltage generation circuit 40 is used to provide a common electrode voltage for the common electrode of the display panel 10.
[0081] The display device 100 also includes a gate driver 50 and a source driver 60.
[0082] The timing controller 30 receives externally input video signals and generates precise control timing signals and image data. The timing control signals include, but are not limited to, frame start signals, line scan timing signals, and backlight control signals.
[0083] The gate driver 50 receives the row scan timing signals (such as start pulse STV, clock signal CLK, etc.) from the timing controller 30, and outputs the gate turn-on signal row by row to turn on the thin film transistors of each row in sequence.
[0084] The source driver 60 receives the current frame image data transmitted by the timing controller 30 and converts the digital image data into analog grayscale voltage.
[0085] The timing controller 30 outputs a backlight control signal to control the brightness of the backlight module 20. For example, the timing controller 30 generates a PWM (pulse width modulation) signal with an adjustable duty cycle as the backlight control signal according to the current screen brightness requirements.
[0086] The timing controller 30 outputs a voltage control signal to control the common electrode voltage generation circuit 40 to provide voltage to the corresponding common electrode.
[0087] In the first stage t1, the timing controller 30 sends the image data of the current frame to the source driver 60, sends the line scan timing signal to the gate driver 50, sends the control signal to the common electrode voltage generation circuit 40 to provide the first voltage V1 to the corresponding common electrode, and outputs a PWM signal with a constant duty cycle to the backlight module 20 to keep the backlight module 20 in the on state. At this time, a stable electric field is formed between the pixel electrode and the common electrode of the display panel 10, modulating the backlight transmittance, thereby displaying the image normally.
[0088] At the start of the second stage t2, the timing controller 30 outputs an enable signal to activate the voltage modulation function (improvement of ghosting). At this time, the timing controller 30 simultaneously outputs a backlight off command and a control signal. The backlight module 20 receives the backlight off command (outputs a PWM low-level signal) and immediately cuts off the drive current flowing to the backlight source. The backlight source is extinguished in a very short time, and the screen enters an optical black frame state. After receiving the control signal from the timing controller 30, the common electrode voltage generation circuit 40 activates its internal high-speed modulation module. Within microseconds, it rapidly switches the voltage output to the corresponding common electrode from the first voltage V1 to the second voltage V2. At this time, the display panel 10 is black and no image is displayed.
[0089] At the end of the second stage t2, the timing controller 30 sends a first control signal and a backlight-on command, and the common electrode voltage generation circuit 40 quickly restores its output voltage from the second voltage V2 to the first voltage V1. The backlight module 20 resumes providing drive current to the backlight source, the backlight source is lit, and the display panel 10 returns to normal display status.
[0090] Since the backlight module 20 is not turned on in the second stage (t2), the afterimage generated by the flipping of liquid crystal molecules cannot be displayed. At the same time, the display time of a frame is correspondingly shortened, and the time spent on visual effect is less, thus eliminating ghosting. Dynamic images appear clearer, greatly improving image quality. In addition, after being excited by the driving voltage, liquid crystal molecules will undergo multiple decaying oscillations around the equilibrium position as they move towards the target angle, rather than immediately coming to a standstill. At the same time, the required flipping amplitude and force conditions of liquid crystal molecules are different when switching between different gray levels, resulting in differences in their settling time. By modulating the voltage of the common electrode, the reset of liquid crystal molecules is accelerated, reducing the relaxation oscillation of liquid crystal molecules, thereby further eliminating ghosting.
[0091] In some embodiments, the common electrode voltage generation circuit 40 includes a digital-to-analog converter unit 41, a first operational amplifier 42, a second operational amplifier 43, a first voltage divider unit 44, a second voltage divider unit 45, and a transistor T0; the non-inverting input terminal + of the first operational amplifier 42 is connected to the output terminal of the digital-to-analog converter unit 41, and the inverting input terminal - of the first operational amplifier 42 is connected to the first voltage divider unit 44; the output terminal of the first operational amplifier 42 is connected to the gate of the transistor T0, and the source of the transistor T0 is connected to the common node of the first voltage divider unit 44 and the first operational amplifier 42; the non-inverting input terminal + of the second operational amplifier 43 is connected to the drain of the transistor T0 and the common node of the second voltage divider unit 45, and the inverting input terminal - of the second operational amplifier 43 is connected to the output terminal of the second operational amplifier 43; the output terminal of the second operational amplifier 43 serves as the output terminal Vout of the common electrode voltage generation circuit 40, used to provide a common electrode voltage to the common electrode.
[0092] For example, the second voltage divider unit 45 includes a first resistor R1 and a second resistor R2. One end of the first resistor R1 is connected to the reference voltage VAVDD, and the other end of the first resistor R1 is connected to one end of the second resistor R2. The other end of the second resistor R2 is grounded. The common node of the first resistor R1 and the second resistor R2, the transistor T0, and the common node of the second operational amplifier 43 are connected.
[0093] The first voltage divider unit 44 includes a third resistor R3.
[0094] In other embodiments, the first voltage divider unit 44 and the second voltage divider unit 45 can be other structures, which are not limited here and can be selected according to actual needs.
[0095] The digital-to-analog converter 41 converts digital control signals into analog signals. The first operational amplifier 42 and the transistor T0 form a negative feedback loop to achieve precise current conversion. The first voltage divider unit 44 is used to set the reference voltage. The second operational amplifier 43 serves as a unity-gain buffer to provide high input impedance and low output impedance.
[0096] Specifically, the common electrode voltage generation circuit 40, based on the digital control signal output by the timing controller 30, generates a precise current proportional to the digital value through the digital-to-analog converter 41 and a precision current source composed of the first operational amplifier 42, transistor T0 and the first voltage divider unit 44. This current flows through the first resistor R1 and generates a controllable voltage drop on the fixed reference voltage set by R1 / R2, thereby realizing a precise subtraction operation on the reference voltage. Finally, the voltage is output through the second operational amplifier 43 to generate a stable programmable common electrode voltage that can directly drive the display panel 10.
[0097] The common electrode voltage generation circuit 40 also includes a current-limiting resistor R0. One end of the current-limiting resistor R0 receives the input voltage Vin, and the other end of the current-limiting resistor R0 is connected to the digital-to-analog converter unit 41. The current-limiting resistor R0 limits the maximum current flowing from Vin into the digital-to-analog converter unit 41, preventing excessive current from impacting and damaging the internal circuitry of the digital-to-analog converter unit 41 during power-on, voltage fluctuations, or accidental short circuits.
[0098] In some embodiments, the common electrode voltage generation circuit 40 further includes a first capacitor C1, a second capacitor C2, and a third voltage divider unit 46; the second operational amplifier 43 is connected to the drain of transistor T0 and the common node of the second voltage divider unit 45 via the first capacitor C1; the inverting input terminal of the second operational amplifier 43 is connected to the output terminal of the second operational amplifier 43 via the third voltage divider unit 46; one end of the second capacitor C2 is grounded, and the other end of the second capacitor C2 is connected to the common node of the third voltage divider unit 46 and the output terminal of the second operational amplifier 43.
[0099] The third voltage divider unit 46 includes a fourth resistor R4, and the third voltage divider unit 46 can also be other structures.
[0100] The first capacitor C1 is used to limit the circuit's response to high-frequency signals and suppress high-frequency noise generated inside the circuit (including the digital-to-analog converter unit 41 and the first operational amplifier 42); the second capacitor C2 and the third voltage divider unit 46 form an RC low-pass filter network to further filter out high-frequency interference and noise that may be introduced by long traces.
[0101] When the voltage of the common electrode switches rapidly, the resulting power supply noise affects the image quality (the common electrode connects to all pixels of the entire display panel 10, which can be equivalent to a huge capacitive load).
[0102] According to the current formula for a capacitor, I = C * dV / dt, where I is the instantaneous current, C is the equivalent capacitance of the display panel 10 (a very large value), dV is the voltage change (i.e., ΔV), and dt is the time of the voltage change (in microseconds, very short). Since C is extremely large and dt is extremely small, even if dV is not large, a very large instantaneous current I will be generated. When the huge instantaneous current I flows through the inherent parasitic resistance and inductance of the signal line, according to Ohm's law (V = I * R) and the characteristics of inductance (V = L * di / dt, where L represents the self-inductance coefficient of the inductor, and di / dt represents the rate of change of current with time), an instantaneous voltage drop will be generated. This will cause fluctuations in the local power supply voltage (such as Vin, VAVDD) of the common electrode voltage generation circuit 40, generating noise, which may cause problems such as flickering or uneven brightness, ghosting, crosstalk, and reduced image quality improvement of the display panel 10.
[0103] This embodiment effectively attenuates the transient current effect caused by voltage changes by suppressing high-frequency noise through the first capacitor C1 and combining it with the low-pass characteristics of the RC filter. This avoids display defects such as flickering, uneven brightness, or afterimages on the display panel 10, ensuring a pure output of the common electrode voltage. This allows the liquid crystal molecules to respond stably in dynamic images, thereby significantly improving the clarity and uniformity of dynamic displays and optimizing the visual experience.
[0104] The common electrode voltage generation circuit 40 also includes an interface module 47, which is an I2C serial interface. The I2C serial interface includes a digital clock input interface and a data interface. The digital clock input interface is connected to the timing controller 30, and the data interface is connected to the storage module 70.
[0105] The storage module 70 is used to store the voltage lookup table. The storage module 70 can be an internal component of the timing controller 30 or it can be located outside the timing controller 30.
[0106] The display device 100 may also include one or more of the following components (not shown in the figures): memory, power supply component, processing component, multimedia component, audio component, input / output (I / O) interface, sensor component, and communication component. The specific structure and function of these components are the same as or similar to those in related technologies; please refer to the related technologies for details, which will not be repeated here. The display device 100 may be a computer, digital broadcasting terminal, messaging device, game console, medical device, fitness equipment, personal digital assistant, etc. This application does not limit its scope; the device may be selected according to actual needs.
[0107] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.
[0108] The above are merely embodiments of this application and do not limit the scope of patent protection of this application. Any equivalent structural or procedural changes made using the content of this application’s specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of this application.
Claims
1. A driving method of a display panel, the display panel comprising pixels and a liquid crystal layer, each pixel being provided with a pixel electrode and a common electrode, both of which are configured to form a driving electric field to control the orientation of liquid crystal molecules in a corresponding region of the liquid crystal layer; each frame period of the display panel is divided into a first stage and a second stage arranged in sequence; comprising: driving the display panel to output a frame picture in response to a frame start signal; in the first stage of the current frame, controlling a corresponding backlight module to be turned on and applying a first voltage to the common electrode; in the second stage of the current frame, controlling the corresponding backlight module to be turned off, determining a second voltage based on the gray scale of the pixel in the current frame and the next frame, and applying the second voltage to the corresponding common electrode. characterized in that The determination of the second voltage based on the gray scale of the pixel in the current frame and the next frame comprises: in response to the gray scale of the pixel in the current frame being the same as that in the next frame, the second voltage is equal to the first voltage; in response to the gray scale of the pixel in the current frame being less than that in the next frame, the second voltage is less than the first voltage; in response to the gray scale of the pixel in the current frame being greater than that in the next frame, the second voltage is greater than the first voltage; wherein the first voltage is a reference voltage of the common electrode, and the deviation between the second voltage and the first voltage is less than a preset allowed deviation of the reference voltage. The driving method of the display panel further comprises: establishing a mapping relationship between the gray scale between frames and the second voltage to form a voltage lookup table; the determination of the second voltage based on the gray scale of the pixel in the current frame and the next frame comprises: based on the gray scale of the current frame and the next frame, the voltage lookup table is searched to determine the second voltage of the pixel in the current frame. The driving of the display panel to output a frame picture in response to a frame start signal further comprises: obtaining a frame sequence to be displayed; determining the time proportion of the second stage in each frame period.
2. The driving method of a display panel according to claim 1, wherein The time proportion of the second stage of the pixel in the current frame is defined as a preset value, the preset value is any one in a set of time proportions, and the set of time proportions comprises at least one time proportion; the preset value is less than or equal to 20%. The set of time proportions comprises one time proportion, the preset value is not less than 8% and not more than 12%; the determination of the time proportion of the second stage in each frame period comprises: the time proportion of the second stage in each frame period is the same, and the preset value is a fixed value. The set of time proportions comprises a plurality of time proportions; the determination of the time proportion of the second stage in each frame period comprises: establishing a mapping relationship between a normalized gray scale difference and the time proportion to form a time proportion lookup table; wherein the absolute value of the normalized gray value difference of the gray scale of the pixel in two adjacent frames is defined as a normalized gray scale difference. 3. The driving method of a display panel according to claim 1, wherein 4. The driving method of a display panel according to claim 1, wherein 5. The driving method of the display panel according to claim 4, wherein 6. The driving method of the display panel according to claim 5, wherein 7. The driving method of the display panel according to claim 5, wherein For each current frame in a frame sequence, based on a normalized grayscale difference of the pixel between the current frame and a next frame, a time proportion of the second stage of the pixel in the current frame is determined by querying the time proportion lookup table.
8. A display device, characterized by comprising: The application further discloses a display panel, a backlight module, a timing controller, and a common electrode voltage generation circuit. The display panel is driven by the driving method of any one of claims 1 to 7. The backlight module is used for providing backlight for the display panel. The timing controller is used for providing a frame start signal and driving the display panel to output a frame picture. The common electrode voltage generation circuit is used for providing a common electrode voltage for a common electrode of the display panel.
9. The display device of claim 8, wherein, The common electrode voltage generation circuit comprises a digital-to-analog conversion unit, a first operational amplifier, a second operational amplifier, a first voltage division unit, a second voltage division unit, and a transistor. The non-inverting input terminal of the first operational amplifier is connected with the output terminal of the digital-to-analog conversion unit, and the inverting input terminal of the first operational amplifier is connected with the first voltage division unit. The output terminal of the first operational amplifier is connected with the gate of the transistor, and the source of the transistor is connected with the common node of the first voltage division unit and the first operational amplifier. The non-inverting input terminal of the second operational amplifier is connected with the common node of the drain of the transistor and the second voltage division unit, the inverting input terminal of the second operational amplifier is connected with the output terminal of the second operational amplifier, and the output terminal of the second operational amplifier is used for providing the common electrode voltage to the common electrode.
10. The display device according to claim 9, wherein The common electrode voltage generation circuit further comprises a first capacitor, a second capacitor, and a third voltage division unit; the second operational amplifier is connected with the common node of the drain of the transistor and the second voltage division unit through the first capacitor; the inverting input terminal of the second operational amplifier is connected with the output terminal of the second operational amplifier through the third voltage division unit; one end of the second capacitor is grounded, and the other end of the second capacitor is connected with the common node of the output terminal of the second operational amplifier and the third voltage division unit.