Multi-phase voltage conversion device

Abstract

The invention provides a multi-phase voltage conversion device. The multi-phase voltage conversion device comprises a plurality of voltage converters, a plurality of current sensors and a plurality of current sensing signal generators, the plurality of voltage converters are connected in parallel and generate an output voltage according to a plurality of control signals. The plurality of current sensors are in one-to-one correspondence with the plurality of voltage converters, and each current sensor is coupled to the two ends of the change-over switch of the corresponding voltage converter and is used for sensing the sensing current on the change-over switch. The plurality of current sensing signal generators are in one-to-one correspondence with the plurality of current sensors, and each current sensing signal generator is coupled to the corresponding current sensor, generates a mirrored current by mirroring the sensing current, and generates a current sensing signal according to the mirrored current and the output voltage. Wherein the multi-phase voltage conversion device determines whether to start an overcurrent protection mechanism according to the current sensing signal.

Description

TECHNICAL FIELD

[0001] The present invention relates to a multi-phase voltage conversion device, and more particularly, to a multi-phase voltage conversion device for reducing the probability of misactivation of an overcurrent protection (OCP) mechanism. BACKGROUND

[0002] In a multi-phase voltage conversion device, since multiple voltage converters share the same reference ground voltage, when the multiple voltage converters perform switching operations of voltages respectively, a phenomenon of mutual interference between the multiple voltage converters occurs. In order to ensure the safety of the operation of the multi-phase voltage conversion device, it is necessary to provide an overcurrent protection mechanism in the multi-phase voltage conversion device. The multi-phase voltage conversion device determines whether to activate the overcurrent protection mechanism by detecting whether the current on the switching end of each voltage converter is overcurrent. However, when the current on the switching end of each voltage converter is detected in the prior art, the switching end of the voltage converter generates a surge current due to the interference generated by the switching operation of each voltage converter. The generation of the surge current can cause the multi-phase voltage conversion device to misjudge that the overcurrent phenomenon occurs, thereby misactivating the overcurrent protection mechanism, so that the multi-phase voltage conversion device cannot work normally. SUMMARY

[0003] The present invention is directed to a multi-phase voltage conversion device for improving the correctness of overcurrent detection operation and avoiding misactivation of an overcurrent protection mechanism due to interference generated by switching operations of multiple voltage converters.

[0004] According to an embodiment of the present invention, a multi-phase voltage conversion device includes multiple voltage converters, multiple current sensors, and multiple current sense signal generators. The multiple voltage converters are connected in parallel to each other and generate an output voltage in common according to multiple control signals respectively. The multiple current sensors correspond to the multiple voltage converters one-to-one, and each current sensor is coupled to both ends of a switching switch of a corresponding voltage converter for sensing a sense current on the switching switch. The multiple current sense signal generators correspond to the multiple current sensors one-to-one, and each current sense signal generator is coupled to a corresponding current sensor, generates a mirror current by mirroring the sense current, and generates a current sense signal according to the mirror current and the output voltage. The multi-phase voltage conversion device determines whether to activate an overcurrent protection mechanism according to the current sense signal. BRIEF DESCRIPTION OF DRAWINGS

[0005] Figure 1 A schematic diagram of a multi-phase voltage conversion device according to an embodiment of the present invention is shown.

[0006] Figure 2A A schematic diagram of a multi-phase voltage conversion device according to another embodiment of the present invention is shown.

[0007] Figure 2B Show Figure 2A The multi-phase voltage conversion device in the embodiment includes a signal generation circuit that determines a first time interval and a second time interval.

[0008] Figure 2C Show Figure 2A Timing diagram of the multi-phase voltage conversion device in the embodiment.

[0009] Figure 3 A schematic diagram of a multi-phase voltage conversion device according to another embodiment of the present invention is shown.

[0010] Figure 4A A schematic diagram illustrating an embodiment of the controller in a multi-phase voltage conversion device according to an embodiment of the present invention is shown.

[0011] Figure 4B This invention is shown Figure 4A Timing diagram of the transient interference suppression circuit 410 in the embodiment. Detailed Implementation

[0012] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other specific embodiments, and various details in this specification can be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that, unless otherwise specified, the following embodiments and features can be combined with each other.

[0013] It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be changed arbitrarily, and the layout of the components may also be more complex.

[0014] Please refer to Figure 1 , Figure 1This diagram illustrates a multi-phase voltage conversion device according to an embodiment of the present invention. The multi-phase voltage conversion device 100 includes voltage converters 111 and 112, a current sensor 120, and current sensing signal generators 130, 121, and 131. Voltage converters 111 and 112 are connected in parallel, wherein they jointly receive an input voltage VIN and jointly generate an output voltage Vo. Voltage converter 111 includes transistors M1 and M2, inductor PLA, and inductor LA. Transistors M1 and M2 are connected in series between the input voltage VIN and the reference ground voltage PGND. The coupling point between transistors M1 and M2 forms a switching terminal SWA. One end of inductor LA is coupled to the switching terminal SWA, and the other end of inductor LA generates the output voltage Vo. Voltage converter 112 includes transistors M3 and M4, inductors PLB and LB. Transistors M3 and M4 are connected in series between the input voltage VIN and the reference ground voltage PGND. The coupling point between transistors M3 and M4 forms the switching terminal SWB. One end of inductor LB is coupled to the switching terminal SWB, and the other end of inductor LB is coupled to inductor LA, together with inductor LA, generating the output voltage Vo. Inductor PLA is coupled between transistor M2 and the reference ground voltage PGND, and inductor PLB is coupled between transistor M4 and the reference ground voltage PGND. The coupling point between inductor PLA and transistor M2 is PGNDA, and the coupling point between inductor PLB and transistor M4 is PGNDB. Currents ILA and ILB flow through inductors LA and LB, respectively.

[0015] Transistors M1 to M4 are controlled by control signals HSA, LSA, HSB, and LSB, respectively. Control signals HSA and LSA are complementary in phase, as are control signals HSB and LSB. Transistors M1 to M4 act as switching switches, converting the input voltage VIN to generate the output voltage Vo through switching operations.

[0016] Current sensor 120 is coupled to voltage converter 111. Specifically, current sensor 120 can be coupled between the two ends of transistor M2, that is, one end of current sensor 120 is coupled to switching terminal SWA, and the other end is coupled to coupling point PGNDA. Current sensor 120 can sense the current flowing through transistor M2 and obtain the sensed current ICS1 through switching terminal SWA and coupling point PGNDA.

[0017] The current sensing signal generator 130 is coupled to the current sensor 120. The current sensing signal generator 130 generates a mirror current by mirroring the sensing current ICS1 generated by the current sensor 120, and generates a current sensing signal VCS_D1 based on the mirror current and the output voltage Vo. The current sensing signal VCS_D1 is used to reflect the change of the sensing current ICS1.

[0018] Specifically, the current sensing signal generator 130 can charge a capacitor according to the mirror current in a first time interval, and generate a discharge current according to the output voltage Vo in a second time interval after the first time interval, and cause the capacitor to discharge according to the generated discharge current to obtain a gradually decreasing current sensing signal VCS_D1. Further, the multi-phase voltage converter 100 can compare the current sensing signal VCS_D1 with a preset reference threshold to determine whether an overcurrent has occurred. When an overcurrent is determined to have occurred, the multi-phase voltage converter 100 activates an overcurrent protection mechanism.

[0019] It is noteworthy that the current sensing signal VCS_D1 obtained by the current sensing signal generator 130 can reflect the change in the sensed current ICS1. Furthermore, when transistors M1 to M4 perform switching operations, the switching operations of transistors M3 and M4 do not interfere with the current sensing signal VCS_D1. In other words, the current sensing signal VCS_D1 will not fluctuate due to interference from the switching operations of transistors M3 and M4 during the voltage conversion operation of the multi-phase voltage converter 100. In this way, the multi-phase voltage converter 100 can avoid erroneous activation of the overcurrent protection mechanism due to fluctuations caused by switching operations, ensuring the normal operation of the multi-phase voltage converter 100.

[0020] Current sensor 121 is coupled to voltage converter 112. Specifically, current sensor 121 can be coupled between the two ends of transistor M4, that is, one end of current sensor 121 is coupled to switching terminal SWB, and the other end is coupled to coupling point PGNDB. Current sensing signal generator 131 is coupled to current sensor 121. Current sensing signal generator 131 generates a mirror current by mirroring the sensing current ICS2 generated by current sensor 121, and generates a current sensing signal VCS_D2 based on the mirror current and output voltage Vo. The current sensing signal VCS_D2 is used to reflect the change of sensing current ICS2. Current sensor 121 and current sensing signal generator 131 have similar circuit architecture and similar operation mode to current sensor 120 and current sensing signal generator 130, respectively, which will not be described in detail here.

[0021] Please refer to Figure 2A , Figure 2AA schematic diagram of a multi-phase voltage conversion device according to another embodiment of the present invention is shown. The multi-phase voltage conversion device 200 includes voltage converters 211 and 212, a current sensor 220, and current sensing signal generators 230, 240, and 250. Voltage converters 211 and 212 and... Figure 1 The voltage converters 111 and 112 are similar and will not be described in detail here. The current sensor 220 includes transistors M5-M7, amplifier OP1, and resistors RS1 and RS2. The positive and negative input terminals of amplifier OP1 are coupled to coupling point PGNDA and switching terminal SWA respectively through resistors RS1 and RS2. Amplifier OP1 generates a bias voltage based on the difference between the voltage VP at its positive input terminal and the voltage VN at its negative input terminal, and provides this bias voltage to the control terminal of transistor M7. Transistors M5 and M6 are coupled to form a current mirror circuit and coupled to the power supply voltage VCC. Transistor M7 can act as a current source here, generating current Io based on the bias voltage provided by amplifier OP1. The current mirror circuit formed by transistors M5 and M6 generates the sensing current ICS1 by mirroring the current Io.

[0022] Transistor M6 is coupled to resistor R3. The sensing current ICS1 generated by transistor M6 flows through resistor R3, and a sensing voltage VCS1 corresponding to the sensing current ICS1 is generated at the coupling point between resistor R3 and transistor M6.

[0023] The current sensing signal generator 230 includes a capacitor C1, a charging circuit 231, and a discharging circuit 232. The first terminal of capacitor C1 is coupled to both the charging circuit 231 and the discharging circuit 232. The second terminal of capacitor C1 is coupled to a reference ground voltage GND. The charging circuit 231 includes a current source I1, a resistor R2, and a switch TR1. The current source I1 provides a mirror current ICS1′ through a sensing current ICS1 generated by the mirror current sensor 220. The current value of the sensing current ICS1 and the current value of the mirror current ICS1′ can be a multiple of each other. The sensing current ICS1 can be greater than, equal to, or less than the mirror current ICS1′. The current source I1 is connected in series with the resistor R2, and the mirror current ICS1′ provided by the current source I1 flows through the resistor R2.

[0024] Switch TR1 is coupled between the coupling point of current source I1 and resistor R2 and the first terminal of capacitor C1. In this embodiment, switch TR1 can be a transmission gate and is turned on in a first time interval according to signals S1a and S1b, where signals S1a and S1b are out of phase. When switch TR1 is turned on, capacitor C1 can be charged according to the voltage at the coupling point of current source I1 and resistor R2.

[0025] The discharge circuit 232 includes a switch TR2 and a current mirror 2321. Switch TR2 is coupled between the first terminal of capacitor C1 and the current mirror 2321. In this embodiment, switch TR2 is also a transmission gate and is controlled by signals S2a and S2b, where signals S2a and S2b are out of phase. Switch TR2 is turned on during a second time interval following the first time interval; when switch TR2 is turned on, switch TR1 is turned off. Conversely, during the first time interval when switch TR1 is turned on, switch TR2 is turned off.

[0026] The current mirror 2321 includes transistors M8 to M11. The current mirror 2321 is coupled to the power supply voltage VCC. The control terminals of transistors M9 and M10 receive the voltage provided by amplifier OP2 to generate currents Ib and Ia, respectively. Current Ia generates a feedback voltage at the positive input terminal of amplifier OP2 through resistor R1. Current Ib passes through transistor M8, causing a discharge current ID to be generated at the coupling point between transistor M11 and switch TR2. When switch TR2 is turned on, capacitor C1 discharges according to the discharge current ID.

[0027] The capacitor C1 is charged by the charging circuit 231 in the first time interval and discharged by the discharging circuit 232 in the second time interval. A current sensing signal VCS_D1, which reflects the current passing through the transistor M2, can be generated on the first terminal of the capacitor C1.

[0028] On the other hand, the negative input terminal of amplifier OP2 can receive the output voltage Vo of the multi-phase voltage converter 200. Amplifier OP2 can adjust the bias voltage supplied to the control terminals of transistors M9 and M10 according to the change of output voltage Vo.

[0029] It is worth mentioning that, in this embodiment, the current sensor 240 and the current sensing signal generator 250 can be disposed between the switching terminal SWB of the transistor M4 and the coupling point PGNDB. The current sensing signal generator 250 can generate a current sensing signal VCS_D2 to reflect the current passing through the transistor M4. The current sensor 240 and the current sensing signal generator 250 have similar circuit architectures and similar operating methods to the aforementioned current sensor 220 and current sensing signal generator 230, respectively, and will not be described in detail here.

[0030] Please refer to the following: Figure 2B , Figure 2B Show Figure 2A The multi-phase voltage conversion device of the embodiment includes a signal generation circuit that determines a first time interval and a second time interval. Wherein, Figure 2ASignals S1a, S1b, S2a, and S2b can be generated based on signal LG. Signal generation circuit 201 includes inverters DIV1, IV2, and IV3, an AND gate AN1, and a NOR gate NOR1. Inverter DIV1 receives signal LG. Inverter DIV1 provides a time delay to delay and invert signal LG to generate signal SS1. AND gate AN1 receives signals LG and SS1 and performs a logical AND operation on them to generate signal S1a. NOR gate NOR1 receives signals S1a and SS1 and performs a logical NOR operation on them to generate signal S2a. Inverter IV2 inverts signal S1a to generate signal S1b, and inverter IV3 inverts signal S2a to generate signal S2b.

[0031] Please refer to the following: Figure 2C , Figure 2C Show Figure 2A The timing diagram of the multi-phase voltage conversion device in this embodiment is shown. In the first time interval T1, the charging circuit 231 charges the capacitor C1 to raise the voltage value of the current sensing signal VCS_D1. Then, in the second time interval T2, the discharging circuit 232 discharges the capacitor C1 to linearly decrease the voltage value of the current sensing signal VCS_D1. The current sensing signal VCS_D1 simulates the changing state of the sensed voltage VCS1 and can be considered a replica signal of the sensed voltage VCS1.

[0032] In this embodiment, the multi-phase voltage converter 200 can perform overcurrent detection through the current sensing signal VCS_D1 to activate the overcurrent protection mechanism when necessary. Furthermore, current sensing based on the current sensing signal VCS_D1 can avoid current fluctuations caused by transistor switching operations, thereby preventing false activation of the overcurrent protection mechanism and ensuring the normal operation of the multi-phase voltage converter.

[0033] Please refer to Figure 3 , Figure 3A schematic diagram of a multi-phase voltage conversion device according to another embodiment of the present invention is shown. The multi-phase voltage conversion device 300 includes a first voltage converter 311, a second voltage converter 312, a feedback circuit 320, and a controller 330. The first voltage converter 311 and the second voltage converter 312 are connected in parallel. The first voltage converter 311 and the second voltage converter 312 jointly receive an input voltage VIN and perform voltage conversion operations according to control signals PWMA and PWMB respectively to jointly generate an output voltage Vo. The feedback circuit 320 is coupled to the switching terminal SWA of the first voltage converter 311 and the switching terminal SWB of the second voltage converter 312. The feedback circuit 320 generates multiple feedback signals FBA and FBB based on the switching voltages on the switching terminals SWA and SWB, and the error voltage between the output voltage Vo and a first reference voltage.

[0034] The controller 330 is coupled between the first voltage converter 311, the second voltage converter 312, and the feedback circuit 320. The controller 330 generates multiple sampling signals by sampling control signals PWMA and PWMB, and adjusts the falling edge of one of the control signals PWMA and PWMB according to the multiple sampling signals and the feedback signals FBA and FBB, so that there is a time difference greater than a safe threshold between the falling edge of the control signal PWMA and the falling edge of PWMB.

[0035] By making the falling edges of control signals PWMA and PWMB have a sufficiently large time difference, the current sensing operation on the switching terminals SWA and SWB can have a sufficiently long sensing time, thereby reducing the possibility of sensing errors in the current sensing operation and thus reducing the probability of the overcurrent protection mechanism being falsely activated.

[0036] Please refer to the following: Figure 4A , Figure 4A This diagram illustrates an embodiment of the controller in a multi-phase voltage conversion device according to an embodiment of the present invention. The controller 400 includes an anti-transient interference circuit 410, logic circuits 421 and 422, phase-locked loops (PLLs) 431 and 432, and pulse generators PG1 to PG4.

[0037] Logic circuits 421 and 422 receive feedback signals FBA and FBB generated by the feedback circuit, respectively. Logic circuit 421 includes an inverter IV41, a NOR gate NOR41, and a latch LA1. Inverter IV41 receives the feedback signal FBA, and NOR41 receives the output signal of inverter IV41 and the pulse wave PS2 generated by pulse generator PG2. The output of NOR41 is coupled to the setting terminal S of latch LA1. In addition, the reset terminal R of latch LA1 receives the reset signal R41. The output terminal Q of latch LA1 generates a control signal PWMA and outputs the control signal PWMA to pulse generators PG1 and PG2 and phase-locked loop 431.

[0038] Phase-locked loop 431 receives mode information DCMA, control signal PWMA, and clock signal CK1. The mode information DCMA controls the start and stop of phase-locked loop 431. When the mode information DCMA indicates that the voltage converter is operating in discontinuous conduction mode (DCM), phase-locked loop 431 can be turned off; conversely, when the mode information DCMA indicates that the voltage converter is operating in continuous conduction mode (CCM), phase-locked loop 431 can be started. Phase-locked loop 431 outputs adjustment signal ADJ1 to pulse generator PG1. Pulse generator PG1 generates pulse wave PS1 based on the mode information DCMA, control signal PWMA, and adjustment signal ADJ1, while pulse generator PG2 generates the corresponding pulse wave PS2 based on the control signal PWMA.

[0039] Logic circuit 422 includes an inverter IV42, a NOR gate NOR42, and a latch LA2. Inverter IV42 receives feedback signal FBB, and NOR gate NOR42 receives the output signal of inverter IV42 and the pulse wave PS4 generated by pulse generator PG4. The output of NOR gate NOR42 is coupled to the setting terminal S of latch LA2. Furthermore, the reset terminal R of latch LA2 receives reset signal R42. The output Q of latch LA2 generates control signal PWMB and outputs control signal PWMB to pulse generators PG3 and PG4 and phase-locked loop 432. Phase-locked loop 432 receives mode information DCMB, control signal PWMB, and clock signal CK3, and outputs adjustment signal ADJ3 to pulse generator PG3. The mode information DCMB is used to control the start or stop of phase-locked loop 432. The operation of logic circuit 422, phase-locked loop 432, and pulse generators PG3 and PG4 is similar to that of logic circuit 421, phase-locked loop 431, and pulse generators PG1 and PG2, and will not be described in detail here. Through phase-locked loops 431 and 432, in CCM mode, the control signals PWMA and PWMB generated by latches LA1 and LA2 can be interleaved.

[0040] Incidentally, latches LA1 and LA2 are both SR type latches.

[0041] Furthermore, the anti-transient interference circuit 410 includes samplers TSAM1 and TSAM2, and logic gates AD1 and AD2. Sampler TSAM1 is used to sample the control signal PWMA to generate the sampled signal S41. Sampler TSAM2 is used to sample the control signal PWMB to generate the sampled signal S42. Logic gates AD1 and AD2 are both AND gates. Logic gate AD1 is used to perform a logical AND operation on the sampled signal S42 and the pulse wave PS1 to generate the reset signal R41. Logic gate AD2 is used to perform a logical AND operation on the sampled signal S41 and the pulse wave PS4 to generate the reset signal R42.

[0042] In this circuit, sampler TSAM1 generates a sampling signal S41 with a logic value of 0 when the logic value of control signal PWMA is equal to 0, and starts timing. When the time for the logic value of sampling signal S41 to be 0 reaches a first preset time delay, sampler TSAM1 changes the logic value of sampling signal S41 to 1. The first preset time delay can be set by the designer according to the actual needs of the circuit, without specific limitations, for example, it can be between tens and hundreds of nanoseconds, such as 100nm. That is to say, when sampler TSAM1 detects that the logic value of control signal PWMA has changed to 0, it provides a sampling signal S41 with a negative pulse wave of a certain width to logic gate AD2. According to the negative pulse wave of sampling signal S41, logic gate AD2 can keep the logic value of reset signal R42 at 0 for a certain length of time. In this way, the reset operation of latch LA2 can be delayed, and the width of the positive pulse wave of control signal PWMB can be effectively extended, so that there is a time difference greater than a safety threshold between the falling edge of control signal PWMB and the falling edge of control signal PWMA.

[0043] Similar to sampler TSAM1, sampler TSAM2 generates a sampling signal S42 with a logic value of 0 when the logic value of control signal PWMB is equal to 0, and starts timing. When the time for the sampling signal S42 to have a logic value of 0 reaches a second preset time delay, sampler TSAM2 sets the logic value of sampling signal S42 to 1. That is, sampler TSAM2 can provide a sampling signal S42 with a negative pulse wave of a certain width to logic gate AD1 when it detects that the logic value of control signal PWMB has changed to 0. Logic gate AD1 can maintain the logic value of reset signal R41 at 0 for a certain length of time based on the negative pulse wave of sampling signal S42. In this way, the reset operation of latch LA1 can be delayed, and the width of the positive pulse wave of control signal PWMA can be effectively extended, so that there is a time difference greater than a safety threshold between the falling edge of control signal PWMB and the falling edge of control signal PWMA.

[0044] Please refer to the following: Figure 4B , Figure 4B This invention is shown Figure 4A The timing diagram of the anti-transient interference circuit 410 in this embodiment is shown. By detecting the falling edge of the control signal PWMA and extending the width of the positive pulse wave of the control signal PWMB, a time difference Tdiff can be created between the falling edges of the control signals PWMA and PWMB. In this case, the voltage switching operation caused by the falling edges of the control signals PWMA and PWMB will not affect the current sensing operation performed on the voltage converter. Therefore, the sensed currents ILA and ILB at the switching terminals of the voltage converter can avoid jitter caused by switching interference, helping to reduce the possibility of the overcurrent protection mechanism being falsely activated.

[0045] This application provides a novel current sensing scheme that generates a mirror current by sensing the current ICS1 of a mirror current sensor, and performs current sensing based on a current sensing signal VCS_D1 generated from the mirror current and the output voltage Vo. Since the current sensing signal VCS_D1 is not affected by interference from transistor switching operations, current sensing via VCS_D1 avoids current jitter caused by transistor switching operations, thereby preventing false activation of the overcurrent protection mechanism. Furthermore, the anti-transient interference circuit provided in this application controls the time difference between the falling edges of the two control signals PWMA and PWMB corresponding to the voltage conversion operation, ensuring a sufficiently long current sensing time. This also helps reduce current sensing errors and decreases the possibility of false activation of the overcurrent protection mechanism.

[0046] Based on the above, in the multi-phase voltage conversion device of the present invention, by providing a current sensing signal generator to replicate the sensing voltage in the current sensor to generate a current sensing signal, interference caused by the switching operation of the voltage converter under steady-state conditions can be overcome. Furthermore, in the multi-phase voltage conversion device of the present invention, by providing a controller such that the falling edges of the multiple control signals of the voltage converter have a time difference greater than a safety threshold, the current sensing operations of the multiple voltage converters will not interfere with each other under transient response conditions. In this way, the current sensing operation of the multi-phase voltage conversion device of the present invention can be executed stably.

[0047] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A multi-phase voltage conversion apparatus, characterized by, The device comprises: a plurality of voltage converters coupled in parallel and configured to generate a common output voltage according to a plurality of control signals; a plurality of current sensors corresponding to the plurality of voltage converters, each current sensor coupled to both ends of a switching switch of a corresponding voltage converter for sensing a sensing current on the switching switch; and a plurality of current sense signal generators corresponding to the plurality of current sensors, each current sense signal generator coupled to a corresponding current sensor for mirroring the sensing current to generate a mirrored current and generating a current sense signal according to the mirrored current and the output voltage. The device is configured to determine whether to activate an over-current protection mechanism according to the current sense signals. The current sense signal generator comprises:

2. The multiphase voltage conversion apparatus of claim 1, wherein, a capacitor having a first end for generating the current sense signal and a second end receiving a reference voltage; a charging circuit coupled to the capacitor for mirroring the sensing current to generate the mirrored current and charging the capacitor according to the mirrored current to generate a charging voltage in a first time interval; and a discharging circuit coupled to the capacitor for generating a discharging current according to the output voltage and discharging the capacitor according to the discharging current in a second time interval. The charging circuit comprises:

3. The multiphase voltage conversion apparatus of claim 2, wherein, a current source for mirroring the sensing current to provide the mirrored current; a resistor coupled in series with the current source and receiving the mirrored current; and a first switch coupled between the coupling point of the current source and the resistor and the first end of the capacitor and turned on in the first time interval and turned off in the second time interval. The discharging circuit comprises:

4. The multiphase voltage conversion apparatus of claim 3, wherein, a current mirror for generating the discharging current according to the output voltage; and a second switch coupled between the current mirror and the first end of the capacitor and turned off in the first time interval and turned on in the second time interval. The first switch and the second switch are transmission gates.

5. The multiphase voltage conversion apparatus of claim 4, wherein, The device further comprises:

6. The multiphase voltage conversion apparatus of claim 1, wherein, a feedback circuit coupled to the plurality of voltage converters for generating a plurality of feedback signals according to switching voltages of the plurality of voltage converters and error voltages between the output voltage and a first reference voltage; and a controller coupled between the feedback circuit and the plurality of voltage converters for sampling the plurality of control signals to generate a plurality of sample signals and adjusting a falling edge of one of the plurality of control signals according to the plurality of sample signals and the plurality of feedback signals so that a time difference between falling edges of the plurality of control signals is greater than a safety threshold. The controller comprises:

7. The multiphase voltage conversion apparatus of claim 6, wherein, a first phase-locked loop receiving first mode information, a first control signal and a first clock signal and outputting a first adjustment signal to a first pulse generator; the first pulse generator configured to provide a first pulse wave according to the first mode information, the first control signal and the first adjustment signal; a second pulse generator configured to provide a second pulse wave according to the first control signal. ​ a first logic circuit to generate the first control signal based on a first feedback signal, a first reset signal, and the second pulse wave; a second phase-locked loop to receive second mode information, the second control signal, and a second clock signal, and to output a second adjustment signal to a third pulse generator; the third pulse generator to provide a third pulse wave based on the second mode information, the second control signal, and the second adjustment signal; a fourth pulse generator to provide a fourth pulse wave based on the second control signal; a second logic circuit to generate the second control signal based on a second feedback signal, a second reset signal, and the fourth pulse wave; and a glitch-free circuit to generate a first sample signal and a second sample signal by sampling the first control signal and the second control signal, respectively, and to generate the first reset signal by logically operating the second sample signal with the first pulse wave, and to generate the second reset signal by logically operating the first sample signal with the third pulse wave.

8. The multiphase voltage conversion apparatus of claim 7, wherein, the glitch-free circuit includes: a first sampler to sample the first control signal to generate the first sample signal; a second sampler to sample the second control signal to generate the second sample signal; a first logic gate to logically operate the second sample signal with the first pulse wave to generate the first reset signal; and a second logic gate to logically operate the first sample signal with the third pulse wave to generate the second reset signal.

9. The multiphase voltage conversion apparatus of claim 8, wherein, the first logic gate and the second logic gate are AND gates.

10. The multiphase voltage conversion apparatus of claim 1, wherein, the plurality of voltage converters includes: a first voltage converter to receive an input voltage; and a second voltage converter having an output coupled to an output of the first voltage converter, the second voltage converter to receive the input voltage, wherein the first voltage converter and the second voltage converter are to collectively generate the output voltage by converting the input voltage based on a first control signal and a second control signal, respectively.

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