Power circuit board, motor controller, power device and vehicle

Abstract

The invention relates to the technical field of power module packaging, in particular to a power circuit board, a motor controller, a power device and a vehicle, and the power circuit board comprises a driving function layer and a power function layer which are sequentially stacked along a first direction; the power function layer is also integrated with a heat dissipation area, and the heat dissipation area is at least arranged corresponding to the power chip unit. According to the embodiment of the invention, the driving function layer and the power function layer are stacked, so that the overall integration level of the power circuit board is greatly improved, and the overall size of the power circuit board can be effectively reduced. Moreover, the driving function layer and the power function layer are stacked, so that the transmission path of the driving signal and the power signal is greatly reduced, and the contact resistance and the parasitic inductance can be greatly reduced. The heat dissipation area is integrated in the power function layer, the working temperature of the power chip unit can be reduced, it is guaranteed that the working temperature of the power chip unit is stabilized in a normal range, and performance degradation or burning caused by high temperature is avoided.

Description

Technical Field

[0001] This invention relates to the field of power module packaging technology, specifically to a power circuit board, a motor controller, a power unit, and a vehicle. Background Technology

[0002] Currently, power modules are core components of inverters and motor controllers in new energy vehicle power systems, undertaking the crucial function of energy conversion. However, traditional power modules all require a separate drive module, resulting in a large overall structure. Furthermore, traditional power modules necessitate additional heat dissipation modules. During heat conduction, the heat must pass through multiple heat conduction structures before reaching the heat dissipation module, leading to a long heat dissipation path, poor heat dissipation capacity, and impacting the normal operation of the power module. Summary of the Invention

[0003] In view of the shortcomings of the prior art, the purpose of this application is to provide a power circuit board, a motor controller, a power unit and a vehicle, which aims to solve the problems of large overall structure and poor heat dissipation of the power module in the prior art.

[0004] In a first aspect, embodiments of this application provide a power circuit board, the power circuit board comprising: The drive function layer and the power function layer are stacked sequentially along the first direction; The drive function layer is equipped with signal input terminals and signal output terminals. The signal input terminals are used to receive control commands, and the signal output terminals are used to output drive signals. The power function layer includes a voltage input port, a power chip unit, and a voltage output port. The voltage input port is used to connect to the power supply. The control port of the power chip unit is connected to the signal output terminal. The first port of the power chip unit is connected to the voltage input port, and the second port of the power chip unit is connected to the voltage output port. The voltage output port is used to output voltage to the outside. Furthermore, the power function layer also integrates a heat dissipation area, which is set at least in correspondence with the power chip unit.

[0005] Beneficial Effects: Traditional power modules typically employ a separate design for the driver and power modules, which are generally connected via wires and connectors. This results in a large overall size, numerous connection points, and long transmission paths. This embodiment stacks the driver and power functional layers, significantly improving the overall integration of the power circuit board and effectively reducing its size. Furthermore, this stacked design allows for embedded interconnection using multi-layer PCBs. For example, microvias can be placed on the substrates of both the driver and power functional layers for interconnection, greatly reducing the transmission paths of drive and power signals and significantly decreasing contact resistance and parasitic inductance. Additionally, a heat dissipation area is integrated into the power functional layer, enabling precise heat conduction to the power chip unit. This lowers the operating temperature of the power chip unit, ensuring its stability within the normal operating range and preventing performance degradation or burnout caused by high temperatures.

[0006] In one alternative embodiment, the driving function layer includes: A control layer and a shielding protection layer are stacked sequentially along the first direction; The control layer has one port for receiving control signals and another port for outputting drive signals. The shielding layer has a signal output terminal, which is connected to another port of the control layer.

[0007] Beneficial effects: In this embodiment, the control layer can be dedicated to signal processing. After receiving an external low-voltage control signal, it amplifies it into a high-voltage drive signal, thereby making the control layer function more centralized and avoiding interference with the functions of other components. Simultaneously, by setting a shielding protection layer, this embodiment can improve the stability of signal transmission and isolate external electromagnetic interference. Furthermore, in this embodiment, the shielding protection layer can adopt a metal shielding structure, which can block some electromagnetic interference and ensure the stability of the drive signal.

[0008] In one alternative embodiment, the control layer includes: First substrate; The power chip is mounted on the first substrate. A driver chip is disposed on a first substrate. The driver chip is provided with a first port, a second port and a third port. The first port is connected to a power chip, the second port is used to receive control signals, and the third port is connected to a signal output terminal and transmits the drive signal to the signal output terminal.

[0009] Beneficial effects: This embodiment integrates the power supply chip and the driver chip on the same substrate, which can significantly reduce the length of the interconnections between components, thereby reducing parasitic resistance, minimizing voltage drops during signal transmission, and ensuring the stability of the drive signal amplitude. Furthermore, by supplying power to the driver chip locally, the power supply circuit is shorter and independently configured, avoiding voltage fluctuations caused by the driver chip sharing power with other circuits. This improves the stability of the driver chip's operating voltage and further enhances the overall efficiency of the module.

[0010] In an optional embodiment, the control layer further includes: A driving resistor is disposed on the first substrate; one end of the driving resistor is connected to the third port, and the other end of the driving resistor is connected to the signal output terminal. A voltage connector is disposed on the first substrate; one end of the voltage connector is used to connect to an external controller, and the other end of the voltage connector is connected to a second port; the voltage connector is used to transmit the control signal output by the external controller to the driver chip.

[0011] Beneficial Effects: In this embodiment, directly connecting the drive resistor to the drive chip amplifies the weak current output by the drive chip to the drive current required by the gate of the power chip unit. Compared to the traditional method of separating the drive chip and drive resistor, this significantly reduces current loss, thereby ensuring rapid turn-on and turn-off of the power chip unit. Simultaneously, the external controller can input control signals to the drive chip via a voltage connector, ensuring stable signal transmission. Compared to the traditional method of directly soldering external control signals to the drive chip pins via wires, this embodiment uses a voltage connector interface, eliminating the need for soldering and significantly avoiding the problem of solder joints detaching due to vibration.

[0012] In one optional embodiment, the first substrate is provided with a first voltage region and a second voltage region, the first voltage region and the second voltage region are spaced apart, and the operating voltage of the first voltage region is greater than the operating voltage of the second voltage region. The first voltage region is provided with the first voltage ports of the power chip and the driver chip, as well as a driving resistor; The second voltage region is provided with the second voltage ports of the power chip and the driver chip, as well as voltage connectors. Alternatively, a plurality of first voltage regions and a plurality of second voltage regions are provided on the first substrate, the first voltage regions and the second voltage regions are alternately distributed, and adjacent first voltage regions and second voltage regions are spaced apart.

[0013] Beneficial Effects: In this embodiment, a first voltage region and a second voltage region are separately set on the first substrate, that is, a high-voltage region and a low-voltage region are set separately. Simultaneously, the driver chip and power chip are connected across the high-voltage region and the low-voltage region, which can completely block high-voltage signals from entering the low-voltage region. This prevents low-voltage components, such as voltage connectors and low-voltage ports of the driver chip, from being damaged by high voltage, reducing equipment failure and safety hazards. In traditional designs, high and low voltage signals are usually mixed, which causes the pulses of the high-voltage drive signal to sometimes couple to the low-voltage control signal, affecting the control signal. After setting the high-voltage region and the low-voltage region separately, the anti-interference capability of the control signal can be significantly improved.

[0014] This embodiment, by setting multiple first voltage regions and multiple second voltage regions, allows for the installation of multiple sets of driver chips and power chip units to adapt to different driving requirements, achieving multi-channel independent power conversion and enhancing the module's scalability without requiring a redesign of the substrate for multi-phase driving. Furthermore, the alternating and spaced distribution of the first and second voltage regions ensures effective isolation between each high and low voltage zone while fully utilizing the substrate space, significantly saving substrate area and further reducing the overall size of the module.

[0015] In an optional embodiment, the shielding protective layer further includes: Second substrate; A shielding assembly is disposed on the second substrate; A short-circuit protection component is disposed on the second substrate; A signal interface component is disposed on the second substrate; the signal interface is connected to another port of the control layer.

[0016] Beneficial effects: In this embodiment, the shielding component can use a copper foil shielding layer or a metal shielding mesh to cover the signal transmission path, absorbing high-frequency electromagnetic interference generated by the power circuit, avoiding drive signal distortion, and ensuring control accuracy. Simultaneously, the short-circuit protection component can be an integrated current sensor or voltage detection circuit, capable of real-time monitoring of the current or voltage in the drive signal circuit. When a short-circuit fault is detected, it immediately sends a shutdown signal to the drive chip, preventing the power chip unit from burning out due to overcurrent. The signal interface component can have gold-plated pins, reducing contact resistance. Furthermore, the signal interface component allows for precise docking with the output of the control layer, ensuring stable overall module operation.

[0017] In one optional embodiment, another port of the control layer is provided with an upper MOSFET signal output port and a lower MOSFET signal output port. The upper MOSFET signal output port is used to output the upper MOSFET drive signal, and the lower MOSFET signal output port is used to output the lower MOSFET drive signal. The signal interface components include: The upper tube signal interface is located on the second substrate and is connected to the upper tube signal output port accordingly. The lower tube signal interface is located on the second substrate and is connected to the lower tube signal output port.

[0018] Beneficial Effects: In this embodiment, the upper and lower MOSFET drive signals are signals that control the upper and lower bridge arm chips in the half-bridge structure of the power chip unit. Therefore, crosstalk needs to be avoided. If crosstalk occurs, it will cause the upper and lower bridge arms to conduct simultaneously, resulting in a power short circuit. Therefore, this embodiment independently sets up the upper and lower MOSFET signal interfaces, which can eliminate crosstalk from the physical structure and reduce the timing error of the upper and lower bridge arm chips. In this way, precise docking can be achieved, and the upper MOSFET drive signal is transmitted only to the upper bridge arm power chip, and the lower MOSFET drive signal is transmitted only to the lower bridge arm power chip, ensuring the normal operation of the half-bridge structure.

[0019] In one alternative embodiment, the shielding component includes: The upper tube shielding structure is set on the second substrate and is configured to correspond to the upper tube signal interface. The lower tube shielding structure is set on the second substrate and is configured correspondingly to the lower tube signal output port; A signal shielding structure is disposed on the second substrate.

[0020] Beneficial effects: This embodiment, by setting up upper and lower tube shielding structures, can block electromagnetic interference from the power circuit and reduce phase distortion of the upper and lower tube drive signals. Furthermore, in actual setup, the signal shielding structure can cover the entire shielding layer, further blocking external interference such as vehicle radio signals or electromagnetic radiation, thereby effectively improving the signal-to-noise ratio of the drive signal.

[0021] In one alternative embodiment, the power function layer includes: A power transmission layer and an embedding layer are stacked sequentially along the first direction; The power transmission layer is equipped with a voltage output port and a signal transmission port; the voltage output port is used to supply voltage externally, and the signal transmission port is connected to the signal output port. The embedded layer is equipped with a voltage input port and a power chip unit.

[0022] Beneficial Effects: This embodiment, by setting up a power transmission layer and an embedding layer, makes the functional division of the power functional layers clearer. The embedding layer focuses on power conversion, while the power transmission layer focuses on signal transmission and voltage output. This allows for more convenient and targeted maintenance. Furthermore, the connection path between the power chip and the output terminal of traditional power modules is complex and has high parasitic inductance. This embodiment, by designing the power transmission layer and embedding layer separately, can significantly shorten the transmission path, effectively reducing parasitic inductance and switching losses.

[0023] In one alternative embodiment, the power transport layer includes: Third substrate; The voltage output port is located on the third substrate; the voltage output port is provided with an AC output port and a DC loop port. The signal transmission end is disposed on the third substrate; the signal transmission end is provided with an upper MOSFET transmission interface and a lower MOSFET transmission interface. The upper MOSFET transmission interface is used to receive the upper MOSFET drive signal from the drive function layer, and the lower MOSFET transmission interface is used to receive the lower MOSFET drive signal from the drive function layer.

[0024] Beneficial effects: In this embodiment, the AC output port can be adapted to the three-phase output of a three-phase motor, and the DC circuit port can provide a low-voltage DC circuit. Furthermore, it eliminates the need for an additional DC-DC converter, enabling power supply to auxiliary equipment in the vehicle, such as air conditioning, headlights, or other control circuits, thereby effectively saving system cost and space. Simultaneously, separating the signal transmission end from the voltage output port avoids magnetic field interference with the drive signal caused by the large current at the voltage output port, further ensuring the stability of the drive signal and improving the control precision of the power chip unit.

[0025] In one alternative embodiment, the embedding layer includes: A fourth substrate and a fifth substrate are stacked sequentially along the first direction; The first insertion hole penetrates through the fourth substrate and the fifth substrate; The second embedding hole penetrates through the fourth substrate and the fifth substrate; A conductive component is embedded in a first embedded hole; the conductive component forms a voltage input port; A power chip unit is embedded in a second embedding hole; the first port of the power chip unit is connected to a conductive component, and the second port of the power chip unit is connected to a voltage output port; the voltage output port is used to output AC voltage and DC voltage.

[0026] Beneficial effects: This embodiment precisely matches the dimensions of the first and second embedding holes with the conductive components and power chip units, ensuring no gaps between the conductive components, power chip units, and the substrate after assembly. This improves the overall structural stability and prevents displacement. Simultaneously, the stacked fourth and fifth substrates clamp and fix the power chip units from above and below, resulting in a uniform distribution of mechanical stress on the power chip units. This avoids stress concentration caused by traditional single-substrate fixing, thereby reducing the risk of chip cracking.

[0027] In an optional embodiment, the power function layer further includes: A bonding layer is stacked vertically below the fifth substrate; the bonding layer is provided with AC bonding terminals and DC bonding terminals. Both the AC and DC connectors are connected to the voltage output ports of the power transmission layer; the AC connector is used to transmit AC voltage, and the DC connector is used to transmit DC voltage.

[0028] Beneficial effects: In this embodiment, by setting a connecting layer, since the connecting layer is stacked vertically below the fifth substrate, signal transmission and voltage transmission between the connecting layer and the fifth substrate can be achieved through laser micro-holes, thereby reducing the signal transmission path, reducing impedance changes, and reducing signal reflection and loss.

[0029] In an optional embodiment, the power function layer further includes: Buried vias penetrate the fourth and fifth substrates; At least one of the AC connection terminal and the DC connection terminal is connected through a buried via to the voltage output port of the power transmission layer.

[0030] Beneficial effects: In this embodiment, the buried via is formed by mechanical drilling followed by plating, thus enabling it to carry high current transmission. In cross-layer connections, redundant paths in the embedded layer can be skipped, shortening the transmission distance and effectively reducing parasitic inductance and switching losses. Furthermore, traditional cross-layer connections use wire welding, which is prone to oxidation at the weld points. The plating structure of the buried via, such as copper plating, has strong oxidation resistance, resulting in long-term stable contact resistance. Moreover, the precise positioning of the buried via and the small clearance between it and the AC and DC connection terminals prevent arcing during current transmission, thereby improving safety under high-voltage conditions.

[0031] In one alternative embodiment, the connection layer includes: Sixth substrate; The first heat dissipation area is disposed on the sixth substrate; the first heat dissipation area is disposed correspondingly to the power chip unit. The AC connection terminal is located on the sixth substrate. A DC connection terminal is disposed on the sixth substrate; the DC connection terminal includes a DC negative connection terminal and a DC positive connection terminal. The AC connector passes through the hole and connects to the corresponding AC output port. The DC negative terminal passes through the buried hole and connects to the corresponding DC circuit port.

[0032] Beneficial effects: This embodiment, by setting a first heat dissipation area and perfectly matching its area with the heat-generating area of ​​the power chip, allows heat to quickly diffuse from the chip to the first heat dissipation area, thereby avoiding localized hot spot accumulation and reducing thermal stress on the power chip unit. Simultaneously, the buried via connection ensures strong directionality of AC and DC signal transmission paths, preventing intersections with other circuits and thus reducing electromagnetic coupling interference.

[0033] In an optional embodiment, the power function layer further includes: A heat diffusion layer is stacked vertically below the connecting layer; a DC positive output terminal is provided on the heat diffusion layer, and the DC positive output terminal is connected to the DC positive connecting terminal.

[0034] Beneficial effects: In this embodiment, the heat diffusion layer is a large-area copper foil, which can evenly diffuse the heat transferred from the connecting layer to the entire layer, significantly reducing the temperature of local hot spots and preventing material aging caused by local overheating. Simultaneously, the DC positive output terminal is integrated into the heat diffusion layer, and its centralized layout with the AC output terminal and DC negative output terminal avoids overheating caused by excessive current at the AC output terminal and DC negative output terminal. Furthermore, the high mechanical strength of the copper foil enhances the overall rigidity of the module.

[0035] In one alternative embodiment, the heat diffusion layer includes: Seventh substrate; The second heat dissipation area is disposed on the seventh substrate; the second heat dissipation area is disposed in correspondence with the AC connection terminal, the DC negative connection terminal and part of the first heat dissipation area. The DC positive output terminal is located on the seventh substrate; the DC positive output terminal and the DC circuit port are projected in the vertical direction.

[0036] Beneficial Effects: This embodiment, by setting a second heat dissipation area, can cover both the AC and DC connection terminals, thereby significantly improving the heat dissipation effect of the AC and DC connection terminals and preventing the connection materials from aging due to high temperatures. Simultaneously, the DC positive output terminal can provide a low-voltage DC voltage, and without the need for an additional DC-DC converter, it can power auxiliary equipment in the vehicle, such as air conditioning, headlights, or other control circuits, effectively saving system costs and space. Furthermore, by correspondingly setting the DC positive output terminal and the DC loop port, a power loop can be formed, resulting in uniform current distribution and smoother motor operation. At the same time, aligning the projections of the DC positive and DC negative output terminals can significantly reduce electromagnetic interference generated by the module during operation, eliminating the need for additional electromagnetic filter components and further saving costs and space.

[0037] In an optional embodiment, the power function layer further includes: The welding layer is stacked vertically below the heat diffusion layer; A pressure-resistant insulating layer is disposed between the welding layer and the heat diffusion layer.

[0038] Beneficial effects: In this embodiment, by setting a solder layer, the overall power circuit board can be effectively soldered to the external mounting substrate, improving the soldering strength. Furthermore, by setting a voltage-resistant insulating layer, this embodiment can prevent high-voltage signals from the heat diffusion layer from leaking to the solder layer. After the solder layer is grounded, there is no risk of electric shock, thus improving the overall safety of the power circuit board.

[0039] In one optional embodiment, the power circuit board further includes multiple thermally conductive insulating layers, with a thermally conductive insulating layer disposed between the drive functional layer and the power functional layer, and / or, a thermally conductive insulating layer disposed between two adjacent substrates in the drive functional layer, and / or, a thermally conductive insulating layer disposed between two adjacent substrates in the power functional layer.

[0040] Beneficial Effects: This embodiment improves the heat transfer efficiency between layers by incorporating a thermally conductive insulating layer. The heat from the power chip unit can also be dissipated outwards through the thermally conductive insulating layer, effectively shortening the heat dissipation path, enhancing heat dissipation capacity, and ensuring the normal operation of the power circuit board. Furthermore, the high withstand voltage of the thermally conductive insulating layer prevents short circuits caused by voltage differences between adjacent substrates, further improving the stability of the power circuit board during operation. Simultaneously, the thermally conductive insulating layer can fill the interlayer gaps, making the power circuit board a rigid whole, thus improving its impact resistance.

[0041] Secondly, this application also provides a motor controller, which includes an external controller and a power circuit board as described in any of the above embodiments. The external controller is connected to the signal input terminal of the drive function layer in the power circuit board, and the external controller is used to send control commands to the drive function layer.

[0042] Thirdly, this application also provides a power device, which includes: a power supply, a drive device, and a motor controller as described in the above embodiments. In the motor controller, the power function layer of the power circuit board is provided with a voltage input port, a power chip unit, and a voltage output port. The first port of the power chip unit is connected to the power supply through the voltage input port, and the second port of the power chip unit is connected to the drive device through the voltage output port.

[0043] Fourthly, embodiments of this application also provide a vehicle, the vehicle including: a body and a power unit as described in the above embodiments, the power unit being disposed within the body. Attached Figure Description

[0044] To more clearly illustrate the technical solutions in the specific embodiments or related technologies of the present invention, the drawings used in the description of the specific embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0045] Figure 1 This is a schematic diagram of the vehicle structure in an embodiment of this application; Figure 2 This is a schematic diagram of the power unit in the embodiments of this application; Figure 3 This is a schematic diagram of the structure of the motor controller in the embodiments of this application; Figure 4 This is a schematic diagram of the power circuit board structure in an embodiment of this application; Figure 5 This is a schematic diagram of the control layer structure in an embodiment of this application; Figure 6 This is a schematic diagram of the power chip unit in an embodiment of this application; Figure 7 This is a schematic diagram of the shielding protective layer in the embodiments of this application; Figure 8 This is a schematic diagram of the power transmission layer in an embodiment of this application; Figure 9 This is a schematic diagram of the embedded layer structure in an embodiment of this application; Figure 10 This is a schematic diagram of the connecting layer structure in an embodiment of this application; Figure 11 This is a schematic diagram of the structure of the heat diffusion layer in the embodiments of this application; Figure 12 This is a schematic diagram of the weld layer structure in an embodiment of this application.

[0046] Explanation of reference numerals in the attached figures: 10. Driver Function Layer; 101. Control layer; 1011. First substrate; 1012. Power chip; 1013. Driver chip; 1014. Driver resistor; 1015. Voltage connector; 1016. External controller; 1017. First voltage region; 1018. Second voltage region; 102. Shielding layer; 1021. Second substrate; 1022. Shielding assembly; 10221. Upper tube shielding structure; 10222. Lower tube shielding structure; 10223. Signal shielding structure; 1023. Short circuit protection assembly; 1024. Signal interface assembly; 10241. Upper tube signal interface; 10242. Lower tube signal interface; 20. Power Functional Layer; 201, Power transmission layer; 2011, Third substrate; 2012, Signal transmission terminal; 20121, Upper transistor transmission interface; 20122, Lower transistor transmission interface; 202, Embedding layer; 2021, Fourth substrate; 2022, Fifth substrate; 203, Connecting layer; 2031, AC connector; 2032, DC connector; 20321, DC negative connector; 20322, DC positive connector; 2033, Sixth substrate; 2034, First heat dissipation area; 204, Thermal diffusion layer; 2041, DC positive output terminal; 2042, Seventh substrate; 2043, Second heat dissipation area; 205. Welding layer; 206. Pressure-resistant insulation layer; 207. Thermally conductive insulation layer; 208. Voltage input port; 209. Power chip unit; 2091. Heat sink; 2092. Power chip; 210. Voltage output port; 2101. AC output port; 2102. DC loop port; 211. Buried via; 212. Laser microvia; 30. Power supply; 40. Drive equipment; 50. Power circuit board; 60. Power unit; 70. Body; 80. Motor controller. Detailed Implementation

[0047] The terms “first,” “second,” etc., are used for descriptive purposes only and have no sequential or technical meaning, nor should they be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated.

[0048] In the description of the embodiments of this application, unless otherwise expressly specified and limited, the terms "installation" and "connection" should be interpreted broadly. For example, "connection" can be a detachable connection or a non-detachable connection; it can be a direct connection or an indirect connection through an intermediate medium. "Fixed connection" refers to a connection where the relative positional relationship remains unchanged after connection. "Rotary connection" refers to a connection where the two parts can rotate relative to each other after connection. "Sliding connection" refers to a connection where the two parts can slide relative to each other after connection.

[0049] The term "connection" can also mean "electrical connection," which refers to the flow of current or signal from one conductor to another. An electrical connection between A and B means that current or signal can flow from A to B and vice versa. This electrical connection between A and B includes direct electrical connections and indirect electrical connections. A direct electrical connection between A and B means that A and B are physically connected. An indirect electrical connection between A and B means that A and B are connected via C, where C can be at least one wire or device.

[0050] The embodiments of this application are described below with reference to the accompanying drawings.

[0051] Please see Figure 1 , Figure 1 This is a schematic diagram of the vehicle structure disclosed in the embodiments of this application. The vehicle can be, but is not limited to, a pure electric vehicle (PEV / BEV), a hybrid electric vehicle (HEV), a range-extended electric vehicle (REEV), a plug-in hybrid electric vehicle (PHEV), or a new energy vehicle.

[0052] In this embodiment, the vehicle includes a body 70 and a power unit 60. The power unit 60 is fixedly installed within the body 70 and is located at a front-wheel drive and / or rear-wheel drive position on the body 70, and is fixedly connected to the body 70. The power unit 60 drives the vehicle to move.

[0053] Please see Figure 2 , Figure 2This is a schematic diagram of the power device 60 disclosed in an embodiment of this application. The power device 60 includes a power supply 30, a drive device 40, and a motor controller 80. In the motor controller 80, the power function layer 20 of the power circuit board 50 is provided with a voltage input port 208, a power chip unit 209, and a voltage output port 210. The first port of the power chip unit 209 is connected to the power supply 30 through the voltage input port 208, and the second port of the power chip unit 209 is connected to the voltage output port 210 through the voltage output port 210. The voltage output port 210 is connected to the drive device 40. That is, the first port of the power chip unit 209 is connected to one end of the voltage input port 208, and the other end of the voltage input port 208 is connected to the power supply 30; the second port of the power chip unit 209 is connected to one end of the voltage output port 210, and the other end of the voltage output port 210 is connected to the voltage output port 210. The voltage output port 210 is connected to the drive device 40.

[0054] Please see Figure 3 , Figure 3 This is a schematic diagram of the structure of the motor controller 80 disclosed in an embodiment of this application. The motor controller 80 includes an external controller 1016 and a power circuit board 50. The external controller 1016 is connected to the signal input terminal of the drive function layer 10 in the power circuit board 50, and the external controller 1016 is used to send control commands to the drive function layer 10.

[0055] like Figures 4 to 12 As shown, Figure 3 This is a schematic diagram of the power circuit board 50 disclosed in an embodiment of this application. The power circuit board 50 includes a driving function layer 10 and a power function layer 20 stacked sequentially along a first direction. For example, the first direction can be a vertical direction or a horizontal direction, as long as the stacking is perpendicular to the surface of each circuit board. In this embodiment, the driving function layer 10 and the power function layer 20 are stacked vertically with all the circuit board surfaces horizontally arranged.

[0056] Specifically, in this embodiment, both the driving functional layer 10 and the power functional layer 20 are integrated by stacking one or more substrates. For example, the driving functional layer 10 can be formed by stacking two, three, four, five, or other substrates, and the power functional layer 20 can also be formed by stacking two, three, four, five, or other substrates. Of course, this embodiment is merely an example illustrating the number of substrate layers in the driving functional layer 10 and the power functional layer 20, but it is not a limitation. Those skilled in the art can modify it according to actual conditions, as long as the same technical effect is achieved.

[0057] Furthermore, in this embodiment, the drive function layer 10 is provided with a signal input terminal and a signal output terminal. The signal input terminal is used to receive control commands, and the signal output terminal is used to output drive signals. In actual operation, control commands, such as the turn-on or turn-off signal of the power chip unit 209, can be input to the drive function layer 10 through an external controller 1016. The drive chip 1013 generates a precise drive signal, such as a PWM pulse, according to the control command. Then, the drive signal is amplified, and finally, the amplified drive signal is passed down to the power function layer 20.

[0058] Furthermore, in this embodiment, the power function layer 20 is provided with a voltage input port 208, a power chip unit 209, and a voltage output port 210. Specifically, the voltage input port 208 is used to connect to the power supply 30, the control port of the power chip unit 209 is connected to the signal output terminal, the first port of the power chip unit 209 is connected to the voltage input port 208, the second port of the power chip unit 209 is connected to the voltage output port 210, and the voltage output port 210 is used to output voltage externally.

[0059] In other words, the power supply 30 inputs the supply voltage through the voltage input port 208 and is directly connected to the power chip unit 209. After receiving the drive signal from the drive function layer 10, the power chip unit 209 turns on or off its internal half-bridge structure, full-bridge structure, or switching transistor according to the control command, thereby converting the input DC voltage into AC voltage or adjusting the output DC voltage.

[0060] Furthermore, in this embodiment, a large amount of heat is generated during the operation of the power chip unit 209. Therefore, a heat dissipation area needs to be integrated into the power functional layer 20. The heat dissipation area is at least corresponding to the power chip unit 209, thereby completing the heat dissipation of the power chip unit 209. In this embodiment, the heat dissipation area can be a copper sheet heat dissipation structure, a liquid cooling heat dissipation structure, or an air cooling heat dissipation structure. In this solution, the heat dissipation area can be the first heat dissipation area 2034 of the connecting layer 203 and the second heat dissipation area 2043 of the heat diffusion layer 204 in subsequent embodiments, or it can be a thermally conductive insulating layer 207. Of course, this embodiment is only an example of the type of heat dissipation area, but it is not limited thereto. Those skilled in the art can make changes according to the actual situation, as long as the same technical effect is achieved.

[0061] This configuration, due to the traditional power module's typically separate design of the driver module and power module, results in a large overall size, numerous connection points, and long transmission paths, as the driver module and power module are usually connected via wires and connectors. This embodiment stacks the driver functional layer 10 and the power functional layer 20, significantly improving the overall integration of the power circuit board 50 and effectively reducing its overall size. Furthermore, by stacking the driver functional layer 10 and the power functional layer 20, a multi-layer PCB embedded interconnection method can be used. For example, microvias can be set on the substrates of the driver functional layer 10 and the power functional layer 20 for interconnection, greatly reducing the transmission paths of the drive signal and power signal, and also significantly reducing contact resistance and parasitic inductance. In addition, a heat dissipation area is integrated into the power functional layer 20, allowing for precise heat conduction to the power chip unit 209, thereby reducing the operating temperature of the power chip unit 209 and ensuring its stability within the normal operating temperature range, preventing performance degradation or burnout caused by high temperatures.

[0062] Furthermore, in an optional embodiment, the driving function layer 10 includes a control layer 101 and a shielding protection layer 102 stacked sequentially along a first direction.

[0063] Specifically, in this embodiment, one port of the control layer 101 is used to receive control signals, and the other port of the control layer 101 outputs drive signals. The shielding protection layer 102 is provided with a signal output terminal, which is connected to the other port of the control layer 101.

[0064] In actual operation, the external controller 1016 inputs control commands to the control layer 101, such as the turn-on or turn-off signal of the power chip unit 209. The control layer 101 generates precise drive signals, such as PWM pulses, according to the control commands. Then, the drive signals are amplified. Finally, the amplified drive signals are passed down to the shielding protection layer 102, and then the shielded drive signals are passed to the power function layer 20.

[0065] With this configuration, in this embodiment, the control layer 101 can be dedicated to signal processing. After receiving an external low-voltage control signal, it amplifies it into a high-voltage drive signal, thereby making the function of the control layer 101 more focused and avoiding interference with the functions of other components. Simultaneously, by setting a shielding protection layer 102, this embodiment can improve the stability of signal transmission and isolate external electromagnetic interference. Furthermore, in this embodiment, the shielding protection layer 102 can adopt a metal shielding structure, which can block some electromagnetic interference and ensure the stability of the drive signal.

[0066] Furthermore, in an optional embodiment, the control layer 101 includes a first substrate 1011, a power chip 1012, a driver chip 1013, and a driver resistor 1014.

[0067] Specifically, in this embodiment, the first substrate 1011 is a conventional PCB board, and uses 1oz thick copper foil. A power supply chip 1012 is disposed on the first substrate 1011, and a driver chip 1013 is disposed on the first substrate 1011. The driver chip 1013 has a first port, a second port, and a third port. The first port is connected to the power supply chip 1012, and the second port is used to receive control signals. Further, a drive resistor 1014 is disposed on the first substrate 1011. One end of the drive resistor 1014 is connected to the third port, and the other end of the drive resistor 1014 is used to output drive signals.

[0068] In actual operation, the external controller 1016 inputs control commands, the power chip 1012 provides operating power to the driver chip 1013, and the driver chip 1013 generates a precise drive signal according to the command. The drive signal is then transmitted to the drive resistor 1014 for signal amplification. Finally, the amplified drive signal is transmitted downward to the shielding protection layer 102 through the laser micro-hole 212.

[0069] In this configuration, the power chip 1012, driver chip 1013, and driver resistor 1014 are integrated onto the same substrate, significantly reducing the length of the interconnections between components. This reduces parasitic resistance, minimizes voltage drops during signal transmission, and ensures stable amplitude of the drive signal. Simultaneously, directly connecting the driver resistor 1014 to the driver chip 1013 amplifies the weak current output by the driver chip 1013 to the drive current required by the gate of the power chip unit 209. Compared to the traditional method of separating the driver chip 1013 and driver resistor 1014, this significantly reduces current loss, ensuring rapid turn-on and turn-off of the power chip unit 209. Furthermore, by supplying power to the driver chip 1013 from the nearest available source, the power supply loop is shorter and independently configured. This avoids voltage fluctuations caused by the driver chip 1013 sharing power with other circuits, improving the stability of the driver chip 1013's operating voltage and further enhancing the overall efficiency of the module.

[0070] Furthermore, in an optional embodiment, the control layer 101 further includes a voltage connector 1015, which is disposed on the first substrate 1011. One end of the voltage connector 1015 is used to connect to an external controller 1016, and the other end of the voltage connector 1015 is connected to a second port. The voltage connector 1015 is used to transmit the control signal output by the external controller 1016 to the driver chip 1013.

[0071] In actual operation, the external controller 1016 inputs control commands to the driver chip 1013 via the voltage connector 1015. The power supply chip 1012 provides operating power to the driver chip 1013, and the driver chip 1013 generates a precise drive signal according to the command. The drive signal is then transmitted to the drive resistor 1014 for signal amplification. Finally, the amplified drive signal is transmitted downwards to the shielding layer 102 through the laser micro-hole 212.

[0072] With this configuration, in this embodiment, the external controller 1016 can input control signals to the driver chip 1013 via the voltage connector 1015, thereby ensuring stable signal transmission. Compared to the traditional method of directly soldering external control signals to the pins of the driver chip 1013 via wires, this embodiment can connect via the interface of the voltage connector 1015 without soldering, which can significantly avoid the problem of solder joints falling off due to vibration.

[0073] Furthermore, in an optional embodiment, the first substrate 1011 is further provided with a first voltage region 1017 and a second voltage region 1018, which are spaced apart, and the operating voltage of the first voltage region 1017 is greater than the operating voltage of the second voltage region 1018. That is, the first voltage region 1017 is a high-voltage region, and the second voltage region 1018 is a low-voltage region.

[0074] The first voltage region 1017 is provided with the first voltage ports of the power chip 1012 and the driver chip 1013, as well as the driving resistor 1014.

[0075] The second voltage region 1018 is provided with the second voltage ports of the power chip 1012 and the driver chip 1013, as well as the voltage connector 1015.

[0076] In actual operation, the external controller 1016 inputs control commands to the driver chip 1013 via the voltage connector 1015. The power supply chip 1012 provides operating power to the driver chip 1013, which generates precise drive signals according to the commands. Because the control layer 101 adopts a high-voltage and low-voltage isolation scheme, the driver chip 1013 is connected across the high and low voltage areas. This prevents high-voltage signals from entering the low-voltage control terminal and also allows the drive signal to be transmitted from the low-voltage area to the high-voltage area via the drive resistor 1014, thus amplifying the signal. Finally, the amplified drive signal is transmitted downwards to the shielding protection layer 102 through the laser micro-hole 212.

[0077] With this configuration, in this embodiment, the first voltage region 1017 and the second voltage region 1018 are respectively set on the first substrate 1011, that is, the high-voltage region and the low-voltage region are set separately. Simultaneously, the driver chip 1013 and the power chip 1012 are connected across the high-voltage region and the low-voltage region, which can completely block high-voltage signals from entering the low-voltage region. This prevents low-voltage components, such as the voltage connector 1015 and the low-voltage port of the driver chip 1013, from being damaged by high voltage, reducing equipment failure and safety hazards. In traditional designs, high and low voltage signals are usually mixed, which means that the pulses of the high-voltage drive signal can sometimes couple to the low-voltage control signal, affecting the control signal. After setting the high-voltage region and the low-voltage region separately, the anti-interference capability of the control signal can be significantly improved.

[0078] Further, in an optional embodiment, a plurality of first voltage regions 1017 and a plurality of second voltage regions 1018 are disposed on the first substrate 1011, the first voltage regions 1017 and the second voltage regions 1018 are alternately distributed, and adjacent first voltage regions 1017 and second voltage regions 1018 are spaced apart. Figure 4 As shown, there are two first voltage regions 1017 and one second voltage region 1018, which means that there are two high voltage regions on both sides of the low voltage region.

[0079] Of course, this embodiment is merely an example of the distribution of voltage regions, but it does not limit the scope of the invention. Those skilled in the art can make changes according to the actual situation, as long as the same technical effect can be achieved.

[0080] With this configuration, this embodiment, by setting multiple first voltage regions 1017 and multiple second voltage regions 1018, can correspondingly install multiple sets of driver chips 1013 and power chip units 209, adapting to different driving requirements, realizing multi-channel independent power conversion, improving the module's scalability, and eliminating the need to redesign the substrate for multi-phase driving. Simultaneously, the alternating and spaced distribution of the first voltage regions 1017 and second voltage regions 1018 ensures the isolation effect of each high- and low-voltage zone while fully utilizing the substrate space, significantly saving substrate area and further reducing the overall size of the module.

[0081] Furthermore, in an optional embodiment, the shielding protection layer 102 further includes a second substrate 1021, a shielding component 1022, a short-circuit protection component 1023, and a signal interface component 1024.

[0082] Specifically, in this embodiment, the second substrate 1021 can also be a traditional PCB board, and uses 4oz thick copper foil. The shielding component 1022, the short-circuit protection component 1023, and the signal interface component 1024 are all disposed on the second substrate 1021, and the signal interface is correspondingly connected to another port of the control layer 101 to ensure that the drive signal can be transmitted normally.

[0083] In actual operation, the shielding component 1022 can be made of metal, which can absorb or block electromagnetic interference generated by the power circuit of the lower power functional layer 20, thus preventing interference with the drive signal. The shielded drive signal is transmitted to the lower power functional layer 20 through the signal interface component 1024 and then through the laser micro-hole 212. At the same time, the short-circuit protection component 1023 monitors the current or voltage abnormalities of the power circuit in real time. If a short circuit occurs, it immediately feeds back a protection signal to the control layer 101, triggering the drive chip 1013 to stop output, thereby achieving fault protection.

[0084] In this embodiment, the shielding component 1022 can be a copper foil shielding layer or a metal shielding mesh, covering the signal transmission path. This absorbs high-frequency electromagnetic interference generated by the power circuit, preventing drive signal distortion and ensuring control accuracy. Simultaneously, the short-circuit protection component 1023 can be an integrated current sensor or voltage detection circuit, capable of real-time monitoring of the current or voltage in the drive signal circuit. When a short-circuit fault is detected, it immediately sends a shutdown signal to the drive chip 1013, preventing the power chip unit 209 from burning out due to overcurrent. The signal interface component 1024 can have gold-plated pins, reducing contact resistance. Furthermore, the signal interface component 1024 can precisely interface with the output of the control layer 101, ensuring stable overall module operation.

[0085] Furthermore, in an optional embodiment, another port of the control layer 101 is provided with an upper MOSFET signal output port and a lower MOSFET signal output port. The upper MOSFET signal output port is used to output the upper MOSFET drive signal, and the lower MOSFET signal output port is used to output the lower MOSFET drive signal. The signal interface component 1024 includes an upper MOSFET signal interface 10241 and a lower MOSFET signal interface 10242.

[0086] Specifically, the upper tube signal interface 10241 is disposed on the second substrate 1021 and is connected to the upper tube signal output port, and the lower tube signal interface 10242 is disposed on the second substrate 1021 and is connected to the lower tube signal output port.

[0087] In this configuration, the upper MOSFET drive signal and the lower MOSFET drive signal are signals that control the upper and lower bridge arm chips in the half-bridge structure of the power chip unit 209. Therefore, crosstalk needs to be avoided. If crosstalk occurs, it will cause the upper and lower bridge arms to conduct simultaneously, resulting in a power short circuit. Therefore, this embodiment independently sets up the upper MOSFET signal interface 10241 and the lower MOSFET signal interface 10242, which can eliminate crosstalk from the physical structure and reduce the timing error of the upper and lower bridge arm chips. In this way, precise docking can be achieved, and the upper MOSFET drive signal is transmitted only to the upper bridge arm power chip 2092, and the lower MOSFET drive signal is transmitted only to the lower bridge arm power chip 2092, ensuring the normal operation of the half-bridge structure.

[0088] Furthermore, in an optional embodiment, the shielding assembly 1022 includes an upper tube shielding structure 10221, a lower tube shielding structure 10222, and a signal shielding structure 10223.

[0089] Specifically, the upper tube shielding structure 10221 is disposed on the second substrate 1021 and corresponds to the upper tube signal interface 10241. The lower tube shielding structure 10222 is disposed on the second substrate 1021 and corresponds to the lower tube signal output port. The signal shielding structure 10223 is disposed on the second substrate 1021. In actual operation, the upper tube shielding structure 10221, the lower tube shielding structure 10222, and the signal shielding structure 10223 can be activated simultaneously for signal shielding.

[0090] With this configuration, this embodiment, by setting the upper tube shielding structure 10221 and the lower tube shielding structure 10222, can block electromagnetic interference from the power circuit and reduce phase distortion of the upper and lower tube drive signals. Furthermore, in actual installation, the signal shielding structure 10223 can cover the entire shielding layer 102 to further block external interference, such as vehicle radio signals or electromagnetic radiation, thereby effectively improving the signal-to-noise ratio of the drive signal.

[0091] Furthermore, in an optional embodiment, the power function layer 20 includes a power transmission layer 201 and an embedding layer 202 that are stacked sequentially along a first direction.

[0092] Specifically, in this embodiment, the power transmission layer 201 is provided with a voltage output port 210 and a signal transmission terminal 2012. The voltage output port 210 is used to output voltage to the outside, and the signal transmission terminal 2012 is connected to the signal output terminal. The embedded layer 202 is provided with a voltage input port 208 and a power chip unit 209.

[0093] In actual operation, after the drive signal enters the power transmission layer 201, it is transmitted down through the signal transmission terminal 2012 in the layer and then through the laser micro-hole 212 to the power chip unit 209 in the embedded layer 202, which finally triggers the power chip 2092 to start working.

[0094] As for the voltage output port 210, it outputs voltage after the subsequent voltage conversion is completed. This will be explained in detail in later embodiments.

[0095] With this configuration, this embodiment uses a power transmission layer 201 and an embedding layer 202. This layered design makes the functional division of the power function layer 20 clearer, allowing the embedding layer 202 to focus on power conversion and the power transmission layer 201 to focus on signal transmission and voltage output. This facilitates more convenient and targeted maintenance. Furthermore, the connection path between the power chip 2092 and the output terminal of traditional power modules is complex and has high parasitic inductance. By designing the power transmission layer 201 and the embedding layer 202 in this embodiment, the transmission path can be significantly shortened, effectively reducing parasitic inductance and switching losses.

[0096] Furthermore, in an optional embodiment, the power transmission layer 201 includes a third substrate 2011, a voltage output port 210, and a signal transmission terminal 2012.

[0097] Specifically, in this embodiment, the third substrate 2011 can also be a conventional PCB board, and uses copper foil with a thickness of 4oz. The voltage output port 210 is disposed on the third substrate 2011, and the voltage output port 210 is provided with an AC output port 2101 and a DC loop port 2102. The AC output port 2101 is used to output AC voltage, and the DC loop port 2102 is used to form a complete power loop.

[0098] Furthermore, in this embodiment, the signal transmission terminal 2012 is disposed on the third substrate 2011. The signal transmission terminal 2012 is provided with an upper MOSFET transmission interface 20121 and a lower MOSFET transmission interface 20122. The upper MOSFET transmission interface 20121 is used to receive the upper MOSFET drive signal from the drive function layer 10, and the lower MOSFET transmission interface 20122 is used to receive the lower MOSFET drive signal from the drive function layer 10.

[0099] With this configuration, in this embodiment, the AC output port 2101 can be adapted to the three-phase output of a three-phase motor, and the DC circuit port 2102 can provide a low-voltage DC circuit. Furthermore, it eliminates the need for an additional DC-DC converter, enabling power supply to auxiliary equipment in the vehicle, such as air conditioning, headlights, or other control circuits, thereby effectively saving system cost and space. Simultaneously, separating the signal transmission terminal 2012 from the voltage output port 210 in this embodiment avoids magnetic field interference from the high current at the voltage output port 210, further ensuring the stability of the drive signal and improving the control precision of the power chip unit 209.

[0100] Furthermore, in an optional embodiment, the embedded layer 202 includes a fourth substrate 2021 and a fifth substrate 2022 sequentially stacked along a first direction. The fourth substrate 2021 and the fifth substrate 2022 can also be conventional PCB boards and use copper foil with a thickness of 1 oz.

[0101] Specifically, in this embodiment, the first embedding hole penetrates the fourth substrate 2021 and the fifth substrate 2022, the second embedding hole penetrates the fourth substrate 2021 and the fifth substrate 2022, the conductive component is embedded in the first embedding hole, and the conductive component forms a voltage input port 208.

[0102] Of course, in this embodiment, to save space and shorten the conductive path, through holes corresponding to the first embedding hole can be formed on the first substrate 1011, the second substrate 1021, and the third substrate 2011 at the positions of the conductive components, so that the conductive components are led out from directly above the power circuit board 50. The conductive components can be terminal copper busbars. This embodiment is merely an example of the arrangement of the conductive components, but it is not intended to limit the scope. Those skilled in the art can make changes according to actual conditions, as long as the same technical effect is achieved.

[0103] Furthermore, in this embodiment, the power chip unit 209 is embedded in the second embedding hole. The first port of the power chip unit 209 is connected to a conductive component, and the second port of the power chip unit 209 is connected to a voltage output port 210. The voltage output port 210 is used to output AC voltage and DC voltage. The power chip unit 209 consists of a heat sink 2091 and a power chip 2092 disposed on the heat sink 2091.

[0104] In actual operation, the external high-voltage power supply is input through the conductive component embedded in the embedded layer 202 and directly connected to the power chip unit 209. After receiving the drive signal, the power chip unit 209 converts the input external high voltage into AC voltage or a suitable low-voltage DC voltage. The converted AC voltage or suitable low-voltage DC voltage is then transmitted downwards to the connection through the laser micro-hole 212.

[0105] With this configuration, the dimensions of the first and second embedding holes in this embodiment are precisely matched with the conductive components and the power chip unit 209. After assembly, there are no gaps between the conductive components, the power chip unit 209, and the substrate, thereby improving the stability of the overall structure and preventing displacement. Simultaneously, the stacked fourth substrate 2021 and fifth substrate 2022 form a clamping and fixing mechanism for the power chip unit 209, ensuring a uniform distribution of mechanical stress on the power chip unit 209. This avoids stress concentration caused by traditional single-substrate fixing, thus reducing the risk of chip cracking.

[0106] Furthermore, in an optional embodiment, the power functional layer 20 further includes a connecting layer 203, which is stacked vertically below the fifth substrate 2022.

[0107] Specifically, the connection layer 203 is provided with an AC connection terminal 2031 and a DC connection terminal 2032. Both the AC connection terminal 2031 and the DC connection terminal 2032 are connected to the voltage output port 210 of the power transmission layer 201. The AC connection terminal 2031 is used to transmit AC voltage, and the DC connection terminal 2032 is used to transmit DC voltage.

[0108] In actual operation, after the power signal enters the junction layer 203, the power signal is transmitted in two paths. One path is a DC positive voltage that is transmitted downward to the heat diffusion layer 204 through the laser micro-hole 212, and the other path is an AC voltage that is directly transmitted to the power transmission layer 201.

[0109] With this configuration, this embodiment provides a connecting layer 203. Since the connecting layer 203 is stacked vertically below the fifth substrate 2022, signal transmission and voltage transmission between the connecting layer 203 and the fifth substrate 2022 can be achieved through laser micro-holes 212. This reduces the signal transmission path, impedance abrupt changes, signal reflection, and loss.

[0110] Furthermore, in an optional embodiment, the power functional layer 20 further includes a buried via 211, which penetrates the fourth substrate 2021 and the fifth substrate 2022.

[0111] At least one of the AC connection terminal 2031 and the DC connection terminal 2032 is connected to the voltage output port 210 of the power transmission layer 201 through the buried via 211.

[0112] In this embodiment, the buried via 211 is formed by mechanical drilling followed by plating, thus enabling it to carry high current transmission. During cross-layer connections, the redundant path of the embedded layer 202 can be skipped, shortening the transmission distance and effectively reducing parasitic inductance and switching losses. Furthermore, traditional cross-layer connections use wire welding, which is prone to oxidation at the weld points. The plating structure of the buried via 211, such as a copper plating structure, offers strong oxidation resistance and ensures long-term stable contact resistance. Moreover, the precise positioning of the buried via 211, with its small clearance between it and the AC connection terminal 2031 and the DC connection terminal 2032, prevents arcing during current transmission, thereby improving safety under high-voltage conditions.

[0113] Furthermore, in an optional embodiment, the bonding layer 203 includes a sixth substrate 2033 and a first heat dissipation area 2034.

[0114] Specifically, in this embodiment, the sixth substrate 2033 can be a traditional PCB board, and uses copper foil with a thickness of 4 oz. A first heat dissipation area 2034 is disposed on the sixth substrate 2033; the first heat dissipation area 2034 is correspondingly disposed with respect to the power chip unit 209. During actual operation, the first heat dissipation area 2034 receives heat from the embedded layer 202, and uses the large-area copper foil to evenly diffuse the concentrated heat into the layer, avoiding localized overheating. The first heat dissipation area 2034 can be composed of an upper heat dissipation area and a lower heat dissipation area.

[0115] Furthermore, in this embodiment, the AC connection terminal 2031 is disposed on the sixth substrate 2033, and the DC connection terminal 2032 is disposed on the sixth substrate 2033. The DC connection terminal 2032 includes a DC negative connection terminal 20321 and a DC positive connection terminal 20322. The AC connection terminal 2031 passes through the buried via 211 and is correspondingly connected to the AC output port 2101. The DC negative connection terminal 20321 passes through the buried via 211 and is correspondingly connected to the DC circuit port 2102.

[0116] In actual operation, after the power signal enters the junction layer 203, it is transmitted in two paths. One path is a DC positive voltage transmitted downwards through the laser micro-hole 212 to the heat diffusion layer 204, and the other path is an AC voltage transmitted directly to the power transmission layer 201 for output. The DC loop port 2102 is used to form a power loop.

[0117] With this configuration, this embodiment sets up a first heat dissipation area 2034, and ensures that the area of ​​the first heat dissipation area 2034 perfectly matches the heat-generating area of ​​the power chip 2092. This allows heat to quickly diffuse from the chip to the first heat dissipation area 2034, thereby avoiding localized hot spot accumulation and reducing thermal stress on the power chip unit 209. Simultaneously, the buried via 211 connection ensures strong directionality of the transmission paths for AC and DC signals, preventing intersections with other circuits and thus reducing electromagnetic coupling interference.

[0118] Furthermore, in an optional embodiment, the power functional layer 20 further includes a heat diffusion layer 204, which is stacked vertically below the connecting layer 203. A DC positive output terminal 2041 is provided on the heat diffusion layer 204, and the DC positive output terminal 2041 is connected to the DC positive connecting terminal 20322.

[0119] In actual operation, the DC positive signal from the connecting layer 203 is adapted to the voltage specifications required by the external device through the DC positive output terminal 2041 of the heat diffusion layer 204, and then output to the outside, forming a power loop with the DC loop port 2102. At the same time, the heat diffusion layer 204 can continue to absorb heat from the connecting layer 203, thereby further achieving heat dissipation.

[0120] With this configuration, in this embodiment, the heat diffusion layer 204 is a large-area copper foil, which can evenly diffuse the heat transferred from the connecting layer 203 to the entire layer, significantly reducing the temperature of local hot spots and preventing material aging caused by local overheating. Simultaneously, the DC positive output terminal 2041 is integrated into the heat diffusion layer 204, and its centralized layout with the AC output terminal and DC negative output terminal prevents overheating at the AC output terminal and DC negative output terminal due to excessive current. Furthermore, the high mechanical strength of the copper foil enhances the overall rigidity of the module.

[0121] Further, in an optional embodiment, the heat diffusion layer 204 includes a seventh substrate 2042, which can be a conventional PCB board and uses 4oz thick copper foil. A second heat dissipation area 2043 is disposed on the seventh substrate 2042, and the second heat dissipation area 2043 is correspondingly disposed with the AC connection terminal 2031, the DC negative connection terminal 20321, and a portion of the first heat dissipation area 2034. A DC positive output terminal 2041 is disposed on the seventh substrate 2042, and the DC positive output terminal 2041 coincides with the vertical projection of the DC loop port 2102.

[0122] With this configuration, the second heat dissipation area 2043 in this embodiment covers both the AC connection terminal 2031 and the DC connection terminal 2032, significantly improving their heat dissipation and preventing material aging due to high temperatures. Simultaneously, the DC positive output terminal 2041 provides a low-voltage DC power supply, eliminating the need for an additional DC-DC converter to power auxiliary equipment in the vehicle, such as air conditioning, headlights, or other control circuits, thus effectively saving system cost and space. Furthermore, the corresponding arrangement of the DC positive output terminal 2041 and the DC loop port 2102 forms a symmetrical power loop, resulting in uniform current distribution and smoother motor operation. Moreover, aligning the projections of the DC positive output terminal 2041 and the DC negative output terminal significantly reduces electromagnetic interference generated during module operation, eliminating the need for additional electromagnetic filtering components and further saving cost and space.

[0123] Furthermore, in an optional embodiment, the power functional layer 20 further includes a solder layer 205 and a voltage-resistant insulating layer 206.

[0124] Specifically, the welding layer 205 is stacked vertically below the heat diffusion layer 204, and the pressure-resistant insulating layer 206 is disposed between the welding layer 205 and the heat diffusion layer 204.

[0125] In this embodiment, by providing the solder layer 205, the overall power circuit board 50 can be effectively soldered to the external mounting substrate, improving the soldering strength. Furthermore, by providing the voltage-resistant insulating layer 206, this embodiment can prevent the high-voltage signal from the heat diffusion layer 204 from leaking to the solder layer 205. After the solder layer 205 is grounded, there is no risk of electric shock, thus improving the overall safety of the power circuit board 50.

[0126] Furthermore, in an optional embodiment, the power circuit board 50 further includes a plurality of thermally conductive insulating layers 207, with a thermally conductive insulating layer 207 disposed between the driving functional layer 10 and the power functional layer 20, a thermally conductive insulating layer 207 disposed between two adjacent substrates in the driving functional layer 10, and a thermally conductive insulating layer 207 disposed between two adjacent substrates in the power functional layer 20.

[0127] Of course, a thermally conductive insulating layer 207 may also be provided only between the driving functional layer 10 and the power functional layer 20, or only between two adjacent substrates in the driving functional layer 10, or only between two adjacent substrates in the power functional layer 20. This embodiment is merely an example of the placement of the thermally conductive insulating layer 207, but it is not intended to limit the application. Those skilled in the art can change the placement of the thermally conductive insulating layer 207 as long as the same technical effect is achieved. With this configuration, this embodiment improves the heat transfer efficiency between layers by incorporating the thermally conductive insulating layer 207. The heat from the power chip unit 209 can also be dissipated outwards through the thermally conductive insulating layer 207, effectively shortening the heat dissipation path, enhancing heat dissipation capacity, and ensuring the normal operation of the power circuit board 50. Furthermore, the high withstand voltage of the thermally conductive insulating layer 207 prevents short circuits caused by voltage differences between adjacent substrates, further improving the stability of the power circuit board 50 during operation. Simultaneously, the thermally conductive insulating layer 207 can fill the interlayer gaps, making the power circuit board 50 a rigid whole, thus improving its impact resistance.

[0128] It should be understood that the application of this application is not limited to the examples above. Those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims. Those skilled in the art can understand that implementing all or part of the processes of the above embodiments and making equivalent changes according to the claims of this application still fall within the scope of this application.

Claims

1. A power circuit board (50) characterized by, The application relates to a power supply device, which comprises: a driving functional layer (10) and a power functional layer (20) which are sequentially stacked in a first direction; the driving functional layer (10) is provided with a signal input end and a signal output end, the signal input end is used for receiving a control instruction, and the signal output end is used for outputting a driving signal; the power functional layer (20) is provided with a voltage input port (208), a power chip unit (209) and a voltage output port (210); the voltage input port (208) is used for connecting a power supply (30), a control port of the power chip unit (209) is connected with the signal output end, a first port of the power chip unit (209) is connected with the voltage input port (208), and a second port of the power chip unit (209) is connected with the voltage output port (210); and the voltage output port (210) is used for outputting voltage externally; and the power functional layer (20) is further integrated with a heat dissipation area which is arranged in correspondence with at least the power chip unit (209).

2. The power circuit board of claim 1, wherein, the driving functional layer (10) comprises: a control layer (101) and a shielding protection layer (102) which are sequentially stacked in the first direction; the control layer (101) is provided with one port for receiving a control signal and another port for outputting the driving signal; the shielding protection layer (102) is provided with the signal output end which is connected with the other port of the control layer (101).

3. The power circuit board of claim 2, wherein, the control layer (101) comprises: a first substrate (1011); a power chip (1012) arranged on the first substrate (1011); a driving chip (1013) arranged on the first substrate (1011); the driving chip (1013) is provided with a first port, a second port and a third port, the first port is connected with the power chip (1012), the second port is used for receiving a control signal, and the third port is connected with the signal output end and transmits a driving signal to the signal output end.

4. The power circuit board of claim 3, wherein, the control layer (101) further comprises: a driving resistor (1014) arranged on the first substrate (1011); one end of the driving resistor (1014) is connected with the third port, and the other end of the driving resistor (1014) is connected with the signal output end; a voltage connector (1015) arranged on the first substrate (1011); one end of the voltage connector (1015) is used for connecting an external controller (1016), and the other end of the voltage connector (1015) is connected with the second port; and the voltage connector (1015) is used for transmitting the control signal output by the external controller (1016) to the driving chip (1013).

5. The power circuit board of claim 4, wherein, The first substrate (1011) is provided with a first voltage area (1017) and a second voltage area (1018), the first voltage area (1017) and the second voltage area (1018) are arranged at intervals, and the working voltage of the first voltage area (1017) is greater than that of the second voltage area (1018); The first voltage area (1017) is provided with the first voltage port of the power chip (1012) and the driving chip (1013) and the driving resistor (1014); The second voltage area (1018) is provided with the second voltage port of the power chip (1012) and the driving chip (1013) and the voltage connector (1015); Or, when a plurality of first voltage areas (1017) and a plurality of second voltage areas (1018) are arranged on the first substrate (1011), the first voltage area (1017) and the second voltage area (1018) are alternately distributed, and the adjacent first voltage area (1017) and the second voltage area (1018) are arranged at intervals.

6. The power circuit board of any one of claims 2 to 5, wherein, The shielding protection layer (102) further comprises: A second substrate (1021); A shielding assembly (1022) arranged on the second substrate (1021); A short-circuit protection assembly (1023) arranged on the second substrate (1021); A signal interface assembly (1024) arranged on the second substrate (1021); the signal interface is connected with another port of the control layer (101).

7. The power circuit board of claim 6, wherein, Another port of the control layer (101) is provided with an upper tube signal output port and a lower tube signal output port, the upper tube signal output port is used for outputting an upper tube driving signal, and the lower tube signal output port is used for outputting a lower tube driving signal; The signal interface assembly (1024) comprises: An upper tube signal interface (10241) arranged on the second substrate (1021) and connected with the upper tube signal output port; A lower tube signal interface (10242) arranged on the second substrate (1021) and connected with the lower tube signal output port.

8. The power circuit board of claim 7, wherein, The shielding assembly (1022) comprises: An upper tube shielding structure (10221) arranged on the second substrate (1021) and arranged correspondingly with the upper tube signal interface (10241); A lower tube shielding structure (10222) arranged on the second substrate (1021) and arranged correspondingly with the lower tube signal output port; A signal shielding structure (10223) arranged on the second substrate (1021).

9. The power circuit board of any one of claims 1 to 5, wherein, The power function layer (20) comprises: A power transmission layer (201) and an embedded layer (202) arranged in the first direction; The power transmission layer (201) is provided with the voltage output port (210) and a signal transmission end (2012); the voltage output port (210) is used for external voltage, and the signal transmission end (2012) is connected with the signal output end; The embedded layer (202) is provided with the voltage input port (208) and the power chip unit (209).

10. The power circuit board of claim 9, wherein, The power transmission layer (201) comprises: A third substrate (2011), The voltage output port (210) is arranged on the third substrate (2011); the voltage output port (210) is provided with an alternating current output port (2101) and a direct current loop port (2102); The signal transmission end (2012) is arranged on the third substrate (2011); the signal transmission end (2012) is provided with an upper pipe transmission interface (20121) and a lower pipe transmission interface (20122); the upper pipe transmission interface (20121) is used for receiving an upper pipe driving signal from the driving function layer (10); and the lower pipe transmission interface (20122) is used for receiving a lower pipe driving signal from the driving function layer (10).

11. The power circuit board of claim 10, wherein, The embedded layer (202) comprises: A fourth substrate (2021) and a fifth substrate (2022) are sequentially arranged in a first direction; A first embedded hole penetrating through the fourth substrate (2021) and the fifth substrate (2022); A second embedded hole penetrating through the fourth substrate (2021) and the fifth substrate (2022); A conductive assembly embedded in the first embedded hole; the conductive assembly forms the voltage input port (208); The power chip unit (209) is embedded in the second embedded hole; a first port of the power chip unit (209) is connected with the conductive assembly, and a second port of the power chip unit (209) is connected with the voltage output port (210); and the voltage output port (210) is used for outputting alternating current voltage and direct current voltage outward.

12. The power circuit board of claim 11, wherein, The power function layer (20) further comprises: An adapter layer (203) is arranged below the fifth substrate (2022) in a vertical direction; the adapter layer (203) is provided with an alternating current adapter end (2031) and a direct current adapter end (2032); The alternating current adapter end (2031) and the direct current adapter end (2032) are correspondingly connected with the voltage output port (210) of the power transmission layer (201); the alternating current adapter end (2031) is used for transmitting alternating current voltage, and the direct current adapter end (2032) is used for transmitting direct current voltage.

13. The power circuit board of claim 12, wherein, The power function layer (20) further comprises: A buried hole (211) penetrating through the fourth substrate (2021) and the fifth substrate (2022); At least one of the alternating current adapter end (2031) and the direct current adapter end (2032) is correspondingly connected with the voltage output port (210) of the power transmission layer (201) through the buried hole (211).

14. The power circuit board of claim 13, wherein, The adapter layer (203) comprises: A sixth substrate (2033); A first heat dissipation area (2034) is arranged on the sixth substrate (2033); the first heat dissipation area (2034) is correspondingly arranged with the power chip unit (209). The AC connection end (2031) is arranged on the sixth substrate (2033); The DC connection end (2032) is arranged on the sixth substrate (2033); the DC connection end (2032) comprises a DC negative connection end (20321) and a DC positive connection end (20322); The AC connection end (2031) is connected with the AC output port (2101) through the embedded hole (211); The DC negative connection end (20321) is connected with the DC loop port (2102) through the embedded hole (211).

15. The power circuit board of claim 14, wherein, The power function layer (20) further comprises: A heat diffusion layer (204) is arranged below the connection layer (203) in the vertical direction; a DC positive output end (2041) is arranged on the heat diffusion layer (204); and the DC positive output end (2041) is connected with the DC positive connection end (20322).

16. The power circuit board of claim 15, wherein, The heat diffusion layer (204) comprises: A seventh substrate (2042); A second heat dissipation area (2043) is arranged on the seventh substrate (2042); the second heat dissipation area (2043) is arranged corresponding to the AC connection end (2031), the DC negative connection end (20321) and part of the first heat dissipation area (2034); The DC positive output end (2041) is arranged on the seventh substrate (2042); and a projection of the DC positive output end (2041) in the vertical direction is coincident with the DC loop port (2102).

17. The power circuit board of claim 16, wherein, The power function layer (20) further comprises: A welding layer (205) is arranged below the heat diffusion layer (204) in the vertical direction; A voltage-resistant insulation layer (206) is arranged between the welding layer (205) and the heat diffusion layer (204).

18. The power circuit board of claim 17, wherein, The power circuit board (50) further comprises a plurality of heat-conducting insulation layers (207); one heat-conducting insulation layer (207) is arranged between the driving function layer (10) and the power function layer (20), and / or one heat-conducting insulation layer (207) is arranged between two adjacent substrates in the driving function layer (10), and / or one heat-conducting insulation layer (207) is arranged between two adjacent substrates in the power function layer (20).

19. An electric machine controller characterized by It comprises: An external controller (1016) and the power circuit board (50) as claimed in any one of claims 1 to 18; the external controller (1016) is connected with a signal input end of the driving function layer (10) in the power circuit board (50); and the external controller (1016) is used for sending a control instruction to the driving function layer (10).

20. A power plant characterized by It comprises: The power supply (30), the driving device (40) and the motor controller (80) as claimed in claim 19, wherein the power function layer (20) of the power circuit board (50) is provided with a voltage input port (208), a power chip unit (209) and a voltage output port (210); a first port of the power chip unit (209) is connected with the power supply (30) through the voltage input port (208), and a second port of the power chip unit (209) is connected with the driving device (40) through the voltage output port (210).

21. A vehicle characterized by comprising: Comprising: The power device (60) as claimed in claim 20 is arranged in the vehicle body (70).

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