Flexible circuit board and display device

Abstract

The invention discloses a flexible circuit board and a display device, and belongs to the technical field of display. The flexible circuit board provided by the invention is internally provided with a plurality of signal wires for connecting the electronic device and the plug-in connector. At least one signal line in the plurality of signal lines is a target signal line, the target signal line can comprise a first target line located in the first conductive layer and a second target line located in the second conductive layer, and the first target line is in lap joint with the second target line. Thus, the target signal wire can be arranged in multiple layers on different conductive layers, and the width of the part, located in the single conductive layer, of the target signal wire in the first direction does not need to be increased, so that the unit cross sectional area of the target signal wire can be increased and the impedance can be reduced while other signal wires are not influenced; the width of the flexible circuit board in the first direction can be ensured to be still small, and the utilization rate of the wiring space of the multiple conductive layers in the flexible circuit board can be improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a flexible circuit board and a display device. BACKGROUND

[0002] A display panel applying organic light emitting diode (OLED) light emission to realize display function is called OLED display panel, and becomes a mainstream display structure due to high color gamut, thin and flexible.

[0003] The OLED display device usually can include: an OLED display panel, a flexible circuit board and a mainboard, one end of the flexible circuit board can be bound and connected with the OLED display panel, and the other end can be plugged with the mainboard through a plug-in connector, so as to reliably transmit the image signal, control signal and power generated by the mainboard to the OLED display panel, and drive it to display normally.

[0004] At present, some OLED display devices develop towards lighter, more convenient and longer battery life, resulting in smaller and smaller wiring space of the flexible circuit board, and the length of the flexible circuit board is getting longer due to the change and adjustment of the overall layout, so the line impedance in the flexible circuit board is getting larger and larger, which is difficult to meet the specification requirements of the OLED display device on impedance. SUMMARY

[0005] The embodiment of the present application provides a flexible circuit board and a display device. The problem of large line impedance in the flexible circuit board of the prior art can be solved, and the technical solution is as follows: On the one hand, a flexible circuit board is provided, characterized in that the flexible circuit board has a device area and an external connection area, the device area is used to arrange electronic devices, and the external connection area is used to arrange a plug-in connector for plugging with a mainboard; and the internal part of the flexible circuit board has a plurality of signal lines for connecting the electronic devices and the plug-in connector. The flexible circuit board comprises: a first conductive layer and a second conductive layer which are arranged in layers, and a first dielectric layer between the first conductive layer and the second conductive layer; Among the plurality of signal lines, at least one signal line is a target signal line, the target signal line comprises: a first target line in the first conductive layer and a second target line in the second conductive layer; and the first target line and the second target line are overlapped.

[0006] Optionally, the first target line has a first overlapping area with the second target line on the first dielectric layer. The first dielectric layer has a plurality of first vias, and the area where each first via is located is located within the first overlapping area. The first target trace is connected to the second target trace through the plurality of first vias.

[0007] Optionally, in the first direction, the width of the first target trace is greater than or equal to the width of the first overlapping region, and / or, the width of the second target trace is greater than or equal to the width of the first overlapping region; and in the first direction, the maximum width of the first via is less than or equal to the width of the first overlapping region. Wherein, the first direction is parallel to the flexible circuit board and perpendicular to the extension direction of the target signal trace.

[0008] Optionally, the flexible circuit board further includes: a third conductive layer located on the side of the second conductive layer opposite to the first conductive layer, and a second dielectric layer located between the third conductive layer and the second conductive layer; The target signal trace further includes a third target trace located within the third conductive layer, the third target trace being overlapped with the second target trace.

[0009] Optionally, the orthographic projection of the second target trace on the second dielectric layer and the orthographic projection of the third target trace on the second dielectric layer have a second overlapping region; The second dielectric layer has a plurality of second vias, and the area where each second via is located is within the second overlapping area. The second target trace is connected to the third target trace through the plurality of second vias.

[0010] Optionally, in the first direction, the width of the second target trace is greater than or equal to the width of the second overlapping region, and / or, the width of the third target trace is greater than or equal to the width of the second overlapping region; and in the first direction, the maximum width of the second via is less than or equal to the width of the second overlapping region. Wherein, the first direction is parallel to the flexible circuit board and perpendicular to the extension direction of the target signal trace.

[0011] Optionally, the plurality of first vias are arranged in a second direction, and the plurality of second vias are arranged in the second direction; and the plurality of first vias and the plurality of second vias are spaced apart in the first direction; the first direction is parallel to the flexible circuit board and perpendicular to the extension direction of the target signal trace; the second direction is parallel to the extension direction of the target signal trace; The first target trace overlaps with a portion of the second target trace through the plurality of first vias; the third target trace overlaps with another portion of the second target trace through the plurality of second vias.

[0012] Optionally, the flexible circuit board further has a bending area located between the device area and the external area; the portion of the target signal trace located within the bending area is the first bending portion; The flexible circuit board also has a grounding trace inside for grounding. The portion of the grounding trace located in the bending area is a second bending portion, and the second bending portion has multiple through holes. The first bent portion is located in any one of the conductive layers in the flexible circuit board, and the second bent portion is located in another different conductive layer in the flexible circuit board. The orthographic projection of the first bent portion on the first dielectric layer overlaps with the orthographic projection of the second bent portion on the first dielectric layer.

[0013] Optionally, when the target signal trace includes a first target trace and a second target trace, the portion of the first target trace located within the bending region is the first bending portion, and the second target trace is distributed outside the bending region; the portion of the second conductive layer where the second target trace is located distributed in the bending region includes the second bending portion. Alternatively, if the target signal trace includes a first target trace, a second target trace, and a third target trace, the portion of the first target trace located within the bending region is the first bending portion, and the second and third target traces are both distributed outside the bending region; the portion of the second conductive layer where the second target trace is located and / or the portion of the third conductive layer where the third target trace is located distributed in the bending region includes the second bending portion. Alternatively, if the target signal trace includes a first target trace, a second target trace, and a third target trace, the portion of the first target trace and / or the second target trace located within the bending region is the first bending portion, and the third target trace is distributed outside the bending region; the portion of the third conductive layer where the third target trace is located distributed in the bending region includes the second bending portion.

[0014] On the other hand, a display device is provided, characterized in that it includes: a display panel, a flexible circuit board, and a motherboard; one end of the flexible circuit board is bonded to the display panel, and the other end is plugged into the motherboard through the connector; the flexible circuit board is any of the flexible circuit boards described above.

[0015] The beneficial effects of the technical solutions provided in this application include at least the following: Since the target signal trace may include a first target trace located in a first conductive layer and a second target trace located in a second conductive layer, and the first target trace overlaps with the second target trace, the target signal trace can be routed in multiple layers on different conductive layers. Furthermore, it is not necessary to increase the width of the portion of the target signal trace located in a single conductive layer in the first direction. This allows for increasing the unit cross-sectional area of ​​the target signal trace and reducing its impedance without affecting other signal traces. This ensures that the width of the flexible circuit board in the first direction remains relatively small and also improves the utilization rate of the routing space in the multiple conductive layers of the flexible circuit board. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a top view of a flexible circuit board provided in an embodiment of this application; Figure 2 yes Figure 1 A schematic cross-sectional view of the flexible circuit board at A1-A1' is shown; Figure 3 This is a top view of another flexible circuit board provided in an embodiment of this application; Figure 4 yes Figure 3 The diagram shows a cross-sectional view of the flexible circuit board at point A2-A2'. Figure 5 yes Figure 1 Another cross-sectional view of the flexible circuit board at A1-A1' is shown in the figure; Figure 6 This is a top view of yet another flexible circuit board provided in an embodiment of this application; Figure 7 yes Figure 6 The diagram shows a cross-sectional view of the flexible circuit board at point A3-A3'. Figure 8 yes Figure 1 The diagram shows a cross-sectional view of the flexible circuit board at point B1-B1'. Figure 9 yes Figure 1 Another cross-sectional schematic diagram of the flexible circuit board at B1-B1' is shown; Figure 10 yesFigure 1 Another cross-sectional schematic diagram of the flexible circuit board at B1-B1' is shown; Figure 11 yes Figure 1 Another cross-sectional schematic diagram of the flexible circuit board at B1-B1' is shown; Figure 12 yes Figure 1 Another cross-sectional schematic diagram of the flexible circuit board at B1-B1' is shown; Figure 13 yes Figure 1 Another cross-sectional schematic diagram of the flexible circuit board at B1-B1' is shown; Figure 14 yes Figure 1 Another cross-sectional schematic diagram of the flexible circuit board at B1-B1' is shown; Figure 15 yes Figure 1 Another cross-sectional schematic diagram of the flexible circuit board at B1-B1' is shown; Figure 16 yes Figure 1 Another cross-sectional schematic diagram of the flexible circuit board at B1-B1' is shown; Figure 17 yes Figure 1 Another cross-sectional schematic diagram of the flexible circuit board at B1-B1' is shown; Figure 18 This is a top view of a display device provided in an embodiment of this application. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.

[0019] Please refer to Figure 1 , Figure 1 This is a top view of a flexible circuit board provided in an embodiment of this application. The flexible circuit board 000 may have a device area 00a and an external area 00b. The device area 00a is used to house electronic devices 100, and the external area 00b is used to house connectors 200 that are plugged into the motherboard. The flexible circuit board 000 also has multiple signal traces 300 inside for connecting the electronic devices 100 and the connectors 200.

[0020] With the development of display technology, the flexible circuit board 000 has a smaller width in the first direction X and a larger length in the second direction Y. Here, the first direction X can be parallel to the flexible circuit board 000 and perpendicular to the overall extension direction of the multiple signal traces 300, and the second direction Y can be parallel to the overall extension direction of the multiple signal traces 300 in the flexible circuit board 000. In this case, the signal traces 300 are also smaller in the first direction X and longer in the second direction Y, resulting in higher impedance. Furthermore, due to the width limitation of the flexible circuit board 000 and the layout limitations of the different signal traces 300, the impedance of the signal traces 300 cannot be reduced by increasing the line width to avoid short circuits between different signal traces 300.

[0021] Please refer to Figure 2 , Figure 2 yes Figure 1 The diagram shows a cross-sectional view of the flexible circuit board at A1-A1'. The flexible circuit board 000 may include: a first conductive layer 10 and a second conductive layer 20 stacked together, and a first dielectric layer 30 located between the first conductive layer 10 and the second conductive layer 20.

[0022] In the flexible circuit board 000, at least one of the multiple signal traces 300 is a target signal trace 400. The target signal trace 400 may include a first target trace 401 located in the first conductive layer 10 and a second target trace 402 located in the second conductive layer 20. The first target trace 401 and the second target trace 402 overlap.

[0023] In this way, the target signal trace 400 can be wired in multiple layers of at least two different conductive layers, and there is no need to increase the width of the portion of the target signal trace 400 located in a single conductive layer in the first direction X. Thus, the unit cross-sectional area of ​​the target signal trace 400 can be increased and the impedance of the target signal trace 400 can be reduced without affecting other signal traces 300. This ensures that the width of the flexible circuit board 000 in the first direction X can still be small, and also improves the utilization rate of the wiring space of the multiple conductive layers in the flexible circuit board 000.

[0024] In summary, the flexible circuit board provided in this application has multiple signal traces internally for connecting electronic devices and connectors. At least one of the multiple signal traces is a target signal trace, which may include a first target trace located in a first conductive layer and a second target trace located in a second conductive layer, with the first target trace overlapping the second target trace. In this way, the target signal trace can be routed across multiple conductive layers without increasing the width of the portion of the target signal trace located in a single conductive layer in the first direction. This allows for increasing the unit cross-sectional area of ​​the target signal trace and reducing its impedance without affecting other signal traces. This ensures that the width of the flexible circuit board in the first direction remains relatively small and also improves the utilization rate of the routing space in the multiple conductive layers of the flexible circuit board.

[0025] like Figure 1 and Figure 2 As shown, the orthographic projection of the first target trace 401 on the first dielectric layer 30 and the orthographic projection of the second target trace 402 on the first dielectric layer 30 have a first overlapping region C1. The first dielectric layer 30 has a plurality of first vias 30a, and the region where each first via 30a is located is within the first overlapping region C1. The first target trace 401 overlaps with the second target trace 402 through the plurality of first vias 30a.

[0026] The target signal trace 400 may further include a first connecting line L1 located within the first via 30a, one end of which is electrically connected to the first target trace 401, and the other end of which is electrically connected to the second target trace 402. The first connecting line L1 may be an annular structure covering the sidewall of the first via 30a, or it may be a solid columnar structure filling the first via 30a. This application does not impose any limitations in this regard.

[0027] In this embodiment, in the first direction X, the width w1 of the first target trace 401 can be greater than or equal to the width w3 of the first overlapping region C1, and / or, the width w2 of the second target trace 402 can be greater than or equal to the width w3 of the first overlapping region C1. Furthermore, in the first direction X, the maximum width w4 of the first via 30a is less than or equal to the width w3 of the first overlapping region C1. Here, the first direction X is parallel to the flexible circuit board 000 and perpendicular to the extension direction of the target signal trace 400.

[0028] For example, such as Figure 2As shown, in the first direction X, the width w1 of the first target trace 401 is equal to the width w3 of the first overlapping region C1, and the width w2 of the second target trace 402 is equal to the width w3 of the first overlapping region C1. That is, the orthographic projection of the first target trace 401 on the first dielectric layer 30 and the orthographic projection of the second target trace 402 on the first dielectric layer 30 completely coincide. Furthermore, in the first direction X, the maximum width w4 of the first via 30a is less than the width w3 of the first overlapping region C1. In this case, compared to a single-layer trace, the unit cross-sectional area of ​​the target signal trace 400 of the double-layer trace can be increased to twice that of a single-layer trace, thereby reducing the impedance of the target signal trace 400 to half that of a single-layer trace.

[0029] In the embodiments of this application, the first via 30a can be a circular via, a square via, an elliptical via, an arbitrary polygonal via, or a via of any other shape; this application does not impose any restrictions on this. Figure 1 As shown, when the first via 30a is a circular via, the maximum width w4 of the first via 30a in the first direction X is the diameter of the first via 30a. Multiple first vias 30a can be arranged in the second direction Y.

[0030] Alternatively, please refer to Figure 3 and Figure 4 , Figure 3 This is a top view of another flexible circuit board provided in an embodiment of this application, wherein, Figure 3 (a) is a top view of the first conductive layer in a flexible circuit board. Figure 3 (b) is a top view of the second conductive layer in a flexible circuit board. Figure 4 yes Figure 3The diagram shows a cross-sectional view of the flexible circuit board at point A2-A2'. Due to the layout constraints of multiple signal traces 300 other than the target signal trace 400, the orthographic projection of the first target trace 401 on the first dielectric layer 30 may overlap with the orthographic projection of at least one signal trace 300 in the second conductive layer 20 on the first dielectric layer 30, and / or, the orthographic projection of the second target trace 402 on the first dielectric layer 30 may overlap with the orthographic projection of at least one signal trace 300 in the first conductive layer 10 on the first dielectric layer 30. In this case, the orthographic projections of the first target trace 401 and the second target trace 402 on the first dielectric layer 30 cannot completely coincide. Therefore, in the first direction X, the width w1 of the first target trace 401 may be greater than the width w3 of the first overlapping region C1, and the width w2 of the second target trace 402 may be greater than the width w3 of the first overlapping region C1. That is, the orthographic projection of the first target trace 401 on the first dielectric layer 30 partially overlaps with the orthographic projection of the second target trace 402 on the first dielectric layer 30. Furthermore, in the first direction X, the maximum width w4 of the first via 30a can be less than the width w3 of the first overlapping region C1.

[0031] In some other embodiments, in the first direction X, the width w1 of the first target trace 401 can be greater than the width w3 of the first overlapping region C1, and the width w2 of the second target trace 402 can be equal to the width w3 of the first overlapping region C1. That is, the orthographic projection of the second target trace 402 on the first dielectric layer 30 is located within the orthographic projection of the first target trace 401 on the first dielectric layer 30.

[0032] Alternatively, in the first direction X, the width w1 of the first target trace 401 can be equal to the width w3 of the first overlapping region C1, and the width w2 of the second target trace 402 can be greater than the width w3 of the first overlapping region C1. That is, the orthographic projection of the first target trace 401 on the first dielectric layer 30 lies within the orthographic projection of the second target trace 402 on the first dielectric layer 30.

[0033] In any of the above embodiments, in the first direction X, the maximum width w4 of the first via 30a can also be equal to the width w3 of the first overlapping region C1. This avoids short circuits caused by the first target trace 401 and / or the second target trace 402 overlapping with other signal traces 300 through the first via 30a, while also ensuring sufficient connectivity between the first target trace 401 and the second target trace 402 through the first via 30a, thus guaranteeing a better overlap effect between the first target trace 401 and the second target trace 402.

[0034] Please refer to Figure 5 , Figure 5 yes Figure 1Another cross-sectional view of the flexible circuit board at A1-A1' is shown in the figure. The flexible circuit board 000 may further include: a third conductive layer 40 located on the side of the second conductive layer 20 opposite to the first conductive layer 10, and a second dielectric layer 50 located between the third conductive layer 40 and the second conductive layer 20.

[0035] In this case, the target signal trace 400 may further include a third target trace 403 located in the third conductive layer 40, which overlaps with the second target trace 402.

[0036] In this way, the target signal trace 400 can be routed in multiple layers of three different conductive layers, and there is no need to increase the width of the portion of the target signal trace 400 located in a single conductive layer in the first direction X. Thus, without affecting other signal traces 300, the unit cross-sectional area of ​​the target signal trace 400 can be further increased, and the impedance of the target signal trace 400 can be reduced. This ensures that the width of the flexible circuit board 000 in the first direction X can still be small, and also improves the utilization rate of the wiring space of the multiple conductive layers in the flexible circuit board 000.

[0037] like Figure 5 As shown, the orthographic projection of the second target trace 402 on the second dielectric layer 50 and the orthographic projection of the third target trace 403 on the second dielectric layer 50 have a second overlapping region C2. The second dielectric layer 50 has a plurality of second vias 50a, and the region where each second via 50a is located is within the second overlapping region C2. The second target trace 402 overlaps with the third target trace 403 through the plurality of second vias 50a.

[0038] The target signal trace 400 may further include a second connecting line L2 located within the second via 50a, one end of which is electrically connected to the second target trace 402, and the other end of which is electrically connected to the third target trace 403. The second connecting line L2 may be an annular structure covering the sidewall of the second via 50a, or it may be a solid columnar structure filling the second via 50a. This application does not impose any limitations on this.

[0039] In this embodiment, in the first direction X, the width w2 of the second target trace 402 is greater than or equal to the width w6 of the second overlapping region C2, and / or, the width w5 of the third target trace 403 is greater than or equal to the width w6 of the second overlapping region C2. Furthermore, in the first direction X, the maximum width w7 of the second via 50a is less than or equal to the width w6 of the second overlapping region C2.

[0040] For example, such as Figure 5As shown, in the first direction X, the width w2 of the second target trace 402 is equal to the width w6 of the second overlapping region C2, and the width w5 of the third target trace 403 is equal to the width w6 of the second overlapping region C2. That is, the orthographic projection of the second target trace 402 onto the second dielectric layer 50 completely coincides with the orthographic projection of the third target trace 403 onto the second dielectric layer 50. Furthermore, in the first direction X, the maximum width w7 of the second via 50a can be less than the width w6 of the second overlapping region C2.

[0041] In the embodiments of this application, the second via 50a can be a circular via, a square via, an elliptical via, an arbitrary polygonal via, or a via of any other shape; this application does not impose any restrictions on this. Figure 1 As shown, when the second via 50a is a circular via, the maximum width w7 of the second via 50a in the first direction X is the diameter of the second via 50a. Multiple second vias 50a can be arranged in the second direction Y.

[0042] Alternatively, please refer to Figure 6 and Figure 7 , Figure 6 This is a top view of another flexible circuit board provided in an embodiment of this application, wherein, Figure 6 (a) is a top view of the first conductive layer in a flexible circuit board. Figure 6 (b) is a top view of the second conductive layer in a flexible circuit board. Figure 6 (c) is a top view of the third conductive layer in a flexible circuit board. Figure 7 yes Figure 6 The diagram shows a cross-sectional view of the flexible circuit board at point A3-A3'. Due to the layout constraints of multiple signal traces 300 other than the target signal trace 400, the orthographic projection of the second target trace 402 on the second dielectric layer 50 may overlap with the orthographic projection of at least one signal trace 300 in the third conductive layer 40 on the second dielectric layer 50, and / or, the orthographic projection of the third target trace 403 on the second dielectric layer 50 may overlap with the orthographic projection of at least one signal trace 300 in the second conductive layer 20 on the second dielectric layer 50. In this case, the orthographic projections of the second target trace 402 and the third target trace 403 on the second dielectric layer 50 cannot completely coincide. Therefore, in the first direction X, the width w2 of the second target trace 402 may be greater than the width w6 of the second overlapping region C2, and the width w5 of the third target trace 403 may be equal to the width w6 of the second overlapping region C2. That is, the orthographic projection of the third target trace 403 on the second dielectric layer 50 lies within the orthographic projection of the second target trace 402 on the second dielectric layer 50. Furthermore, in the first direction X, the maximum width w7 of the second via 50a is less than the width w6 of the second overlapping region C2.

[0043] In some other embodiments, in the first direction X, the width w2 of the second target trace 402 can be greater than the width w6 of the second overlapping region C2, and the width w5 of the third target trace 403 can be greater than the width w6 of the second overlapping region C2. That is, the orthographic projection of the second target trace 402 on the second dielectric layer 50 overlaps with the orthographic projection of the third target trace 403 on the second dielectric layer 50.

[0044] Alternatively, in the first direction X, the width w2 of the second target trace 402 can be equal to the width w6 of the second overlapping region C2, and the width w5 of the third target trace 403 can be greater than the width w6 of the second overlapping region C2. That is, the orthographic projection of the second target trace 402 on the second dielectric layer 50 lies within the orthographic projection of the third target trace 403 on the second dielectric layer 50.

[0045] In any of the above embodiments, in the first direction X, the maximum width w7 of the second via 50a can also be equal to the width w6 of the second overlapping region C2. This avoids electrical connection between the second target trace 402 and / or the third target trace 403 and other signal traces 300 through the second via 50a, while ensuring sufficient connectivity between the second target trace 402 and the third target trace 403 through the second via 50a, thus guaranteeing a better overlap between the two traces.

[0046] like Figure 5 As shown, the orthographic projection of the first overlapping region C1 onto the second dielectric layer 50 and the second overlapping region C2 may have a third overlapping region C3. In this case, the orthographic projections of the first via 30a onto the first dielectric layer 30 and the second via 50a onto the first dielectric layer 30 may at least partially overlap. In some embodiments, the first via 30a may communicate with the second via 50a.

[0047] Or, such as Figure 6 and Figure 7As shown, under the constraints of the layout of other signal traces 300, the orthographic projections of the first target trace 401 and the third target trace 403 on the second dielectric layer 50 do not overlap, or the overlapping area is small in the first direction X. To ensure good overlap between the first target trace 401 and the second target trace 402, and between the third target trace 403 and the second target trace 402, multiple first vias 30a and multiple second vias 50a are arranged in the second direction Y, and are spaced apart in the first direction X. Specifically, the first target trace 401 overlaps with a portion of the second target trace 402 through the multiple first vias 30a. The third target trace 403 overlaps with another portion of the second target trace 402 through the multiple second vias 50a. This ensures that while increasing the unit cross-sectional area of ​​the target signal trace 400 and reducing impedance, it avoids affecting the layout of other signal traces 300, makes full use of the remaining wiring space in different conductive layers, improves the space utilization of multiple conductive layers in the flexible circuit board 000, and enhances the flexibility of signal trace layout.

[0048] Please refer to Figure 1 , Figure 3 and Figure 6 The flexible circuit board 000 may also have a bending area 00c, which is located between the device area 00a and the external area 00b.

[0049] Please refer to Figure 8 , Figure 8 yes Figure 1 The diagram shows a cross-sectional view of the flexible circuit board at point B1-B1'. The portion of the target signal trace 400 located within the bending region 00c is the first bending portion WZ1. The flexible circuit board 000 also has a grounding trace inside, and the portion of the grounding trace located within the bending region 00c is the second bending portion WZ2. The second bending portion WZ2 has multiple through holes K.

[0050] The first bent portion WZ1 is located in any one of the conductive layers in the flexible circuit board 000, and the second bent portion WZ2 is located in another different conductive layer in the flexible circuit board 000. The orthographic projection of the first bent portion WZ1 on the first dielectric layer 30 overlaps with the orthographic projection of the second bent portion WZ2 on the first dielectric layer 30.

[0051] For example, in the case where the flexible circuit board 000 includes a first conductive layer 10 and a second conductive layer 20, the first bent portion WZ1 can be located in either conductive layer, and the second bent portion WZ2 is located in the other conductive layer. Figure 8As shown, the flexible circuit board 000 includes: a first conductive layer 10 and a second conductive layer 20. The first bent portion WZ1 can be located in the first conductive layer 10, and the second bent portion WZ2 is located in the second conductive layer 20.

[0052] Please refer to Figure 9 , Figure 9 yes Figure 1 Another cross-sectional view of the flexible circuit board at B1-B1' is shown. In the case where the flexible circuit board 000 includes a first conductive layer 10, a second conductive layer 20 and a third conductive layer 40, the first bent portion WZ1 can be located in any one of the conductive layers, and the second bent portion WZ2 is located in the other conductive layer.

[0053] Alternatively, please refer to Figure 10 , Figure 10 yes Figure 1 The diagram shows another cross-sectional view of the flexible circuit board at B1-B1'. In the case where the flexible circuit board 000 includes a first conductive layer 10, a second conductive layer 20, and a third conductive layer 40, the first bent portion WZ1 can be located in any one of the conductive layers, and the second bent portion WZ2 is located in the other two conductive layers.

[0054] Alternatively, please refer to Figure 11 , Figure 11 yes Figure 1 The diagram shows another cross-sectional view of the flexible circuit board at B1-B1'. In the case where the flexible circuit board 000 includes a first conductive layer 10, a second conductive layer 20, and a third conductive layer 40, the first bent portion WZ1 can be located in any two of the conductive layers, and the second bent portion WZ2 is located in the other conductive layer.

[0055] In this way, since the portion of at least one conductive layer located within the bending region 00c includes the second bending portion WZ2, the orthographic projection of the first bending portion WZ1 on the first dielectric layer 30 overlaps with the orthographic projection of the second bending portion WZ2 on the first dielectric layer 30, and the second bending portion WZ2 has multiple through holes K, it is possible to reduce the impedance of the target signal trace 400 and improve the utilization rate of the wiring space of the flexible circuit board 000 while ensuring that the bending performance of the flexible circuit board 000 at the bending region 00c remains good.

[0056] like Figure 8 As shown, when the target signal trace 400 includes a first target trace 401 and a second target trace 402, the portion of the first target trace 401 located within the bending region 00c is the first bending portion WZ1, and the second target trace 402 is distributed outside the bending region 00c. The portion of the second conductive layer 20 where the second target trace 402 is located distributed within the bending region 00c includes the second bending portion WZ2.

[0057] Alternatively, please refer to Figure 9 In the case where the target signal trace 400 includes a first target trace 401, a second target trace 402, and a third target trace 403, the portion of the first target trace 401 located within the bending region 00c is the first bending portion WZ1, while the second target trace 402 and the third target trace 403 are both distributed outside the bending region 00c. The portion of the second conductive layer 20 where the second target trace 402 is located and / or the third conductive layer 40 where the third target trace 403 is located distributed within the bending region 00c includes the second bending portion WZ2. For example, as... Figure 9 As shown, the target signal trace 400 includes a first target trace 401, a second target trace 402, and a third target trace 403. The portion of the first target trace 401 located within the bending region 00c is the first bending portion WZ1. The second target trace 402 and the third target trace 403 are both distributed outside the bending region 00c. The portion of the third conductive layer 40 containing the third target trace 40 distributed within the bending region 00c includes the second bending portion WZ2. Figure 12 As shown, Figure 12 yes Figure 1 The diagram shows another cross-sectional view of the flexible circuit board at B1-B1'. The target signal trace 400 includes a first target trace 401, a second target trace 402, and a third target trace 403. The portion of the first target trace 401 located within the bending region 00c is the first bending portion WZ1. The second target trace 402 and the third target trace 403 are both distributed outside the bending region 00c. The portion of the second conductive layer 20 containing the second target trace 402 distributed within the bending region 00c includes the second bending portion WZ2. (As shown...) Figure 10 As shown, the target signal trace 400 includes a first target trace 401, a second target trace 402, and a third target trace 403. The portion of the first target trace 401 located within the bending region 00c is the first bending portion WZ1. The second target trace 402 and the third target trace 403 are both distributed outside the bending region 00c. The portions of the second conductive layer 20 containing the second target trace 402 and the third conductive layer 40 containing the third target trace 403 distributed within the bending region 00c both include the second bending portion WZ2.

[0058] Alternatively, please refer to Figure 11 In the case where the target signal trace 400 includes a first target trace 401, a second target trace 402, and a third target trace 403, the portion of the first target trace 401 and / or the second target trace 402 located within the bending region 00c is the first bending portion WZ1, and the third target trace 403 is distributed outside the bending region 00c. The portion of the third conductive layer 40 where the third target trace 403 is located distributed within the bending region 00c includes the second bending portion WZ2. For example, as... Figure 11As shown, the target signal trace 400 includes a first target trace 401, a second target trace 402, and a third target trace 403. The portion of the first target trace 401 and the second target trace 402 located within the bending region 00c is the first bending portion WZ1. The third target trace 403 is distributed outside the bending region 00c. The portion of the third conductive layer 40 containing the third target trace 40 distributed within the bending region 00c includes the second bending portion WZ2. Figure 13 As shown, Figure 13 yes Figure 1 The diagram shows another cross-sectional view of the flexible circuit board at B1-B1'. The target signal trace 400 includes a first target trace 401, a second target trace 402, and a third target trace 403. The portion of the second target trace 402 located within the bending region 00c is the first bending portion WZ1. The third target trace 403 is distributed outside the bending region 00c. The portion of the third conductive layer 40 containing the third target trace 40 located within the bending region 00c includes the second bending portion WZ2.

[0059] Alternatively, please refer to Figure 14 , Figure 14 yes Figure 1 The diagram shows another cross-sectional view of the flexible circuit board at B1-B1'. In the case where the target signal trace 400 includes a first target trace 401, a second target trace 402, and a third target trace 403, the portion of the first target trace 401 and / or the third target trace 403 located within the bending region 00c is the first bending portion WZ1, and the second target trace 402 is distributed outside the bending region 00c. The portion of the second conductive layer 20 containing the second target trace 402 distributed within the bending region 00c includes the second bending portion WZ2. For example... Figure 14 As shown, the target signal trace 400 includes a first target trace 401, a second target trace 402, and a third target trace 403. The portion of the third target trace 403 located within the bending region 00c is the first bending portion WZ1. The second target trace 402 is distributed outside the bending region 00c. The portion of the second conductive layer 20 containing the second target trace 402 distributed within the bending region 00c includes the second bending portion WZ2. Figure 15 As shown, Figure 15 yes Figure 1 The diagram shows another cross-sectional view of the flexible circuit board at B1-B1'. The target signal trace 400 includes a first target trace 401, a second target trace 402, and a third target trace 403. The portion of the first target trace 401 and the third target trace 403 located within the bending region 00c is the first bending portion WZ1. The second target trace 402 is distributed outside the bending region 00c. The portion of the second conductive layer 20 containing the second target trace 402 distributed within the bending region 00c includes the second bending portion WZ2.

[0060] Alternatively, please refer to Figure 16 , Figure 16 yes Figure 1 The diagram shows another cross-sectional view of the flexible circuit board at B1-B1'. In the case where the target signal trace 400 includes a first target trace 401, a second target trace 402, and a third target trace 403, the portion of the second target trace 402 located within the bending region 00c is the first bending portion WZ1, while both the first target trace 401 and the third target trace 403 are distributed outside the bending region 00c. The portions of the first conductive layer 10 containing the first target trace 401 and / or the third conductive layer 40 containing the third target trace 403 distributed within the bending region 00c include the second bending portion WZ2. For example... Figure 16 As shown, the target signal trace 400 includes a first target trace 401, a second target trace 402, and a third target trace 403. The portion of the second target trace 402 located within the bending region 00c is the first bending portion WZ1. Both the first target trace 401 and the third target trace 403 are distributed outside the bending region 00c. The portion of the first conductive layer 10 containing the first target trace 401 distributed within the bending region 00c includes the second bending portion WZ2. For example... Figure 17 As shown, Figure 17 yes Figure 1 The diagram shows another cross-sectional view of the flexible circuit board at B1-B1'. The target signal trace 400 includes a first target trace 401, a second target trace 402, and a third target trace 403. The portion of the second target trace 402 located within the bending region 00c is the first bending portion WZ1. Both the first target trace 401 and the third target trace 403 are distributed outside the bending region 00c. The portions of the first conductive layer 10 containing the first target trace 401 and the third conductive layer 40 containing the third target trace 403 distributed within the bending region 00c both include the second bending portion WZ2. This application is not limited to the above embodiments.

[0061] It should be noted that when other signal traces 300 and the second bent portion WZ2 are located in the same conductive layer, and at least partially located in the bending region 00c, the orthographic projection of the signal trace 300 on the first dielectric layer 30 does not overlap with the orthographic projection of the second bent portion WZ2 on the first dielectric layer 30, and the portion of the signal trace 300 located in the bending region 00c does not have a through hole K.

[0062] It should also be noted that the multiple conductive layers in the flexible circuit board 000 can all be film structures made of conductive materials such as copper foil, and the multiple signal traces 300 can all be copper traces. The electronic devices 100 in the device area 00a of the flexible circuit board 000 may include: a display driver integrated circuit (DDIC) and a touch integrated circuit (TIC).

[0063] The multiple signal traces 300 in the flexible circuit board 000 may include display driver lines and touch driver lines. The display driver lines connect the display driver chip to the connector 200, providing display signals to the display panel to drive it and enable display functionality. Display signals typically include communication signals (high-frequency signals), power signals, and other signals such as digital and analog signals. The connector 200 has a power interface that provides power signals to the flexible circuit board 000 and a MIPI interface that provides Mobile Industry Processor Interface (MIPI) signals. Correspondingly, some signal traces 300 in the display driver lines connected to the connector 200 can be used to transmit power signals, such as AVDD, AVEE, and VDDI signals, to power the display driver chip; other signal traces 300 can be used to transmit MIPI signals. The touch driver lines connect the touch chip to the connector 200, providing touch signals to the display panel to enable touch functionality. Touch signals may also include communication signals and power signals. In this embodiment of the application, the target signal trace 400 can be any one or more of the multiple signal traces 300.

[0064] In the embodiments of this application, such as Figure 2 As shown, the first dielectric layer 30 in the flexible circuit board 000 may include: a first cover film 31 and a second cover film 32 stacked together, and a first adhesive layer 33 located between the first cover film 31 and the second cover film 32. The first cover film 31 is located between the first conductive layer 10 and the first adhesive layer 33, and the second cover film 32 is located between the second conductive layer 20 and the first adhesive layer 33. When the flexible circuit board 000 includes the first conductive layer 10 and the second conductive layer 20, the flexible circuit board 000 may further include: a third cover film 60 located on the side of the first conductive layer 10 opposite to the first dielectric layer 30, and a fourth cover film 70 located on the side of the second conductive layer 20 opposite to the first dielectric layer 30.

[0065] like Figure 7As shown, when the flexible circuit board 000 includes a first conductive layer 10, a second conductive layer 20, and a third conductive layer 40, the second dielectric layer 50 may include: a fourth cover film 70, a fifth cover film 51, and a second adhesive layer 52 located between the fourth cover film 70 and the fifth cover film 51. The fifth cover film 51 is located between the third conductive layer 40 and the second adhesive layer 52. The flexible circuit board 000 may also include: a sixth cover film 80 located on the side of the third conductive layer 40 opposite to the second dielectric layer 50.

[0066] Any cover film in the flexible circuit board 000 can be a film layer made of polyimide (PI) material, used to cover the conductive layer adjacent to the cover film, and play a role in insulation and protection.

[0067] In summary, the flexible circuit board provided in this application has multiple signal traces internally for connecting electronic devices and connectors. At least one of the multiple signal traces is a target signal trace, which may include a first target trace located in a first conductive layer and a second target trace located in a second conductive layer, with the first target trace overlapping the second target trace. In this way, the target signal trace can be routed across multiple conductive layers without increasing the width of the portion of the target signal trace located in a single conductive layer in the first direction. This allows for increasing the unit cross-sectional area of ​​the target signal trace and reducing its impedance without affecting other signal traces. This ensures that the width of the flexible circuit board in the first direction remains relatively small and also improves the utilization rate of the routing space in the multiple conductive layers of the flexible circuit board.

[0068] This application also provides a display device, please refer to... Figure 18 , Figure 18 This is a top view of a display device provided in an embodiment of this application. The display device 00 may include: a display panel 001, a flexible circuit board 000, and a main board 002. One end of the flexible circuit board 000 is bonded to the display panel 001, and the other end is plugged into the main board 002 via a connector 200. The flexible circuit board 000 is any of the flexible circuit boards 000 described above. Figure 1 As shown, the flexible circuit board 000 has gold fingers 00d located on the side of the device area 00a opposite to the external connection area 00b. The flexible circuit board 000 can be bonded and connected to the display panel 001 through the gold fingers 00d. The display device 00 can be any product or component with display function, such as a mobile phone, tablet computer, television, advertising machine, display screen, digital photo frame, etc.

[0069] It should be noted that the dimensions of layers and regions may be exaggerated in the accompanying drawings for clarity. Furthermore, it is understood that when an element or layer is referred to as being "on" another element or layer, it can be directly on the other element, or there may be intermediate layers. Additionally, it is understood that when an element or layer is referred to as being "below" another element or layer, it can be directly below the other element, or there may be more than one intermediate layer or element. Furthermore, it is also understood that when a layer or element is referred to as being "between" two layers or two elements, it can be the only layer between the two layers or two elements, or there may be more than one intermediate layer or element. Similar reference numerals throughout indicate similar elements.

[0070] In this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance. The term "multiple" refers to two or more unless otherwise expressly defined.

[0071] The above description is merely an optional embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A flexible circuit board, characterized by, The flexible circuit board has a device area for disposing electronic devices and an external connection area for disposing a connector for plugging with a mainboard, and an internal part of the flexible circuit board has a plurality of signal traces for connecting the electronic devices and the connector; The flexible circuit board comprises a first conductive layer and a second conductive layer which are stacked, and a first dielectric layer between the first conductive layer and the second conductive layer; At least one of the plurality of signal traces is a target signal trace, the target signal trace comprises a first target trace in the first conductive layer and a second target trace in the second conductive layer, and the first target trace and the second target trace are overlapped.

2. The flexible circuit board of claim 1, wherein, The first target trace has a first projection on the first dielectric layer, and the second target trace has a second projection on the first dielectric layer, and the first projection and the second projection have a first overlapping area; The first dielectric layer has a plurality of first vias, each of the first vias is located in the first overlapping area, and the first target trace is overlapped with the second target trace through the plurality of first vias.

3. The flexible circuit board of claim 2, wherein, In a first direction, a width of the first target trace is greater than or equal to a width of the first overlapping area, and / or a width of the second target trace is greater than or equal to the width of the first overlapping area, and in the first direction, a maximum width of the first via is less than or equal to the width of the first overlapping area. The first direction is parallel to the flexible circuit board and perpendicular to an extension direction of the target signal trace.

4. The flexible circuit board of claim 2, wherein, The flexible circuit board further comprises a third conductive layer on a side of the second conductive layer away from the first conductive layer, and a second dielectric layer between the third conductive layer and the second conductive layer; The target signal trace further comprises a third target trace in the third conductive layer, and the third target trace is overlapped with the second target trace.

5. The flexible circuit board of claim 4, wherein, The second target trace has a third projection on the second dielectric layer, and the third target trace has a fourth projection on the second dielectric layer, and the third projection and the fourth projection have a second overlapping area; The second dielectric layer has a plurality of second vias, each of the second vias is located in the second overlapping area, and the second target trace is overlapped with the third target trace through the plurality of second vias.

6. The flexible circuit board of claim 5, wherein, In a first direction, a width of the second target trace is greater than or equal to a width of the second overlapping area, and / or a width of the third target trace is greater than or equal to the width of the second overlapping area, and in the first direction, a maximum width of the second via is less than or equal to the width of the second overlapping area. The first direction is parallel to the flexible circuit board and perpendicular to an extension direction of the target signal trace.

7. The flexible circuit board of claim 5, wherein, The plurality of first vias are arranged in a second direction, and the plurality of second vias are arranged in the second direction, and the plurality of first vias and the plurality of second vias are distributed in the first direction. The first direction is parallel to the flexible circuit board and perpendicular to the extending direction of the target signal traces; and the second direction is parallel to the extending direction of the target signal traces. The first target trace is overlapped with a part of the second target traces through the first plurality of vias; and the third target trace is overlapped with another part of the second target traces through the second plurality of vias.

8. The flexible circuit board of any one of claims 1-7, wherein, The flexible circuit board further has a bending region between the device region and the external connection region; and a part of the target signal traces in the bending region is a first bending part. The flexible circuit board further has a ground trace for grounding in the interior; and a part of the ground trace in the bending region is a second bending part, which has a plurality of through holes. The first bending part is in any one of the conductive layers of the flexible circuit board, and the second bending part is in another different conductive layer of the flexible circuit board, and the orthographic projection of the first bending part on the first dielectric layer and the orthographic projection of the second bending part on the first dielectric layer overlap.

9. The flexible circuit board of claim 8, wherein, In the case that the target signal traces include first target traces and second target traces, the part of the first target traces in the bending region is the first bending part, and the second target traces are distributed outside the bending region; the part of the second conductive layer where the second target traces are distributed in the bending region includes the second bending part. In the case that the target signal traces include first target traces, second target traces and third target traces, the part of the first target traces in the bending region is the first bending part, and the second target traces and the third target traces are both distributed outside the bending region; the part of the second conductive layer where the second target traces are distributed in the bending region and / or the part of the third conductive layer where the third target traces are distributed in the bending region includes the second bending part. In the case that the target signal traces include first target traces, second target traces and third target traces, the part of the first target traces and / or the part of the second target traces in the bending region is the first bending part, and the third target traces are distributed outside the bending region; the part of the third conductive layer where the third target traces are distributed in the bending region includes the second bending part.

10. A display device, characterized by comprising: The display panel, the flexible circuit board and the main board; one end of the flexible circuit board is connected with the display panel, and the other end is connected with the main board through the connector; the flexible circuit board is any one of the flexible circuit boards in claims 1-9. ​

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